diff options
| author | iximeow <me@iximeow.net> | 2021-03-21 02:58:09 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-03-21 02:58:09 -0700 |
| commit | da8501f8463a106aec2d4389d71ab86add23a51a (patch) | |
| tree | d1047a9200c8f745ff5e392a9680bf450520df2a | |
| parent | 5223427b217cc567deb55ea420b8da58aea64d68 (diff) | |
add missing vpmaxuw, remove nonsense avx mov
| -rw-r--r-- | src/long_mode/display.rs | 2 | ||||
| -rw-r--r-- | src/long_mode/mod.rs | 2 | ||||
| -rw-r--r-- | src/long_mode/vex.rs | 7 | ||||
| -rw-r--r-- | test/long_mode/mod.rs | 1 |
4 files changed, 11 insertions, 1 deletions
diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs index 5c733a2..997a9a9 100644 --- a/src/long_mode/display.rs +++ b/src/long_mode/display.rs @@ -909,6 +909,7 @@ const MNEMONICS: &[&'static str] = &[ "vpmaxsd", "vpmaxsw", "vpmaxub", + "vpmaxuw", "vpmaxud", "vpminsw", "vpminsd", @@ -2130,6 +2131,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color Opcode::VPMAXSD | Opcode::VPMAXSW | Opcode::VPMAXUB | + Opcode::VPMAXUW | Opcode::VPMAXUD | Opcode::VPMINSW | Opcode::VPMINSD | diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 266bd2e..2d29835 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -1549,6 +1549,7 @@ pub enum Opcode { VPMAXSD, VPMAXSW, VPMAXUB, + VPMAXUW, VPMAXUD, VPMINSW, VPMINSD, @@ -3181,6 +3182,7 @@ impl InstDecoder { Opcode::VPMAXSD | Opcode::VPMAXSW | Opcode::VPMAXUB | + Opcode::VPMAXUW | Opcode::VPMAXUD | Opcode::VPMINSW | Opcode::VPMINSD | diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs index 41f5c29..8bd55c1 100644 --- a/src/long_mode/vex.rs +++ b/src/long_mode/vex.rs @@ -1666,7 +1666,7 @@ fn read_vex_instruction<T: Iterator<Item=u8>>(opcode_map: VEXOpcodeMap, bytes: & 0x5e => (Opcode::VDIVSS, VEXOperandCode::G_V_E_xmm), 0x5f => (Opcode::VMAXSS, VEXOperandCode::G_V_E_xmm), 0x6f => (Opcode::VMOVDQU, if L { VEXOperandCode::G_E_ymm } else { VEXOperandCode::G_E_xmm }), - 0x70 => (Opcode::VMOVSHDUP, if L { VEXOperandCode::G_E_ymm_imm8 } else { VEXOperandCode::G_E_xmm_imm8 }), +// 0x70 => (Opcode::VMOVSHDUP, if L { VEXOperandCode::G_E_ymm_imm8 } else { VEXOperandCode::G_E_xmm_imm8 }), 0x7e => (Opcode::VMOVQ, if L { instruction.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOpcode); } else { VEXOperandCode::G_E_xmm }), 0x7f => (Opcode::VMOVDQU, if L { VEXOperandCode::E_G_ymm } else { VEXOperandCode::E_G_xmm }), 0xc2 => (Opcode::VCMPSS, VEXOperandCode::G_V_E_xmm_imm8), @@ -1938,6 +1938,11 @@ fn read_vex_instruction<T: Iterator<Item=u8>>(opcode_map: VEXOpcodeMap, bytes: & } else { VEXOperandCode::G_V_E_xmm }), + 0x3E => (Opcode::VPMAXUW, if L { + VEXOperandCode::G_V_E_ymm + } else { + VEXOperandCode::G_V_E_xmm + }), 0x3F => (Opcode::VPMAXUD, if L { VEXOperandCode::G_V_E_ymm } else { diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs index fff10a2..fa2e11d 100644 --- a/test/long_mode/mod.rs +++ b/test/long_mode/mod.rs @@ -1550,6 +1550,7 @@ fn test_vex() { test_instr(&[0xc5, 0xe1, 0x55, 0x03], "vandnps xmm0, xmm3, [rbx]"); test_instr(&[0xc5, 0xe0, 0x56, 0x03], "vorpd xmm0, xmm3, [rbx]"); test_instr(&[0xc5, 0xe1, 0x56, 0x03], "vorps xmm0, xmm3, [rbx]"); + test_instr(&[0xc4, 0xa2, 0x15, 0x3e, 0x14, 0xb9], "vpmaxuw ymm2, ymm13, [rcx + r15 * 4]"); } #[test] |