add MASM-style formatting support in all modes

this includes a mildly nightmarish bit of test harness to compare
against ml.exe/ml64.exe/dumpbin.exe, which in turn chased out a bunch of
bugs. yay!

15 files changed, 28185 insertions, 21902 deletions

diff --git a/CHANGELOG b/CHANGELOG
index b60363b..6f18457 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,5 +1,10 @@
 ## 2.2.0
 
+* add DisplayStyle::Masm to long mode, protected mode, and real mode instruction formatting.
+  this "masm-style" formatting is derived from the output format of
+  dumpbin.exe, and (on Windows) is tested to round-trip through masm.exe or
+  ml64.exe as appropriate. caveats apply; see the documentation on DisplayStyle for details.
+
 * `Instruction::invalid()` returns instructions with opcode `Opcode::Invalid`, rather than nop.
   decoding an instruction with `opcode == Invalid` was already possible through attempting
   to decode invalid opcodes into a `&mut Instruction`; `invalid()` returning a no-operand
@@ -7,6 +12,29 @@
   that did not reflect a decoded x86 instruction.
   it has long passed its time. thank you for the patch, @Grond66!
 
+testing instruction round-tripping through `masm` found a few bugs, which are also fixed in this release:
+
+* fix vpbroadcast* with a SIMD register source being able to claim ymm as a source. the source
+  register according to manuals and every assembler is xmm-size, if a register. semantically this
+  has little effect: the broadcasted value is the low lane of the source register in these cases.
+* fix vpbroadcast* with a memory source reporting incorrect memory sizes. the memory address being
+  broadcast indicates the size, which is one byte/word/dword/qword. it is unrelated to the
+  broadcasted-to vector length.
+* fix incorrect index-vector-register size choice for vgatherdpd. the index register is xmm, not
+  depends-on-L xmm/ymm.
+* fix SEAM and {rd,wr}{fs,gs}base instructions being decoded in 32-bit and 16-bit modes.
+* the pextr*/pinsr*/insertps/extrps immediate is now an unsigned 8-bit immediate, rather than signed.
+  these instructions consume 8 bit of immediate as several fields compressed into 8 bits, rather
+  than as a numeric value, so sign extension is not useful.  further, extending the immediate makes
+  it more difficult to round-trip disassembly through other assemblers.
+* fix vmread/vmwrite reporting 8-byte accesses outside long mode; they are 4-byte accesses in
+  protected and real modes.
+* fix lfs/lgs/lss loading into dword registers when operating with a short (16-bit segment/offset) pointer.
+  in these cases, the offset is loaded into a 16-bit register, not 32-bit. the upper 32 bits are unchanged.
+* fix 32/16-bit unprefixed lss reporting too-small memory read.  in both modes
+  lss could be decoded as reading only an offset, rather than an offset (into the
+  destination register) and segment (into ss)
+
 ## 2.1.1
 
 * fix jrcxz/jecxz/jcxz having "two operands". accessing the "second" operand
diff --git a/Cargo.toml b/Cargo.toml
index 987d4c5..e7158ea 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -26,6 +26,7 @@ strum = { version = "0.28.0", features = ["derive"], optional = true }
 [dev-dependencies]
 rand = { version = "0.10.0", features = ["thread_rng"] }
 asmlinator = { version = "2.1.0" }
+tempfile = { version = "=3.24.0" }
 
 [[test]]
 name = "test"
diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs
index 67e359e..9f2022c 100644
--- a/src/long_mode/display.rs
+++ b/src/long_mode/display.rs
@@ -1,3 +1,5 @@
+mod masm;
+
 use core::fmt;
 
 // allowing these deprecated items for the time being, not yet breaking yaxpeax-x86 apis
@@ -3573,7 +3575,14 @@ impl<'instr> fmt::Display for InstructionDisplayer<'instr> {
 /// enum controlling how `Instruction::display_with` renders instructions. `Intel` is more or less
 /// intel syntax, though memory operand sizes are elided if they can be inferred from other
 /// operands.
-#[derive(Copy, Clone)]
+///
+/// note that `yaxpeax-x86` does not (and can not!) try to guarantee that formatting through any
+/// `DisplayStyle` round-trips through an assembler to produce the same bytes as were intially
+/// disassembled. opcode choice (for example, `0x31` vs `0x33` encodings of register-register
+/// `xor`) may not be controllable, immediates and displacements may have multiple valid encodings,
+/// and prefix handling in general is very lossy especially in the presence of repeat or
+/// ineffectual prefixes.
+#[derive(Copy, Clone, Debug)]
 pub enum DisplayStyle {
     /// intel-style syntax for instructions, like
     /// `add rax, [rdx + rcx * 2 + 0x1234]`
@@ -3581,6 +3590,12 @@ pub enum DisplayStyle {
     /// C-style syntax for instructions, like
     /// `rax += [rdx + rcx * 2 + 0x1234]`
     C,
+    /// format instructions in the syntax used by the Microsoft Assembler (MASM), like
+    /// `add rax, dword ptr [rdx + rcx * 2 + 1234h]`
+    ///
+    /// some instructions are decoded by `dumpbin.exe` and `yaxpeax-x86` but cannot be assembled by
+    /// `masm.exe` or `ml64.exe`. as one example, `ud0`.
+    Masm,
     // one might imagine an ATT style here, which is mostly interesting for reversing operand
     // order.
     // well.
@@ -3626,7 +3641,10 @@ impl <'instr, T: fmt::Write, Y: YaxColors> Colorize<T, Y> for InstructionDisplay
 struct NoContext;
 
 impl Instruction {
-    /// format this instruction into `out` as a plain text string.
+    /// format this instruction into `out` as a plain text string, in the default display
+    /// configuration for an `x86_64` instruction (that is, roughly Intel syntax).
+    ///
+    /// for more customizable formatting options, see [`Instruction::display_with`].
     #[cfg_attr(feature="profiling", inline(never))]
     pub fn write_to<T: fmt::Write>(&self, out: &mut T) -> fmt::Result {
         let mut out = yaxpeax_arch::display::FmtSink::new(out);
@@ -4148,6 +4166,9 @@ impl <'instr, T: fmt::Write, Y: YaxColors> ShowContextual<u64, NoContext, T, Y>
             DisplayStyle::C => {
                 contextualize_c(instr, &mut out)
             }
+            DisplayStyle::Masm => {
+                masm::contextualize(&instr, &mut out)
+            }
         }
     }
 }
@@ -4442,6 +4463,9 @@ mod buffer_sink {
                 DisplayStyle::C => {
                     contextualize_c(&display.instr, &mut handle)?;
                 }
+                DisplayStyle::Masm => {
+                    super::masm::contextualize(&display.instr, &mut handle)?;
+                }
             }
 
             Ok(self.text_str())
diff --git a/src/long_mode/display/masm.rs b/src/long_mode/display/masm.rs
new file mode 100644
index 0000000..ea1f859
--- /dev/null
+++ b/src/long_mode/display/masm.rs
@@ -0,0 +1,1265 @@
+use core::fmt;
+
+use yaxpeax_arch::AddressBase;
+use yaxpeax_arch::LengthedInstruction;
+
+use crate::long_mode::{
+    RegSpec, Opcode, Operand, OperandSpec,
+    MergeMode, SaeMode,
+    Instruction, RegisterBank,
+    display::DisplaySinkExt, OperandVisitor,
+};
+
+use yaxpeax_arch::display::DisplaySink;
+use yaxpeax_arch::safer_unchecked::GetSaferUnchecked as _;
+use yaxpeax_arch::safer_unchecked::unreachable_kinda_unchecked as unreachable_unchecked;
+
+struct DisplayingOperandVisitor<'a, T> {
+    f: &'a mut T,
+    show_sae: bool,
+    sae_mode: Option<SaeMode>,
+}
+
+impl<'a, T> DisplayingOperandVisitor<'a, T> {
+    pub fn new(f: &'a mut T) -> Self {
+        Self { f, show_sae: false, sae_mode: None }
+    }
+}
+
+fn needs_leading_0(imm: u64) -> bool {
+    let mut rem = imm;
+    let mut digit = 0;
+    while rem > 0 {
+        digit = rem & 0xf;
+        rem = rem >> 4;
+    }
+
+    // digit is whatever the top non-zero hex digit was in the number
+    digit >= 10
+}
+
+#[test]
+fn test_leading_0() {
+    assert!(needs_leading_0(0xa0));
+    assert!(needs_leading_0(0xa00000));
+    assert!(!needs_leading_0(0x900000));
+    assert!(needs_leading_0(0xf12345));
+}
+
+fn hex_ambiguous(imm: u64) -> bool {
+    imm >= 10
+}
+
+static RELATIVE_BRANCHES: [Opcode; 23] = [
+    Opcode::JMP, Opcode::CALL,
+    Opcode::JRCXZ, Opcode::JECXZ,
+    Opcode::LOOP, Opcode::LOOPZ, Opcode::LOOPNZ,
+    Opcode::JO, Opcode::JNO,
+    Opcode::JB, Opcode::JNB,
+    Opcode::JZ, Opcode::JNZ,
+    Opcode::JNA, Opcode::JA,
+    Opcode::JS, Opcode::JNS,
+    Opcode::JP, Opcode::JNP,
+    Opcode::JL, Opcode::JGE,
+    Opcode::JLE, Opcode::JG,
+];
+
+struct RelativeBranchPrinter<'a, F: DisplaySink> {
+    inst: &'a Instruction,
+    out: &'a mut F,
+}
+
+impl<'a, F: DisplaySink> crate::long_mode::OperandVisitor for RelativeBranchPrinter<'a, F> {
+    // return true if we printed a relative branch offset, false otherwise
+    type Ok = bool;
+    // but errors are errors
+    type Error = fmt::Error;
+
+    fn visit_reg(&mut self, _reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_deref(&mut self, _base: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_disp(&mut self, _base: RegSpec, _rel: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i8(&mut self, rel: i8) -> Result<Self::Ok, Self::Error> {
+        if RELATIVE_BRANCHES.contains(&self.inst.opcode) {
+            self.out.write_char('$')?;
+            let rel = rel.wrapping_add(0u64.wrapping_offset(self.inst.len()).to_linear() as i8);
+            let mut v = rel as u8;
+            if rel < 0 {
+                self.out.write_char('-')?;
+                v = rel.unsigned_abs();
+            } else {
+                self.out.write_char('+')?;
+            }
+            if needs_leading_0(v as u64) {
+                self.out.write_char('0')?;
+            }
+            write!(self.out, "{:X}", v)?;
+            if hex_ambiguous(v as u64) {
+                self.out.write_char('h')?;
+            }
+            Ok(true)
+        } else {
+            Ok(false)
+        }
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i32(&mut self, rel: i32) -> Result<Self::Ok, Self::Error> {
+        if RELATIVE_BRANCHES.contains(&self.inst.opcode) || self.inst.opcode == Opcode::XBEGIN {
+            let rel = rel.wrapping_add(0u64.wrapping_offset(self.inst.len()).to_linear() as i32);
+            let mut v = rel as u32;
+
+            if v >= 128 && v < 256 {
+                // we'll print two digits, but nasm will try to shorten the jump to a 1-byte offset form. then the
+                // offset is out of range and nasm complains "jump destination too far : by <N> byte(s)".
+                // "jmp near ptr " is the full name of "i mean it, use a 32-bit offset", so use that to ward away
+                // the problematic "optimization".
+                self.out.write_str("near ptr ")?;
+            }
+
+            self.out.write_char('$')?;
+            if rel < 0 {
+                self.out.write_char('-')?;
+                v = rel.unsigned_abs();
+            } else {
+                self.out.write_char('+')?;
+            }
+            if needs_leading_0(v as u64) {
+                self.out.write_char('0')?;
+            }
+            write!(self.out, "{:X}", v)?;
+            if hex_ambiguous(v as u64) {
+                self.out.write_char('h')?;
+            }
+            Ok(true)
+        } else {
+            Ok(false)
+        }
+    }
+    fn visit_u8(&mut self, _imm: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_i16(&mut self, _imm: i16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u16(&mut self, _imm: u16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u32(&mut self, _imm: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_i64(&mut self, _imm: i64) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u64(&mut self, _imm: u64) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_abs_u32(&mut self, _imm: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_abs_u64(&mut self, _imm: u64) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale(&mut self, _index: RegSpec, _scale: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_disp(&mut self, _index: RegSpec, _scale: u8, _disp: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_disp(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _disp: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_other(&mut self) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge_sae(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode, _sae_mode: SaeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge_sae_noround(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_disp_masked(&mut self, _base: RegSpec, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_deref_masked(&mut self, _base: RegSpec, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_masked(&mut self, _index: RegSpec, _scale: u8, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_disp_masked(&mut self, _index: RegSpec, _scale: u8, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_masked(&mut self, _base: RegSpec, _index: RegSpec, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_disp_masked(&mut self, _base: RegSpec, _index: RegSpec, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_masked(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_disp_masked(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+}
+
+fn masm_displacement<T: core::fmt::Write>(f: &mut T, disp: i32) -> Result<(), core::fmt::Error> {
+    let udisp = if disp >= 0 {
+        write!(f, "+ ")?;
+        disp as u64
+    } else {
+        write!(f, "- ")?;
+        -(disp as i64) as u64
+    };
+
+    if needs_leading_0(udisp) {
+        write!(f, "0")?;
+    }
+    write!(f, "{:X}", udisp)?;
+    if hex_ambiguous(udisp) {
+        write!(f, "h")?;
+    }
+
+    Ok(())
+}
+
+impl <T: DisplaySink> crate::long_mode::OperandVisitor for DisplayingOperandVisitor<'_, T> {
+    type Ok = ();
+    type Error = core::fmt::Error;
+
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u8(&mut self, imm: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i8(&mut self, imm: i8) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i64 as u64;
+        if needs_leading_0(imm) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u16(&mut self, imm: u16) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i16(&mut self, imm: i16) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i64 as u64;
+        if needs_leading_0(imm) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    fn visit_i32(&mut self, imm: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i64 as u64;
+        if needs_leading_0(imm) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u64(&mut self, imm: u64) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i64(&mut self, imm: i64) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_reg(&mut self, reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(reg)?;
+        Ok(())
+    }
+    fn visit_reg_mask_merge(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        Ok(())
+    }
+    fn visit_reg_mask_merge_sae(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode, sae_mode: crate::long_mode::SaeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        self.show_sae = true;
+        self.sae_mode = Some(sae_mode);
+        Ok(())
+    }
+    fn visit_reg_mask_merge_sae_noround(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        self.show_sae = true;
+        self.sae_mode = None;
+        Ok(())
+    }
+    fn visit_abs_u32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.span_start_address();
+        write!(self.f, "{:08X}", imm)?;
+        self.f.write_char('h')?;
+        self.f.span_end_address();
+        self.f.write_fixed_size("]")?;
+        Ok(())
+    }
+    fn visit_abs_u64(&mut self, imm: u64) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.span_start_address();
+        write!(self.f, "{:016X}", imm)?;
+        self.f.write_char('h')?;
+        self.f.span_end_address();
+        self.f.write_fixed_size("]")?;
+        Ok(())
+    }
+    #[cfg_attr(not(feature="profiling"), inline(always))]
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_disp(&mut self, base: RegSpec, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_char('[')?;
+        if base == RegSpec::rip() {
+            self.f.write_char('$')?;
+        } else {
+            self.f.write_reg(base)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_deref(&mut self, base: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_index_scale(&mut self, index: RegSpec, scale: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+
+        Ok(())
+    }
+    fn visit_index_scale_disp(&mut self, index: RegSpec, scale: u8, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')
+    }
+    fn visit_base_index_scale(&mut self, base: RegSpec, index: RegSpec, scale: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")
+    }
+    fn visit_base_index_scale_disp(&mut self, base: RegSpec, index: RegSpec, scale: u8, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_disp_masked(&mut self, base: RegSpec, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_char('[')?;
+        self.f.write_reg(base)?;
+        self.f.write_char(' ')?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_deref_masked(&mut self, base: RegSpec, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_index_scale_masked(&mut self, index: RegSpec, scale: u8, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_index_scale_disp_masked(&mut self, index: RegSpec, scale: u8, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_masked(&mut self, base: RegSpec, index: RegSpec, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_disp_masked(&mut self, base: RegSpec, index: RegSpec, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_scale_masked(&mut self, base: RegSpec, index: RegSpec, scale: u8, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_scale_disp_masked(&mut self, base: RegSpec, index: RegSpec, scale: u8, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_char(' ')?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+
+    fn visit_other(&mut self) -> Result<Self::Ok, Self::Error> {
+        Ok(())
+    }
+}
+
+#[cfg_attr(feature="profiling", inline(never))]
+pub(crate) fn contextualize<T: DisplaySink>(instr: &Instruction, out: &mut T) -> fmt::Result {
+    if instr.xacquire() {
+        out.write_fixed_size("xacquire ")?;
+    }
+    if instr.xrelease() {
+        out.write_fixed_size("xrelease ")?;
+    }
+    if instr.prefixes.lock() {
+        out.write_fixed_size("lock ")?;
+    }
+
+    if instr.prefixes.rep_any() {
+        // TODO: be more precise about when rep/repne 
+        if instr.opcode.can_rep() {
+            if instr.prefixes.rep() {
+                out.write_fixed_size("rep ")?;
+            } else if instr.prefixes.repnz() {
+                out.write_fixed_size("repne ")?;
+            }
+        }
+    }
+
+    if instr.opcode == Opcode::JMPF {
+        out.write_opcode(Opcode::JMP)?; // MASM puts the f on the operand size
+    } else if instr.opcode == Opcode::CALLF {
+        out.write_opcode(Opcode::CALL)?; // MASM puts the f on the operand size
+    } else if instr.opcode == Opcode::FENI8087_NOP {
+        out.write_fixed_size("feni")?;
+        return Ok(());
+    } else if instr.opcode == Opcode::FDISI8087_NOP {
+        out.write_fixed_size("fdisi")?;
+        return Ok(());
+    } else if instr.opcode == Opcode::FSETPM287_NOP {
+        out.write_fixed_size("fsetpm")?;
+        return Ok(());
+    } else {
+        out.write_opcode(instr.opcode)?;
+    }
+
+    match instr.opcode {
+        Opcode::HRESET => {
+            // dumpbin shows, and MASM needs, the implicit "eax" operand as an explicit textual operand.
+            out.write_fixed_size(" ")?;
+            instr.visit_operand(0, &mut DisplayingOperandVisitor::new(out))?;
+            out.write_fixed_size(", eax")?;
+            return Ok(());
+        }
+        Opcode::LSL => {
+            // dumpbin shows, and MASM needs, the first and second operands to match in size.
+            // this means `lsl rax, edx` is actually shown as `lsl rax, rdx`. fix that up here.
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            let Operand::Register { reg: dest } = instr.operand(0) else { panic!("impossible LSL dest"); };
+
+            if let Operand::Register { reg: mut src } = instr.operand(1) {
+                visitor.f.write_fixed_size(" ")?;
+                instr.visit_operand(0, &mut visitor)?;
+                src.bank = dest.bank;
+                visitor.f.write_fixed_size(", ")?;
+                visitor.visit_reg(src)?;
+                return Ok(());
+            } else {
+                // don't need to do anything about memory sources
+            };
+        }
+        Opcode::PREFETCHNTA => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH0 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH1 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH2 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCHW => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::INVLPG => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLFLUSH => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLFLUSHOPT => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLWB => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::SGDT | Opcode::SIDT => {
+            // masm uses "tbyte" as a memory size here.
+            out.write_fixed_size(" tbyte ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::LSS => {
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            instr.visit_operand(0, &mut visitor)?;
+
+            // masm uses "tbyte" as a memory size here.
+            match instr.mem_size {
+                4 => {
+                    visitor.f.write_fixed_size(", dword ptr ")?;
+                },
+                6 => {
+                    visitor.f.write_fixed_size(", fword ptr ")?;
+                },
+                10 => {
+                    visitor.f.write_fixed_size(", tbyte ptr ")?;
+                },
+                _ => { panic!("impossible memory size"); }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::LGDT | Opcode::LIDT => {
+            // masm uses "fword" as a memory size here.
+            out.write_fixed_size(" fword ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::NOP => {
+            // masm doesn't accept multi-operand nop, while x86 does have such instructions.
+            // report no-operand nop here instead so it at least round-trips..
+            if instr.operand_count > 1 {
+                return Ok(());
+            }
+        },
+        Opcode::VPSCATTERDD => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" dword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERQD => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" dword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERDQ => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" qword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERQQ => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" qword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::MONITOR => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::rax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rcx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rdx())?;            
+            return Ok(());
+        }
+        Opcode::MWAIT => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::rax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rcx())?;           
+            return Ok(());
+        }
+        Opcode::INVLPGB => {
+            // masm bug: it doesn't tolerate the mention of the second operand?!
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_fixed_size(", ")?;  
+            instr.visit_operand(2, &mut visitor)?;       
+            return Ok(());
+        }
+        Opcode::MONITORX => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::rax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rcx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rdx())?;
+            return Ok(());
+        }
+        Opcode::MWAITX => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::rax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rcx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rbx())?;
+            return Ok(());
+        }
+        Opcode::RDPRU => {
+            // masm wants no implicit registers this time.
+            return Ok(());
+        }
+        Opcode::SCAS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::LODS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::STOS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::PSMASH => {
+            // masm wants the implicit rax operand
+            out.write_fixed_size(" ")?;
+            out.write_reg(RegSpec::rax())?;
+            return Ok(());
+        }
+        Opcode::PVALIDATE | Opcode::RMPADJUST | Opcode::RMPUPDATE => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::rax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rcx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::rdx())?;
+            return Ok(());
+        }
+        Opcode::INCSSP => {
+            // masm wants a d/q suffix on the mnemonic even though these are distinguished by register name..
+            let Operand::Register { reg } = instr.operand(0) else {
+                panic!("impossible operand");
+            };
+            if reg.bank == RegisterBank::Q {
+                out.write_char('q')?;
+            } else if reg.bank == RegisterBank::D {
+                out.write_char('d')?;
+            } else {
+                panic!("impossible register width");
+            }
+        }
+        Opcode::WRSS | Opcode::WRUSS => {
+            // masm wants a d/q suffix on the mnemonic, but other operands are the same.
+            let Operand::Register { reg } = instr.operand(1) else {
+                panic!("impossible operand");
+            };
+            if reg.bank == RegisterBank::Q {
+                out.write_char('q')?;
+            } else if reg.bank == RegisterBank::D {
+                out.write_char('d')?;
+            } else {
+                panic!("impossible register width");
+            }
+        }
+        Opcode::PBLENDVB | Opcode::BLENDVPS | Opcode::BLENDVPD | Opcode::SHA256RNDS2 => {
+            // masm wants the implicit xmm0 operand as ... explicit.
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+
+            if instr.operands[1].is_memory() {
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+            visitor.f.write_reg(RegSpec::xmm0())?;
+
+            return Ok(());
+        }
+        Opcode::LEA => {
+            // dumpbin/masm don't want the `<word> ptr` prefix on the memory access here..
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::PUSHF => {
+            if !instr.prefixes.operand_size() {
+                out.write_char('q')?;
+            }
+            return Ok(());
+        }
+        Opcode::FCOM | Opcode::FCOMP | Opcode::FICOM | Opcode::FICOMP => {
+            // masm does not want the first operand *ever*?
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[1].is_memory() {
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::FADD | Opcode::FMUL | Opcode::FSUB | Opcode::FSUBR | Opcode::FDIV | Opcode::FDIVR |
+        Opcode::FADDP | Opcode::FMULP | Opcode::FSUBRP | Opcode::FSUBP | Opcode::FDIVP | Opcode::FDIVRP |
+        Opcode::FIADD | Opcode::FIMUL | Opcode::FISUB | Opcode::FISUBR | Opcode::FIDIV | Opcode::FIDIVR |
+        Opcode::FCMOVB | Opcode::FCMOVE | Opcode::FCMOVBE | Opcode::FCMOVU | Opcode::FCMOVNB | Opcode::FCMOVNE | Opcode::FCMOVNBE | Opcode::FCMOVNU |
+        Opcode::FUCOMI | Opcode::FCOMI | Opcode::FUCOMIP | Opcode::FCOMIP => {
+            if instr.operands[1].is_memory() {
+                // masm does not want to see the implicit st(0).
+                out.write_fixed_size(" ")?;
+                let mut visitor = DisplayingOperandVisitor::new(out);
+
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(1, &mut visitor)?;
+                return Ok(());
+            } else {
+                // dumpbin writes `st` instead of `st(0)` as the first operand in reg-reg ops, replicate this. masm doesn't care.
+                out.write_fixed_size(" ")?;
+                let mut visitor = DisplayingOperandVisitor::new(out);
+
+                if instr.operands[0] == OperandSpec::RegRRR {
+                    if instr.regs[0] == RegSpec::st0() {
+                        visitor.f.write_fixed_size("st")?;
+                    } else {
+                        instr.visit_operand(0, &mut visitor)?;
+                    }
+                    visitor.f.write_fixed_size(", ")?;
+                    instr.visit_operand(1, &mut visitor)?;
+                } else {
+                    debug_assert!(instr.operands[1] == OperandSpec::RegRRR);
+
+                    instr.visit_operand(0, &mut visitor)?;
+                    visitor.f.write_fixed_size(", ")?;
+                    if instr.regs[0] == RegSpec::st0() {
+                        visitor.f.write_fixed_size("st")?;
+                    } else {
+                        instr.visit_operand(1, &mut visitor)?;
+                    }
+                };
+
+                return Ok(());
+            }
+        }
+        Opcode::FBLD | Opcode::FLD | Opcode::FILD | Opcode::FXCH | Opcode::FUCOM | Opcode::FUCOMP => {
+            // masm does not want to see the implicit st(0).
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[1].is_memory() {
+                if instr.mem_size == 10 {
+                    visitor.f.write_fixed_size("tbyte")?;
+                } else {
+                    visitor.f.write_mem_size_label(instr.mem_size)?;
+                }
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(1, &mut visitor)?;
+                return Ok(());
+            } else {
+                if instr.regs[1] == RegSpec::st0() {
+                    visitor.f.write_fixed_size("st")?;
+                } else {
+                    instr.visit_operand(1, &mut visitor)?;
+                }
+                return Ok(());
+            }
+        }
+        Opcode::FBSTP | Opcode::FST | Opcode::FSTP | Opcode::FIST | Opcode::FISTP | Opcode::FISTTP => {
+            // masm does not want to see the implicit st(0).
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[0].is_memory() {
+                if instr.mem_size == 10 {
+                    visitor.f.write_fixed_size("tbyte")?;
+                } else {
+                    visitor.f.write_mem_size_label(instr.mem_size)?;
+                }
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(0) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(0, &mut visitor)?;
+                return Ok(());
+            } else {
+                instr.visit_operand(0, &mut visitor)?;
+                return Ok(());
+            }
+        }
+        _ => {}
+    }
+
+    if instr.operand_count > 0 {
+        out.write_fixed_size(" ")?;
+
+        let mut size_is_mmword = false;
+        for i in 0..instr.operand_count {
+            if let Operand::Register { reg } = instr.operand(i) {
+                if reg.bank == RegisterBank::MM || reg.bank == RegisterBank::X || reg.bank == RegisterBank::Y {
+                    size_is_mmword = true;
+                }
+            }
+        }
+
+        if instr.opcode == Opcode::VPEXTRQ || instr.opcode == Opcode::PEXTRQ || instr.opcode == Opcode::VPINSRQ || instr.opcode == Opcode::PINSRQ || instr.opcode == Opcode::MOVLPD || instr.opcode == Opcode::MOVHPD || instr.opcode == Opcode::CVTSI2SD || instr.opcode == Opcode::MOVQ || instr.opcode == Opcode::CVTSI2SS || instr.opcode == Opcode::MOVNTSD || instr.opcode == Opcode::MOVLPS || instr.opcode == Opcode::MOVHPS {
+            // movq: dumpbin is inconsistent on sizes (480f7e is qword, 0f7f is mmword), but masm accepts either.
+            // use qword always to match xed etc.
+            size_is_mmword = false;
+        } else if instr.opcode == Opcode::CVTTSD2SI || instr.opcode == Opcode::CVTSD2SI {
+            size_is_mmword = true;
+        }
+
+        if instr.visit_operand(0, &mut RelativeBranchPrinter {
+            inst: instr,
+            out,
+        })? {
+            return Ok(());
+        }
+
+        if instr.operands[0 as usize].is_memory() {
+            // fxsave and friends get no "XXXword ptr" memory prefix, masm doesn't accept it
+            if instr.mem_size != 63 && instr.mem_size != 48 { // masm does not print "m384b" labels.. 
+                if size_is_mmword && instr.mem_size == 8 {
+                    out.write_fixed_size("mmword")?;
+                } else if instr.mem_size == 10 && (instr.opcode == Opcode::JMPF || instr.opcode == Opcode::CALLF) {
+                    out.write_fixed_size("fword")?;
+                } else {
+                    out.write_mem_size_label(instr.mem_size)?;
+                }
+                out.write_fixed_size(" ptr")?;
+                out.write_char(' ')?;
+            }
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                if instr.opcode != Opcode::MOVS || name != b"es" {
+                    out.write_char(name[0] as char)?;
+                    out.write_char(name[1] as char)?;
+                    out.write_fixed_size(":")?;
+                }
+            }
+        }
+
+        let mut displayer = DisplayingOperandVisitor {
+            f: out,
+            show_sae: false,
+            sae_mode: None,
+        };
+        instr.visit_operand(0 as u8, &mut displayer)?;
+
+        for i in 1..instr.operand_count {
+            // don't worry about checking for `instr.operands[i] != Nothing`, it would be a bug to
+            // reach that while iterating only to `operand_count`..
+            displayer.f.write_fixed_size(", ")?;
+            // hint that accessing `inster.operands[i]` can't panic: this is useful for
+            // `instr.operands` and the segment selector check after.
+            if i >= 4 {
+                // Safety: Instruction::operands is a four-element array; operand_count is always
+                // low enough that 0..operand_count is a valid index.
+                unsafe { unreachable_unchecked(); }
+            }
+
+            if instr.operands[i as usize].is_memory() {
+                // fxsave and friends get no "XXXword ptr" memory prefix, masm doesn't accept it
+                if instr.mem_size != 63 && instr.mem_size != 48 { // masm does not print "m384b" labels.. 
+                    if size_is_mmword && instr.mem_size == 8 {
+                        displayer.f.write_fixed_size("mmword")?;
+                    } else {
+                        displayer.f.write_mem_size_label(instr.mem_size)?;
+                    }
+                    displayer.f.write_fixed_size(" ptr")?;
+                    displayer.f.write_char(' ')?;
+                }
+                if let Some(prefix) = instr.segment_override_for_op(i) {
+                    let name = prefix.name();
+                    if instr.opcode != Opcode::MOVS || name != b"ds" {
+                        displayer.f.write_char(name[0] as char)?;
+                        displayer.f.write_char(name[1] as char)?;
+                        displayer.f.write_fixed_size(":")?;
+                    }
+                }
+            }
+
+            instr.visit_operand(i as u8, &mut displayer)?;
+            if let Some(evex) = instr.prefixes.evex() {
+                if evex.broadcast() && instr.operands[i as usize].is_memory() {
+                    let scale = if instr.opcode == Opcode::VCVTPD2PS || instr.opcode == Opcode::VCVTTPD2UDQ || instr.opcode == Opcode::VCVTPD2UDQ || instr.opcode == Opcode::VCVTUDQ2PD || instr.opcode == Opcode::VCVTPS2PD || instr.opcode == Opcode::VCVTQQ2PS || instr.opcode == Opcode::VCVTDQ2PD || instr.opcode == Opcode::VCVTTPD2DQ || instr.opcode == Opcode::VFPCLASSPS || instr.opcode == Opcode::VFPCLASSPD || instr.opcode == Opcode::VCVTNEPS2BF16 || instr.opcode == Opcode::VCVTUQQ2PS || instr.opcode == Opcode::VCVTPD2DQ || instr.opcode == Opcode::VCVTTPS2UQQ || instr.opcode == Opcode::VCVTPS2UQQ || instr.opcode == Opcode::VCVTTPS2QQ || instr.opcode == Opcode::VCVTPS2QQ {
+                        if instr.opcode == Opcode::VFPCLASSPS || instr.opcode ==  Opcode::VCVTNEPS2BF16 {
+                            if evex.vex().l() {
+                                8
+                            } else if evex.lp() {
+                                16
+                            } else {
+                                4
+                            }
+                        } else if instr.opcode == Opcode::VFPCLASSPD {
+                            if evex.vex().l() {
+                                4
+                            } else if evex.lp() {
+                                8
+                            } else {
+                                2
+                            }
+                        } else {
+                            // vcvtpd2ps is "cool": in broadcast mode, it can read a
+                            // double-precision float (qword), resize to single-precision,
+                            // then broadcast that to the whole destination register. this
+                            // means we need to show `xmm, qword [addr]{1to4}` if vector
+                            // size is 256. likewise, scale of 8 for the same truncation
+                            // reason if vector size is 512.
+                            // vcvtudq2pd is the same story.
+                            // vfpclassp{s,d} is a mystery to me.
+                            if evex.vex().l() {
+                                4
+                            } else if evex.lp() {
+                                8
+                            } else {
+                                2
+                            }
+                        }
+                    } else {
+                        // this should never be `None` - that would imply two
+                        // memory operands for a broadcasted operation.
+                        if let Some(width) = Operand::from_spec(instr, instr.operands[i as usize - 1]).width() {
+                            width / instr.mem_size
+                        } else {
+                            0
+                        }
+                    };
+                    displayer.f.write_fixed_size("{1to")?;
+                    static STRING_LUT: &'static [&'static str] = &[
+                        "0", "1", "2", "3", "4", "5", "6", "7", "8",
+                        "9", "10", "11", "12", "13", "14", "15", "16",
+                    ];
+                    unsafe {
+                        displayer.f.write_lt_16(STRING_LUT.get_kinda_unchecked(scale as usize))?;
+                    }
+                    displayer.f.write_char('}')?;
+                }
+            }
+        }
+
+        if displayer.show_sae {
+            displayer.f.write_char(' ')?;
+            if let Some(sae_mode) = displayer.sae_mode.as_ref() {
+                displayer.f.write_sae_mode(*sae_mode)?;
+            } else {
+                displayer.f.write_str("{sae}")?;
+            }
+        }
+    }
+    Ok(())
+}
diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index dc0cb1d..328ee5a 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -1,3 +1,5 @@
+mod masm;
+
 use core::fmt;
 
 // allowing these deprecated items for the time being, not yet breaking yaxpeax-x86 apis
@@ -2134,7 +2136,14 @@ impl<'instr> fmt::Display for InstructionDisplayer<'instr> {
 /// enum controlling how `Instruction::display_with` renders instructions. `Intel` is more or less
 /// intel syntax, though memory operand sizes are elided if they can be inferred from other
 /// operands.
-#[derive(Copy, Clone)]
+///
+/// note that `yaxpeax-x86` does not (and can not!) try to guarantee that formatting through any
+/// `DisplayStyle` round-trips through an assembler to produce the same bytes as were intially
+/// disassembled. opcode choice (for example, `0x31` vs `0x33` encodings of register-register
+/// `xor`) may not be controllable, immediates and displacements may have multiple valid encodings,
+/// and prefix handling in general is very lossy especially in the presence of repeat or
+/// ineffectual prefixes.
+#[derive(Copy, Clone, Debug)]
 pub enum DisplayStyle {
     /// intel-style syntax for instructions, like
     /// `add eax, [edx + ecx * 2 + 0x1234]`
@@ -2142,6 +2151,12 @@ pub enum DisplayStyle {
     /// C-style syntax for instructions, like
     /// `eax += [edx + ecx * 2 + 0x1234]`
     C,
+    /// format instructions in the syntax used by the Microsoft Assembler (MASM), like
+    /// `add eax, dword ptr [edx + ecx * 2 + 1234h]`
+    ///
+    /// some instructions are decoded by `dumpbin.exe` and `yaxpeax-x86` but cannot be assembled by
+    /// `masm.exe` or `ml64.exe`. as one example, `ud0`.
+    Masm,
     // one might imagine an ATT style here, which is mostly interesting for reversing operand
     // order.
     // well.
@@ -2705,6 +2720,9 @@ impl <'instr, T: fmt::Write, Y: YaxColors> ShowContextual<u32, NoContext, T, Y>
             DisplayStyle::C => {
                 contextualize_c(instr, &mut out)
             }
+            DisplayStyle::Masm => {
+                masm::contextualize(&instr, &mut out)
+            }
         }
     }
 }
@@ -2988,6 +3006,9 @@ mod buffer_sink {
                 DisplayStyle::C => {
                     contextualize_c(&display.instr, &mut handle)?;
                 }
+                DisplayStyle::Masm => {
+                    super::masm::contextualize(&display.instr, &mut handle)?;
+                }
             }
 
             Ok(self.text_str())
diff --git a/src/protected_mode/display/masm.rs b/src/protected_mode/display/masm.rs
new file mode 100644
index 0000000..88fb275
--- /dev/null
+++ b/src/protected_mode/display/masm.rs
@@ -0,0 +1,1264 @@
+use core::fmt;
+
+use yaxpeax_arch::AddressBase;
+use yaxpeax_arch::LengthedInstruction;
+
+use crate::protected_mode::{
+    RegSpec, Opcode, Operand, OperandSpec,
+    MergeMode, SaeMode,
+    Instruction, RegisterBank,
+    display::DisplaySinkExt, OperandVisitor,
+};
+
+use yaxpeax_arch::display::DisplaySink;
+use yaxpeax_arch::safer_unchecked::GetSaferUnchecked as _;
+use yaxpeax_arch::safer_unchecked::unreachable_kinda_unchecked as unreachable_unchecked;
+
+struct DisplayingOperandVisitor<'a, T> {
+    f: &'a mut T,
+    show_sae: bool,
+    sae_mode: Option<SaeMode>,
+}
+
+impl<'a, T> DisplayingOperandVisitor<'a, T> {
+    pub fn new(f: &'a mut T) -> Self {
+        Self { f, show_sae: false, sae_mode: None }
+    }
+}
+
+fn needs_leading_0(imm: u64) -> bool {
+    let mut rem = imm;
+    let mut digit = 0;
+    while rem > 0 {
+        digit = rem & 0xf;
+        rem = rem >> 4;
+    }
+
+    // digit is whatever the top non-zero hex digit was in the number
+    digit >= 10
+}
+
+#[test]
+fn test_leading_0() {
+    assert!(needs_leading_0(0xa0));
+    assert!(needs_leading_0(0xa00000));
+    assert!(!needs_leading_0(0x900000));
+    assert!(needs_leading_0(0xf12345));
+}
+
+fn hex_ambiguous(imm: u64) -> bool {
+    imm >= 10
+}
+
+static RELATIVE_BRANCHES: [Opcode; 23] = [
+    Opcode::JMP, Opcode::CALL,
+    Opcode::JECXZ, Opcode::JCXZ,
+    Opcode::LOOP, Opcode::LOOPZ, Opcode::LOOPNZ,
+    Opcode::JO, Opcode::JNO,
+    Opcode::JB, Opcode::JNB,
+    Opcode::JZ, Opcode::JNZ,
+    Opcode::JNA, Opcode::JA,
+    Opcode::JS, Opcode::JNS,
+    Opcode::JP, Opcode::JNP,
+    Opcode::JL, Opcode::JGE,
+    Opcode::JLE, Opcode::JG,
+];
+
+struct RelativeBranchPrinter<'a, F: DisplaySink> {
+    inst: &'a Instruction,
+    out: &'a mut F,
+}
+
+impl<'a, F: DisplaySink> crate::protected_mode::OperandVisitor for RelativeBranchPrinter<'a, F> {
+    // return true if we printed a relative branch offset, false otherwise
+    type Ok = bool;
+    // but errors are errors
+    type Error = fmt::Error;
+
+    fn visit_reg(&mut self, _reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_deref(&mut self, _base: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_disp(&mut self, _base: RegSpec, _rel: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i8(&mut self, rel: i8) -> Result<Self::Ok, Self::Error> {
+        if RELATIVE_BRANCHES.contains(&self.inst.opcode) {
+            self.out.write_char('$')?;
+            let rel = rel.wrapping_add(0u32.wrapping_offset(self.inst.len()).to_linear() as i8);
+            let mut v = rel as u8;
+            if rel < 0 {
+                self.out.write_char('-')?;
+                v = rel.unsigned_abs();
+            } else {
+                self.out.write_char('+')?;
+            }
+            if needs_leading_0(v as u64) {
+                self.out.write_char('0')?;
+            }
+            write!(self.out, "{:X}", v)?;
+            if hex_ambiguous(v as u64) {
+                self.out.write_char('h')?;
+            }
+            Ok(true)
+        } else {
+            Ok(false)
+        }
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i32(&mut self, rel: i32) -> Result<Self::Ok, Self::Error> {
+        if RELATIVE_BRANCHES.contains(&self.inst.opcode) || self.inst.opcode == Opcode::XBEGIN {
+            let rel = rel.wrapping_add(0u32.wrapping_offset(self.inst.len()).to_linear() as i32);
+            let mut v = rel as u32;
+
+            if v >= 128 && v < 256 {
+                // we'll print two digits, but nasm will try to shorten the jump to a 1-byte offset form. then the
+                // offset is out of range and nasm complains "jump destination too far : by <N> byte(s)".
+                // "jmp near ptr " is the full name of "i mean it, use a 32-bit offset", so use that to ward away
+                // the problematic "optimization".
+                self.out.write_str("near ptr ")?;
+            }
+
+            self.out.write_char('$')?;
+            if rel < 0 {
+                self.out.write_char('-')?;
+                v = rel.unsigned_abs();
+            } else {
+                self.out.write_char('+')?;
+            }
+            if needs_leading_0(v as u64) {
+                self.out.write_char('0')?;
+            }
+            write!(self.out, "{:X}", v)?;
+            if hex_ambiguous(v as u64) {
+                self.out.write_char('h')?;
+            }
+            Ok(true)
+        } else {
+            Ok(false)
+        }
+    }
+    fn visit_u8(&mut self, _imm: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_i16(&mut self, _imm: i16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u16(&mut self, _imm: u16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u32(&mut self, _imm: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_abs_u16(&mut self, _imm: u16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_abs_u32(&mut self, _imm: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_absolute_far_address(&mut self, _segment: u16, _address: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale(&mut self, _index: RegSpec, _scale: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_disp(&mut self, _index: RegSpec, _scale: u8, _disp: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_disp(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _disp: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_other(&mut self) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge_sae(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode, _sae_mode: SaeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge_sae_noround(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_disp_masked(&mut self, _base: RegSpec, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_deref_masked(&mut self, _base: RegSpec, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_masked(&mut self, _index: RegSpec, _scale: u8, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_disp_masked(&mut self, _index: RegSpec, _scale: u8, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_masked(&mut self, _base: RegSpec, _index: RegSpec, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_disp_masked(&mut self, _base: RegSpec, _index: RegSpec, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_masked(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_disp_masked(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+}
+
+fn masm_displacement<T: core::fmt::Write>(f: &mut T, disp: i32) -> Result<(), core::fmt::Error> {
+    let udisp = if disp >= 0 {
+        write!(f, "+ ")?;
+        disp as u64
+    } else {
+        write!(f, "- ")?;
+        -(disp as i64) as u64
+    };
+
+    if needs_leading_0(udisp) {
+        write!(f, "0")?;
+    }
+    write!(f, "{:X}", udisp)?;
+    if hex_ambiguous(udisp) {
+        write!(f, "h")?;
+    }
+
+    Ok(())
+}
+
+impl <T: DisplaySink> crate::protected_mode::OperandVisitor for DisplayingOperandVisitor<'_, T> {
+    type Ok = ();
+    type Error = core::fmt::Error;
+
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u8(&mut self, imm: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i8(&mut self, imm: i8) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i32 as u32;
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u16(&mut self, imm: u16) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i16(&mut self, imm: i16) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i32 as u32;
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    fn visit_i32(&mut self, imm: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as u32;
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_reg(&mut self, reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(reg)?;
+        Ok(())
+    }
+    fn visit_reg_mask_merge(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        Ok(())
+    }
+    fn visit_reg_mask_merge_sae(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode, sae_mode: crate::protected_mode::SaeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        self.show_sae = true;
+        self.sae_mode = Some(sae_mode);
+        Ok(())
+    }
+    fn visit_reg_mask_merge_sae_noround(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        self.show_sae = true;
+        self.sae_mode = None;
+        Ok(())
+    }
+    fn visit_abs_u16(&mut self, imm: u16) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.span_start_address();
+        if imm >= 0x1000 && needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:04X}", imm)?;
+        self.f.write_char('h')?;
+        self.f.span_end_address();
+        self.f.write_fixed_size("]")?;
+        Ok(())
+    }
+    fn visit_abs_u32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.span_start_address();
+        if imm >= 0x1000_0000 && needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:08X}", imm)?;
+        self.f.write_char('h')?;
+        self.f.span_end_address();
+        self.f.write_fixed_size("]")?;
+        Ok(())
+    }
+    fn visit_absolute_far_address(&mut self, segment: u16, address: u32) -> Result<Self::Ok, Self::Error> {
+        if needs_leading_0(segment as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:4X}", segment)?;
+        self.f.write_char('h')?;
+        self.f.write_fixed_size(":")?;
+        if needs_leading_0(address as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:4X}", address)?;
+        self.f.write_char('h')?;
+        Ok(())
+    }
+    #[cfg_attr(not(feature="profiling"), inline(always))]
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_disp(&mut self, base: RegSpec, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_char('[')?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_deref(&mut self, base: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_index_scale(&mut self, index: RegSpec, scale: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+
+        Ok(())
+    }
+    fn visit_index_scale_disp(&mut self, index: RegSpec, scale: u8, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')
+    }
+    fn visit_base_index_scale(&mut self, base: RegSpec, index: RegSpec, scale: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")
+    }
+    fn visit_base_index_scale_disp(&mut self, base: RegSpec, index: RegSpec, scale: u8, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_disp_masked(&mut self, base: RegSpec, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_char('[')?;
+        self.f.write_reg(base)?;
+        self.f.write_char(' ')?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_deref_masked(&mut self, base: RegSpec, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_index_scale_masked(&mut self, index: RegSpec, scale: u8, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_index_scale_disp_masked(&mut self, index: RegSpec, scale: u8, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_masked(&mut self, base: RegSpec, index: RegSpec, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_disp_masked(&mut self, base: RegSpec, index: RegSpec, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_scale_masked(&mut self, base: RegSpec, index: RegSpec, scale: u8, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_scale_disp_masked(&mut self, base: RegSpec, index: RegSpec, scale: u8, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_char(' ')?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+
+    fn visit_other(&mut self) -> Result<Self::Ok, Self::Error> {
+        Ok(())
+    }
+}
+
+#[cfg_attr(feature="profiling", inline(never))]
+pub(crate) fn contextualize<T: DisplaySink>(instr: &Instruction, out: &mut T) -> fmt::Result {
+    if instr.xacquire() {
+        out.write_fixed_size("xacquire ")?;
+    }
+    if instr.xrelease() {
+        out.write_fixed_size("xrelease ")?;
+    }
+    if instr.prefixes.lock() {
+        out.write_fixed_size("lock ")?;
+    }
+
+    if instr.prefixes.rep_any() {
+        // TODO: be more precise about when rep/repne 
+        if instr.opcode.can_rep() {
+            if instr.prefixes.rep() {
+                out.write_fixed_size("rep ")?;
+            } else if instr.prefixes.repnz() {
+                out.write_fixed_size("repne ")?;
+            }
+        }
+    }
+
+    if instr.opcode == Opcode::JMPF {
+        out.write_opcode(Opcode::JMP)?; // MASM puts the f on the operand size
+    } else if instr.opcode == Opcode::CALLF {
+        out.write_opcode(Opcode::CALL)?; // MASM puts the f on the operand size
+    } else if instr.opcode == Opcode::FENI8087_NOP {
+        out.write_fixed_size("feni")?;
+        return Ok(());
+    } else if instr.opcode == Opcode::FDISI8087_NOP {
+        out.write_fixed_size("fdisi")?;
+        return Ok(());
+    } else if instr.opcode == Opcode::FSETPM287_NOP {
+        out.write_fixed_size("fsetpm")?;
+        return Ok(());
+    } else {
+        out.write_opcode(instr.opcode)?;
+    }
+
+    match instr.opcode {
+        Opcode::HRESET => {
+            // dumpbin shows, and MASM needs, the implicit "eax" operand as an explicit textual operand.
+            out.write_fixed_size(" ")?;
+            instr.visit_operand(0, &mut DisplayingOperandVisitor::new(out))?;
+            out.write_fixed_size(", eax")?;
+            return Ok(());
+        }
+        Opcode::LSL => {
+            // dumpbin shows, and MASM needs, the first and second operands to match in size.
+            // this means `lsl eax, edx` is actually shown as `lsl eax, edx`. fix that up here.
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            let Operand::Register { reg: dest } = instr.operand(0) else { panic!("impossible LSL dest"); };
+
+            if let Operand::Register { reg: mut src } = instr.operand(1) {
+                visitor.f.write_fixed_size(" ")?;
+                instr.visit_operand(0, &mut visitor)?;
+                src.bank = dest.bank;
+                visitor.f.write_fixed_size(", ")?;
+                visitor.visit_reg(src)?;
+                return Ok(());
+            } else {
+                // don't need to do anything about memory sources
+            };
+        }
+        Opcode::PREFETCHNTA => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH0 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH1 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH2 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCHW => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::INVLPG => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLFLUSH => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLFLUSHOPT => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLWB => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::SGDT | Opcode::SIDT => {
+            // masm uses "tbyte" as a memory size here.
+            out.write_fixed_size(" fword ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::LSS => {
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            instr.visit_operand(0, &mut visitor)?;
+
+            match instr.mem_size {
+                4 => {
+                    visitor.f.write_fixed_size(", dword ptr ")?;
+                },
+                6 => {
+                    visitor.f.write_fixed_size(", fword ptr ")?;
+                },
+                o => { panic!("impossible memory size: {:?}", o); }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::LGDT | Opcode::LIDT => {
+            // masm uses "fword" as a memory size here.
+            out.write_fixed_size(" fword ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::NOP => {
+            // masm doesn't accept multi-operand nop, while x86 does have such instructions.
+            // report no-operand nop here instead so it at least round-trips..
+            if instr.operand_count > 1 {
+                return Ok(());
+            }
+        },
+        Opcode::VPSCATTERDD => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" dword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERQD => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" dword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERDQ => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" qword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERQQ => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" qword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::MONITOR => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::edx())?;            
+            return Ok(());
+        }
+        Opcode::MWAIT => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;           
+            return Ok(());
+        }
+        Opcode::INVLPGB => {
+            // masm bug: it doesn't tolerate the mention of the second operand?!
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_fixed_size(", ")?;  
+            instr.visit_operand(2, &mut visitor)?;       
+            return Ok(());
+        }
+        Opcode::MONITORX => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::edx())?;
+            return Ok(());
+        }
+        Opcode::MWAITX => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ebx())?;
+            return Ok(());
+        }
+        Opcode::RDPRU => {
+            // masm wants no implicit registers this time.
+            return Ok(());
+        }
+        Opcode::SCAS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                out.write_char(name[0] as char)?;
+                out.write_char(name[1] as char)?;
+                out.write_fixed_size(":")?;
+            }
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::LODS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::STOS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                out.write_char(name[0] as char)?;
+                out.write_char(name[1] as char)?;
+                out.write_fixed_size(":")?;
+            }
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::PSMASH => {
+            // masm wants the implicit eax operand
+            out.write_fixed_size(" ")?;
+            out.write_reg(RegSpec::eax())?;
+            return Ok(());
+        }
+        Opcode::PVALIDATE | Opcode::RMPADJUST | Opcode::RMPUPDATE => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::edx())?;
+            return Ok(());
+        }
+        Opcode::INCSSP => {
+            // masm wants a d/q suffix on the mnemonic even though these are distinguished by register name..
+            let Operand::Register { reg } = instr.operand(0) else {
+                panic!("impossible operand");
+            };
+            if reg.bank == RegisterBank::D {
+                out.write_char('d')?;
+            } else {
+                panic!("impossible register width");
+            }
+        }
+        Opcode::WRSS | Opcode::WRUSS => {
+            // masm wants a d/q suffix on the mnemonic, but other operands are the same.
+            let Operand::Register { reg } = instr.operand(1) else {
+                panic!("impossible operand");
+            };
+            if reg.bank == RegisterBank::D {
+                out.write_char('d')?;
+            } else {
+                panic!("impossible register width");
+            }
+        }
+        Opcode::PBLENDVB | Opcode::BLENDVPS | Opcode::BLENDVPD | Opcode::SHA256RNDS2 => {
+            // masm wants the implicit xmm0 operand as ... explicit.
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+
+            if instr.operands[1].is_memory() {
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+            visitor.f.write_reg(RegSpec::xmm0())?;
+
+            return Ok(());
+        }
+        Opcode::LEA => {
+            // dumpbin/masm don't want the `<word> ptr` prefix on the memory access here..
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::PUSHF => {
+            if !instr.prefixes.operand_size() {
+                out.write_char('d')?;
+            }
+            return Ok(());
+        }
+        Opcode::AAM | Opcode::AAD => {
+            if instr.imm == 10 {
+                // dumpbin doesn't bother with a base here, and this is the only form masm accepts.
+                return Ok(());
+            }
+        }
+        Opcode::FCOM | Opcode::FCOMP | Opcode::FICOM | Opcode::FICOMP => {
+            // masm does not want the first operand *ever*?
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[1].is_memory() {
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::FADD | Opcode::FMUL | Opcode::FSUB | Opcode::FSUBR | Opcode::FDIV | Opcode::FDIVR |
+        Opcode::FADDP | Opcode::FMULP | Opcode::FSUBRP | Opcode::FSUBP | Opcode::FDIVP | Opcode::FDIVRP |
+        Opcode::FIADD | Opcode::FIMUL | Opcode::FISUB | Opcode::FISUBR | Opcode::FIDIV | Opcode::FIDIVR |
+        Opcode::FCMOVB | Opcode::FCMOVE | Opcode::FCMOVBE | Opcode::FCMOVU | Opcode::FCMOVNB | Opcode::FCMOVNE | Opcode::FCMOVNBE | Opcode::FCMOVNU |
+        Opcode::FUCOMI | Opcode::FCOMI | Opcode::FUCOMIP | Opcode::FCOMIP => {
+            if instr.operands[1].is_memory() {
+                // masm does not want to see the implicit st(0).
+                out.write_fixed_size(" ")?;
+                let mut visitor = DisplayingOperandVisitor::new(out);
+
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(1, &mut visitor)?;
+                return Ok(());
+            } else {
+                // dumpbin writes `st` instead of `st(0)` as the first operand in reg-reg ops, replicate this. masm doesn't care.
+                out.write_fixed_size(" ")?;
+                let mut visitor = DisplayingOperandVisitor::new(out);
+
+                if instr.operands[0] == OperandSpec::RegRRR {
+                    if instr.regs[0] == RegSpec::st0() {
+                        visitor.f.write_fixed_size("st")?;
+                    } else {
+                        instr.visit_operand(0, &mut visitor)?;
+                    }
+                    visitor.f.write_fixed_size(", ")?;
+                    instr.visit_operand(1, &mut visitor)?;
+                } else {
+                    debug_assert!(instr.operands[1] == OperandSpec::RegRRR);
+
+                    instr.visit_operand(0, &mut visitor)?;
+                    visitor.f.write_fixed_size(", ")?;
+                    if instr.regs[0] == RegSpec::st0() {
+                        visitor.f.write_fixed_size("st")?;
+                    } else {
+                        instr.visit_operand(1, &mut visitor)?;
+                    }
+                };
+
+                return Ok(());
+            }
+        }
+        Opcode::FBLD | Opcode::FLD | Opcode::FILD | Opcode::FXCH | Opcode::FUCOM | Opcode::FUCOMP => {
+            // masm does not want to see the implicit st(0).
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[1].is_memory() {
+                if instr.mem_size == 10 {
+                    visitor.f.write_fixed_size("tbyte")?;
+                } else {
+                    visitor.f.write_mem_size_label(instr.mem_size)?;
+                }
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(1, &mut visitor)?;
+                return Ok(());
+            } else {
+                if instr.regs[1] == RegSpec::st0() {
+                    visitor.f.write_fixed_size("st")?;
+                } else {
+                    instr.visit_operand(1, &mut visitor)?;
+                }
+                return Ok(());
+            }
+        }
+        Opcode::FBSTP | Opcode::FST | Opcode::FSTP | Opcode::FIST | Opcode::FISTP | Opcode::FISTTP => {
+            // masm does not want to see the implicit st(0).
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[0].is_memory() {
+                if instr.mem_size == 10 {
+                    visitor.f.write_fixed_size("tbyte")?;
+                } else {
+                    visitor.f.write_mem_size_label(instr.mem_size)?;
+                }
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(0) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(0, &mut visitor)?;
+                return Ok(());
+            } else {
+                instr.visit_operand(0, &mut visitor)?;
+                return Ok(());
+            }
+        }
+        _ => {}
+    }
+
+    if instr.operand_count > 0 {
+        out.write_fixed_size(" ")?;
+
+        let mut size_is_mmword = false;
+        for i in 0..instr.operand_count {
+            if let Operand::Register { reg } = instr.operand(i) {
+                if reg.bank == RegisterBank::MM || reg.bank == RegisterBank::X || reg.bank == RegisterBank::Y {
+                    size_is_mmword = true;
+                }
+            }
+        }
+
+        if instr.opcode == Opcode::VPEXTRQ || instr.opcode == Opcode::PEXTRQ || instr.opcode == Opcode::VPINSRQ || instr.opcode == Opcode::PINSRQ || instr.opcode == Opcode::MOVLPD || instr.opcode == Opcode::MOVHPD || instr.opcode == Opcode::CVTSI2SD || instr.opcode == Opcode::MOVQ || instr.opcode == Opcode::CVTSI2SS || instr.opcode == Opcode::MOVNTSD || instr.opcode == Opcode::MOVLPS || instr.opcode == Opcode::MOVHPS {
+            // movq: dumpbin is inconsistent on sizes (480f7e is qword, 0f7f is mmword), but masm accepts either.
+            // use qword always to match xed etc.
+            size_is_mmword = false;
+        } else if instr.opcode == Opcode::CVTTSD2SI || instr.opcode == Opcode::CVTSD2SI {
+            size_is_mmword = true;
+        }
+
+        if instr.visit_operand(0, &mut RelativeBranchPrinter {
+            inst: instr,
+            out,
+        })? {
+            return Ok(());
+        }
+
+        if instr.operands[0 as usize].is_memory() {
+            // fxsave and friends get no "XXXword ptr" memory prefix, masm doesn't accept it
+            if instr.mem_size != 63 && instr.mem_size != 48 { // masm does not print "m384b" labels.. 
+                if size_is_mmword && instr.mem_size == 8 {
+                    out.write_fixed_size("mmword")?;
+                } else if instr.mem_size == 6 && (instr.opcode == Opcode::JMPF || instr.opcode == Opcode::CALLF) {
+                    // "fword" in protected mode instead of "far"..
+                    out.write_fixed_size("fword")?;
+                } else {
+                    out.write_mem_size_label(instr.mem_size)?;
+                }
+                out.write_fixed_size(" ptr")?;
+                out.write_char(' ')?;
+            }
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                out.write_char(name[0] as char)?;
+                out.write_char(name[1] as char)?;
+                out.write_fixed_size(":")?;
+            }
+        }
+
+        let mut displayer = DisplayingOperandVisitor {
+            f: out,
+            show_sae: false,
+            sae_mode: None,
+        };
+        instr.visit_operand(0 as u8, &mut displayer)?;
+
+        for i in 1..instr.operand_count {
+            // don't worry about checking for `instr.operands[i] != Nothing`, it would be a bug to
+            // reach that while iterating only to `operand_count`..
+            displayer.f.write_fixed_size(", ")?;
+            // hint that accessing `inster.operands[i]` can't panic: this is useful for
+            // `instr.operands` and the segment selector check after.
+            if i >= 4 {
+                // Safety: Instruction::operands is a four-element array; operand_count is always
+                // low enough that 0..operand_count is a valid index.
+                unsafe { unreachable_unchecked(); }
+            }
+
+            if instr.operands[i as usize].is_memory() {
+                // fxsave and friends get no "XXXword ptr" memory prefix, masm doesn't accept it
+                if instr.mem_size != 63 && instr.mem_size != 48 { // masm does not print "m384b" labels.. 
+                    if size_is_mmword && instr.mem_size == 8 {
+                        displayer.f.write_fixed_size("mmword")?;
+                    } else if instr.mem_size == 6 && (instr.opcode == Opcode::LDS || instr.opcode == Opcode::LES || instr.opcode == Opcode::LFS || instr.opcode == Opcode::LGS || instr.opcode == Opcode::LSS) {
+                        // "fword" in protected mode instead of "far"..
+                        displayer.f.write_fixed_size("fword")?;
+                    } else {
+                        displayer.f.write_mem_size_label(instr.mem_size)?;
+                    }
+                    displayer.f.write_fixed_size(" ptr")?;
+                    displayer.f.write_char(' ')?;
+                }
+                if let Some(prefix) = instr.segment_override_for_op(i) {
+                    let name = prefix.name();
+                    if instr.opcode != Opcode::MOVS || name != b"ds" {
+                        displayer.f.write_char(name[0] as char)?;
+                        displayer.f.write_char(name[1] as char)?;
+                        displayer.f.write_fixed_size(":")?;
+                    }
+                }
+            }
+
+            instr.visit_operand(i as u8, &mut displayer)?;
+            if let Some(evex) = instr.prefixes.evex() {
+                if evex.broadcast() && instr.operands[i as usize].is_memory() {
+                    let scale = if instr.opcode == Opcode::VCVTPD2PS || instr.opcode == Opcode::VCVTTPD2UDQ || instr.opcode == Opcode::VCVTPD2UDQ || instr.opcode == Opcode::VCVTUDQ2PD || instr.opcode == Opcode::VCVTPS2PD || instr.opcode == Opcode::VCVTQQ2PS || instr.opcode == Opcode::VCVTDQ2PD || instr.opcode == Opcode::VCVTTPD2DQ || instr.opcode == Opcode::VFPCLASSPS || instr.opcode == Opcode::VFPCLASSPD || instr.opcode == Opcode::VCVTNEPS2BF16 || instr.opcode == Opcode::VCVTUQQ2PS || instr.opcode == Opcode::VCVTPD2DQ || instr.opcode == Opcode::VCVTTPS2UQQ || instr.opcode == Opcode::VCVTPS2UQQ || instr.opcode == Opcode::VCVTTPS2QQ || instr.opcode == Opcode::VCVTPS2QQ {
+                        if instr.opcode == Opcode::VFPCLASSPS || instr.opcode ==  Opcode::VCVTNEPS2BF16 {
+                            if evex.vex().l() {
+                                8
+                            } else if evex.lp() {
+                                16
+                            } else {
+                                4
+                            }
+                        } else if instr.opcode == Opcode::VFPCLASSPD {
+                            if evex.vex().l() {
+                                4
+                            } else if evex.lp() {
+                                8
+                            } else {
+                                2
+                            }
+                        } else {
+                            // vcvtpd2ps is "cool": in broadcast mode, it can read a
+                            // double-precision float (qword), resize to single-precision,
+                            // then broadcast that to the whole destination register. this
+                            // means we need to show `xmm, qword [addr]{1to4}` if vector
+                            // size is 256. likewise, scale of 8 for the same truncation
+                            // reason if vector size is 512.
+                            // vcvtudq2pd is the same story.
+                            // vfpclassp{s,d} is a mystery to me.
+                            if evex.vex().l() {
+                                4
+                            } else if evex.lp() {
+                                8
+                            } else {
+                                2
+                            }
+                        }
+                    } else {
+                        // this should never be `None` - that would imply two
+                        // memory operands for a broadcasted operation.
+                        if let Some(width) = Operand::from_spec(instr, instr.operands[i as usize - 1]).width() {
+                            width / instr.mem_size
+                        } else {
+                            0
+                        }
+                    };
+                    displayer.f.write_fixed_size("{1to")?;
+                    static STRING_LUT: &'static [&'static str] = &[
+                        "0", "1", "2", "3", "4", "5", "6", "7", "8",
+                        "9", "10", "11", "12", "13", "14", "15", "16",
+                    ];
+                    unsafe {
+                        displayer.f.write_lt_16(STRING_LUT.get_kinda_unchecked(scale as usize))?;
+                    }
+                    displayer.f.write_char('}')?;
+                }
+            }
+        }
+
+        if displayer.show_sae {
+            displayer.f.write_char(' ')?;
+            if let Some(sae_mode) = displayer.sae_mode.as_ref() {
+                displayer.f.write_sae_mode(*sae_mode)?;
+            } else {
+                displayer.f.write_str("{sae}")?;
+            }
+        }
+    }
+    Ok(())
+}
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 5476647..9798f2f 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -8297,11 +8297,6 @@ fn read_operands<
                 instruction.opcode = Opcode::SMSW;
                 instruction.operand_count = 1;
                 instruction.mem_size = 2;
-                let bank = if instruction.prefixes.operand_size() {
-                    RegisterBank::W
-                } else {
-                    RegisterBank::D
-                };
                 instruction.operands[0] = read_E(words, instruction, modrm, RegisterBank::D, sink)?;
             } else if r == 5 {
                 let mod_bits = modrm >> 6;
diff --git a/src/real_mode/display.rs b/src/real_mode/display.rs
index b90c305..d4d5944 100644
--- a/src/real_mode/display.rs
+++ b/src/real_mode/display.rs
@@ -1,3 +1,5 @@
+mod masm;
+
 use core::fmt;
 
 // allowing these deprecated items for the time being, not yet breaking yaxpeax-x86 apis
@@ -2136,6 +2138,13 @@ impl<'instr> fmt::Display for InstructionDisplayer<'instr> {
 /// enum controlling how `Instruction::display_with` renders instructions. `Intel` is more or less
 /// intel syntax, though memory operand sizes are elided if they can be inferred from other
 /// operands.
+///
+/// note that `yaxpeax-x86` does not (and can not!) try to guarantee that formatting through any
+/// `DisplayStyle` round-trips through an assembler to produce the same bytes as were intially
+/// disassembled. opcode choice (for example, `0x31` vs `0x33` encodings of register-register
+/// `xor`) may not be controllable, immediates and displacements may have multiple valid encodings,
+/// and prefix handling in general is very lossy especially in the presence of repeat or
+/// ineffectual prefixes.
 #[derive(Copy, Clone)]
 pub enum DisplayStyle {
     /// intel-style syntax for instructions, like
@@ -2144,6 +2153,12 @@ pub enum DisplayStyle {
     /// C-style syntax for instructions, like
     /// `eax += [edx + ecx * 2 + 0x1234]`
     C,
+    /// format instructions in the syntax used by the Microsoft Assembler (MASM), like
+    /// `add eax, dword ptr [edx + ecx * 2 + 1234h]`
+    ///
+    /// some instructions are decoded by `dumpbin.exe` and `yaxpeax-x86` but cannot be assembled by
+    /// `masm.exe` or `ml64.exe`. as one example, `ud0`.
+    Masm,
     // one might imagine an ATT style here, which is mostly interesting for reversing operand
     // order.
     // well.
@@ -2707,6 +2722,9 @@ impl <'instr, T: fmt::Write, Y: YaxColors> ShowContextual<u32, NoContext, T, Y>
             DisplayStyle::C => {
                 contextualize_c(instr, &mut out)
             }
+            DisplayStyle::Masm => {
+                masm::contextualize(&instr, &mut out)
+            }
         }
     }
 }
@@ -2990,6 +3008,9 @@ mod buffer_sink {
                 DisplayStyle::C => {
                     contextualize_c(&display.instr, &mut handle)?;
                 }
+                DisplayStyle::Masm => {
+                    super::masm::contextualize(&display.instr, &mut handle)?;
+                }
             }
 
             Ok(self.text_str())
diff --git a/src/real_mode/display/masm.rs b/src/real_mode/display/masm.rs
new file mode 100644
index 0000000..2885fc5
--- /dev/null
+++ b/src/real_mode/display/masm.rs
@@ -0,0 +1,1264 @@
+use core::fmt;
+
+use yaxpeax_arch::AddressBase;
+use yaxpeax_arch::LengthedInstruction;
+
+use crate::real_mode::{
+    RegSpec, Opcode, Operand, OperandSpec,
+    MergeMode, SaeMode,
+    Instruction, RegisterBank,
+    display::DisplaySinkExt, OperandVisitor,
+};
+
+use yaxpeax_arch::display::DisplaySink;
+use yaxpeax_arch::safer_unchecked::GetSaferUnchecked as _;
+use yaxpeax_arch::safer_unchecked::unreachable_kinda_unchecked as unreachable_unchecked;
+
+struct DisplayingOperandVisitor<'a, T> {
+    f: &'a mut T,
+    show_sae: bool,
+    sae_mode: Option<SaeMode>,
+}
+
+impl<'a, T> DisplayingOperandVisitor<'a, T> {
+    pub fn new(f: &'a mut T) -> Self {
+        Self { f, show_sae: false, sae_mode: None }
+    }
+}
+
+fn needs_leading_0(imm: u64) -> bool {
+    let mut rem = imm;
+    let mut digit = 0;
+    while rem > 0 {
+        digit = rem & 0xf;
+        rem = rem >> 4;
+    }
+
+    // digit is whatever the top non-zero hex digit was in the number
+    digit >= 10
+}
+
+#[test]
+fn test_leading_0() {
+    assert!(needs_leading_0(0xa0));
+    assert!(needs_leading_0(0xa00000));
+    assert!(!needs_leading_0(0x900000));
+    assert!(needs_leading_0(0xf12345));
+}
+
+fn hex_ambiguous(imm: u64) -> bool {
+    imm >= 10
+}
+
+static RELATIVE_BRANCHES: [Opcode; 23] = [
+    Opcode::JMP, Opcode::CALL,
+    Opcode::JECXZ, Opcode::JCXZ,
+    Opcode::LOOP, Opcode::LOOPZ, Opcode::LOOPNZ,
+    Opcode::JO, Opcode::JNO,
+    Opcode::JB, Opcode::JNB,
+    Opcode::JZ, Opcode::JNZ,
+    Opcode::JNA, Opcode::JA,
+    Opcode::JS, Opcode::JNS,
+    Opcode::JP, Opcode::JNP,
+    Opcode::JL, Opcode::JGE,
+    Opcode::JLE, Opcode::JG,
+];
+
+struct RelativeBranchPrinter<'a, F: DisplaySink> {
+    inst: &'a Instruction,
+    out: &'a mut F,
+}
+
+impl<'a, F: DisplaySink> crate::real_mode::OperandVisitor for RelativeBranchPrinter<'a, F> {
+    // return true if we printed a relative branch offset, false otherwise
+    type Ok = bool;
+    // but errors are errors
+    type Error = fmt::Error;
+
+    fn visit_reg(&mut self, _reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_deref(&mut self, _base: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_disp(&mut self, _base: RegSpec, _rel: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i8(&mut self, rel: i8) -> Result<Self::Ok, Self::Error> {
+        if RELATIVE_BRANCHES.contains(&self.inst.opcode) {
+            self.out.write_char('$')?;
+            let rel = rel.wrapping_add(0u32.wrapping_offset(self.inst.len()).to_linear() as i8);
+            let mut v = rel as u8;
+            if rel < 0 {
+                self.out.write_char('-')?;
+                v = rel.unsigned_abs();
+            } else {
+                self.out.write_char('+')?;
+            }
+            if needs_leading_0(v as u64) {
+                self.out.write_char('0')?;
+            }
+            write!(self.out, "{:X}", v)?;
+            if hex_ambiguous(v as u64) {
+                self.out.write_char('h')?;
+            }
+            Ok(true)
+        } else {
+            Ok(false)
+        }
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i32(&mut self, rel: i32) -> Result<Self::Ok, Self::Error> {
+        if RELATIVE_BRANCHES.contains(&self.inst.opcode) || self.inst.opcode == Opcode::XBEGIN {
+            let rel = rel.wrapping_add(0u32.wrapping_offset(self.inst.len()).to_linear() as i32);
+            let mut v = rel as u32;
+
+            if v >= 128 && v < 256 {
+                // we'll print two digits, but nasm will try to shorten the jump to a 1-byte offset form. then the
+                // offset is out of range and nasm complains "jump destination too far : by <N> byte(s)".
+                // "jmp near ptr " is the full name of "i mean it, use a 32-bit offset", so use that to ward away
+                // the problematic "optimization".
+                self.out.write_str("near ptr ")?;
+            }
+
+            self.out.write_char('$')?;
+            if rel < 0 {
+                self.out.write_char('-')?;
+                v = rel.unsigned_abs();
+            } else {
+                self.out.write_char('+')?;
+            }
+            if needs_leading_0(v as u64) {
+                self.out.write_char('0')?;
+            }
+            write!(self.out, "{:X}", v)?;
+            if hex_ambiguous(v as u64) {
+                self.out.write_char('h')?;
+            }
+            Ok(true)
+        } else {
+            Ok(false)
+        }
+    }
+    fn visit_u8(&mut self, _imm: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_i16(&mut self, _imm: i16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u16(&mut self, _imm: u16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_u32(&mut self, _imm: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_abs_u16(&mut self, _imm: u16) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_abs_u32(&mut self, _imm: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_absolute_far_address(&mut self, _segment: u16, _address: u32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale(&mut self, _index: RegSpec, _scale: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_disp(&mut self, _index: RegSpec, _scale: u8, _disp: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_disp(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _disp: i32) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_other(&mut self) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge_sae(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode, _sae_mode: SaeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_reg_mask_merge_sae_noround(&mut self, _spec: RegSpec, _mask: RegSpec, _merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_disp_masked(&mut self, _base: RegSpec, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_deref_masked(&mut self, _base: RegSpec, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_masked(&mut self, _index: RegSpec, _scale: u8, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_index_scale_disp_masked(&mut self, _index: RegSpec, _scale: u8, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_masked(&mut self, _base: RegSpec, _index: RegSpec, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_disp_masked(&mut self, _base: RegSpec, _index: RegSpec, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_masked(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+    fn visit_base_index_scale_disp_masked(&mut self, _base: RegSpec, _index: RegSpec, _scale: u8, _disp: i32, _mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        Ok(false)
+    }
+}
+
+fn masm_displacement<T: core::fmt::Write>(f: &mut T, disp: i32) -> Result<(), core::fmt::Error> {
+    let udisp = if disp >= 0 {
+        write!(f, "+ ")?;
+        disp as u64
+    } else {
+        write!(f, "- ")?;
+        -(disp as i64) as u64
+    };
+
+    if needs_leading_0(udisp) {
+        write!(f, "0")?;
+    }
+    write!(f, "{:X}", udisp)?;
+    if hex_ambiguous(udisp) {
+        write!(f, "h")?;
+    }
+
+    Ok(())
+}
+
+impl <T: DisplaySink> crate::real_mode::OperandVisitor for DisplayingOperandVisitor<'_, T> {
+    type Ok = ();
+    type Error = core::fmt::Error;
+
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u8(&mut self, imm: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i8(&mut self, imm: i8) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i32 as u32;
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u16(&mut self, imm: u16) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_i16(&mut self, imm: i16) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as i32 as u32;
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_u32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    fn visit_i32(&mut self, imm: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.span_start_immediate();
+        let imm = imm as u32;
+        if needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:X}", imm)?;
+        if hex_ambiguous(imm as u64) {
+            self.f.write_char('h')?;
+        }
+        self.f.span_end_immediate();
+        Ok(())
+    }
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_reg(&mut self, reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(reg)?;
+        Ok(())
+    }
+    fn visit_reg_mask_merge(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        Ok(())
+    }
+    fn visit_reg_mask_merge_sae(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode, sae_mode: crate::real_mode::SaeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        self.show_sae = true;
+        self.sae_mode = Some(sae_mode);
+        Ok(())
+    }
+    fn visit_reg_mask_merge_sae_noround(&mut self, spec: RegSpec, mask: RegSpec, merge_mode: MergeMode) -> Result<Self::Ok, Self::Error> {
+        self.f.write_reg(spec)?;
+        if mask.num != 0 {
+            self.f.write_fixed_size("{")?;
+            self.f.write_reg(mask)?;
+            self.f.write_fixed_size("}")?;
+        }
+        if let MergeMode::Zero = merge_mode {
+            self.f.write_fixed_size("{z}")?;
+        }
+        self.show_sae = true;
+        self.sae_mode = None;
+        Ok(())
+    }
+    fn visit_abs_u16(&mut self, imm: u16) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.span_start_address();
+        if imm >= 0x1000 && needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:04X}", imm)?;
+        self.f.write_char('h')?;
+        self.f.span_end_address();
+        self.f.write_fixed_size("]")?;
+        Ok(())
+    }
+    fn visit_abs_u32(&mut self, imm: u32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.span_start_address();
+        if imm >= 0x1000_0000 && needs_leading_0(imm as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:08X}", imm)?;
+        self.f.write_char('h')?;
+        self.f.span_end_address();
+        self.f.write_fixed_size("]")?;
+        Ok(())
+    }
+    fn visit_absolute_far_address(&mut self, segment: u16, address: u32) -> Result<Self::Ok, Self::Error> {
+        if needs_leading_0(segment as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:4X}", segment)?;
+        self.f.write_char('h')?;
+        self.f.write_fixed_size(":")?;
+        if needs_leading_0(address as u64) {
+            self.f.write_char('0')?;
+        }
+        write!(self.f, "{:4X}", address)?;
+        self.f.write_char('h')?;
+        Ok(())
+    }
+    #[cfg_attr(not(feature="profiling"), inline(always))]
+    #[cfg_attr(feature="profiling", inline(never))]
+    fn visit_disp(&mut self, base: RegSpec, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_char('[')?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_deref(&mut self, base: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_index_scale(&mut self, index: RegSpec, scale: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+
+        Ok(())
+    }
+    fn visit_index_scale_disp(&mut self, index: RegSpec, scale: u8, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')
+    }
+    fn visit_base_index_scale(&mut self, base: RegSpec, index: RegSpec, scale: u8) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")
+    }
+    fn visit_base_index_scale_disp(&mut self, base: RegSpec, index: RegSpec, scale: u8, disp: i32) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_fixed_size("]")
+    }
+    fn visit_disp_masked(&mut self, base: RegSpec, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_char('[')?;
+        self.f.write_reg(base)?;
+        self.f.write_char(' ')?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_deref_masked(&mut self, base: RegSpec, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_index_scale_masked(&mut self, index: RegSpec, scale: u8, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_index_scale_disp_masked(&mut self, index: RegSpec, scale: u8, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_masked(&mut self, base: RegSpec, index: RegSpec, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_disp_masked(&mut self, base: RegSpec, index: RegSpec, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        self.f.write_fixed_size(" ")?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_scale_masked(&mut self, base: RegSpec, index: RegSpec, scale: u8, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_fixed_size("]")?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+    fn visit_base_index_scale_disp_masked(&mut self, base: RegSpec, index: RegSpec, scale: u8, disp: i32, mask_reg: RegSpec) -> Result<Self::Ok, Self::Error> {
+        self.f.write_fixed_size("[")?;
+        self.f.write_reg(base)?;
+        self.f.write_fixed_size(" + ")?;
+        self.f.write_reg(index)?;
+        if scale > 1 {
+            self.f.write_fixed_size(" * ")?;
+            self.f.write_scale(scale)?;
+        }
+        self.f.write_char(' ')?;
+        masm_displacement(&mut self.f, disp)?;
+        self.f.write_char(']')?;
+        self.f.write_char('{')?;
+        self.f.write_reg(mask_reg)?;
+        self.f.write_char('}')?;
+        Ok(())
+    }
+
+    fn visit_other(&mut self) -> Result<Self::Ok, Self::Error> {
+        Ok(())
+    }
+}
+
+#[cfg_attr(feature="profiling", inline(never))]
+pub(crate) fn contextualize<T: DisplaySink>(instr: &Instruction, out: &mut T) -> fmt::Result {
+    if instr.xacquire() {
+        out.write_fixed_size("xacquire ")?;
+    }
+    if instr.xrelease() {
+        out.write_fixed_size("xrelease ")?;
+    }
+    if instr.prefixes.lock() {
+        out.write_fixed_size("lock ")?;
+    }
+
+    if instr.prefixes.rep_any() {
+        // TODO: be more precise about when rep/repne 
+        if instr.opcode.can_rep() {
+            if instr.prefixes.rep() {
+                out.write_fixed_size("rep ")?;
+            } else if instr.prefixes.repnz() {
+                out.write_fixed_size("repne ")?;
+            }
+        }
+    }
+
+    if instr.opcode == Opcode::JMPF {
+        out.write_opcode(Opcode::JMP)?; // MASM puts the f on the operand size
+    } else if instr.opcode == Opcode::CALLF {
+        out.write_opcode(Opcode::CALL)?; // MASM puts the f on the operand size
+    } else if instr.opcode == Opcode::FENI8087_NOP {
+        out.write_fixed_size("feni")?;
+        return Ok(());
+    } else if instr.opcode == Opcode::FDISI8087_NOP {
+        out.write_fixed_size("fdisi")?;
+        return Ok(());
+    } else if instr.opcode == Opcode::FSETPM287_NOP {
+        out.write_fixed_size("fsetpm")?;
+        return Ok(());
+    } else {
+        out.write_opcode(instr.opcode)?;
+    }
+
+    match instr.opcode {
+        Opcode::HRESET => {
+            // dumpbin shows, and MASM needs, the implicit "eax" operand as an explicit textual operand.
+            out.write_fixed_size(" ")?;
+            instr.visit_operand(0, &mut DisplayingOperandVisitor::new(out))?;
+            out.write_fixed_size(", eax")?;
+            return Ok(());
+        }
+        Opcode::LSL => {
+            // dumpbin shows, and MASM needs, the first and second operands to match in size.
+            // this means `lsl eax, edx` is actually shown as `lsl eax, edx`. fix that up here.
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            let Operand::Register { reg: dest } = instr.operand(0) else { panic!("impossible LSL dest"); };
+
+            if let Operand::Register { reg: mut src } = instr.operand(1) {
+                visitor.f.write_fixed_size(" ")?;
+                instr.visit_operand(0, &mut visitor)?;
+                src.bank = dest.bank;
+                visitor.f.write_fixed_size(", ")?;
+                visitor.visit_reg(src)?;
+                return Ok(());
+            } else {
+                // don't need to do anything about memory sources
+            };
+        }
+        Opcode::PREFETCHNTA => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH0 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH1 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCH2 => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::PREFETCHW => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::INVLPG => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLFLUSH => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLFLUSHOPT => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::CLWB => {
+            // dumpbin doesn't bother with the memory size here, same for masm.
+            out.write_char(' ')?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::SGDT | Opcode::SIDT => {
+            // masm uses "tbyte" as a memory size here.
+            out.write_fixed_size(" fword ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::LSS => {
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            instr.visit_operand(0, &mut visitor)?;
+
+            match instr.mem_size {
+                4 => {
+                    visitor.f.write_fixed_size(", dword ptr ")?;
+                },
+                6 => {
+                    visitor.f.write_fixed_size(", fword ptr ")?;
+                },
+                o => { panic!("impossible memory size: {:?}", o); }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::LGDT | Opcode::LIDT => {
+            // masm uses "fword" as a memory size here.
+            out.write_fixed_size(" fword ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+
+            return Ok(());
+        }
+        Opcode::NOP => {
+            // masm doesn't accept multi-operand nop, while x86 does have such instructions.
+            // report no-operand nop here instead so it at least round-trips..
+            if instr.operand_count > 1 {
+                return Ok(());
+            }
+        },
+        Opcode::VPSCATTERDD => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" dword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERQD => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" dword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERDQ => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" qword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::VPSCATTERQQ => {
+            // intel/xed/etc syntax has the mask register as an operand rather than normal memory masking. is xed wrong?
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_str(" qword ptr ")?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_char('{')?;
+            visitor.f.write_reg(instr.regs[3])?;
+            visitor.f.write_fixed_size("}, ")?;
+            instr.visit_operand(2, &mut visitor)?;
+            return Ok(());
+        },
+        Opcode::MONITOR => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::edx())?;            
+            return Ok(());
+        }
+        Opcode::MWAIT => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;           
+            return Ok(());
+        }
+        Opcode::INVLPGB => {
+            // masm bug: it doesn't tolerate the mention of the second operand?!
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_fixed_size(", ")?;  
+            instr.visit_operand(2, &mut visitor)?;       
+            return Ok(());
+        }
+        Opcode::MONITORX => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::edx())?;
+            return Ok(());
+        }
+        Opcode::MWAITX => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ebx())?;
+            return Ok(());
+        }
+        Opcode::RDPRU => {
+            // masm wants no implicit registers this time.
+            return Ok(());
+        }
+        Opcode::SCAS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                out.write_char(name[0] as char)?;
+                out.write_char(name[1] as char)?;
+                out.write_fixed_size(":")?;
+            }
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::LODS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::STOS => {
+            // masm does not want the implicit r/e/ax
+            out.write_fixed_size(" ")?;
+            out.write_mem_size_label(instr.mem_size)?;
+            out.write_fixed_size(" ptr ")?;
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                out.write_char(name[0] as char)?;
+                out.write_char(name[1] as char)?;
+                out.write_fixed_size(":")?;
+            }
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::PSMASH => {
+            // masm wants the implicit eax operand
+            out.write_fixed_size(" ")?;
+            out.write_reg(RegSpec::eax())?;
+            return Ok(());
+        }
+        Opcode::PVALIDATE | Opcode::RMPADJUST | Opcode::RMPUPDATE => {
+            // masm wants the implicit registers to all be ... explicit.
+            let visitor = DisplayingOperandVisitor::new(out);
+            visitor.f.write_char(' ')?;
+            visitor.f.write_reg(RegSpec::eax())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::ecx())?;
+            visitor.f.write_fixed_size(", ")?;
+            visitor.f.write_reg(RegSpec::edx())?;
+            return Ok(());
+        }
+        Opcode::INCSSP => {
+            // masm wants a d/q suffix on the mnemonic even though these are distinguished by register name..
+            let Operand::Register { reg } = instr.operand(0) else {
+                panic!("impossible operand");
+            };
+            if reg.bank == RegisterBank::D {
+                out.write_char('d')?;
+            } else {
+                panic!("impossible register width");
+            }
+        }
+        Opcode::WRSS | Opcode::WRUSS => {
+            // masm wants a d/q suffix on the mnemonic, but other operands are the same.
+            let Operand::Register { reg } = instr.operand(1) else {
+                panic!("impossible operand");
+            };
+            if reg.bank == RegisterBank::D {
+                out.write_char('d')?;
+            } else {
+                panic!("impossible register width");
+            }
+        }
+        Opcode::PBLENDVB | Opcode::BLENDVPS | Opcode::BLENDVPD | Opcode::SHA256RNDS2 => {
+            // masm wants the implicit xmm0 operand as ... explicit.
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+
+            if instr.operands[1].is_memory() {
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+            visitor.f.write_reg(RegSpec::xmm0())?;
+
+            return Ok(());
+        }
+        Opcode::LEA => {
+            // dumpbin/masm don't want the `<word> ptr` prefix on the memory access here..
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+            instr.visit_operand(0, &mut visitor)?;
+            visitor.f.write_str(", ")?;
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::PUSHF => {
+            if !instr.prefixes.operand_size() {
+                out.write_char('d')?;
+            }
+            return Ok(());
+        }
+        Opcode::AAM | Opcode::AAD => {
+            if instr.imm == 10 {
+                // dumpbin doesn't bother with a base here, and this is the only form masm accepts.
+                return Ok(());
+            }
+        }
+        Opcode::FCOM | Opcode::FCOMP | Opcode::FICOM | Opcode::FICOMP => {
+            // masm does not want the first operand *ever*?
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[1].is_memory() {
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+            }
+
+            instr.visit_operand(1, &mut visitor)?;
+            return Ok(());
+        }
+        Opcode::FADD | Opcode::FMUL | Opcode::FSUB | Opcode::FSUBR | Opcode::FDIV | Opcode::FDIVR |
+        Opcode::FADDP | Opcode::FMULP | Opcode::FSUBRP | Opcode::FSUBP | Opcode::FDIVP | Opcode::FDIVRP |
+        Opcode::FIADD | Opcode::FIMUL | Opcode::FISUB | Opcode::FISUBR | Opcode::FIDIV | Opcode::FIDIVR |
+        Opcode::FCMOVB | Opcode::FCMOVE | Opcode::FCMOVBE | Opcode::FCMOVU | Opcode::FCMOVNB | Opcode::FCMOVNE | Opcode::FCMOVNBE | Opcode::FCMOVNU |
+        Opcode::FUCOMI | Opcode::FCOMI | Opcode::FUCOMIP | Opcode::FCOMIP => {
+            if instr.operands[1].is_memory() {
+                // masm does not want to see the implicit st(0).
+                out.write_fixed_size(" ")?;
+                let mut visitor = DisplayingOperandVisitor::new(out);
+
+                visitor.f.write_mem_size_label(instr.mem_size)?;
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(1, &mut visitor)?;
+                return Ok(());
+            } else {
+                // dumpbin writes `st` instead of `st(0)` as the first operand in reg-reg ops, replicate this. masm doesn't care.
+                out.write_fixed_size(" ")?;
+                let mut visitor = DisplayingOperandVisitor::new(out);
+
+                if instr.operands[0] == OperandSpec::RegRRR {
+                    if instr.regs[0] == RegSpec::st0() {
+                        visitor.f.write_fixed_size("st")?;
+                    } else {
+                        instr.visit_operand(0, &mut visitor)?;
+                    }
+                    visitor.f.write_fixed_size(", ")?;
+                    instr.visit_operand(1, &mut visitor)?;
+                } else {
+                    debug_assert!(instr.operands[1] == OperandSpec::RegRRR);
+
+                    instr.visit_operand(0, &mut visitor)?;
+                    visitor.f.write_fixed_size(", ")?;
+                    if instr.regs[0] == RegSpec::st0() {
+                        visitor.f.write_fixed_size("st")?;
+                    } else {
+                        instr.visit_operand(1, &mut visitor)?;
+                    }
+                };
+
+                return Ok(());
+            }
+        }
+        Opcode::FBLD | Opcode::FLD | Opcode::FILD | Opcode::FXCH | Opcode::FUCOM | Opcode::FUCOMP => {
+            // masm does not want to see the implicit st(0).
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[1].is_memory() {
+                if instr.mem_size == 10 {
+                    visitor.f.write_fixed_size("tbyte")?;
+                } else {
+                    visitor.f.write_mem_size_label(instr.mem_size)?;
+                }
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(1) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(1, &mut visitor)?;
+                return Ok(());
+            } else {
+                if instr.regs[1] == RegSpec::st0() {
+                    visitor.f.write_fixed_size("st")?;
+                } else {
+                    instr.visit_operand(1, &mut visitor)?;
+                }
+                return Ok(());
+            }
+        }
+        Opcode::FBSTP | Opcode::FST | Opcode::FSTP | Opcode::FIST | Opcode::FISTP | Opcode::FISTTP => {
+            // masm does not want to see the implicit st(0).
+            out.write_fixed_size(" ")?;
+            let mut visitor = DisplayingOperandVisitor::new(out);
+
+            if instr.operands[0].is_memory() {
+                if instr.mem_size == 10 {
+                    visitor.f.write_fixed_size("tbyte")?;
+                } else {
+                    visitor.f.write_mem_size_label(instr.mem_size)?;
+                }
+                visitor.f.write_fixed_size(" ptr")?;
+                visitor.f.write_char(' ')?;
+                if let Some(prefix) = instr.segment_override_for_op(0) {
+                    let name = prefix.name();
+                    visitor.f.write_char(name[0] as char)?;
+                    visitor.f.write_char(name[1] as char)?;
+                    visitor.f.write_fixed_size(":")?;
+                }
+                instr.visit_operand(0, &mut visitor)?;
+                return Ok(());
+            } else {
+                instr.visit_operand(0, &mut visitor)?;
+                return Ok(());
+            }
+        }
+        _ => {}
+    }
+
+    if instr.operand_count > 0 {
+        out.write_fixed_size(" ")?;
+
+        let mut size_is_mmword = false;
+        for i in 0..instr.operand_count {
+            if let Operand::Register { reg } = instr.operand(i) {
+                if reg.bank == RegisterBank::MM || reg.bank == RegisterBank::X || reg.bank == RegisterBank::Y {
+                    size_is_mmword = true;
+                }
+            }
+        }
+
+        if instr.opcode == Opcode::VPEXTRQ || instr.opcode == Opcode::PEXTRQ || instr.opcode == Opcode::VPINSRQ || instr.opcode == Opcode::PINSRQ || instr.opcode == Opcode::MOVLPD || instr.opcode == Opcode::MOVHPD || instr.opcode == Opcode::CVTSI2SD || instr.opcode == Opcode::MOVQ || instr.opcode == Opcode::CVTSI2SS || instr.opcode == Opcode::MOVNTSD || instr.opcode == Opcode::MOVLPS || instr.opcode == Opcode::MOVHPS {
+            // movq: dumpbin is inconsistent on sizes (480f7e is qword, 0f7f is mmword), but masm accepts either.
+            // use qword always to match xed etc.
+            size_is_mmword = false;
+        } else if instr.opcode == Opcode::CVTTSD2SI || instr.opcode == Opcode::CVTSD2SI {
+            size_is_mmword = true;
+        }
+
+        if instr.visit_operand(0, &mut RelativeBranchPrinter {
+            inst: instr,
+            out,
+        })? {
+            return Ok(());
+        }
+
+        if instr.operands[0 as usize].is_memory() {
+            // fxsave and friends get no "XXXword ptr" memory prefix, masm doesn't accept it
+            if instr.mem_size != 63 && instr.mem_size != 48 { // masm does not print "m384b" labels.. 
+                if size_is_mmword && instr.mem_size == 8 {
+                    out.write_fixed_size("mmword")?;
+                } else if instr.mem_size == 6 && (instr.opcode == Opcode::JMPF || instr.opcode == Opcode::CALLF) {
+                    // "fword" in real mode instead of "far"..
+                    out.write_fixed_size("fword")?;
+                } else {
+                    out.write_mem_size_label(instr.mem_size)?;
+                }
+                out.write_fixed_size(" ptr")?;
+                out.write_char(' ')?;
+            }
+            if let Some(prefix) = instr.segment_override_for_op(0) {
+                let name = prefix.name();
+                out.write_char(name[0] as char)?;
+                out.write_char(name[1] as char)?;
+                out.write_fixed_size(":")?;
+            }
+        }
+
+        let mut displayer = DisplayingOperandVisitor {
+            f: out,
+            show_sae: false,
+            sae_mode: None,
+        };
+        instr.visit_operand(0 as u8, &mut displayer)?;
+
+        for i in 1..instr.operand_count {
+            // don't worry about checking for `instr.operands[i] != Nothing`, it would be a bug to
+            // reach that while iterating only to `operand_count`..
+            displayer.f.write_fixed_size(", ")?;
+            // hint that accessing `inster.operands[i]` can't panic: this is useful for
+            // `instr.operands` and the segment selector check after.
+            if i >= 4 {
+                // Safety: Instruction::operands is a four-element array; operand_count is always
+                // low enough that 0..operand_count is a valid index.
+                unsafe { unreachable_unchecked(); }
+            }
+
+            if instr.operands[i as usize].is_memory() {
+                // fxsave and friends get no "XXXword ptr" memory prefix, masm doesn't accept it
+                if instr.mem_size != 63 && instr.mem_size != 48 { // masm does not print "m384b" labels.. 
+                    if size_is_mmword && instr.mem_size == 8 {
+                        displayer.f.write_fixed_size("mmword")?;
+                    } else if instr.mem_size == 6 && (instr.opcode == Opcode::LDS || instr.opcode == Opcode::LES || instr.opcode == Opcode::LFS || instr.opcode == Opcode::LGS || instr.opcode == Opcode::LSS) {
+                        // "fword" in real mode instead of "far"..
+                        displayer.f.write_fixed_size("fword")?;
+                    } else {
+                        displayer.f.write_mem_size_label(instr.mem_size)?;
+                    }
+                    displayer.f.write_fixed_size(" ptr")?;
+                    displayer.f.write_char(' ')?;
+                }
+                if let Some(prefix) = instr.segment_override_for_op(i) {
+                    let name = prefix.name();
+                    if instr.opcode != Opcode::MOVS || name != b"ds" {
+                        displayer.f.write_char(name[0] as char)?;
+                        displayer.f.write_char(name[1] as char)?;
+                        displayer.f.write_fixed_size(":")?;
+                    }
+                }
+            }
+
+            instr.visit_operand(i as u8, &mut displayer)?;
+            if let Some(evex) = instr.prefixes.evex() {
+                if evex.broadcast() && instr.operands[i as usize].is_memory() {
+                    let scale = if instr.opcode == Opcode::VCVTPD2PS || instr.opcode == Opcode::VCVTTPD2UDQ || instr.opcode == Opcode::VCVTPD2UDQ || instr.opcode == Opcode::VCVTUDQ2PD || instr.opcode == Opcode::VCVTPS2PD || instr.opcode == Opcode::VCVTQQ2PS || instr.opcode == Opcode::VCVTDQ2PD || instr.opcode == Opcode::VCVTTPD2DQ || instr.opcode == Opcode::VFPCLASSPS || instr.opcode == Opcode::VFPCLASSPD || instr.opcode == Opcode::VCVTNEPS2BF16 || instr.opcode == Opcode::VCVTUQQ2PS || instr.opcode == Opcode::VCVTPD2DQ || instr.opcode == Opcode::VCVTTPS2UQQ || instr.opcode == Opcode::VCVTPS2UQQ || instr.opcode == Opcode::VCVTTPS2QQ || instr.opcode == Opcode::VCVTPS2QQ {
+                        if instr.opcode == Opcode::VFPCLASSPS || instr.opcode ==  Opcode::VCVTNEPS2BF16 {
+                            if evex.vex().l() {
+                                8
+                            } else if evex.lp() {
+                                16
+                            } else {
+                                4
+                            }
+                        } else if instr.opcode == Opcode::VFPCLASSPD {
+                            if evex.vex().l() {
+                                4
+                            } else if evex.lp() {
+                                8
+                            } else {
+                                2
+                            }
+                        } else {
+                            // vcvtpd2ps is "cool": in broadcast mode, it can read a
+                            // double-precision float (qword), resize to single-precision,
+                            // then broadcast that to the whole destination register. this
+                            // means we need to show `xmm, qword [addr]{1to4}` if vector
+                            // size is 256. likewise, scale of 8 for the same truncation
+                            // reason if vector size is 512.
+                            // vcvtudq2pd is the same story.
+                            // vfpclassp{s,d} is a mystery to me.
+                            if evex.vex().l() {
+                                4
+                            } else if evex.lp() {
+                                8
+                            } else {
+                                2
+                            }
+                        }
+                    } else {
+                        // this should never be `None` - that would imply two
+                        // memory operands for a broadcasted operation.
+                        if let Some(width) = Operand::from_spec(instr, instr.operands[i as usize - 1]).width() {
+                            width / instr.mem_size
+                        } else {
+                            0
+                        }
+                    };
+                    displayer.f.write_fixed_size("{1to")?;
+                    static STRING_LUT: &'static [&'static str] = &[
+                        "0", "1", "2", "3", "4", "5", "6", "7", "8",
+                        "9", "10", "11", "12", "13", "14", "15", "16",
+                    ];
+                    unsafe {
+                        displayer.f.write_lt_16(STRING_LUT.get_kinda_unchecked(scale as usize))?;
+                    }
+                    displayer.f.write_char('}')?;
+                }
+            }
+        }
+
+        if displayer.show_sae {
+            displayer.f.write_char(' ')?;
+            if let Some(sae_mode) = displayer.sae_mode.as_ref() {
+                displayer.f.write_sae_mode(*sae_mode)?;
+            } else {
+                displayer.f.write_str("{sae}")?;
+            }
+        }
+    }
+    Ok(())
+}
diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs
index ee66d2a..e66a4b8 100644
--- a/src/real_mode/mod.rs
+++ b/src/real_mode/mod.rs
@@ -8342,12 +8342,7 @@ fn read_operands<
                 instruction.opcode = Opcode::SMSW;
                 instruction.operand_count = 1;
                 instruction.mem_size = 2;
-                let bank = if !instruction.prefixes.operand_size() {
-                    RegisterBank::W
-                } else {
-                    RegisterBank::D
-                };
-                instruction.operands[0] = read_E(words, instruction, modrm, bank, sink)?;
+                instruction.operands[0] = read_E(words, instruction, modrm, RegisterBank::W, sink)?;
             } else if r == 5 {
                 let mod_bits = modrm >> 6;
                 if mod_bits != 0b11 {
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index 80c90bb..216463e 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -14,22 +14,12 @@ mod behavior;
 
 use std::fmt::Write;
 
-use yaxpeax_arch::{AddressBase, Decoder, LengthedInstruction};
-use yaxpeax_x86::long_mode::InstDecoder;
+use yaxpeax_arch::{Decoder, LengthedInstruction};
+use yaxpeax_x86::long_mode::{Instruction, InstDecoder};
+#[cfg(feature="fmt")]
+use yaxpeax_x86::long_mode::DisplayStyle;
 
-/*
-#[cfg(feature="std")]
-fn test_write_hex_specialization() {
-    use crate::yaxpeax_x86::long_mode::DisplaySink;
-    for i in 0..0xffu8 {
-        let mut out = yaxpeax_x86::long_mode::InstructionFormatter::new();
-        out.write_char('0').unwrap();
-        out.write_char('x').unwrap();
-        out.write_u8(i).unwrap();
-        assert_eq!(out.into_inner(), format!("0x{:x}", i));
-    }
-}
-*/
+use crate::tools::{self, CodeModel};
 
 fn test_invalid(data: &[u8]) {
     test_invalid_under(&InstDecoder::default(), data);
@@ -54,92 +44,142 @@ fn test_invalid_under(decoder: &InstDecoder, data: &[u8]) {
     }
 }
 
-fn test_display(data: &[u8], expected: &'static str) {
-    test_display_under(&InstDecoder::default(), data, expected);
-}
-
-fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) {
-    let mut hex = String::new();
-    for b in data {
-        write!(hex, "{:02x}", b).unwrap();
-    }
+fn test_decode_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) -> Instruction {
     let mut reader = yaxpeax_arch::U8Reader::new(data);
-    match decoder.decode(&mut reader) {
+    let instr = match decoder.decode(&mut reader) {
         Ok(instr) => {
-            cfg_if::cfg_if! {
-                if #[cfg(feature="fmt")] {
-                    let text = format!("{}", instr);
-                    assert!(
-                        text == expected,
-                        "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
-                        hex,
-                        instr,
-                        decoder,
-                        text,
-                        expected
-                    );
-
-                    let mut text2 = String::new();
-                    let mut out = yaxpeax_arch::display::FmtSink::new(&mut text2);
-                    instr.write_to(&mut out).expect("printing succeeds");
-
-                    assert!(
-                        text2 == text,
-                        "display error through FmtSink for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
-                        hex,
-                        instr,
-                        decoder,
-                        text2,
-                        text,
-                    );
-
-                    #[cfg(feature="alloc")]
-                    let mut formatter = yaxpeax_x86::long_mode::InstructionTextBuffer::new();
-                    #[cfg(feature="alloc")]
-                    let text3 = formatter.format_inst(&instr.display_with(yaxpeax_x86::long_mode::DisplayStyle::Intel)).expect("printing succeeds");
-
-                    #[cfg(feature="alloc")]
-                    assert!(
-                        text3 == text,
-                        "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
-                        hex,
-                        instr,
-                        decoder,
-                        text3,
-                        text,
-                    );
-
-                    let mut text4 = String::new();
-                    instr.write_to(&mut text4).expect("printing succeeds");
-
-                    assert!(
-                        text4 == text,
-                        "display error through String for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
-                        hex,
-                        instr,
-                        decoder,
-                        text4,
-                        text,
-                    );
-                } else {
-                    eprintln!("non-fmt build cannot compare text equality")
-                }
-            }
-            // while we're at it, test that the instruction is as long, and no longer, than its
-            // input
-            assert_eq!((0u64.wrapping_offset(instr.len()).to_linear()) as usize, data.len(), "instruction length is incorrect, wanted instruction {}", expected);
+            assert_eq!(instr.len().to_const(), data.len() as u64, "instruction length is incorrect");
+            instr
         },
         Err(e) => {
+            let mut hex = String::new();
+            for b in data {
+                write!(hex, "{:02x}", b).unwrap();
+            }
             cfg_if::cfg_if! {
                 if #[cfg(feature="fmt")] {
-                    assert!(false, "decode error ({}) for {} under decoder {}:\n  expected: {}\n", e, hex, decoder, expected);
+                    panic!("decode error ({}) for {} under decoder {}:\n  expected: {}\n", e, hex, decoder, expected);
                 } else {
                     // avoid the unused `e` warning
                     let _ = e;
-                    assert!(false, "decode error (<non-fmt build>) for {} under decoder <non-fmt build>:\n  expected: {}\n", hex, expected);
+                    panic!("decode error (<non-fmt build>) for {} under decoder <non-fmt build>:\n  expected: {}\n", hex, expected);
                 }
             }
         }
+    };
+    instr
+}
+
+fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) {
+    // testing that the instruction displays doesn't work if formatting is disabled, but we can
+    // test that it at least decodes..
+    let _instr = test_decode_under(decoder, data, expected);
+
+    #[cfg(feature="fmt")]
+    test_display_format(decoder, data, expected, DisplayStyle::Intel);
+}
+
+#[cfg(feature="fmt")]
+fn test_display_format(decoder: &InstDecoder, data: &[u8], expected: &'static str, style: DisplayStyle) {
+    let instr = test_decode_under(decoder, data, expected);
+
+    let mut hex = String::new();
+    for b in data {
+        write!(hex, "{:02x}", b).unwrap();
+    }
+    match style {
+        DisplayStyle::Intel => {
+            let text = format!("{}", instr.display_with(DisplayStyle::Intel));
+            assert!(
+                text == expected,
+                "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text,
+                expected
+            );
+
+            let mut text2 = String::new();
+            let mut out = yaxpeax_arch::display::FmtSink::new(&mut text2);
+            instr.write_to(&mut out).expect("printing succeeds");
+
+            assert!(
+                text2 == text,
+                "display error through FmtSink for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text2,
+                text,
+            );
+
+            #[cfg(feature="alloc")]
+            let mut formatter = yaxpeax_x86::long_mode::InstructionTextBuffer::new();
+            #[cfg(feature="alloc")]
+            let text3 = formatter.format_inst(&instr.display_with(DisplayStyle::Intel)).expect("printing succeeds");
+
+            #[cfg(feature="alloc")]
+            assert!(
+                text3 == text,
+                "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text3,
+                text,
+            );
+
+            let mut text4 = String::new();
+            instr.write_to(&mut text4).expect("printing succeeds");
+
+            assert!(
+                text4 == text,
+                "display error through String for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text4,
+                text,
+            );
+        }
+        DisplayStyle::Masm => {
+            let text = format!("{}", instr.display_with(DisplayStyle::Masm));
+            assert!(
+                text == expected,
+                "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text,
+                expected
+            );
+
+            #[cfg(feature="alloc")]
+            let mut formatter = yaxpeax_x86::long_mode::InstructionTextBuffer::new();
+            #[cfg(feature="alloc")]
+            let text3 = formatter.format_inst(&instr.display_with(DisplayStyle::Masm)).expect("printing succeeds");
+
+            #[cfg(feature="alloc")]
+            assert!(
+                text3 == text,
+                "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text3,
+                text,
+            );
+
+            // no `instr.display_with(DisplayStyle::Masm)` tests involving write_to
+            // since write_to unconditionally uses DisplayStyle::Intel
+        }
+        DisplayStyle::C => {
+            panic!("no support for C-style display in testcases yet");
+        }
+        other => {
+            panic!("unsupported style: {:?}", other);
+        }
     }
 }
 
@@ -259,31 +299,408 @@ impl FeatureSet {
 struct Disasm {
     display: &'static str,
     c: Option<&'static str>,
+    masm: Option<&'static str>,
 }
 
 struct TestCase {
     bytes: &'static [u8],
     featuresets: Option<&'static [(FeatureSet, bool)]>,
-    #[cfg(feature="fmt")]
     decodes: Option<Disasm>,
 }
 
+fn check_decodes(decoder: &InstDecoder, decode_ok: bool, bytes: &[u8], disasm: &Disasm) {
+    if decode_ok {
+        test_display_under(&decoder, bytes, disasm.display);
+        #[cfg(feature = "fmt")]
+        if let Some(c_style) = disasm.c.as_ref() {
+            test_display_format(&decoder, bytes, c_style, DisplayStyle::C);
+        }
+
+        // if EXTERNAL_MASM is set we actually want to validate decodes against masm/dumpbin. this
+        // is a bit convoluted. otherwise we're testing against in-tree "gold output". in the
+        // EXTERNAL_MASM case we actually distrust this too, and validate the in-tree expected
+        // output is what masm actually wants.
+        #[cfg(feature = "fmt")]
+        if std::env::var_os("EXTERNAL_MASM").is_some() {
+            eprintln!("==== running testcase: bytes={:x?}, expected_display={}", bytes, disasm.display);
+            // OK: EXTERNAL_MASM is set, we'll expect that there's `../tools/` which has `wibo`,
+            // `mlexe`, and `dumpbin.exe`.
+
+            // match against some testcases that are known to be wrong by MASM/dumpbin.
+            let external_masm_ish = match bytes {
+                &[0xf1] => "int 1".to_string(),  // dumpbin does not know how to decode f1...
+                &[0x4f, 0xe5, 0x99] => "in eax, 99h".to_string(), // this is a MASM/dumpbin bug. see notes on testcase.
+                &[0x4f, 0xe7, 0x99] => "out 99h, eax".to_string(), // this is a MASM/dumpbin bug. see notes on testcase.
+                // dumpbin prints the instruction as if it was encoded in 32-bit form regardless of object file, so overrule it.
+                &[0xf3, 0x0f, 0xc7, 0xfd] => "rdpid rbp".to_string(),
+                &[0x0f, 0x18, 0xc0] => "nop eax".to_string(), // dumpbin would love to call this "prefetchnta rax" ???
+                &[0x0f, 0x18, 0xcc] => "nop esp".to_string(), // dumpbin would love to call this "prefetchnta rsp" ???
+                &[0x0f, 0x18, 0x20] => "nop zmmword ptr [rax]".to_string(), // getting around dumpbin knowing about prefetchrst2..
+                &[0x4f, 0x0f, 0x18, 0x20] => "nop zmmword ptr [r8]".to_string(), // getting around dumpbin knowing about prefetchrst2..
+                &[0x2e, 0x36, 0x47, 0x0f, 0x18, 0xe7] => "nop r15d".to_string(), // getting around dumpbin knowing about prefetchrst2..
+                &[0x0f, 0x19, 0x20] => "nop dword ptr [rax]".to_string(), // dumpbin doesn't know about 0f19..
+                &[0x0f, 0x1a, 0x20] => "nop dword ptr [rax]".to_string(), // dumpbin wants to call this bndldx, yax doesn't do MPX yet
+                &[0x0f, 0x1b, 0x20] => "nop dword ptr [rax]".to_string(), // dumpbin wants to call this bndstx, yax doesn't do MPX yet
+                &[0x0f, 0x1c, 0x20] => "nop dword ptr [rax]".to_string(), // dumpbin doesn't know about 0f1c..
+                &[0x0f, 0x1d, 0x20] => "nop dword ptr [rax]".to_string(), // dumpbin doesn't know about 0f1d..
+                &[0x0f, 0x1e, 0x20] => "nop dword ptr [rax]".to_string(), // dumpbin doesn't know about 0f1e..
+                &[0xf2, 0x66, 0x66, 0x4d, 0x0f, 0x10, 0xc0] => "movsd xmm8, xmm8".to_string(), // dumpbin does not love the prefixes
+                &[0x4f, 0x66, 0x0f, 0x28, 0x00] => "movapd xmm0, xmmword ptr [rax]".to_string(), // dumpbin does not love the prefixes
+                &[0x67, 0x4f, 0x66, 0x0f, 0x28, 0x00] => "movapd xmm0, xmmword ptr [eax]".to_string(), // dumpbin does not love the prefixes
+                &[0xf3, 0x0f, 0x1e, 0xfc] => "nop".to_string(), // dumpbin does not tolerate this at all, redirect into a boring nop.
+                &[0x4d, 0x0f, 0x43, 0xec] => "cmovnb r13, r12".to_string(), // dumpbin writes it "cmovae" instead of yax's cmovnb.
+                &[0x65, 0x4c, 0x89, 0x04, 0x25, 0xa8, 0x01, 0x00, 0x00] => {
+                    "mov qword ptr gs:[000001A8h], r8".to_string() // dumpbin uses %016 formatting, masm happily accepts shorter.
+                },
+                &[0x0f, 0xbe, 0x83, 0xb4, 0x00, 0x00, 0x00] => {
+                    "movsx eax, byte ptr [rbx + 0B4h]".to_string() // dumpbin uses %016 formatting, masm happily accepts shorter.
+                },
+                &[0x46, 0x63, 0xc1] => "movsxd r8, ecx".to_string(), // dumpbin writes 32-bit destinations for this, but masm accepts either?
+                &[0x62, 0xd2, 0x7e, 0x28, 0x3a, 0xca] => {
+                    "vpbroadcastmw2d ymm1, k2".to_string() // dumpbin inexplicably uses "bnd2" as the source register??? MSVC 14.52.36328.
+                },
+                &[0x62, 0xd2, 0x7e, 0x08, 0x28, 0xc2] => {
+                    "vpmovm2b xmm0, k2".to_string() // dumpbin inexplicably uses "bnd2" as the source register??? MSVC 14.52.36328.
+                },
+                &[0x0f, 0x01, 0x51, 0xff] => {
+                    "lgdt fword ptr [rcx - 1]".to_string() // dumpbin prints this as "tbyte", which masm does not accept.
+                },
+                &[0x0f, 0x01, 0x59, 0xff] => {
+                    "lidt fword ptr [rcx - 1]".to_string() // dumpbin prints this as "tbyte", which masm does not accept.
+                },
+                &[0x2e, 0x67, 0x65, 0x2e, 0x46, 0x0f, 0x01, 0xff] => {
+                    "tlbsync".to_string() // dumpbin does not exactly tolerate the extra prefixes.
+                },
+                &[0x0f, 0x0d, 0x00] => {
+                    // dumpbin interprets this as the 3DNow!-style PREFETCH instruction, but we're definitely not 3dnow..
+                    "nop zmmword ptr [rax]".to_string()
+                }
+                &[0xf2, 0x41, 0x0f, 0xbc, 0xd3] => {
+                    // masm doesn't like the extra prefix
+                    "bsf edx, r11d".to_string()
+                }
+                &[0x4f, 0x4e, 0x00, 0xcc] => {
+                    // masm doesn't like the extra prefix
+                    "add spl, r9b".to_string()
+                }
+                &[0xc4, 0x03, 0x3d, 0x0a, 0xca, 0x77] => {
+                    // dumpbin can't deal with this instruction..
+                    "vroundss xmm9, xmm8, xmm10, 77h".to_string()
+                }
+                &[0xc4, 0x03, 0x3d, 0x0b, 0xca, 0x77] => {
+                    // dumpbin can't deal with this instruction..
+                    "vroundsd xmm9, xmm8, xmm10, 77h".to_string()
+                }
+                &[0x66, 0x4f, 0x0f, 0x6e, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc] => {
+                    // dumpbin really wants to use mmword here, but i really don't.
+                    "movq xmm11, qword ptr [r12 + r11 * 4 - 334455CCh]".to_string()
+                }
+                &[0x66, 0x0f, 0xd6, 0x01] => {
+                    // dumpbin really wants to use mmword here, but i really don't.
+                    "movq qword ptr [rcx], xmm0".to_string()
+                }
+                &[0x66, 0x4f, 0x0f, 0xd7, 0xc1] => {
+                    // yax bug? default operand size is 64-bit in 64-bit mode, so the register should be r8?
+                    "pmovmskb r8d, xmm9".to_string()
+                }
+                // dumpbin doesn't know how to decode, and masm doesn't know how to *en*code, ud0.
+                &[0x66, 0x0f, 0xff, 0xc1] => "ud0 eax, ecx".to_string(),
+                &[0xf2, 0x0f, 0xff, 0xc1] => "ud0 eax, ecx".to_string(),
+                &[0xf3, 0x0f, 0xff, 0xc1] => "ud0 eax, ecx".to_string(),
+                &[0x66, 0x0f, 0xff, 0x01] => "ud0 eax, dword ptr [rcx]".to_string(),
+                &[0x66, 0x4f, 0x0f, 0xff, 0xc1] => "ud0 r8d, r9d".to_string(),
+                &[0x4c, 0x0f, 0xff, 0x6b, 0xac] => "ud0 r13d, dword ptr [rbx - 54h]".to_string(),
+                // dumpbin does not tolerate the pointless rex prefix.
+                &[0x4f, 0x66, 0x0f, 0x2a, 0xcf] => "cvtpi2pd xmm1, mm7".to_string(),
+                // dumpbin does not tolerate the pointless rex prefix.
+                &[0x4f, 0xf3, 0x0f, 0x2a, 0xcf] => "cvtsi2ss xmm1, edi".to_string(),
+                // dumpbin does not tolerate the pointless rex prefix.
+                &[0x4f, 0xf2, 0x0f, 0x2a, 0xcf] => "cvtsi2sd xmm1, edi".to_string(),
+                // dumpbin does not tolerate the pointless rex prefix.
+                &[0x4f, 0xf2, 0x0f, 0x2a, 0x00] => "cvtsi2sd xmm0, dword ptr [rax]".to_string(),
+                // dumpbin does not tolerate the pointless rex prefix.
+                &[0x4f, 0xf3, 0x0f, 0x2a, 0x00] => "cvtsi2ss xmm0, dword ptr [rax]".to_string(),
+                // dumpbin does not tolerate the pointless rex prefix.
+                &[0x4f, 0x66, 0x0f, 0x2a, 0x00] => "cvtpi2pd xmm0, mmword ptr [rax]".to_string(),
+                // dumpbin does not tolerate the pointless prefixes.
+                &[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e] => "movdiri dword ptr [rbp + 3Eh], edx".to_string(),
+                // dumpbin does not tolerate the pointless prefixes.
+                &[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07] => "movdir64b rbp, zmmword ptr [rbp + 729080Bh]".to_string(),
+                // dumpbin does not tolerate the pointless prefixes.
+                &[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07] => "movdir64b ebp, zmmword ptr [ebp + 729080Bh]".to_string(),
+                // dumpbin is super confused about the prefixing.
+                &[0xf2, 0xf2, 0x2e, 0x36, 0x47, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f] => "enqcmd r8, zmmword ptr [r11 + 3F9D1C09h]".to_string(),
+                // and again.
+                &[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54] => "enqcmds rsi, zmmword ptr fs:[rdx + 54h]".to_string(),
+                // dumpbin shows a ds prefix; this is tolerated by masm but is kinda incorrect in x86_64. either way masm accepts it though.
+                &[0x3e, 0x4f, 0x0f, 0x38, 0xf6, 0x23] => "wrssq qword ptr [r11], r12".to_string(),
+                // prefixes confuse dumpbin again
+                &[0x66, 0xf3, 0x0f, 0x01, 0xe8] => "setssbsy".to_string(),
+                // prefixes confuse dumpbin again
+                &[0x66, 0xf3, 0x0f, 0x01, 0xea] => "saveprevssp".to_string(),
+                // prefixes confuse dumpbin again
+                &[0xf3, 0x66, 0x0f, 0x01, 0xe8] => "setssbsy".to_string(), // TODO: yax does not support `serialize` (yet)
+                // prefixes confuse dumpbin again
+                &[0xf3, 0x66, 0x0f, 0x01, 0xea] => "saveprevssp".to_string(),
+                // prefixes confuse dumpbin again
+                &[0xf3, 0x66, 0x0f, 0x01, 0x29] => "rstorssp qword ptr [rcx]".to_string(),
+                // dumpbin prints out an xacquire when there is no lock prefix, which causes the instruction to grow a lock prefix in round-tripping. no!
+                &[0xf2, 0x0f, 0xc0, 0xcc] => "xadd ah, cl".to_string(),
+                // dumpbin prints out an rep when one is not allowed, which fails round-tripping. yax doesn't.
+                &[0xf3, 0x0f, 0xc0, 0xcc] => "xadd ah, cl".to_string(),
+                // dumpbin prints out an xacquire when there is no lock prefix, which causes the instruction to grow a lock prefix in round-tripping. no!
+                &[0xf2, 0x0f, 0xc1, 0xcc] => "xadd esp, ecx".to_string(),
+                // dumpbin prints out an rep when one is not allowed, which fails round-tripping. yax doesn't.
+                &[0xf3, 0x0f, 0xc1, 0xcc] => "xadd esp, ecx".to_string(),
+                // dumpbin prints out an xacquire when there is no lock prefix, which causes the instruction to grow a lock prefix in round-tripping. no!
+                &[0xf2, 0x0f, 0xc7, 0x0f] => "cmpxchg8b qword ptr [rdi]".to_string(),
+                // dumpbin prints out an rep when one is not allowed, which fails round-tripping. yax doesn't.
+                &[0xf3, 0x0f, 0xc7, 0x0f] => "cmpxchg8b qword ptr [rdi]".to_string(),
+                // dumpbin prints out the memory size as "oword", but yax uses "xmmword". masm accepts either.
+                &[0x4f, 0x0f, 0xc7, 0x0f] => "cmpxchg16b xmmword ptr [r15]".to_string(),
+                // dumpbin prints out the memory size as "oword", but yax uses "xmmword". masm accepts either.
+                &[0x66, 0x4f, 0x0f, 0xc7, 0x0f] => "cmpxchg16b xmmword ptr [r15]".to_string(),
+                // dumpbin prints out repne prefix, which does not round-trip.
+                &[0xf2, 0x4f, 0x0f, 0xc7, 0x0f] => "cmpxchg16b xmmword ptr [r15]".to_string(),
+                // dumpbin prints out rep prefix, which does not round-trip.
+                &[0xf3, 0x4f, 0x0f, 0xc7, 0x0f] => "cmpxchg16b xmmword ptr [r15]".to_string(),
+                // prefixes again..
+                &[0x3e, 0x64, 0x64, 0x66, 0x4e, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b] => "gf2p8affineinvqb xmm15, xmmword ptr fs:[rdx - 45FBDCEDh], 6Bh".to_string(),
+                &[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad] => "gf2p8affineqb xmm1, xmmword ptr [rsi + rdx * 2 - 412E7D62h], 0ADh".to_string(),
+                &[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8] => "loadiwkey xmm5, xmm0".to_string(),
+                // dumpbin prints out the memory size as "oword", but yax uses "xmmword". masm accepts either.
+                &[0x66, 0x0f, 0x38, 0x80, 0x01] => "invept rax, xmmword ptr [rcx]".to_string(),
+                // dumpbin prints out the memory size as "oword", but yax uses "xmmword". masm accepts either.
+                &[0x66, 0x0f, 0x38, 0x81, 0x01] => "invvpid rax, xmmword ptr [rcx]".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                // (and we print jnb instead of jae)
+                &[0x73, 0x31] => "jnb $+33h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x72, 0x5a] => "jb $+5Ch".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x72, 0xf0] => "jb $-0Eh".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe8, 0x01, 0x00, 0x00, 0x00] => "call $+6".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe8, 0x80, 0x00, 0x00, 0x00] => "call near ptr $+85h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe8, 0xff, 0xff, 0xff, 0xff] => "call $+4".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe9, 0x01, 0x00, 0x00, 0x00] => "jmp $+6".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative. there's also the near ptr nonsense..
+                &[0xe9, 0x80, 0x00, 0x00, 0x00] => "jmp near ptr $+85h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe9, 0xff, 0xff, 0xff, 0xff] => "jmp $+4".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x0f, 0x86, 0x8b, 0x01, 0x00, 0x00] => "jna $+191h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x0f, 0x85, 0x3b, 0x25, 0x00, 0x00] => "jnz $+2541h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x74, 0x47] => "jz $+49h".to_string(),
+                // dumpbin invents a label for laughs.
+                &[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00] => "call qword ptr [$ + 24727Eh]".to_string(),
+                // dumpbin uses a really wide displacement .. for laughs..
+                &[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01] => "jmp qword ptr [rcx * 8 + 1BCA070h]".to_string(),
+                // dumpbin uses a really wide displacement .. for laughs..
+                &[0xff, 0x14, 0xcd, 0x70, 0xa0, 0xbc, 0x01] => "call qword ptr [rcx * 8 + 1BCA070h]".to_string(),
+                // dumpbin bug: 66-prefixed jmp/call does not pick 16-bit registers
+                &[0x66, 0xff, 0xe0] => "jmp rax".to_string(),
+                // dumpbin bug: 66-prefixed jmp/call does not pick 16-bit registers
+                &[0x66, 0xff, 0xd0] => "call rax".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe0, 0x12] => "loopnz $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe1, 0x12] => "loopz $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe2, 0x12] => "loop $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe3, 0x12] => "jrcxz $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe3, 0xf0] => "jrcxz $-0Eh".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x67, 0xe3, 0x12] => "jecxz $+15h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x67, 0xe3, 0xf0] => "jecxz $-0Dh".to_string(),
+                // dumpbin dislikes prefixes.
+                &[0x66, 0xf2, 0x0f, 0x79, 0xcf] => "insertq xmm1, xmm7".to_string(),
+                // rip-rel: oh dear
+                &[0xf6, 0x05, 0x2c, 0x9b, 0xff, 0xff, 0x01] => "test byte ptr [$ - 64D4h], 1".to_string(),
+                // yax uses wider immediates
+                &[0x3d, 0x01, 0xf0, 0xff, 0xff] => "cmp eax, 0FFFFFFFFFFFFF001h".to_string(),
+                // dumpbin doesn't print the $ of rip-rel :(
+                &[0x33, 0x05, 0x78, 0x56, 0x34, 0x12] => "xor eax, dword ptr [$ + 12345678h]".to_string(),
+                &[0x33, 0x81, 0x23, 0x01, 0x65, 0x43] => "xor eax, dword ptr [rcx + 43650123h]".to_string(),
+                &[0x48, 0x33, 0x05, 0x78, 0x56, 0x34, 0x12] => "xor rax, qword ptr [$ + 12345678h]".to_string(),
+                &[0x48, 0x33, 0x81, 0x23, 0x01, 0x65, 0x43] => "xor rax, qword ptr [rcx + 43650123h]".to_string(),
+                &[0x44, 0x33, 0x05, 0x78, 0x56, 0x34, 0x12] => "xor r8d, dword ptr [$ + 12345678h]".to_string(),
+                &[0x44, 0x33, 0x81, 0x23, 0x01, 0x65, 0x43] => "xor r8d, dword ptr [rcx + 43650123h]".to_string(),
+                &[0x45, 0x33, 0x05, 0x78, 0x56, 0x34, 0x12] => "xor r8d, dword ptr [$ + 12345678h]".to_string(),
+                &[0x45, 0x33, 0x81, 0x23, 0x01, 0x65, 0x43] => "xor r8d, dword ptr [r9 + 43650123h]".to_string(),
+                &[0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [44332211h]".to_string(),
+                &[0x41, 0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [44332211h]".to_string(),
+                &[0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [rbp + 44332211h]".to_string(),
+                &[0x41, 0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [r13 + 44332211h]".to_string(),
+                &[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [44332211h]".to_string(),
+                &[0x41, 0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [44332211h]".to_string(),
+                &[0x42, 0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50] => "xor esi, dword ptr [r12 + 50403020h]".to_string(),
+                &[0x43, 0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50] => "xor esi, dword ptr [r12 + 50403020h]".to_string(),
+                &[0x42, 0x33, 0xb4, 0x25, 0x20, 0x30, 0x40, 0x50] => "xor esi, dword ptr [rbp + r12 + 50403020h]".to_string(),
+                &[0x43, 0x33, 0xb4, 0x25, 0x20, 0x30, 0x40, 0x50] => "xor esi, dword ptr [r13 + r12 + 50403020h]".to_string(),
+                // dumpbin gets the size wrong
+                &[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2] => "vcompresspd xmmword ptr [rdx - 70h]{k7}, xmm4".to_string(),
+                // TODO: yax doesn't know about rdssp{d,q}?
+                &[0xf3, 0x0f, 0x1e, 0x0f] => "nop".to_string(),
+                // yax won't mention the pointless repne prefix
+                &[0xf2, 0x0f, 0x06] => "clts".to_string(),
+                // yax won't mention the pointless repne prefix
+                &[0xf2, 0x0f, 0x07] => "sysret".to_string(),
+                // dumpbin spells this mmword
+                &[0x0f, 0x6f, 0x00] => "movq mm0, qword ptr [rax]".to_string(),
+                &[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13] => "xacquire lock btc word ptr [rbx], dx".to_string(),
+                // dumpbin handles this right (like this!) but the output is weird to parse
+                &[0x45, 0x66, 0x0f, 0x21, 0xc8] => "mov rax, dr1".to_string(),
+                // dumpbin says repne, but that doesn't round-trip.
+                &[0x45, 0xf2, 0x0f, 0x21, 0xc8] => "mov rax, dr1".to_string(),
+                // dumpbin says rep, but that doesn't round-trip.
+                &[0x45, 0xf3, 0x0f, 0x21, 0xc8] => "mov rax, dr1".to_string(),
+                // dumpbin prints with more.. flourish
+                &[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00] => "nop word ptr [rax + rax]".to_string(),
+                // disp is wider from dumpbin
+                &[0x48, 0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12] => "lea rsp, [rdi + rax * 8 + 12000020h]".to_string(),
+                &[0x0f, 0xfc, 0xaf, 0x40, 0x38, 0x25, 0xbf] => "paddb mm5, mmword ptr [rdi - 40DAC7C0h]".to_string(),
+                &[0xc7, 0xf8, 0x10, 0x12, 0x34, 0x56] => "xbegin $+56341216h".to_string(),
+                &[0x66, 0xc7, 0xf8, 0x10, 0x12] => "xbegin $+1215h".to_string(),
+                &[0xf2, 0xf3, 0x66, 0x65, 0x4f, 0x25, 0x9b, 0x5e, 0xda, 0x44] => "and rax, 44DA5E9Bh".to_string(),
+                &[0x65, 0x66, 0x66, 0x64, 0x48, 0x0f, 0x38, 0xdb, 0x0f] => "aesimc xmm1, xmmword ptr fs:[rdi]".to_string(),
+                &[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c] => "pi2fw mm6, qword ptr [rax - 5]".to_string(), // more prefix confusion..
+                // prefixes confuse dumpbin, and dumpbin says "qword" where we use mmword. masm accepts either
+                &[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4] => "pfmax mm4, mmword ptr [rbx + rdx * 4 - 6Dh]".to_string(),
+                // dumpbin calls this movq?
+                &[0x4f, 0x0f, 0x7e, 0xcf] => "movd r15, mm1".to_string(),
+                // dumpbin shows this as a wide register but it doesn't *really* matter and yax uses 32-bit always.
+                &[0x4f, 0x0f, 0xd7, 0xcf] => "pmovmskb r9d, mm7".to_string(),
+                // dumpbin shows this as a non-rip-rel offset :(
+                &[0x0f, 0xe5, 0x3d, 0xaa, 0xbb, 0xcc, 0x77] => "pmulhw mm7, qword ptr [$ + 77CCBBAAh]".to_string(),
+                // dumpbin confused about prefixes once again
+                &[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b] => "movntdqa xmm5, xmmword ptr [rbx]".to_string(),
+                // prefixes.. cs: isn't real in 64-bit mode
+                &[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c, 0xf0, 0x63] => "blendpd xmm7, xmmword ptr [eax - 0F83D010h], 63h".to_string(),
+                // prefixes confuse dumpbin
+                &[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d] => "pmovsxwd xmm3, qword ptr fs:[rbp + 2DA80F69h]".to_string(),
+                // prefixes confuse dumpbin
+                &[0x2e, 0x66, 0x26, 0x64, 0x49, 0x0f, 0x3a, 0x21, 0x0b, 0xb1] => "insertps xmm1, dword ptr fs:[r11], 0FFFFFFFFFFFFFFB1h".to_string(),
+                // prefixes confuse dumpbin
+                &[0x66, 0x26, 0x45, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a] => "mpsadbw xmm10, xmmword ptr [r14 - 669D68Ch], 6Ah".to_string(),
+                // prefixes confuse dumpbin
+                &[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03, 0xb3, 0xfa] => "pmaxud xmm3, xmmword ptr gs:[ebp - 54CFC34h]".to_string(),
+                // prefixes confuse dumpbin
+                &[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1] => "punpckhqdq xmm2, xmm1".to_string(),
+                // prefixes confuse dumpbin
+                &[0x2e, 0x66, 0x40, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57] => "blendpd xmm0, xmmword ptr [rax + 2Dh], 57h".to_string(),
+                // prefixes confuse dumpbin
+                &[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f, 0xcd, 0xd7] => "lddqu xmm4, xmmword ptr [eax - 2832A0E5h]".to_string(),
+                // prefixes confuse dumpbin
+                &[0x2e, 0x3e, 0x66, 0x3e, 0x49, 0x0f, 0x3a, 0x41, 0x30, 0x48] => "dppd xmm6, xmmword ptr [r8], 48h".to_string(),
+                // dumpbin prints the order backwards =|
+                &[0x65, 0xf0, 0x87, 0x0f] => "lock xchg dword ptr gs:[rdi], ecx".to_string(),
+                // displacement gets a bunch of extra zeroes
+                &[0x66, 0x4e, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75] => "pclmulqdq xmm9, xmmword ptr [rax + 3526ADB3h], 75h".to_string(),
+                // dumpbin knows about "fstpnce" as "fstp1", but masm does not.
+                // since this is an undocumented instruction anyway, decode it ourselves..
+                &[0xd9, 0xdb] => "fstpnce st(3), st(0)".to_string(),
+                // dumpbin calls this "fcom2", but it's just an undocumented fcom alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdc, 0xd3] => "fcom st(3)".to_string(),
+                // dumpbin calls this "fcomp3", but it's just an undocumented fcomp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdc, 0xdb] => "fcomp st(3)".to_string(),
+                // dumpbin calls this "fxch4", but it's just an undocumented fxch alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdd, 0xcb] => "fxch st(3)".to_string(),
+                // dumpbin calls this "fcomp5", but it's just an undocumented fcomp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xde, 0xd3] => "fcomp st(3)".to_string(),
+                // dumpbin calls this "fxch7", but it's just an undocumented fxch alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdf, 0xcb] => "fxch st(3)".to_string(),
+                // dumpbin calls this "fstp8", but it's just an undocumented fstp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdf, 0xd3] => "fstp st(3)".to_string(),
+                // dumpbin calls this "fstp9", but it's just an undocumented fstp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdf, 0xdb] => "fstp st(3)".to_string(),
+                other => {
+                    tools::dumpbin(other, CodeModel::Bits64).unwrap_or_else(|e| {
+                        panic!("{}: {e:?}", format!("could not get an instruction after dumpbining {other:x?}"));
+                    })
+                }
+            };
+            let displayed_masm = decoder.decode_slice(bytes).expect("can decode").display_with(DisplayStyle::Masm).to_string();
+            let masm_as_bytes = match displayed_masm.as_str() {
+                "nop zmmword ptr [rax]" => vec![0x0f, 0x18, 0x20], // MASM doesn't accept `nop zmmword ..`, no way to round trip 0f1820
+                "nop zmmword ptr [r8]" => vec![0x41, 0x0f, 0x18, 0x20], // MASM doesn't accept `nop zmmword ..`, no way to round trip 410f1820
+                "sysenter" => vec![0x0f, 0x34], // MASM doesn't accept sysenter, but dumpbin prints it.
+                "sysexit" => vec![0x0f, 0x35], // MASM doesn't accept sysexit, but dumpbin prints it.
+                "vpscatterdd dword ptr [r15 + xmm29]{k6}, xmm8" => vec![0x62, 0x12, 0x7d, 0x06, 0xa0, 0x04, 0x2f], // MASM ...??? assembles vpscatter wrong???
+                "vpscatterdd dword ptr [r15 + xmm25]{k6}, xmm10" => vec![0x62, 0x12, 0x7d, 0x06, 0xa0, 0x14, 0x0f], // MASM ...??? assembles vpscatter wrong???
+                "vpscatterdd dword ptr [r15 + ymm25]{k6}, ymm10" => vec![0x62, 0x12, 0x7d, 0x26, 0xa0, 0x14, 0x0f], // MASM ...??? assembles vpscatter wrong???
+                "vpscatterdd dword ptr [r15 + zmm25]{k6}, zmm10" => vec![0x62, 0x12, 0x7d, 0x46, 0xa0, 0x14, 0x0f], // MASM ...??? assembles vpscatter wrong???
+                "vpscatterdq qword ptr [r15 + xmm25]{k6}, xmm10" => vec![0x62, 0x12, 0xfd, 0x46, 0xa0, 0x14, 0x0f], // MASM ...??? assembles vpscatter wrong???
+                "vpscatterqd dword ptr [r15 + ymm25]{k6}, ymm10" => vec![0x62, 0x12, 0x7d, 0x46, 0xa1, 0x14, 0x0f], // MASM ...??? assembles vpscatter wrong???
+                "vpscatterqq qword ptr [r15 + zmm25]{k6}, zmm10" => vec![0x62, 0x12, 0xfd, 0x46, 0xa1, 0x14, 0x0f], // MASM ...??? assembles vpscatter wrong???
+/*
+                "vpinsrb xmm9, xmm8, r10d, 77h" => vec![0xc4, 0x03, 0x39, 0x20, 0xca, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpinsrb xmm9, xmm8, byte ptr [r10], 77h" => vec![0xc4, 0x03, 0x39, 0x20, 0x0a, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpinsrd xmm9, xmm8, r10d, 77h" => vec![0xc4, 0x03, 0x39, 0x22, 0xca, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpinsrd xmm9, xmm8, dword ptr [r10], 77h" => vec![0xc4, 0x03, 0x39, 0x22, 0x0a, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpinsrq xmm9, xmm8, r10, 77h" => vec![0xc4, 0x03, 0xb9, 0x22, 0xca, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpinsrq xmm9, xmm8, qword ptr [r10], 77h" => vec![0xc4, 0x03, 0xb9, 0x22, 0x0a, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpblendvb xmm9, xmm8, xmm10, xmm7" => vec![0xc4, 0x03, 0x39, 0x4c, 0xca, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+                "vpblendvb ymm9, ymm8, ymm10, ymm7" => vec![0xc4, 0x03, 0x3d, 0x4c, 0xca, 0x77], // MASM ...??? assembles the extra register number bit wrong???
+*/
+                // dumpbin doesn't know how to decode, and masm doesn't know how to *en*code, ud0.
+                "ud0 eax, ecx" => vec![0x66, 0x0f, 0xff, 0xc1],
+                "ud0 eax, dword ptr [rcx]" => vec![0x66, 0x0f, 0xff, 0x01],
+                "ud0 r8d, r9d" => vec![0x66, 0x4f, 0x0f, 0xff, 0xc1],
+                "ud0 r13d, dword ptr [rbx - 54h]" => vec![0x4c, 0x0f, 0xff, 0x6b, 0xac],
+                // masm seems to not know about fstpnce/fstp1 at all. since this is an undocumented instruction anyway, assemble it ourselves..
+                "fstpnce st(3), st(0)" => vec![0xd9, 0xdb],
+                // masm inserts a wait prefix here..
+                "feni" => vec![0xdb, 0xe0],
+                "fdisi" => vec![0xdb, 0xe1],
+                "fsetpm" => vec![0xdb, 0xe4],
+                _other => { tools::masm(&displayed_masm, CodeModel::Bits64).expect("can assemble") }
+            };
+            let masm_roundtrip = decoder.decode_slice(&masm_as_bytes).expect("can decode").display_with(DisplayStyle::Masm).to_string();
+            // chasing down differences in how dumpbin/yax write "qword" is not useful to anyone..
+            let external_masm_ish = external_masm_ish.replace(" mmword ", " qword ");
+            let masm_roundtrip = masm_roundtrip.replace(" mmword ", " qword ");
+            if external_masm_ish.starts_with("tzcnt") && masm_roundtrip.starts_with("bsf") {
+                // this is ok, we support "decode as if without bmi1" but dumpbin does not, so dumpbin always says tzcnt.
+                // masm accepts either and does the right thing.
+            } else {
+                assert_eq!(external_masm_ish, masm_roundtrip);
+            }
+            if let Some(masm_style) = disasm.masm.as_ref() {
+                assert_eq!(masm_style, &masm_roundtrip);
+            }
+        } else {
+            if let Some(masm_style) = disasm.masm.as_ref() {
+                test_display_format(&decoder, bytes, masm_style, DisplayStyle::Masm);
+            }
+        }
+    } else {
+        test_invalid_under(&decoder, bytes);
+    }
+}
+
 fn run_test(cases: &[TestCase]) {
     for tc in cases {
         if let Some(decodes) = tc.decodes.as_ref() {
             // if there are explicit feature sets, run only those decodes; the default decoder is
             // in the list if the test cares about it, and describes if it should work or not.
-            if let Some(featuresets) = tc.featuresets {
-                for (featureset, decode_ok) in featuresets {
-                    let decoder = featureset.into_decoder();
-                    if *decode_ok {
-                        test_display_under(&decoder, tc.bytes, decodes.display);
-                    } else {
-                        test_invalid_under(&decoder, tc.bytes);
-                    }
-                }
+            let featuresets = if let Some(featuresets) = tc.featuresets {
+                featuresets
             } else {
-                test_display(tc.bytes, decodes.display);
+                &[(FeatureSet::Default, true)]
+            };
+
+            for (featureset, decode_ok) in featuresets {
+                let decoder = featureset.into_decoder();
+                check_decodes(&decoder, *decode_ok, tc.bytes, decodes);
             }
         } else {
             // similar to above:
@@ -351,6 +768,23 @@ macro_rules! testcase {
         }
     };
 
+    (features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::long_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: Some($masm_text) })
+            }
+        }
+    };
+
     (features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr) => {
         {
             use crate::long_mode::{TestCase, Disasm, FeatureSet};
@@ -363,7 +797,28 @@ macro_rules! testcase {
             TestCase {
                 bytes,
                 featuresets: Some(featuresets),
-                decodes: Some(Disasm { display: text, c: None })
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    // need this above `($bytes:expr, $test:expr)` below to keep that case from
+    // matching inappropriately early.
+    (features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::long_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: Some($masm_text) })
             }
         }
     };
@@ -384,7 +839,7 @@ macro_rules! testcase {
             TestCase {
                 bytes,
                 featuresets: Some(featuresets),
-                decodes: Some(Disasm { display: text, c: None })
+                decodes: Some(Disasm { display: text, c: None, masm: None })
             }
         }
     };
@@ -404,7 +859,7 @@ macro_rules! testcase {
             TestCase {
                 bytes,
                 featuresets: Some(featuresets),
-                decodes: Some(Disasm { display: text, c: Some(c) })
+                decodes: Some(Disasm { display: text, c: Some(c), masm: None })
             }
         }
     };
@@ -418,7 +873,7 @@ macro_rules! testcase {
             TestCase {
                 bytes,
                 featuresets: None,
-                decodes: Some(Disasm { display: text, c: None })
+                decodes: Some(Disasm { display: text, c: None, masm: None })
             }
         }
     };
@@ -437,6 +892,21 @@ macro_rules! testcase {
             }
         }
     };
+
+    ($bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::long_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let masm: &'static str = $masm_text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: None, masm: Some(masm) })
+            }
+        }
+    };
 }
 
 mod modrm_decode {
@@ -476,7 +946,7 @@ mod modrm_decode {
         testcase!(&[0x45, 0x33, 0xc1], "xor r8d, r9d"),
 
         // sib
-        testcase!(&[0x33, 0x04, 0x0a], "xor eax, dword [rdx + rcx * 1]"),
+        testcase!(&[0x33, 0x04, 0x0a], "xor eax, dword [rdx + rcx * 1]", masm: "xor eax, dword ptr [rdx + rcx]"),
         testcase!(&[0x33, 0x04, 0x4a], "xor eax, dword [rdx + rcx * 2]"),
         testcase!(&[0x33, 0x04, 0x8a], "xor eax, dword [rdx + rcx * 4]"),
         testcase!(&[0x33, 0x04, 0xca], "xor eax, dword [rdx + rcx * 8]"),
@@ -484,7 +954,7 @@ mod modrm_decode {
         testcase!(&[0x33, 0x04, 0x60], "xor eax, dword [rax]"),
         testcase!(&[0x33, 0x04, 0xa0], "xor eax, dword [rax]"),
         testcase!(&[0x33, 0x04, 0xe0], "xor eax, dword [rax]"),
-        testcase!(&[0x42, 0x33, 0x04, 0x20], "xor eax, dword [rax + r12 * 1]"),
+        testcase!(&[0x42, 0x33, 0x04, 0x20], "xor eax, dword [rax + r12 * 1]", masm: "xor eax, dword ptr [rax + r12]"),
         testcase!(&[0x42, 0x33, 0x04, 0x60], "xor eax, dword [rax + r12 * 2]"),
         testcase!(&[0x42, 0x33, 0x04, 0xa0], "xor eax, dword [rax + r12 * 4]"),
         testcase!(&[0x42, 0x33, 0x04, 0xe0], "xor eax, dword [rax + r12 * 8]"),
@@ -499,7 +969,7 @@ mod modrm_decode {
         testcase!(&[0x41, 0x33, 0x44, 0x65, 0x11], "xor eax, dword [r13 + 0x11]"),
         testcase!(&[0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [rbp + 0x44332211]"),
         testcase!(&[0x41, 0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [r13 + 0x44332211]"),
-        testcase!(&[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]"),
+        testcase!(&[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]", masm: "xor eax, dword ptr [44332211h]"),
         testcase!(&[0x41, 0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]"),
 
         // specifically sib with base == 0b101
@@ -1030,7 +1500,7 @@ mod sse3 {
         testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7"),
         testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x4f, 0x0f, 0x12, 0xcf], "movddup xmm9, xmm15"),
 
-        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x0f, 0x01, 0xc8], "monitor"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x0f, 0x01, 0xc8], "monitor", masm: "monitor rax, rcx, rdx"),
         testcase!(invalid: &[0x66, 0x0f, 0x01, 0xc8]),
         testcase!(invalid: &[0xf3, 0x0f, 0x01, 0xc8]),
         testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xc8]),
@@ -1715,16 +2185,16 @@ mod control_flow {
         testcase!(&[0x72, 0x5a], "jb $+0x5a"),
         testcase!(&[0x72, 0xf0], "jb $-0x10"),
         testcase!(&[0xe8, 0x01, 0x00, 0x00, 0x00], "call $+0x1"),
-        testcase!(&[0xe8, 0x80, 0x00, 0x00, 0x00], "call $+0x80"),
+        testcase!(&[0xe8, 0x80, 0x00, 0x00, 0x00], "call $+0x80", masm: "call near ptr $+85h"),
         testcase!(&[0xe8, 0xff, 0xff, 0xff, 0xff], "call $-0x1"),
         testcase!(&[0xe9, 0x01, 0x00, 0x00, 0x00], "jmp $+0x1"),
-        testcase!(&[0xe9, 0x80, 0x00, 0x00, 0x00], "jmp $+0x80"),
+        testcase!(&[0xe9, 0x80, 0x00, 0x00, 0x00], "jmp $+0x80", masm: "jmp near ptr $+85h"),
         testcase!(&[0xe9, 0xff, 0xff, 0xff, 0xff], "jmp $-0x1"),
         testcase!(&[0x0f, 0x86, 0x8b, 0x01, 0x00, 0x00], "jna $+0x18b"),
         testcase!(&[0x0f, 0x85, 0x3b, 0x25, 0x00, 0x00], "jnz $+0x253b"),
         testcase!(&[0x74, 0x47], "jz $+0x47"),
-        testcase!(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call qword [rip + 0x24727e]"),
-        testcase!(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call qword [rip + 0x24727e]"),
+        testcase!(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call qword [rip + 0x24727e]", masm: "call qword ptr [$ + 24727Eh]"),
+        testcase!(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call qword [rip + 0x24727e]", masm: "call qword ptr [$ + 24727Eh]"),
         testcase!(&[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "jmp qword [rcx * 8 + 0x1bca070]"),
         testcase!(&[0xff, 0x14, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "call qword [rcx * 8 + 0x1bca070]"),
         testcase!(&[0xff, 0xe0], "jmp rax"),
@@ -1734,7 +2204,7 @@ mod control_flow {
         testcase!(&[0x66, 0xff, 0xd0], "call rax"),
         testcase!(&[0x67, 0xff, 0xd0], "call rax"),
         testcase!(invalid: &[0xff, 0xd8]),
-        testcase!(&[0xff, 0x18], "callf mword [rax]"),
+        testcase!(&[0xff, 0x18], "callf mword [rax]", masm: "call fword ptr [rax]"),
         testcase!(&[0xe0, 0x12], "loopnz $+0x12"),
         testcase!(&[0xe1, 0x12], "loopz $+0x12"),
         testcase!(&[0xe2, 0x12], "loop $+0x12"),
@@ -1794,10 +2264,18 @@ mod push_pop {
     const CASES: &'static [TestCase] = &[
         testcase!(&[0x5b], "pop rbx"),
         testcase!(&[0x41, 0x5e], "pop r14"),
-        testcase!(&[0x68, 0x7f, 0x63, 0xc4, 0x00], "push 0xc4637f"),
-        testcase!(&[0x66, 0x8f, 0x00], "pop word [rax]"),
-        testcase!(&[0x8f, 0x00], "pop qword [rax]"),
-        testcase!(&[0x48, 0x8f, 0x00], "pop qword [rax]"),
+        testcase!(&[0x68, 0x7f, 0x63, 0xc4, 0x00],
+            "push 0xc4637f",
+            masm: "push 0C4637Fh"),
+        testcase!(&[0x66, 0x8f, 0x00],
+            "pop word [rax]",
+            masm: "pop word ptr [rax]"),
+        testcase!(&[0x8f, 0x00],
+            "pop qword [rax]",
+            masm: "pop qword ptr [rax]"),
+        testcase!(&[0x48, 0x8f, 0x00],
+            "pop qword [rax]",
+            masm: "pop qword ptr [rax]"),
     ];
 
     #[test]
@@ -1936,9 +2414,13 @@ mod misc {
         testcase!(&[0xe4, 0x99], "in al, 0x99"),
         testcase!(&[0xe5, 0x99], "in eax, 0x99"),
         testcase!(&[0x67, 0xe5, 0x99], "in eax, 0x99"),
-        testcase!(&[0x4f, 0xe5, 0x99], "in eax, 0x99"),
+        // dumpbin prints this as "in rax, 99h", but this is wrong! MASM also accepts "in rax, 99h" to produce these bytes, which is wrong too.
+        // this mismatch is special-cased in the MASM comparative harness.
+        testcase!(&[0x4f, 0xe5, 0x99], "in eax, 0x99", masm: "in eax, 99h"),
         testcase!(&[0xe6, 0x99], "out 0x99, al"),
-        testcase!(&[0x4f, 0xe7, 0x99], "out 0x99, eax"),
+        // dumpbin prints this as "out 99h, rax", but this is wrong! MASM also accepts "out 99h, rax" to produce these bytes, which is wrong too.
+        // this mismatch is special-cased in the MASM comparative harness.
+        testcase!(&[0x4f, 0xe7, 0x99], "out 0x99, eax", masm: "out 99h, eax"),
         testcase!(&[0xec], "in al, dx"),
         testcase!(&[0xed], "in eax, dx"),
         testcase!(&[0xee], "out dx, al"),
@@ -3195,16 +3677,16 @@ mod prefixed_0f {
         testcase!(&[0x48, 0x0f, 0x03, 0x01], "lsl rax, word [rcx]"),
         // capstone says `lsl rax, rcx`, but xed says `rax, ecx`. intel docs also say second reg should
         // be dword.
-        testcase!(&[0x48, 0x0f, 0x03, 0xc1], "lsl rax, ecx"),
+        testcase!(&[0x48, 0x0f, 0x03, 0xc1], "lsl rax, ecx", masm: "lsl rax, rcx"),
         testcase!(&[0x66, 0x0f, 0x03, 0x01], "lsl ax, word [rcx]"),
         testcase!(&[0x66, 0x0f, 0x03, 0xc1], "lsl ax, cx"),
         testcase!(&[0x0f, 0x05], "syscall"),
         testcase!(&[0x48, 0x0f, 0x05], "syscall"),
         testcase!(&[0x66, 0x0f, 0x05], "syscall"),
         testcase!(&[0x0f, 0x06], "clts"),
-        testcase!(&[0xf2, 0x0f, 0x06], "clts"),
+        testcase!(&[0xf2, 0x0f, 0x06], "clts", masm: "clts"),
         testcase!(&[0x0f, 0x07], "sysret"),
-        testcase!(&[0xf2, 0x0f, 0x07], "sysret"),
+        testcase!(&[0xf2, 0x0f, 0x07], "sysret", masm: "sysret"),
         testcase!(&[0x0f, 0x12, 0x0f], "movlps xmm1, qword [rdi]"),
         testcase!(&[0x0f, 0x12, 0xcf], "movhlps xmm1, xmm7"),
         testcase!(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [rdi]"),
@@ -3218,13 +3700,13 @@ mod prefixed_0f {
         testcase!(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0"),
         testcase!(invalid: &[0x0f, 0x17, 0xc0]),
         testcase!(&[0x0f, 0x17, 0x00], "movhps qword [rax], xmm0"),
-        testcase!(&[0x0f, 0x18, 0xc0], "nop eax"), // capstone says invalid, xed says nop
-        testcase!(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [rax]"),
-        testcase!(&[0x0f, 0x18, 0x08], "prefetcht0 zmmword [rax]"),
-        testcase!(&[0x0f, 0x18, 0x10], "prefetcht1 zmmword [rax]"),
-        testcase!(&[0x0f, 0x18, 0x18], "prefetcht2 zmmword [rax]"),
-        testcase!(&[0x0f, 0x18, 0x20], "nop zmmword [rax]"),
-        testcase!(&[0x4f, 0x0f, 0x18, 0x20], "nop zmmword [r8]"),
+        testcase!(&[0x0f, 0x18, 0xc0], "nop eax"), // capstone says invalid, xed says nop, masm would call it prefetchnta rax..?
+        testcase!(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [rax]", masm: "prefetchnta [rax]"), // masm elides the memory size here..?
+        testcase!(&[0x0f, 0x18, 0x08], "prefetcht0 zmmword [rax]", masm: "prefetcht0 [rax]"),
+        testcase!(&[0x0f, 0x18, 0x10], "prefetcht1 zmmword [rax]", masm: "prefetcht1 [rax]"),
+        testcase!(&[0x0f, 0x18, 0x18], "prefetcht2 zmmword [rax]", masm: "prefetcht2 [rax]"),
+        testcase!(&[0x0f, 0x18, 0x20], "nop zmmword [rax]", masm: "nop zmmword ptr [rax]"), // TODO: this is now prefetchrst2
+        testcase!(&[0x4f, 0x0f, 0x18, 0x20], "nop zmmword [r8]", masm: "nop zmmword ptr [r8]"), // TODO: this is now prefetchrst2
         testcase!(&[0x0f, 0x18, 0xcc], "nop esp"),
         testcase!(&[0x0f, 0x19, 0x20], "nop dword [rax]"),
         testcase!(&[0x0f, 0x1a, 0x20], "nop dword [rax]"),
@@ -3633,7 +4115,7 @@ mod x87 {
     //    testcase!(&[0xd8, 0x3b], "fdivr st, dword ptr [rbx]"),
         testcase!(&[0xd8, 0x3b], "fdivr st(0), dword [rbx]"),
     //    testcase!(&[0xd8, 0xc3], "fadd st, st(3)"),
-        testcase!(&[0xd8, 0xc3], "fadd st(0), st(3)"),
+        testcase!(&[0xd8, 0xc3], "fadd st(0), st(3)", masm: "fadd st, st(3)"),
     //    testcase!(&[0xd8, 0xcb], "fmul st, st(3)"),
         testcase!(&[0xd8, 0xcb], "fmul st(0), st(3)"),
     //    testcase!(&[0xd8, 0xd3], "fcom st, st(3)"),
@@ -3809,11 +4291,11 @@ mod x87 {
         testcase!(&[0xdb, 0xd3], "fcmovnbe st(0), st(3)"),
     //    testcase!(&[0xdb, 0xdb], "fcmovnu st, st(3)"),
         testcase!(&[0xdb, 0xdb], "fcmovnu st(0), st(3)"),
-        testcase!(&[0xdb, 0xe0], "feni8087_nop"),
-        testcase!(&[0xdb, 0xe1], "fdisi8087_nop"),
+        testcase!(&[0xdb, 0xe0], "feni8087_nop", masm: "feni"),
+        testcase!(&[0xdb, 0xe1], "fdisi8087_nop", masm: "fdisi"),
         testcase!(&[0xdb, 0xe2], "fnclex"),
         testcase!(&[0xdb, 0xe3], "fninit"),
-        testcase!(&[0xdb, 0xe4], "fsetpm287_nop"),
+        testcase!(&[0xdb, 0xe4], "fsetpm287_nop", masm: "fsetpm"),
         testcase!(invalid: &[0xdb, 0xe5]),
         testcase!(invalid: &[0xdb, 0xe6]),
         testcase!(invalid: &[0xdb, 0xe7]),
@@ -4046,7 +4528,7 @@ mod mishegos_finds {
         testcase!(&[0x2e, 0x66, 0x26, 0x64, 0x49, 0x0f, 0x3a, 0x21, 0x0b, 0xb1, ], "insertps xmm1, dword fs:[r11], -0x4f"),
         testcase!(&[0x66, 0x26, 0x45, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm10, xmmword [r14 - 0x669d68c], 0x6a"),
         testcase!(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03, 0xb3, 0xfa], "pmaxud xmm3, xmmword gs:[ebp - 0x54cfc34]"),
-        testcase!(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri dword [rbp + 0x3e], edx"),
+        testcase!(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri dword [rbp + 0x3e], edx", masm: "movdiri dword ptr [rbp + 3Eh], edx"),
         testcase!(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b rbp, zmmword [rbp + 0x729080b]"),
         testcase!(invalid: &[0x66, 0x2e, 0x64, 0x66, 0x46, 0x0f, 0x38, 0xf8, 0xe2]),
         testcase!(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, zmmword [ebp + 0x729080b]"),
@@ -4294,7 +4776,7 @@ mod keylocker {
     use crate::long_mode::{TestCase, run_test};
 
     const CASES: &'static [TestCase] = &[
-        testcase!(&[0xf3, 0x0f, 0x38, 0xdd, 0x03], "aesdec128kl xmm0, m384b [rbx]"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xdd, 0x03], "aesdec128kl xmm0, m384b [rbx]", masm: "aesdec128kl xmm0, [rbx]"),
     ];
 
     #[test]
@@ -4308,7 +4790,7 @@ mod from_llvm {
     use crate::long_mode::{TestCase, run_test};
 
     const CASES: &'static [TestCase] = &[
-        testcase!(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01], "hreset 0x1"),
+        testcase!(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01], "hreset 0x1", masm: "hreset 1, eax"),
     ];
 
     #[test]
diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index a82c3bc..d19c432 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -9,8 +9,12 @@ mod behavior;
 
 use std::fmt::Write;
 
-use yaxpeax_arch::{AddressBase, Decoder, LengthedInstruction};
-use yaxpeax_x86::protected_mode::InstDecoder;
+use yaxpeax_arch::{Decoder, LengthedInstruction};
+use yaxpeax_x86::protected_mode::{Instruction, InstDecoder};
+#[cfg(feature="fmt")]
+use yaxpeax_x86::protected_mode::DisplayStyle;
+
+use crate::tools::{self, CodeModel};
 
 fn test_invalid(data: &[u8]) {
     test_invalid_under(&InstDecoder::default(), data);
@@ -35,893 +39,1748 @@ fn test_invalid_under(decoder: &InstDecoder, data: &[u8]) {
     }
 }
 
-fn test_display(data: &[u8], expected: &'static str) {
-    test_display_under(&InstDecoder::default(), data, expected);
-}
-
-fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) {
-    let mut hex = String::new();
-    for b in data {
-        write!(hex, "{:02x}", b).unwrap();
-    }
+fn test_decode_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) -> Instruction {
     let mut reader = yaxpeax_arch::U8Reader::new(data);
-    match decoder.decode(&mut reader) {
+    let instr = match decoder.decode(&mut reader) {
         Ok(instr) => {
-            cfg_if::cfg_if! {
-                if #[cfg(feature="fmt")] {
-                    let text = format!("{}", instr);
-                    assert!(
-                        text == expected,
-                        "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
-                        hex,
-                        instr,
-                        decoder,
-                        text,
-                        expected
-                    );
-                } else {
-                    eprintln!("non-fmt build cannot compare text equality")
-                }
-            }
-            // while we're at it, test that the instruction is as long, and no longer, than its
-            // input
-            assert_eq!((0u32.wrapping_offset(instr.len()).to_linear()) as usize, data.len(), "instruction length is incorrect, wanted instruction {}", expected);
+            assert_eq!(instr.len().to_const(), data.len() as u32, "instruction length is incorrect");
+            instr
         },
         Err(e) => {
+            let mut hex = String::new();
+            for b in data {
+                write!(hex, "{:02x}", b).unwrap();
+            }
             cfg_if::cfg_if! {
                 if #[cfg(feature="fmt")] {
-                    assert!(false, "decode error ({}) for {} under decoder {}:\n  expected: {}\n", e, hex, decoder, expected);
+                    panic!("decode error ({}) for {} under decoder {}:\n  expected: {}\n", e, hex, decoder, expected);
                 } else {
                     // avoid the unused `e` warning
                     let _ = e;
-                    assert!(false, "decode error (<non-fmt build>) for {} under decoder <non-fmt build>:\n  expected: {}\n", hex, expected);
+                    panic!("decode error (<non-fmt build>) for {} under decoder <non-fmt build>:\n  expected: {}\n", hex, expected);
+                }
+            }
+        }
+    };
+    instr
+}
+
+fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) {
+    // testing that the instruction displays doesn't work if formatting is disabled, but we can
+    // test that it at least decodes..
+    let _instr = test_decode_under(decoder, data, expected);
+
+    #[cfg(feature="fmt")]
+    test_display_format(decoder, data, expected, DisplayStyle::Intel);
+}
+
+#[cfg(feature="fmt")]
+fn test_display_format(decoder: &InstDecoder, data: &[u8], expected: &'static str, style: DisplayStyle) {
+    let instr = test_decode_under(decoder, data, expected);
+
+    let mut hex = String::new();
+    for b in data {
+        write!(hex, "{:02x}", b).unwrap();
+    }
+
+    match style {
+        DisplayStyle::Intel => {
+            let text = format!("{}", instr.display_with(DisplayStyle::Intel));
+            assert!(
+                text == expected,
+                "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text,
+                expected
+            );
+
+            let mut text2 = String::new();
+            let mut out = yaxpeax_arch::display::FmtSink::new(&mut text2);
+            instr.write_to(&mut out).expect("printing succeeds");
+
+            assert!(
+                text2 == text,
+                "display error through FmtSink for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text2,
+                text,
+            );
+
+            #[cfg(feature="alloc")]
+            let mut formatter = yaxpeax_x86::protected_mode::InstructionTextBuffer::new();
+            #[cfg(feature="alloc")]
+            let text3 = formatter.format_inst(&instr.display_with(DisplayStyle::Intel)).expect("printing succeeds");
+
+            #[cfg(feature="alloc")]
+            assert!(
+                text3 == text,
+                "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text3,
+                text,
+            );
+
+            let mut text4 = String::new();
+            instr.write_to(&mut text4).expect("printing succeeds");
+
+            assert!(
+                text4 == text,
+                "display error through String for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text4,
+                text,
+            );
+        }
+        DisplayStyle::Masm => {
+            let text = format!("{}", instr.display_with(DisplayStyle::Masm));
+            assert!(
+                text == expected,
+                "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text,
+                expected
+            );
+
+            #[cfg(feature="alloc")]
+            let mut formatter = yaxpeax_x86::protected_mode::InstructionTextBuffer::new();
+            #[cfg(feature="alloc")]
+            let text3 = formatter.format_inst(&instr.display_with(DisplayStyle::Masm)).expect("printing succeeds");
+
+            #[cfg(feature="alloc")]
+            assert!(
+                text3 == text,
+                "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text3,
+                text,
+            );
+
+            // no `instr.display_with(DisplayStyle::Masm)` tests involving write_to
+            // since write_to unconditionally uses DisplayStyle::Intel
+        }
+        DisplayStyle::C => {
+            panic!("no support for C-style display in testcases yet");
+        }
+        other => {
+            panic!("unsupported style: {:?}", other);
+        }
+    }
+}
+
+#[allow(non_camel_case_types)]
+enum FeatureSet {
+    Default,
+    Minimal,
+    Amd,
+    Intel,
+    DecoderK8,
+    DecoderBulldozer,
+    DecoderNetburst,
+    // SSE and SSE2 are part of baseline x86_64, always enabled
+    SSE,
+    SSE2,
+    SSE3,
+    SSSE3,
+    SSE4_1,
+    SSE4_2,
+    SSE4_2_Intel,
+    SSE4a,
+    BMI1,
+    BMI2,
+    AVX,
+    AESNI,
+    F16C,
+    AVX_AESNI,
+    AVX_F16C,
+    AVX2,
+    VMX,
+    Popcnt,
+}
+
+impl FeatureSet {
+    fn into_decoder(&self) -> InstDecoder {
+        match self {
+            FeatureSet::Default => {
+                yaxpeax_x86::protected_mode::InstDecoder::default()
+            }
+            FeatureSet::Minimal => {
+                yaxpeax_x86::protected_mode::InstDecoder::minimal()
+            }
+            FeatureSet::Intel => {
+                yaxpeax_x86::protected_mode::InstDecoder::minimal().with_intel_quirks()
+            }
+            FeatureSet::Amd => {
+                yaxpeax_x86::protected_mode::InstDecoder::minimal().with_amd_quirks()
+            }
+            FeatureSet::DecoderK8 => {
+                yaxpeax_x86::protected_mode::uarch::amd::k8()
+            }
+            FeatureSet::DecoderBulldozer => {
+                yaxpeax_x86::protected_mode::uarch::amd::bulldozer()
+            }
+            FeatureSet::DecoderNetburst => {
+                yaxpeax_x86::protected_mode::uarch::intel::netburst()
+            }
+            // SSE and SSE2 are part of baseline x86_64, always enabled
+            FeatureSet::SSE => {
+                InstDecoder::minimal()
+            }
+            FeatureSet::SSE2 => {
+                InstDecoder::minimal()
+            }
+            FeatureSet::SSE3 => {
+                InstDecoder::minimal().with_sse3()
+            }
+            FeatureSet::SSSE3 => {
+                InstDecoder::minimal().with_ssse3()
+            }
+            FeatureSet::SSE4_1 => {
+                InstDecoder::minimal().with_sse4_1()
+            }
+            FeatureSet::SSE4_2 => {
+                InstDecoder::minimal().with_sse4_2()
+            }
+            FeatureSet::SSE4_2_Intel => {
+                InstDecoder::minimal().with_intel_quirks().with_sse4_2()
+            }
+            FeatureSet::SSE4a => {
+                InstDecoder::minimal().with_sse4a()
+            }
+            FeatureSet::BMI1 => {
+                InstDecoder::minimal().with_bmi1()
+            }
+            FeatureSet::BMI2 => {
+                InstDecoder::minimal().with_bmi2()
+            }
+            FeatureSet::AVX => {
+                InstDecoder::minimal().with_avx()
+            }
+            FeatureSet::AESNI => {
+                InstDecoder::minimal().with_aesni()
+            }
+            FeatureSet::F16C => {
+                InstDecoder::minimal().with_f16c()
+            }
+            FeatureSet::AVX_AESNI => {
+                InstDecoder::minimal().with_avx().with_aesni()
+            }
+            FeatureSet::AVX_F16C => {
+                InstDecoder::minimal().with_avx().with_f16c()
+            }
+            FeatureSet::AVX2 => {
+                InstDecoder::minimal().with_avx().with_avx2()
+            }
+            FeatureSet::VMX => {
+                InstDecoder::minimal().with_vmx()
+            }
+            FeatureSet::Popcnt => {
+                InstDecoder::minimal().with_popcnt()
+            }
+        }
+    }
+}
+
+struct Disasm {
+    display: &'static str,
+    c: Option<&'static str>,
+    masm: Option<&'static str>,
+}
+
+struct TestCase {
+    bytes: &'static [u8],
+    featuresets: Option<&'static [(FeatureSet, bool)]>,
+    decodes: Option<Disasm>,
+}
+
+fn check_decodes(decoder: &InstDecoder, decode_ok: bool, bytes: &[u8], disasm: &Disasm) {
+    if decode_ok {
+        test_display_under(&decoder, bytes, disasm.display);
+        #[cfg(feature = "fmt")]
+        if let Some(c_style) = disasm.c.as_ref() {
+            test_display_format(&decoder, bytes, c_style, DisplayStyle::C);
+        }
+
+        // if EXTERNAL_MASM is set we actually want to validate decodes against masm/dumpbin. this
+        // is a bit convoluted. otherwise we're testing against in-tree "gold output". in the
+        // EXTERNAL_MASM case we actually distrust this too, and validate the in-tree expected
+        // output is what masm actually wants.
+        #[cfg(feature = "fmt")]
+        if std::env::var_os("EXTERNAL_MASM").is_some() {
+            eprintln!("==== running testcase: bytes={:x?}, expected_display={}", bytes, disasm.display);
+            // OK: EXTERNAL_MASM is set, we'll expect that there's `../tools/` which has `wibo`,
+            // `mlexe`, and `dumpbin.exe`.
+
+            // outside long mode, dumpbin behaves poorly in the face of vex/evex-encoded instructions. for instructions that include scalar registers,
+            // vex.w is often respected and extends dword instructions into qword instructions on rax and friends. wild! for SIMD registers, the
+            // register number extension bits are often respected, resulting in xmm8, ymm9, etc, appearing in protected mode. also wild!
+            // further, some instructions are overly-strict and will treat VEX.LIG as VEX.L0 in protected mode, so we a whole mess to deal with.
+            // lots of "successful" incorrect decodes, some "unsuccessful" decodes of valid-to-hardware instructions. what to do?
+            // if we fail to decode, and there's a c4/c5 up front, allow it in this specific branch because it might be a dumpbin bug.
+            // if we successfully decode and there's a rax/rcx/rdx/rbx/etc or "qword ptr" and it doesn't match the expectation, log it and move on because it might be a dumpbin bug.
+            // everything else is .. probably fine?
+            let vex_prefixed = bytes[0] == 0xc4 || bytes[0] == 0xc5;
+
+            // match against some testcases that are known to be wrong by MASM/dumpbin.
+            let external_masm_ish = match bytes {
+                &[0xf1] => "int 1".to_string(),  // dumpbin does not know how to decode f1...
+                &[0xe5, 0x99] => "in eax, 99h".to_string(), // this is a MASM/dumpbin bug. see notes on testcase.
+                &[0xe7, 0x99] => "out 99h, eax".to_string(), // this is a MASM/dumpbin bug. see notes on testcase.
+                // dumpbin prints the instruction as if it was encoded in 32-bit form regardless of object file, so overrule it.
+                &[0xf3, 0x0f, 0xc7, 0xfd] => "rdpid ebp".to_string(),
+                &[0x0f, 0x18, 0xc0] => "nop eax".to_string(), // dumpbin would love to call this "prefetchnta eax" ???
+                &[0x0f, 0x18, 0xcc] => "nop esp".to_string(), // dumpbin would love to call this "prefetchnta esp" ???
+                &[0x0f, 0x18, 0x20] => "nop zmmword ptr [eax]".to_string(), // getting around dumpbin knowing about prefetchrst2..
+                &[0x0f, 0x19, 0x20] => "nop dword ptr [eax]".to_string(), // dumpbin doesn't know about 0f19..
+                &[0x0f, 0x1a, 0x20] => "nop dword ptr [eax]".to_string(), // dumpbin wants to call this bndldx, yax doesn't do MPX yet
+                &[0x0f, 0x1b, 0x20] => "nop dword ptr [eax]".to_string(), // dumpbin wants to call this bndstx, yax doesn't do MPX yet
+                &[0x0f, 0x1c, 0x20] => "nop dword ptr [eax]".to_string(), // dumpbin doesn't know about 0f1c..
+                &[0x0f, 0x1d, 0x20] => "nop dword ptr [eax]".to_string(), // dumpbin doesn't know about 0f1d..
+                &[0x0f, 0x1e, 0x20] => "nop dword ptr [eax]".to_string(), // dumpbin doesn't know about 0f1e..
+                &[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0] => "movsd xmm0, xmm0".to_string(), // dumpbin does not love the prefixes
+                &[0xf3, 0x0f, 0x1e, 0xfc] => "nop".to_string(), // dumpbin does not tolerate this at all, redirect into a boring nop.
+                &[0x0f, 0x43, 0xec] => "cmovnb ebp, esp".to_string(), // dumpbin writes it "cmovae" instead of yax's cmovnb.
+                &[0x2e, 0x36, 0x0f, 0x18, 0xe7] => "nop edi".to_string(), // dumpbin reports a mildly-confused prefetchrst2 rdi (even in 32-bit mode!)
+                &[0x0f, 0xbe, 0x83, 0xb4, 0x00, 0x00, 0x00] => {
+                    "movsx eax, byte ptr [ebx + 0B4h]".to_string() // dumpbin uses %016 formatting, masm happily accepts shorter.
+                },
+                &[0x62, 0xd2, 0x7e, 0x28, 0x3a, 0xca] => {
+                    "vpbroadcastmw2d ymm1, k2".to_string() // dumpbin inexplicably uses "bnd2" as the source register??? MSVC 14.52.36328.
+                },
+                &[0x62, 0xd2, 0x7e, 0x08, 0x28, 0xc2] => {
+                    "vpmovm2b xmm0, k2".to_string() // dumpbin inexplicably uses "bnd2" as the source register??? MSVC 14.52.36328.
+                },
+                &[0x0f, 0x0d, 0x00] => {
+                    // dumpbin interprets this as the 3DNow!-style PREFETCH instruction, but we're definitely not 3dnow..
+                    "nop zmmword ptr [eax]".to_string()
                 }
+                &[0xc4, 0x03, 0x3d, 0x0a, 0xca, 0x77] => {
+                    // dumpbin can't deal with this instruction..
+                    "vroundss xmm9, xmm8, xmm10, 77h".to_string()
+                }
+                &[0xc4, 0x03, 0x3d, 0x0b, 0xca, 0x77] => {
+                    // dumpbin can't deal with this instruction..
+                    "vroundsd xmm9, xmm8, xmm10, 77h".to_string()
+                }
+                &[0x66, 0x0f, 0xd6, 0x01] => {
+                    // dumpbin really wants to use mmword here, but i really don't.
+                    "movq qword ptr [ecx], xmm0".to_string()
+                }
+                // dumpbin doesn't know how to decode, and masm doesn't know how to *en*code, ud0.
+                &[0x66, 0x0f, 0xff, 0xc1] => "ud0 eax, ecx".to_string(),
+                &[0xf2, 0x0f, 0xff, 0xc1] => "ud0 eax, ecx".to_string(),
+                &[0xf3, 0x0f, 0xff, 0xc1] => "ud0 eax, ecx".to_string(),
+                &[0x66, 0x0f, 0xff, 0x01] => "ud0 eax, dword ptr [ecx]".to_string(),
+                &[0x0f, 0xff, 0x6b, 0xac] => "ud0 ebp, dword ptr [ebx - 54h]".to_string(),
+                // dumpbin does not tolerate the pointless prefixes.
+                &[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e] => "movdiri dword ptr cs:[ebp + 3Eh], edx".to_string(),
+                // dumpbin does not tolerate the pointless prefixes.
+                &[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07] => "movdir64b ebp, zmmword ptr es:[ebp + 729080Bh]".to_string(),
+                // dumpbin does not tolerate the pointless prefixes.
+                &[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08] => "movdir64b bp, zmmword ptr es:[di + 80Bh]".to_string(),
+                // and again
+                 &[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f] => "enqcmd eax, zmmword ptr ss:[ebx + 3F9D1C09h]".to_string(),
+                // and again.
+                &[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54] => "enqcmds esi, zmmword ptr fs:[edx + 54h]".to_string(),
+                // prefixes confuse dumpbin again
+                &[0x66, 0xf3, 0x0f, 0x01, 0xe8] => "setssbsy".to_string(),
+                // prefixes confuse dumpbin again
+                &[0x66, 0xf3, 0x0f, 0x01, 0xea] => "saveprevssp".to_string(),
+                // prefixes confuse dumpbin again
+                &[0xf3, 0x66, 0x0f, 0x01, 0xe8] => "setssbsy".to_string(), // TODO: yax does not support `serialize` (yet)
+                // prefixes confuse dumpbin again
+                &[0xf3, 0x66, 0x0f, 0x01, 0xea] => "saveprevssp".to_string(),
+                // prefixes confuse dumpbin again
+                &[0xf3, 0x66, 0x0f, 0x01, 0x29] => "rstorssp qword ptr [ecx]".to_string(),
+                // dumpbin writes the repne, but it doesn't do anything..
+                &[0xf2, 0x0f, 0x21, 0xc8] => "mov eax, dr1".to_string(),
+                // dumpbin writes the rep, but it doesn't do anything..
+                &[0xf3, 0x0f, 0x21, 0xc8] => "mov eax, dr1".to_string(),
+                // dumpbin prints out an xacquire when there is no lock prefix, which causes the instruction to grow a lock prefix in round-tripping. no!
+                &[0xf2, 0x0f, 0xc0, 0xcc] => "xadd ah, cl".to_string(),
+                // dumpbin prints out an rep when one is not allowed, which fails round-tripping. yax doesn't.
+                &[0xf3, 0x0f, 0xc0, 0xcc] => "xadd ah, cl".to_string(),
+                // dumpbin prints out an xacquire when there is no lock prefix, which causes the instruction to grow a lock prefix in round-tripping. no!
+                &[0xf2, 0x0f, 0xc1, 0xcc] => "xadd esp, ecx".to_string(),
+                // dumpbin prints out an rep when one is not allowed, which fails round-tripping. yax doesn't.
+                &[0xf3, 0x0f, 0xc1, 0xcc] => "xadd esp, ecx".to_string(),
+                // dumpbin prints out an xacquire when there is no lock prefix, which causes the instruction to grow a lock prefix in round-tripping. no!
+                &[0xf2, 0x0f, 0xc7, 0x0f] => "cmpxchg8b qword ptr [edi]".to_string(),
+                // dumpbin prints out an rep when one is not allowed, which fails round-tripping. yax doesn't.
+                &[0xf3, 0x0f, 0xc7, 0x0f] => "cmpxchg8b qword ptr [edi]".to_string(),
+                // prefixes again..
+                &[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad] => "gf2p8affineqb xmm1, xmmword ptr ss:[esi + edx * 2 - 412E7D62h], 0ADh".to_string(),
+                &[0x3e, 0x64, 0x64, 0x66, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b] => "gf2p8affineinvqb xmm7, xmmword ptr fs:[edx - 45FBDCEDh], 6Bh".to_string(),
+                &[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8] => "loadiwkey xmm5, xmm0".to_string(),
+                // dumpbin prints out the memory size as "oword", but yax uses "xmmword". masm accepts either.
+                &[0x66, 0x0f, 0x38, 0x80, 0x01] => "invept eax, xmmword ptr [ecx]".to_string(),
+                // dumpbin prints out the memory size as "oword", but yax uses "xmmword". masm accepts either.
+                &[0x66, 0x0f, 0x38, 0x81, 0x01] => "invvpid eax, xmmword ptr [ecx]".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                // (and we print jnb instead of jae)
+                &[0x73, 0x31] => "jnb $+33h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x72, 0x5a] => "jb $+5Ch".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x72, 0xf0] => "jb $-0Eh".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe8, 0x01, 0x00, 0x00, 0x00] => "call $+6".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe8, 0x80, 0x00, 0x00, 0x00] => "call near ptr $+85h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe8, 0xff, 0xff, 0xff, 0xff] => "call $+4".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe9, 0x01, 0x00, 0x00, 0x00] => "jmp $+6".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative. there's also the near ptr nonsense..
+                &[0xe9, 0x80, 0x00, 0x00, 0x00] => "jmp near ptr $+85h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe9, 0xff, 0xff, 0xff, 0xff] => "jmp $+4".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x0f, 0x86, 0x8b, 0x01, 0x00, 0x00] => "jna $+191h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x0f, 0x85, 0x3b, 0x25, 0x00, 0x00] => "jnz $+2541h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x74, 0x47] => "jz $+49h".to_string(),
+                // dumpbin prints a ds: since this is an absolute address..
+                &[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00] => "call dword ptr [0024727Eh]".to_string(),
+                // dumpbin uses a really wide displacement .. for laughs..
+                &[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01] => "jmp dword ptr [ecx * 8 + 1BCA070h]".to_string(),
+                // dumpbin uses a really wide displacement .. for laughs..
+                &[0xff, 0x14, 0xcd, 0x70, 0xa0, 0xbc, 0x01] => "call dword ptr [ecx * 8 + 1BCA070h]".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe0, 0x12] => "loopnz $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe1, 0x12] => "loopz $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe2, 0x12] => "loop $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe3, 0x12] => "jecxz $+14h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0xe3, 0xf0] => "jecxz $-0Eh".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x67, 0xe3, 0x12] => "jcxz $+15h".to_string(),
+                // dumpbin uses absolute branch destinations, but yax uses relative.
+                &[0x67, 0xe3, 0xf0] => "jcxz $-0Dh".to_string(),
+                // dumpbin dislikes prefixes.
+                &[0x66, 0xf2, 0x0f, 0x79, 0xcf] => "insertq xmm1, xmm7".to_string(),
+                &[0xf6, 0x05, 0x2c, 0x9b, 0xff, 0xff, 0x01] => "test byte ptr [0FFFF9B2Ch], 1".to_string(),
+                // yax uses wider immediates
+                &[0x3d, 0x01, 0xf0, 0xff, 0xff] => "cmp eax, 0FFFFF001h".to_string(),
+                // dumpbin gets the size wrong
+                &[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2] => "vcompresspd xmmword ptr [edx - 70h]{k7}, xmm4".to_string(),
+                // TODO: yax doesn't know about rdssp{d,q}?
+                &[0xf3, 0x0f, 0x1e, 0x0f] => "nop".to_string(),
+                // yax won't mention the pointless repne prefix
+                &[0xf2, 0x0f, 0x06] => "clts".to_string(),
+                // yax won't mention the pointless repne prefix
+                &[0xf2, 0x0f, 0x07] => "sysret".to_string(),
+                // dumpbin spells this mmword
+                &[0x0f, 0x6f, 0x00] => "movq mm0, qword ptr [eax]".to_string(),
+                &[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13] => "xacquire lock btc word ptr cs:[ebx], dx".to_string(),
+                // dumpbin prints with more.. flourish
+                &[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00] => "nop word ptr cs:[eax + eax]".to_string(),
+                // disp is wider from dumpbin
+                &[0x0f, 0xfc, 0xaf, 0x40, 0x38, 0x25, 0xbf] => "paddb mm5, mmword ptr [edi - 40DAC7C0h]".to_string(),
+                &[0xc7, 0xf8, 0x10, 0x12, 0x34, 0x56] => "xbegin $+56341216h".to_string(),
+                &[0x66, 0xc7, 0xf8, 0x10, 0x12] => "xbegin $+1215h".to_string(),
+                &[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c] => "pi2fw mm6, qword ptr ss:[eax - 5]".to_string(), // more prefix confusion..
+                // prefixes confuse dumpbin, and dumpbin says "qword" where we use mmword. masm accepts either
+                &[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4] => "pfmax mm4, mmword ptr cs:[ebx + edx * 4 - 6Dh]".to_string(),
+                // dumpbin shows this as a non-rip-rel offset :(
+                &[0x0f, 0xe5, 0x3d, 0xaa, 0xbb, 0xcc, 0x77] => "pmulhw mm7, qword ptr [77CCBBAAh]".to_string(),
+                // dumpbin confused about prefixes once again
+                &[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b] => "movntdqa xmm5, xmmword ptr cs:[ebx]".to_string(),
+                // prefixes.. cs: isn't real in 64-bit mode
+                &[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c] => "blendpd xmm7, xmmword ptr cs:[bx + si + 2FF0h], 7Ch".to_string(),
+                // prefixes confuse dumpbin
+                &[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d] => "pmovsxwd xmm3, qword ptr [ebp + 2DA80F69h]".to_string(),
+                // prefixes confuse dumpbin
+                &[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1] => "insertps xmm1, dword ptr fs:[ebx], 0B1h".to_string(),
+                // prefixes confuse dumpbin
+                &[0x66, 0x26, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a] => "mpsadbw xmm2, xmmword ptr es:[esi - 669D68Ch], 6Ah".to_string(),
+                // prefixes confuse dumpbin
+                &[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03] => "pmaxud xmm3, xmmword ptr gs:[di + 3CCh]".to_string(),
+                // prefixes confuse dumpbin
+                &[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1] => "punpckhqdq xmm2, xmm1".to_string(),
+                // prefixes confuse dumpbin
+                &[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f] => "lddqu xmm4, xmmword ptr es:[bx + si + 5F1Bh]".to_string(),
+                // prefixes confuse dumpbin
+                &[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48] => "dppd xmm6, xmmword ptr [eax], 48h".to_string(),
+                // again prefixes confuse dumpbin
+                &[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f] => "aesimc xmm1, xmmword ptr fs:[edi]".to_string(),
+                // dumpbin prints the order backwards =|
+                &[0x65, 0xf0, 0x87, 0x0f] => "lock xchg dword ptr gs:[edi], ecx".to_string(),
+                // dumpbin knows about "fstpnce" as "fstp1", but masm does not.
+                // since this is an undocumented instruction anyway, decode it ourselves..
+                &[0xd9, 0xdb] => "fstpnce st(3), st(0)".to_string(),
+                // dumpbin calls this "fcom2", but it's just an undocumented fcom alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdc, 0xd3] => "fcom st(3)".to_string(),
+                // dumpbin calls this "fcomp3", but it's just an undocumented fcomp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdc, 0xdb] => "fcomp st(3)".to_string(),
+                // dumpbin calls this "fxch4", but it's just an undocumented fxch alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdd, 0xcb] => "fxch st(3)".to_string(),
+                // dumpbin calls this "fcomp5", but it's just an undocumented fcomp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xde, 0xd3] => "fcomp st(3)".to_string(),
+                // dumpbin calls this "fxch7", but it's just an undocumented fxch alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdf, 0xcb] => "fxch st(3)".to_string(),
+                // dumpbin calls this "fstp8", but it's just an undocumented fstp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdf, 0xd3] => "fstp st(3)".to_string(),
+                // dumpbin calls this "fstp9", but it's just an undocumented fstp alias. this round-trips to a different instruction but it's at least.. kinda right.
+                &[0xdf, 0xdb] => "fstp st(3)".to_string(),
+                &[0xf2, 0x0f, 0xbc, 0xd3] => "bsf edx, ebx".to_string(),
+                // mov abs in 32-bit mode gets a ds: prefix even though that's the default. masm does not need this prefix, so we round-trip fine without it.
+                &[0xa0, 0x93, 0x62, 0xc4, 0x00] => "mov al, byte ptr [00C46293h]".to_string(),
+                &[0x67, 0xa0, 0x93, 0x62] => "mov al, byte ptr [00006293h]".to_string(),
+                &[0xa1, 0x93, 0x62, 0xc4, 0x00] => "mov eax, dword ptr [00C46293h]".to_string(),
+                &[0x67, 0xa1, 0x93, 0x62] => "mov eax, dword ptr [00006293h]".to_string(),
+                &[0xa2, 0x93, 0x62, 0xc4, 0x00] => "mov byte ptr [00C46293h], al".to_string(),
+                &[0x67, 0xa2, 0x93, 0x62] => "mov byte ptr [00006293h], al".to_string(),
+                &[0xa3, 0x93, 0x62, 0xc4, 0x00] => "mov dword ptr [00C46293h], eax".to_string(),
+                &[0x67, 0xa3, 0x93, 0x62] => "mov dword ptr [00006293h], eax".to_string(),
+                &[0x33, 0x05, 0x78, 0x56, 0x34, 0x12] => "xor eax, dword ptr [12345678h]".to_string(),
+                &[0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [44332211h]".to_string(),
+                &[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44] => "xor eax, dword ptr [44332211h]".to_string(),
+                &[0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50] => "xor esi, dword ptr [50403020h]".to_string(),
+                &[0xa0, 0xc0, 0xb0, 0xa0, 0x90] => "mov al, byte ptr [90A0B0C0h]".to_string(),
+                &[0x67, 0xa0, 0xc0, 0xb0] => "mov al, byte ptr [0B0C0h]".to_string(),
+                &[0x67, 0xa1, 0xc0, 0xb0] => "mov eax, dword ptr [0000B0C0h]".to_string(),
+                &[0x66, 0x67, 0xa1, 0xc0, 0xb0] => "mov ax, word ptr [0000B0C0h]".to_string(),
+                // same for wrssd
+                &[0x3e, 0x0f, 0x38, 0xf6, 0x23] => "wrssd dword ptr [ebx], esp".to_string(),
+                // dumpbin believes that rex.w works even in 32-bit code, thus prints `rorx rax, ..`. haha what a dingus
+                &[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05] => "rorx eax, dword ptr [ecx], 5".to_string(),
+                &[0xc4, 0xe2, 0xe3, 0xf5, 0x07] => "pdep eax, ebx, dword ptr [edi]".to_string(),
+                &[0xc4, 0xe2, 0xe3, 0xf6, 0x07] => "mulx eax, ebx, dword ptr [edi]".to_string(),
+                &[0xc4, 0xe2, 0xe3, 0xf7, 0x01] => "shrx eax, dword ptr [ecx], ebx".to_string(),
+                &[0xc4, 0xe2, 0xe2, 0xf5, 0x07] => "pext eax, ebx, dword ptr [edi]".to_string(),
+                &[0xc4, 0xe2, 0xe2, 0xf7, 0x01] => "sarx eax, dword ptr [ecx], ebx".to_string(),
+                &[0xc4, 0xe2, 0xe0, 0xf5, 0x07] => "bzhi eax, dword ptr [edi], ebx".to_string(),
+                &[0xc4, 0xe2, 0xe1, 0xf7, 0x01] => "shlx eax, dword ptr [ecx], ebx".to_string(),
+                &[0xc4, 0xe2, 0xe0, 0xf2, 0x01] => "andn eax, ebx, dword ptr [ecx]".to_string(),
+                &[0xc4, 0xe2, 0xf8, 0xf3, 0x09] => "blsr eax, dword ptr [ecx]".to_string(),
+                &[0xc4, 0xe2, 0xf8, 0xf3, 0x11] => "blsmsk eax, dword ptr [ecx]".to_string(),
+                &[0xc4, 0xe2, 0xf8, 0xf3, 0x19] => "blsi eax, dword ptr [ecx]".to_string(),
+                &[0xc4, 0xe2, 0xe0, 0xf7, 0x01] => "bextr eax, dword ptr [ecx], ebx".to_string(),
+                &[0xc4, 0xc3, 0x39, 0x0c, 0xca, 0x77] => "vblendps xmm1, xmm0, xmm2, 77h".to_string(),
+                // just have to decide we know better than dumpbin: masm does not accept an absolute far call/far jump destination,
+                // so we definitely can't round-trip by following dumpbin. dumpbin doesn't use hex suffixes here, instead printing
+                // "6655:44332211" as the destination. this is technically not ambiguous since `:` is a hint that this is a absolute
+                // far address and that both numbers are base 16, but that's ... subtle and easy to miss. so add some h's.
+                &[0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66] => "call 6655h:44332211h".to_string(),
+                &[0x66, 0x9a, 0x11, 0x22, 0x33, 0x44] => "call 4433h:2211h".to_string(),
+                // terribly unfortunate: masm reasonably encodes this instruction as a 32-bit offset, which causes yax to spell the offset
+                // as 0000AA55 instead of AA55. override dumpbin to use the (worse) encoding for the sake of matching with the test.
+                &[0x66, 0x67, 0x8b, 0x0e, 0x55, 0xaa] => "mov cx, word ptr [0AA55h]".to_string(),
+                // inexplicably, dumpbin spells this "aamb", for .. ascii adjust after multiplcation (byte) ???
+                // additionally, masm does not accept an integer operand: it only supports `aam 10` as in d4 0a. so.. bummer.
+                &[0xd4, 0x01] => "aam 1".to_string(),
+                // same as above
+                &[0xd5, 0x01] => "aad 1".to_string(),
+                // dunno why dumpbin doesn't like this one..
+                &[0xc5, 0b1_1111_100, 0x2e, 0b00_001_010] => "vucomiss xmm1, dword ptr [edx]".to_string(),
+                &[0xc5, 0b1_1111_100, 0x2f, 0b00_001_010] => "vcomiss xmm1, dword ptr [edx]".to_string(),
+                other => {
+                    let dumpbin_res = tools::dumpbin(other, CodeModel::Bits32);
+                    match dumpbin_res {
+                        Ok(text) => text,
+                        Err(e) => {
+                            if vex_prefixed {
+                                // this might be an instance of dumpbin not being great: consider vucomiss, as in "c5f82eca".
+                                return;
+                            }
+
+                            // otherwise: unexpected, what da heck.
+                            panic!("{}: {e:?}", format!("could not get an instruction after dumpbining {other:x?}"));
+                        }
+                    }
+                }
+            };
+
+            // anguish, misery, etc: dumpbin will process register extension bits in protected mode, even though they are ignored.
+            // if we see a register like this, just.. bail. otherwise this will have to have exceptions for hundreds of test cases.
+            // note this skips x/y/z in the register name since mm8..mm31 will do the job.
+            for reg in [
+                "mm8", "mm9", "mm10", "mm11", "mm12", "mm13", "mm14", "mm15",
+                "mm16", "mm17", "mm18", "mm19", "mm20", "mm21", "mm22", "mm23",
+                "mm24", "mm25", "mm26", "mm27", "mm28", "mm29", "mm30", "mm31",
+            ] {
+                if external_masm_ish.contains(reg) {
+                    // TODO: EXTRACT THIS TO SOME OTHER MASM-SPECIFIC FUNCTION: THIS BAILS OUT OF THE REST OF THE TEST ENTIRELY.
+                    return;
+                }
+            }
+
+            if vex_prefixed {
+                for reg in [
+                    "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
+                ] {
+                    if external_masm_ish.contains(reg) {
+                        // TODO: EXTRACT THIS TO SOME OTHER MASM-SPECIFIC FUNCTION: THIS BAILS OUT OF THE REST OF THE TEST ENTIRELY.
+                        return;
+                    }
+                }
+            }
+
+            let displayed_masm = decoder.decode_slice(bytes).expect("can decode").display_with(DisplayStyle::Masm).to_string();
+            let masm_as_bytes = match displayed_masm.as_str() {
+                "nop zmmword ptr [eax]" => vec![0x0f, 0x18, 0x20], // MASM doesn't accept `nop zmmword ..`, no way to round trip 0f1820
+                "sysenter" => vec![0x0f, 0x34], // MASM doesn't accept sysenter, but dumpbin prints it.
+                "sysexit" => vec![0x0f, 0x35], // MASM doesn't accept sysexit, but dumpbin prints it.
+                // dumpbin doesn't know how to decode, and masm doesn't know how to *en*code, ud0.
+                "ud0 eax, ecx" => vec![0x66, 0x0f, 0xff, 0xc1],
+                "ud0 eax, dword ptr [ecx]" => vec![0x66, 0x0f, 0xff, 0x01],
+                "ud0 ebp, dword ptr [ebx - 54h]" => vec![0x0f, 0xff, 0x6b, 0xac],
+                // masm seems to not know about fstpnce/fstp1 at all. since this is an undocumented instruction anyway, assemble it ourselves..
+                "fstpnce st(3), st(0)" => vec![0xd9, 0xdb],
+                // masm inserts a wait prefix here..
+                "feni" => vec![0xdb, 0xe0],
+                "fdisi" => vec![0xdb, 0xe1],
+                "fsetpm" => vec![0xdb, 0xe4],
+                // masm doesn't know how to assemble address-size overrides..?
+                // > cannot use 16-bit register with a 32-bit address
+                "aesimc xmm1, xmmword ptr [bx]" => vec![0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f],
+                "aesenc xmm1, xmmword ptr [bx]" => vec![0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f],
+                "aesenclast xmm1, xmmword ptr [bx]" => vec![0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f],
+                "aesdec xmm1, xmmword ptr [bx]" => vec![0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f],
+                "aesdeclast xmm1, xmmword ptr [bx]" => vec![0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f],
+                "blendpd xmm7, xmmword ptr cs:[bx + si + 2FF0h], 7Ch" => vec![0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c],
+                // more
+                "movdir64b bp, zmmword ptr es:[di + 80Bh]" => vec![0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08],
+                "lss eax, fword ptr [bx + si]" => vec![0x67, 0x0f, 0xb2, 0x00],
+                "lddqu xmm4, xmmword ptr es:[bx + si + 5F1Bh]" => vec![0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f],
+                "lods byte ptr [si]" => vec![0x67, 0xac],
+                "scas byte ptr es:[di]" => vec![0x67, 0xae],
+                "rep movs byte ptr es:[di], byte ptr [si]" => vec![0x67, 0xf3, 0xa4],
+                "rep movs dword ptr es:[di], dword ptr [si]" => vec![0x67, 0xf3, 0xa5],
+                "movapd xmm0, xmmword ptr [bx + si]" => vec![0x67, 0x66, 0x0f, 0x28, 0x00],
+                "cvtdq2ps xmm0, xmmword ptr [bx + di]" => vec![0x67, 0x0f, 0x5b, 0x01],
+                // i tried really hard to find a MASM syntax for absolute far call/jump destinations! i turned up a bunch of blanks.
+                // https://mirrors.nycbug.org/pub/The_Unix_Archive/Unix_Usenet/comp.unix.xenix/1989-February/001910.html is the funniest,
+                // given that it is OS hackers experiencing the same issue and concluding they should emit the bytes themselves.
+                // so yax will emit something like bindump would, and we'll just swallow the text as if masm worked like i'd hope..
+                "call 6655h:44332211h" => vec![0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66],
+                "call 4433h:2211h" => vec![0x66, 0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66],
+                // terribly unfortunate: masm reasonably encodes this instruction as a 32-bit offset, which causes yax to spell the offset
+                // as 0000AA55 instead of AA55. override dumpbin to use the (worse) encoding for the sake of matching with the test.
+                "mov cx, word ptr [0AA55h]" => vec![0x66, 0x67, 0x8b, 0x0e, 0x55, 0xaa],
+                // same deal, different instruction.
+                "mov al, byte ptr [0B0C0h]" => vec![0x67, 0xa0, 0xc0, 0xb0],
+                "mov eax, dword ptr [0000B0C0h]" => vec![0x67, 0xa1, 0xc0, 0xb0],
+                // if you operand-size override pushad/popad you get the 16-bit forms, pusha/popa. dumpbin reflects this, but in 32-bit mode
+                // accepts either as a way of spelling pushad/popad. override it here for tests to match up, but this is an unfortunately
+                // disastrous difference in round-tripping..
+                "pusha" => vec![0x66, 0x60],
+                "popa" => vec![0x66, 0x61],
+                // masm does not accept an integer operand: it only supports `aam 10` as in d4 0a. so.. bummer.
+                "aam 1" => vec![0xd4, 0x01],
+                // same as above
+                "aad 1" => vec![0xd5, 0x01],
+                _other => { tools::masm(&displayed_masm, CodeModel::Bits32).expect("can assemble") }
+            };
+            let masm_roundtrip = decoder.decode_slice(&masm_as_bytes).expect("can decode").display_with(DisplayStyle::Masm).to_string();
+            // chasing down differences in how dumpbin/yax write "qword" is not useful to anyone..
+            let external_masm_ish = external_masm_ish.replace(" mmword ", " qword ");
+            let masm_roundtrip = masm_roundtrip.replace(" mmword ", " qword ");
+            if external_masm_ish.starts_with("tzcnt") && masm_roundtrip.starts_with("bsf") {
+                // this is ok, we support "decode as if without bmi1" but dumpbin does not, so dumpbin always says tzcnt.
+                // masm accepts either and does the right thing.
+            } else if external_masm_ish.contains(" qword ") && masm_roundtrip.contains(" dword ") {
+                // this might be "dumpbin thinks the instruction works on qwords, but we know it's dwords. let it through? :/
+            } else {
+                assert_eq!(external_masm_ish, masm_roundtrip);
+            }
+            if let Some(masm_style) = disasm.masm.as_ref() {
+                assert_eq!(masm_style, &masm_roundtrip);
+            }
+        } else {
+            if let Some(masm_style) = disasm.masm.as_ref() {
+                test_display_format(&decoder, bytes, masm_style, DisplayStyle::Masm);
+            }
+        }
+    } else {
+        test_invalid_under(&decoder, bytes);
+    }
+}
+
+fn run_test(cases: &[TestCase]) {
+    for tc in cases {
+        if let Some(decodes) = tc.decodes.as_ref() {
+            // if there are explicit feature sets, run only those decodes; the default decoder is
+            // in the list if the test cares about it, and describes if it should work or not.
+            let featuresets = if let Some(featuresets) = tc.featuresets {
+                featuresets
+            } else {
+                &[(FeatureSet::Default, true)]
+            };
+
+            for (featureset, decode_ok) in featuresets {
+                let decoder = featureset.into_decoder();
+                check_decodes(&decoder, *decode_ok, tc.bytes, decodes);
+            }
+        } else {
+            // similar to above:
+            if let Some(featuresets) = tc.featuresets {
+                for (featureset, decode_ok) in featuresets {
+                    assert!(!decode_ok);
+                    let decoder = featureset.into_decoder();
+
+                    test_invalid_under(&decoder, tc.bytes);
+                }
+            } else {
+                test_invalid(tc.bytes);
+            }
+        }
+    }
+}
+
+// the extra { } in these arms are load-bearing to keep Rust from opening thousands of scopes for
+// each lifetime. at around 32k lifetimes it'll stack overflow.
+macro_rules! testcase {
+    (invalid: features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr) => {
+        {
+            use crate::protected_mode::{TestCase, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: None,
+            }
+        }
+    };
+
+    (invalid: features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr) => {
+        {
+            use crate::protected_mode::{TestCase, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, false),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: None,
+            }
+        }
+    };
+
+    (invalid: $bytes:expr) => {
+        {
+            use crate::protected_mode::TestCase;
+
+            let bytes: &'static [u8] = $bytes;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: None,
+            }
+        }
+    };
+
+    (features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: Some($masm_text) })
+            }
+        }
+    };
+
+    (features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    // need this above `($bytes:expr, $test:expr)` below to keep that case from
+    // matching inappropriately early.
+    (features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: Some($masm_text) })
             }
         }
+    };
+
+    // need this above `($bytes:expr, $test:expr)` below to keep that case from
+    // matching inappropriately early.
+    (features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    ({ $($feature:ident: $decode:expr)+ } $bytes:expr, $text:expr, c: $c_text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let c: &'static str = $c_text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode))*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: Some(c), masm: None })
+            }
+        }
+    };
+
+    ($bytes:expr, $text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    ($bytes:expr, $text:expr, c: $c_text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let c: &'static str = $c_text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: Some(c) })
+            }
+        }
+    };
+
+    ($bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::protected_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let masm: &'static str = $masm_text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: None, masm: Some(masm) })
+            }
+        }
+    };
+}
+
+mod modrm_decode {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // just modrm
+        testcase!(&[0x33, 0x08], "xor ecx, dword [eax]"),
+        testcase!(&[0x33, 0x20], "xor esp, dword [eax]"),
+        testcase!(&[0x33, 0x05, 0x78, 0x56, 0x34, 0x12], "xor eax, dword [0x12345678]"),
+        testcase!(&[0x33, 0x41, 0x23], "xor eax, dword [ecx + 0x23]"),
+        testcase!(&[0x33, 0x81, 0x23, 0x01, 0x65, 0x43], "xor eax, dword [ecx + 0x43650123]"),
+        testcase!(&[0x33, 0xc1], "xor eax, ecx"),
+
+        // sib
+        testcase!(&[0x33, 0x04, 0x0a], "xor eax, dword [edx + ecx * 1]", masm: "xor eax, dword ptr [edx + ecx]"),
+        testcase!(&[0x33, 0x04, 0x4a], "xor eax, dword [edx + ecx * 2]"),
+        testcase!(&[0x33, 0x04, 0x8a], "xor eax, dword [edx + ecx * 4]"),
+        testcase!(&[0x33, 0x04, 0xca], "xor eax, dword [edx + ecx * 8]"),
+        testcase!(&[0x33, 0x04, 0x20], "xor eax, dword [eax]"),
+        testcase!(&[0x33, 0x04, 0x60], "xor eax, dword [eax]"),
+        testcase!(&[0x33, 0x04, 0xa0], "xor eax, dword [eax]"),
+        testcase!(&[0x33, 0x04, 0xe0], "xor eax, dword [eax]"),
+        testcase!(&[0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]", masm: "xor eax, dword ptr [44332211h]"),
+
+        testcase!(&[0x33, 0x44, 0x65, 0x11], "xor eax, dword [ebp + 0x11]"),
+        testcase!(&[0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [ebp + 0x44332211]"),
+        testcase!(&[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]"),
+
+        // specifically sib with base == 0b101
+        // mod bits 00
+        testcase!(&[0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, dword [0x50403020]"),
+        // mod bits 01
+        testcase!(&[0x33, 0x74, 0x25, 0x20], "xor esi, dword [ebp + 0x20]"),
+        // mod bits 10
+        testcase!(&[0x33, 0xb4, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, dword [ebp + 0x50403020]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod mmx {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0xf7, 0xc1], "maskmovq mm0, mm1"),
+        testcase!(invalid: &[0x0f, 0xf7, 0x01]),
+
+        testcase!(&[0x0f, 0xe7, 0x03], "movntq qword [ebx], mm0"),
+        testcase!(invalid: &[0x0f, 0xe7, 0xc3]),
+
+        testcase!(invalid: &[0x66, 0x0f, 0xc3, 0x03]),
+        testcase!(&[0x0f, 0xc3, 0x03], "movnti dword [ebx], eax"),
+        testcase!(invalid: &[0x0f, 0xc3, 0xc3]),
+
+        testcase!(&[0x0f, 0x7e, 0xcf], "movd edi, mm1"),
+        testcase!(&[0x0f, 0x7f, 0xcf], "movq mm7, mm1"),
+        testcase!(&[0x0f, 0x7f, 0x0f], "movq qword [edi], mm1"),
+        testcase!(&[0x0f, 0xc4, 0xc0, 0x14], "pinsrw mm0, eax, 0x14"),
+        testcase!(&[0x0f, 0xc4, 0x00, 0x14], "pinsrw mm0, word [eax], 0x14"),
+        testcase!(&[0x0f, 0xd1, 0xcf], "psrlw mm1, mm7"),
+        testcase!(&[0x0f, 0xd1, 0x00], "psrlw mm0, qword [eax]"),
+        testcase!(invalid: &[0x0f, 0xd7, 0x00]),
+        testcase!(&[0x0f, 0xd7, 0xcf], "pmovmskb ecx, mm7"),
+        testcase!(&[0x0f, 0x3a, 0x0f, 0xc1, 0x23], "palignr mm0, mm1, 0x23"),
+        testcase!(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2"),
+        testcase!(&[0x0f, 0xfd, 0xd2], "paddw mm2, mm2"),
+        testcase!(&[0x0f, 0x6f, 0xe9], "movq mm5, mm1"),
+        testcase!(&[0x0f, 0xe5, 0x3d, 0xaa, 0xbb, 0xcc, 0x77], "pmulhw mm7, qword [0x77ccbbaa]"),
+
+        testcase!(&[0x0f, 0x38, 0x00, 0xda], "pshufb mm3, mm2"),
+
+        testcase!(&[0x0f, 0x74, 0xc2], "pcmpeqb mm0, mm2"),
+        testcase!(&[0x0f, 0x75, 0xc2], "pcmpeqw mm0, mm2"),
+        testcase!(&[0x0f, 0x76, 0xc2], "pcmpeqd mm0, mm2"),
+
+        testcase!(&[0x66, 0x0f, 0xc5, 0xd8, 0xff], "pextrw ebx, xmm0, 0xff"),
+        testcase!(invalid: &[0x66, 0x0f, 0xc5, 0x08, 0xff]),
+
+        testcase!(&[0x0f, 0xc5, 0xd1, 0x00], "pextrw edx, mm1, 0x0"),
+        testcase!(invalid: &[0x0f, 0xc5, 0x01, 0x00]),
+
+        testcase!(&[0x0f, 0xd8, 0xc2], "psubusb mm0, mm2"),
+        testcase!(&[0x0f, 0xd9, 0xc2], "psubusw mm0, mm2"),
+        testcase!(&[0x0f, 0xda, 0xc2], "pminub mm0, mm2"),
+        testcase!(&[0x0f, 0xdb, 0xc2], "pand mm0, mm2"),
+        testcase!(&[0x0f, 0xdc, 0xc2], "paddusb mm0, mm2"),
+        testcase!(&[0x0f, 0xdd, 0xc2], "paddusw mm0, mm2"),
+        testcase!(&[0x0f, 0xde, 0xc2], "pmaxub mm0, mm2"),
+        testcase!(&[0x0f, 0xdf, 0xc2], "pandn mm0, mm2"),
+
+        testcase!(&[0x0f, 0xe8, 0xc2], "psubsb mm0, mm2"),
+        testcase!(&[0x0f, 0xe9, 0xc2], "psubsw mm0, mm2"),
+        testcase!(&[0x0f, 0xea, 0xc2], "pminsw mm0, mm2"),
+        testcase!(&[0x0f, 0xeb, 0xc2], "por mm0, mm2"),
+        testcase!(&[0x0f, 0xec, 0xc2], "paddsb mm0, mm2"),
+        testcase!(&[0x0f, 0xed, 0xc2], "paddsw mm0, mm2"),
+        testcase!(&[0x0f, 0xee, 0xc2], "pmaxsw mm0, mm2"),
+        testcase!(&[0x0f, 0xef, 0xc2], "pxor mm0, mm2"),
+
+        testcase!(invalid: &[0x0f, 0xf0, 0xc2]),
+        testcase!(&[0x0f, 0xf1, 0xc2], "psllw mm0, mm2"),
+        testcase!(&[0x0f, 0xf2, 0xc2], "pslld mm0, mm2"),
+        testcase!(&[0x0f, 0xf3, 0xc2], "psllq mm0, mm2"),
+        testcase!(&[0x0f, 0xf4, 0xc2], "pmuludq mm0, mm2"),
+        testcase!(&[0x0f, 0xf5, 0xc2], "pmaddwd mm0, mm2"),
+        testcase!(&[0x0f, 0xf6, 0xc2], "psadbw mm0, mm2"),
+        testcase!(&[0x0f, 0xf8, 0xc2], "psubb mm0, mm2"),
+        testcase!(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2"),
+        testcase!(&[0x0f, 0xfa, 0xc2], "psubd mm0, mm2"),
+        testcase!(&[0x0f, 0xfb, 0xc2], "psubq mm0, mm2"),
+        testcase!(&[0x0f, 0xfc, 0xc2], "paddb mm0, mm2"),
+        testcase!(&[0x0f, 0xfc, 0x02], "paddb mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xfd, 0xc2], "paddw mm0, mm2"),
+        testcase!(&[0x0f, 0xfe, 0xc2], "paddd mm0, mm2"),
+
+        testcase!(&[0x0f, 0xf1, 0x02], "psllw mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf2, 0x02], "pslld mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf3, 0x02], "psllq mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf4, 0x02], "pmuludq mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf5, 0x02], "pmaddwd mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf6, 0x02], "psadbw mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf8, 0x02], "psubb mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xf9, 0x02], "psubw mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xfa, 0x02], "psubd mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xfb, 0x02], "psubq mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xfc, 0x02], "paddb mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xfd, 0x02], "paddw mm0, qword [edx]"),
+        testcase!(&[0x0f, 0xfe, 0x02], "paddd mm0, qword [edx]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod cvt {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm7"),
+        testcase!(&[0x0f, 0x2a, 0xcf], "cvtpi2ps xmm1, mm7"),
+        testcase!(&[0x0f, 0x2a, 0x00], "cvtpi2ps xmm0, qword [eax]"),
+        testcase!(&[0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [eax]"),
+        testcase!(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"),
+        testcase!(&[0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, dword [eax]"),
+        testcase!(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, dword [eax]"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod aesni {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { AESNI: true } &[0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [edi]"),
+        testcase!(features { AESNI: true } &[0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [bx]"),
+
+        testcase!(features { AESNI: true } &[0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [edi]"),
+        testcase!(features { AESNI: true } &[0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [bx]"),
+
+        testcase!(features { AESNI: true } &[0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [edi]"),
+        testcase!(features { AESNI: true } &[0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [bx]"),
+
+        testcase!(features { AESNI: true } &[0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [edi]"),
+        testcase!(features { AESNI: true } &[0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [bx]"),
+
+        testcase!(features { AESNI: true } &[0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [edi]"),
+        testcase!(features { AESNI: true } &[0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [bx]"),
+
+        testcase!(features { AESNI: true } &[0x66, 0x0f, 0x3a, 0xdf, 0x0f, 0xaa], "aeskeygenassist xmm1, xmmword [edi], 0xaa"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sse2 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x10, 0x0c, 0xc7], "movsd xmm1, qword [edi + eax * 8]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x11, 0x0c, 0xc7], "movsd qword [edi + eax * 8], xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x11, 0x0c, 0xc7], "movupd xmmword [edi + eax * 8], xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, qword [ebx]"), // reg-mem is movlpd
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x13, 0x03], "movlpd qword [ebx], xmm0"),
+        testcase!(invalid: &[0x66, 0x0f, 0x13, 0xc3]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x14, 0x03], "unpcklpd xmm0, xmmword [ebx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x14, 0xc3], "unpcklpd xmm0, xmm3"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, xmmword [ebx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x15, 0xc3], "unpckhpd xmm0, xmm3"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, qword [ebx]"),
+        testcase!(invalid: &[0x66, 0x0f, 0x16, 0xc3]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x17, 0x03], "movhpd qword [ebx], xmm0"),
+        testcase!(invalid: &[0x66, 0x0f, 0x17, 0xc3]),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]"),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2a, 0x0f], "cvtpi2pd xmm1, qword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x2a, 0x0f], "cvtsi2sd xmm1, dword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2b, 0x0f], "movntpd xmmword [edi], xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2c, 0xcf], "cvttpd2pi mm1, xmm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2c, 0x0f], "cvttpd2pi mm1, xmmword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x2c, 0xcf], "cvttsd2si ecx, xmm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x2c, 0x0f], "cvttsd2si ecx, qword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2d, 0xcf], "cvtpd2pi mm1, xmm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2d, 0x0f], "cvtpd2pi mm1, xmmword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x2d, 0xcf], "cvtsd2si ecx, xmm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x2d, 0x0f], "cvtsd2si ecx, qword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2e, 0xcf], "ucomisd xmm1, xmm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2e, 0x0f], "ucomisd xmm1, qword [edi]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2f, 0xcf], "comisd xmm1, xmm7"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x2f, 0x0f], "comisd xmm1, qword [edi]"),
+
+        /*
+         * .... 660f38
+         * .... 660f7f
+         */
+
+        testcase!(invalid: &[0x66, 0x0f, 0x50, 0x01]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x50, 0xc1], "movmskpd eax, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, qword [ecx]"),
+        testcase!(invalid: &[0x66, 0x0f, 0x52, 0x01]),
+        testcase!(invalid: &[0x66, 0x0f, 0x53, 0x01]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x57, 0x01], "xorpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x58, 0x01], "addpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x58, 0x01], "addsd xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x59, 0x01], "mulpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x59, 0x01], "mulsd xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x5a, 0x01], "cvtpd2ps xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x5a, 0x01], "cvtsd2ss xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x5b, 0x01], "cvtps2dq xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x5c, 0x01], "subpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x5c, 0x01], "subsd xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x5d, 0x01], "minpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x5d, 0x01], "minsd xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x5e, 0x01], "divpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x5e, 0x01], "divsd xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x5f, 0x01], "maxpd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x5f, 0x01], "maxsd xmm0, qword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x60, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpcklbw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x61, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpcklwd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x62, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpckldq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x63, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "packsswb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x64, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "pcmpgtb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x65, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "pcmpgtw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x66, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "pcmpgtd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x67, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "packuswb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x68, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpckhbw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x69, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpckhwd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x6a, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpckhdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x6b, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "packssdw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x6c, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpcklqdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x6d, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "punpckhqdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x6e, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "movd xmm3, dword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x6f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "movdqa xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x6e, 0xc0], "movd xmm0, eax"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x70, 0xc0, 0x4e], "pshufd xmm0, xmm0, 0x4e"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0x70, 0xc0, 0x4e], "pshuflw xmm0, xmm0, 0x4e"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e"),
+        testcase!(invalid: &[0x66, 0x0f, 0x71, 0x10, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x71, 0xd0, 0x8f], "psrlw xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x71, 0x20, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x71, 0xe0, 0x8f], "psraw xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x71, 0x30, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x71, 0xf0, 0x8f], "psllw xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x72, 0x10, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x72, 0xd0, 0x8f], "psrld xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x72, 0x20, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x72, 0xe0, 0x8f], "psrad xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x72, 0x30, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x72, 0xf0, 0x8f], "pslld xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x10, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x18, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x73, 0xd0, 0x8f], "psrlq xmm0, 0x8f"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x73, 0xd8, 0x8f], "psrldq xmm0, 0x8f"),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x30, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x38, 0x8f]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm0, 0x8f"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm0, 0x8f"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x7e, 0xc1], "movd ecx, xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x7e, 0x01], "movd dword [ecx], xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } 
+            &[0x66, 0x0f, 0x7f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "movdqa xmmword [esp + ebx * 4 - 0x334455cc], xmm3"
+        ),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc2, 0xc3, 0x08], "cmppd xmm0, xmm3, 0x8"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc2, 0x03, 0x08], "cmppd xmm0, xmmword [ebx], 0x8"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0xc2, 0xc3, 0x08], "cmpsd xmm0, xmm3, 0x8"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0xc2, 0x03, 0x08], "cmpsd xmm0, qword [ebx], 0x8"),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc4, 0xc3, 0x08], "pinsrw xmm0, ebx, 0x8"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc4, 0x03, 0x08], "pinsrw xmm0, word [ebx], 0x8"),
+
+    //    testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc5, 0xc3, 0x08], "pextrw eax, xmm3, 0x8"),
+    //    testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc5, 0x03, 0x08]),
+    //    testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc5, 0x40, 0x08]),
+    //    testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc5, 0x80, 0x08]),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc6, 0x03, 0x08], "shufpd xmm0, xmmword [ebx], 0x8"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xc6, 0xc3, 0x08], "shufpd xmm0, xmm3, 0x8"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd1, 0xc1], "psrlw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd1, 0x01], "psrlw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd2, 0xc1], "psrld xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd2, 0x01], "psrld xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd3, 0xc1], "psrlq xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd3, 0x01], "psrlq xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd4, 0xc1], "paddq xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd4, 0x01], "paddq xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd5, 0xc1], "pmullw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd5, 0x01], "pmullw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd6, 0xc1], "movq xmm1, xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd6, 0x01], "movq qword [ecx], xmm0"),
+        testcase!(invalid: &[0xf3, 0x0f, 0xd6, 0x03]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf3, 0x0f, 0xd6, 0xc3], "movq2dq xmm0, mm3"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0xd6, 0xc3], "movdq2q mm0, xmm3"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd7, 0xc1], "pmovmskb eax, xmm1"),
+        testcase!(invalid: &[0x66, 0x0f, 0xd7, 0x01]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd8, 0xc1], "psubusb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd8, 0x01], "psubusb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd9, 0xc1], "psubusw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xd9, 0x01], "psubusw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xda, 0xc1], "pminub xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xda, 0x01], "pminub xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdb, 0xc1], "pand xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdb, 0x01], "pand xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdc, 0xc1], "paddusb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdc, 0x01], "paddusb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdd, 0xc1], "paddusw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdd, 0x01], "paddusw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xde, 0xc1], "pmaxub xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xde, 0x01], "pmaxub xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdf, 0xc1], "pandn xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xdf, 0x01], "pandn xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe0, 0xc1], "pavgb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe0, 0x01], "pavgb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe1, 0xc1], "psraw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe1, 0x01], "psraw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe2, 0xc1], "psrad xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe2, 0x01], "psrad xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe3, 0xc1], "pavgw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe3, 0x01], "pavgw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe4, 0xc1], "pmulhuw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe4, 0x01], "pmulhuw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe5, 0xc1], "pmulhw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe5, 0x01], "pmulhw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe6, 0xc1], "cvttpd2dq xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe6, 0x01], "cvttpd2dq xmm0, xmmword [ecx]"),
+        testcase!(invalid: &[0x66, 0x0f, 0xe7, 0xc1]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe7, 0x01], "movntdq xmmword [ecx], xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe8, 0xc1], "psubsb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe8, 0x01], "psubsb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe9, 0xc1], "psubsw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xe9, 0x01], "psubsw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xea, 0xc1], "pminsw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xea, 0x01], "pminsw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xeb, 0xc3], "por xmm0, xmm3"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xeb, 0xc4], "por xmm0, xmm4"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xeb, 0xd3], "por xmm2, xmm3"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xeb, 0x12], "por xmm2, xmmword [edx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xeb, 0xc1], "por xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xeb, 0x01], "por xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xec, 0xc1], "paddsb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xec, 0x01], "paddsb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xed, 0xc1], "paddsw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xed, 0x01], "paddsw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xee, 0xc1], "pmaxsw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xee, 0x01], "pmaxsw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xef, 0xc1], "pxor xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xef, 0x01], "pxor xmm0, xmmword [ecx]"),
+        testcase!(invalid: &[0x66, 0x0f, 0xf0, 0xc1]),
+        testcase!(invalid: &[0x66, 0x0f, 0xf0, 0x01]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf1, 0xc1], "psllw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf1, 0x01], "psllw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf2, 0xc1], "pslld xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf2, 0x01], "pslld xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf3, 0xc1], "psllq xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf3, 0x01], "psllq xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf4, 0xc1], "pmuludq xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf4, 0x01], "pmuludq xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf5, 0xc1], "pmaddwd xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf5, 0x01], "pmaddwd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf6, 0xc1], "psadbw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf6, 0x01], "psadbw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf7, 0xc1], "maskmovdqu xmm0, xmm1"),
+        testcase!(invalid: &[0x66, 0x0f, 0xf7, 0x01]),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf8, 0xc1], "psubb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf8, 0x01], "psubb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf9, 0xc1], "psubw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf9, 0x01], "psubw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfa, 0xc1], "psubd xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfa, 0x01], "psubd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfb, 0xc1], "psubq xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfb, 0x01], "psubq xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfc, 0xc1], "paddb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfc, 0x01], "paddb xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfd, 0xc1], "paddw xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfe, 0xc1], "paddd xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, xmmword [ecx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf2, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0xf3, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xff, 0x01], "ud0 eax, dword [ecx]"),
+
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x74, 0xc1], "pcmpeqb xmm0, xmm1"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, xmmword [edx]"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf8, 0xc8], "psubb xmm1, xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf8, 0xd0], "psubb xmm2, xmm0"),
+        testcase!(features nodefault { Minimal: true, SSE: true, SSE2: true } &[0x66, 0x0f, 0xf8, 0x12], "psubb xmm2, xmmword [edx]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sse3 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0xf0, 0x0f], "lddqu xmm1, xmmword [edi]"),
+        testcase!(invalid: &[0xf2, 0x0f, 0xf0, 0xcf]),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0xd0, 0xcf], "addsubps xmm1, xmm7"),
+        testcase!(invalid: &[0xf3, 0x0f, 0xd0, 0x0f]),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x66, 0x0f, 0xd0, 0xcf], "addsubpd xmm1, xmm7"),
+
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x7c, 0x0f], "haddps xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x7c, 0xcf], "haddps xmm1, xmm7"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x66, 0x0f, 0x7c, 0x0f], "haddpd xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x66, 0x0f, 0x7c, 0xcf], "haddpd xmm1, xmm7"),
+
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x7d, 0x0f], "hsubps xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x7d, 0xcf], "hsubps xmm1, xmm7"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x66, 0x0f, 0x7d, 0x0f], "hsubpd xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x66, 0x0f, 0x7d, 0xcf], "hsubpd xmm1, xmm7"),
+
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf3, 0x0f, 0x12, 0x0f], "movsldup xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf3, 0x0f, 0x12, 0xcf], "movsldup xmm1, xmm7"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf3, 0x0f, 0x16, 0x0f], "movshdup xmm1, xmmword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7"),
+
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, qword [edi]"),
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7"),
+
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x0f, 0x01, 0xc8], "monitor", masm: "monitor eax, ecx, edx"),
+        testcase!(invalid: &[0x66, 0x0f, 0x01, 0xc8]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x01, 0xc8]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xc8]),
+
+        testcase!(features { SSE3: true, SSE4_1: false, SSE4_2: false, AVX: false } &[0x0f, 0x01, 0xc9], "mwait"),
+        testcase!(invalid: &[0x66, 0x0f, 0x01, 0xc9]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xc9]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x01, 0xc9]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sse4_2 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x38, 0x37, 0x03], "pcmpgtq xmm0, xmmword [ebx]"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x38, 0x37, 0xc3], "pcmpgtq xmm0, xmm3"),
+
+        testcase!(features { SSE4_2: true, AVX: false } &[0xf2, 0x0f, 0x38, 0xf0, 0x06], "crc32 eax, byte [esi]"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0xf2, 0x0f, 0x38, 0xf0, 0xc6], "crc32 eax, dh"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0xf2, 0x0f, 0x38, 0xf1, 0x06], "crc32 eax, dword [esi]"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, esi"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, si"),
+
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x60, 0xc6, 0x54], "pcmpestrm xmm0, xmm6, 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x60, 0x06, 0x54], "pcmpestrm xmm0, xmmword [esi], 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x61, 0xc6, 0x54], "pcmpestri xmm0, xmm6, 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x61, 0x06, 0x54], "pcmpestri xmm0, xmmword [esi], 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x62, 0xc6, 0x54], "pcmpistrm xmm0, xmm6, 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x62, 0x06, 0x54], "pcmpistrm xmm0, xmmword [esi], 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x63, 0xc6, 0x54], "pcmpistri xmm0, xmm6, 0x54"),
+        testcase!(features { SSE4_2: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x63, 0x06, 0x54], "pcmpistri xmm0, xmmword [esi], 0x54"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sse4_1 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, xmmword [ecx], 0x22"),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0c, 0xc1, 0x22], "blendps xmm0, xmm1, 0x22"),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, xmmword [ecx], 0x22"),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0d, 0xc1, 0x22], "blendpd xmm0, xmm1, 0x22"),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x10, 0x06], "pblendvb xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x10, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x14, 0x06], "blendvps xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x14, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x15, 0x06], "blendvpd xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x15, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x17, 0x06], "ptest xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x17, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x20, 0x06], "pmovsxbw xmm0, qword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x20, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x21, 0x06], "pmovsxbd xmm0, dword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x21, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x22, 0x06], "pmovsxbq xmm0, word [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x22, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x23, 0x06], "pmovsxwd xmm0, qword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x23, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x24, 0x06], "pmovsxwq xmm0, dword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x24, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x25, 0x06], "pmovsxdq xmm0, qword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x25, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x28, 0x06], "pmuldq xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x28, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x29, 0x06], "pcmpeqq xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x29, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x2a, 0x06], "movntdqa xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x66, 0x0f, 0x38, 0x2a, 0xc6]),
+        testcase!(invalid: &[0x0f, 0x38, 0x2a, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x2b, 0x06], "packusdw xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x2b, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x30, 0x06], "pmovzxbw xmm0, qword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x30, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x31, 0x06], "pmovzxbd xmm0, dword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x31, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x32, 0x06], "pmovzxbq xmm0, word [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x32, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x33, 0x06], "pmovzxwd xmm0, qword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x33, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x34, 0x06], "pmovzxwq xmm0, dword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x34, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x35, 0x06], "pmovzxdq xmm0, qword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x35, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x38, 0x06], "pminsb xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x38, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x39, 0x06], "pminsd xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x39, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x3a, 0x06], "pminuw xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x3a, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x3b, 0x06], "pminud xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x3b, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x3c, 0x06], "pmaxsb xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x3c, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x3d, 0x06], "pmaxsd xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x3d, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x3e, 0x06], "pmaxuw xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x3e, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x3f, 0x06], "pmaxud xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x3f, 0x06]),
+
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x40, 0x06], "pmulld xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x40, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x38, 0x41, 0x06], "phminposuw xmm0, xmmword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x41, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x08, 0x06, 0x31], "roundps xmm0, xmmword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x08, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x09, 0x06, 0x31], "roundpd xmm0, xmmword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x09, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0a, 0x06, 0x31], "roundss xmm0, dword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x0a, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0b, 0x06, 0x31], "roundsd xmm0, qword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x0b, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0e, 0x06, 0x31], "pblendw xmm0, xmmword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x0e, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x14, 0x06, 0x31], "pextrb byte [esi], xmm0, 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x14, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x15, 0x06, 0x31], "pextrw word [esi], xmm0, 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x15, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x16, 0x06, 0x31], "pextrd dword [esi], xmm0, 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x16, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x17, 0x06, 0x31], "extractps dword [esi], xmm0, 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x17, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x20, 0x06, 0x31], "pinsrb xmm0, byte [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x20, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x21, 0x06, 0x31], "insertps xmm0, dword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x21, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x22, 0x06, 0x31], "pinsrd xmm0, dword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x22, 0x06]),
+
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x40, 0x06, 0x31], "dpps xmm0, xmmword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x40, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x41, 0x06, 0x31], "dppd xmm0, xmmword [esi], 0x31"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x41, 0x06]),
+        testcase!(features { SSE4_1: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x42, 0x06, 0x44], "mpsadbw xmm0, xmmword [esi], 0x44"),
+        testcase!(invalid: &[0x0f, 0x3a, 0x42, 0x06]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod ssse3 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x00, 0xda], "pshufb xmm3, xmm2"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x00, 0x06], "pshufb xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x00, 0x06], "pshufb mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x01, 0x06], "phaddw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x01, 0x06], "phaddw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x02, 0x06], "phaddd xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x02, 0x06], "phaddd mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x03, 0x06], "phaddsw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x03, 0x06], "phaddsw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x04, 0x06], "pmaddubsw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x04, 0x06], "pmaddubsw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x05, 0x06], "phsubw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x05, 0x06], "phsubw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x06, 0x06], "phsubd xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x06, 0x06], "phsubd mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x07, 0x06], "phsubsw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x07, 0x06], "phsubsw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x08, 0x06], "psignb xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x08, 0x06], "psignb mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x09, 0x06], "psignw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x09, 0x06], "psignw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x0a, 0x06], "psignd xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x0a, 0x06], "psignd mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x0b, 0x06], "pmulhrsw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x0b, 0x06], "pmulhrsw mm0, qword [esi]"),
+
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x1c, 0x06], "pabsb xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x1c, 0x06], "pabsb mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x1d, 0x06], "pabsw xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x1d, 0x06], "pabsw mm0, qword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x38, 0x1e, 0x06], "pabsd xmm0, xmmword [esi]"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x38, 0x1e, 0x06], "pabsd mm0, qword [esi]"),
+
+        testcase!(features { SSSE3: true, AVX: false } &[0x66, 0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr xmm0, xmmword [esi], 0x30"),
+        testcase!(features { SSSE3: true, AVX: false } &[0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr mm0, qword [esi], 0x30"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod _0f01 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // drawn heavily from "Table A-6.  Opcode Extensions for One- and Two-byte Opcodes by Group
+        // Number"
+        testcase!(&[0x0f, 0x01, 0x38], "invlpg byte [eax]"),
+        testcase!(&[0x0f, 0x01, 0x3f], "invlpg byte [edi]"),
+        testcase!(&[0x0f, 0x01, 0x40, 0xff], "sgdt far [eax - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x41, 0xff], "sgdt far [ecx - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x49, 0xff], "sidt far [ecx - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x51, 0xff], "lgdt far [ecx - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x59, 0xff], "lidt far [ecx - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x61, 0xff], "smsw word [ecx - 0x1]"),
+        testcase!(invalid: &[0x0f, 0x01, 0x69, 0xff]),
+        testcase!(&[0x0f, 0x01, 0x71, 0xff], "lmsw word [ecx - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x79, 0xff], "invlpg byte [ecx - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0xc0], "enclv"),
+        testcase!(&[0x0f, 0x01, 0xc1], "vmcall"),
+        testcase!(&[0x0f, 0x01, 0xc2], "vmlaunch"),
+        testcase!(&[0x0f, 0x01, 0xc3], "vmresume"),
+        testcase!(&[0x0f, 0x01, 0xc4], "vmxoff"),
+        testcase!(&[0x0f, 0x01, 0xc5], "pconfig"),
+        testcase!(invalid: &[0x0f, 0x01, 0xc6]),
+        testcase!(invalid: &[0x0f, 0x01, 0xc7]),
+        testcase!(&[0x0f, 0x01, 0xc8], "monitor"),
+        testcase!(&[0x0f, 0x01, 0xc9], "mwait"),
+        testcase!(&[0x0f, 0x01, 0xca], "clac"),
+        testcase!(&[0x0f, 0x01, 0xcb], "stac"),
+        testcase!(invalid: &[0x0f, 0x01, 0xcc]),
+        testcase!(invalid: &[0x0f, 0x01, 0xcd]),
+        testcase!(invalid: &[0x0f, 0x01, 0xce]),
+        testcase!(&[0x0f, 0x01, 0xcf], "encls"),
+        testcase!(&[0x0f, 0x01, 0xd0], "xgetbv"),
+        testcase!(&[0x0f, 0x01, 0xd1], "xsetbv"),
+        testcase!(invalid: &[0x0f, 0x01, 0xd2]),
+        testcase!(invalid: &[0x0f, 0x01, 0xd3]),
+        testcase!(&[0x0f, 0x01, 0xd4], "vmfunc"),
+        testcase!(&[0x0f, 0x01, 0xd5], "xend"),
+        testcase!(&[0x0f, 0x01, 0xd6], "xtest"),
+        testcase!(&[0x0f, 0x01, 0xd7], "enclu"),
+        testcase!(&[0x0f, 0x01, 0xd8], "vmrun eax"),
+        testcase!(&[0x0f, 0x01, 0xd9], "vmmcall"),
+        testcase!(&[0x0f, 0x01, 0xda], "vmload eax"),
+        testcase!(&[0x0f, 0x01, 0xdb], "vmsave eax"),
+        testcase!(&[0x0f, 0x01, 0xdc], "stgi"),
+        testcase!(&[0x0f, 0x01, 0xdd], "clgi"),
+        testcase!(&[0x0f, 0x01, 0xde], "skinit eax"),
+        testcase!(&[0x0f, 0x01, 0xdf], "invlpga eax, ecx"),
+    // TODO: not clear what SHOULD be reported for invlpgb. certainly not a `eax` operand. xed claims
+    // that this is UD in protected mode. the AMD manual explicitly says this does not #UD in protected
+    // mode. same for tlbsync.
+    //    testcase!(&[0x0f, 0x01, 0xfe], "invlpgb eax, edx, ecx"),
+    //    testcase!(&[0x0f, 0x01, 0xff], "tlbsync"),
+    //    testcase!(&[0x2e, 0x67, 0x65, 0x2e, 0x46, 0x0f, 0x01, 0xff], "tlbsync"),
+        testcase!(&[0x0f, 0x01, 0xe0], "smsw eax"),
+        testcase!(&[0x0f, 0x01, 0xe1], "smsw ecx"),
+        testcase!(&[0x0f, 0x01, 0xe2], "smsw edx"),
+        testcase!(&[0x0f, 0x01, 0xe3], "smsw ebx"),
+        testcase!(&[0x0f, 0x01, 0xe4], "smsw esp"),
+        testcase!(&[0x0f, 0x01, 0xe5], "smsw ebp"),
+        testcase!(&[0x0f, 0x01, 0xe6], "smsw esi"),
+        testcase!(&[0x0f, 0x01, 0xe7], "smsw edi"),
+        testcase!(invalid: &[0x0f, 0x01, 0xe8]),
+        testcase!(invalid: &[0x0f, 0x01, 0xe8]),
+        testcase!(invalid: &[0x0f, 0x01, 0xe9]),
+        testcase!(invalid: &[0x0f, 0x01, 0xea]),
+        testcase!(invalid: &[0x0f, 0x01, 0xeb]),
+        testcase!(&[0x0f, 0x01, 0xee], "rdpkru"),
+        testcase!(&[0x0f, 0x01, 0xef], "wrpkru"),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xee]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xef]),
+        testcase!(&[0x0f, 0x01, 0xf0], "lmsw ax"),
+        testcase!(&[0x0f, 0x01, 0xf1], "lmsw cx"),
+        testcase!(&[0x0f, 0x01, 0xf2], "lmsw dx"),
+        testcase!(&[0x0f, 0x01, 0xf3], "lmsw bx"),
+        testcase!(&[0x0f, 0x01, 0xf4], "lmsw sp"),
+        testcase!(&[0x0f, 0x01, 0xf5], "lmsw bp"),
+        testcase!(&[0x0f, 0x01, 0xf6], "lmsw si"),
+        testcase!(&[0x0f, 0x01, 0xf7], "lmsw di"),
+        testcase!(invalid: &[0x0f, 0x01, 0xf8]),
+        testcase!(&[0x0f, 0x01, 0xf9], "rdtscp"),
+        testcase!(&[0x0f, 0x01, 0xfa], "monitorx"),
+        testcase!(&[0x0f, 0x01, 0xfb], "mwaitx"),
+        testcase!(&[0x0f, 0x01, 0xfc], "clzero"),
+        testcase!(&[0x0f, 0x01, 0xfd], "rdpru ecx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
     }
 }
 
-#[test]
-fn test_modrm_decode() {
-    // just modrm
-    test_display(&[0x33, 0x08], "xor ecx, dword [eax]");
-    test_display(&[0x33, 0x20], "xor esp, dword [eax]");
-    test_display(&[0x33, 0x05, 0x78, 0x56, 0x34, 0x12], "xor eax, dword [0x12345678]");
-    test_display(&[0x33, 0x41, 0x23], "xor eax, dword [ecx + 0x23]");
-    test_display(&[0x33, 0x81, 0x23, 0x01, 0x65, 0x43], "xor eax, dword [ecx + 0x43650123]");
-    test_display(&[0x33, 0xc1], "xor eax, ecx");
-
-    // sib
-    test_display(&[0x33, 0x04, 0x0a], "xor eax, dword [edx + ecx * 1]");
-    test_display(&[0x33, 0x04, 0x4a], "xor eax, dword [edx + ecx * 2]");
-    test_display(&[0x33, 0x04, 0x8a], "xor eax, dword [edx + ecx * 4]");
-    test_display(&[0x33, 0x04, 0xca], "xor eax, dword [edx + ecx * 8]");
-    test_display(&[0x33, 0x04, 0x20], "xor eax, dword [eax]");
-    test_display(&[0x33, 0x04, 0x60], "xor eax, dword [eax]");
-    test_display(&[0x33, 0x04, 0xa0], "xor eax, dword [eax]");
-    test_display(&[0x33, 0x04, 0xe0], "xor eax, dword [eax]");
-    test_display(&[0x33, 0x04, 0x25, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]");
-
-    test_display(&[0x33, 0x44, 0x65, 0x11], "xor eax, dword [ebp + 0x11]");
-    test_display(&[0x33, 0x84, 0xa5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [ebp + 0x44332211]");
-    test_display(&[0x33, 0x04, 0xe5, 0x11, 0x22, 0x33, 0x44], "xor eax, dword [0x44332211]");
-
-    // specifically sib with base == 0b101
-    // mod bits 00
-    test_display(&[0x33, 0x34, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, dword [0x50403020]");
-    // mod bits 01
-    test_display(&[0x33, 0x74, 0x25, 0x20], "xor esi, dword [ebp + 0x20]");
-    // mod bits 10
-    test_display(&[0x33, 0xb4, 0x25, 0x20, 0x30, 0x40, 0x50], "xor esi, dword [ebp + 0x50403020]");
-}
-
-#[test]
-fn test_mmx() {
-    test_display(&[0x0f, 0xf7, 0xc1], "maskmovq mm0, mm1");
-    test_invalid(&[0x0f, 0xf7, 0x01]);
-
-    test_display(&[0x0f, 0xe7, 0x03], "movntq qword [ebx], mm0");
-    test_invalid(&[0x0f, 0xe7, 0xc3]);
-
-    test_invalid(&[0x66, 0x0f, 0xc3, 0x03]);
-    test_display(&[0x0f, 0xc3, 0x03], "movnti dword [ebx], eax");
-    test_invalid(&[0x0f, 0xc3, 0xc3]);
-
-    test_display(&[0x0f, 0x7e, 0xcf], "movd edi, mm1");
-    test_display(&[0x0f, 0x7f, 0xcf], "movq mm7, mm1");
-    test_display(&[0x0f, 0x7f, 0x0f], "movq qword [edi], mm1");
-    test_display(&[0x0f, 0xc4, 0xc0, 0x14], "pinsrw mm0, eax, 0x14");
-    test_display(&[0x0f, 0xc4, 0x00, 0x14], "pinsrw mm0, word [eax], 0x14");
-    test_display(&[0x0f, 0xd1, 0xcf], "psrlw mm1, mm7");
-    test_display(&[0x0f, 0xd1, 0x00], "psrlw mm0, qword [eax]");
-    test_invalid(&[0x0f, 0xd7, 0x00]);
-    test_display(&[0x0f, 0xd7, 0xcf], "pmovmskb ecx, mm7");
-    test_display(&[0x0f, 0x3a, 0x0f, 0xc1, 0x23], "palignr mm0, mm1, 0x23");
-    test_display(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2");
-    test_display(&[0x0f, 0xfd, 0xd2], "paddw mm2, mm2");
-    test_display(&[0x0f, 0x6f, 0xe9], "movq mm5, mm1");
-    test_display(&[0x0f, 0xe5, 0x3d, 0xaa, 0xbb, 0xcc, 0x77], "pmulhw mm7, qword [0x77ccbbaa]");
-
-    test_display(&[0x0f, 0x38, 0x00, 0xda], "pshufb mm3, mm2");
-
-    test_display(&[0x0f, 0x74, 0xc2], "pcmpeqb mm0, mm2");
-    test_display(&[0x0f, 0x75, 0xc2], "pcmpeqw mm0, mm2");
-    test_display(&[0x0f, 0x76, 0xc2], "pcmpeqd mm0, mm2");
-
-    test_display(&[0x66, 0x0f, 0xc5, 0xd8, 0xff], "pextrw ebx, xmm0, 0xff");
-    test_invalid(&[0x66, 0x0f, 0xc5, 0x08, 0xff]);
-
-    test_display(&[0x0f, 0xc5, 0xd1, 0x00], "pextrw edx, mm1, 0x0");
-    test_invalid(&[0x0f, 0xc5, 0x01, 0x00]);
-
-    test_display(&[0x0f, 0xd8, 0xc2], "psubusb mm0, mm2");
-    test_display(&[0x0f, 0xd9, 0xc2], "psubusw mm0, mm2");
-    test_display(&[0x0f, 0xda, 0xc2], "pminub mm0, mm2");
-    test_display(&[0x0f, 0xdb, 0xc2], "pand mm0, mm2");
-    test_display(&[0x0f, 0xdc, 0xc2], "paddusb mm0, mm2");
-    test_display(&[0x0f, 0xdd, 0xc2], "paddusw mm0, mm2");
-    test_display(&[0x0f, 0xde, 0xc2], "pmaxub mm0, mm2");
-    test_display(&[0x0f, 0xdf, 0xc2], "pandn mm0, mm2");
-
-    test_display(&[0x0f, 0xe8, 0xc2], "psubsb mm0, mm2");
-    test_display(&[0x0f, 0xe9, 0xc2], "psubsw mm0, mm2");
-    test_display(&[0x0f, 0xea, 0xc2], "pminsw mm0, mm2");
-    test_display(&[0x0f, 0xeb, 0xc2], "por mm0, mm2");
-    test_display(&[0x0f, 0xec, 0xc2], "paddsb mm0, mm2");
-    test_display(&[0x0f, 0xed, 0xc2], "paddsw mm0, mm2");
-    test_display(&[0x0f, 0xee, 0xc2], "pmaxsw mm0, mm2");
-    test_display(&[0x0f, 0xef, 0xc2], "pxor mm0, mm2");
-
-    test_invalid(&[0x0f, 0xf0, 0xc2]);
-    test_display(&[0x0f, 0xf1, 0xc2], "psllw mm0, mm2");
-    test_display(&[0x0f, 0xf2, 0xc2], "pslld mm0, mm2");
-    test_display(&[0x0f, 0xf3, 0xc2], "psllq mm0, mm2");
-    test_display(&[0x0f, 0xf4, 0xc2], "pmuludq mm0, mm2");
-    test_display(&[0x0f, 0xf5, 0xc2], "pmaddwd mm0, mm2");
-    test_display(&[0x0f, 0xf6, 0xc2], "psadbw mm0, mm2");
-    test_display(&[0x0f, 0xf8, 0xc2], "psubb mm0, mm2");
-    test_display(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2");
-    test_display(&[0x0f, 0xfa, 0xc2], "psubd mm0, mm2");
-    test_display(&[0x0f, 0xfb, 0xc2], "psubq mm0, mm2");
-    test_display(&[0x0f, 0xfc, 0xc2], "paddb mm0, mm2");
-    test_display(&[0x0f, 0xfc, 0x02], "paddb mm0, qword [edx]");
-    test_display(&[0x0f, 0xfd, 0xc2], "paddw mm0, mm2");
-    test_display(&[0x0f, 0xfe, 0xc2], "paddd mm0, mm2");
-
-    test_display(&[0x0f, 0xf1, 0x02], "psllw mm0, qword [edx]");
-    test_display(&[0x0f, 0xf2, 0x02], "pslld mm0, qword [edx]");
-    test_display(&[0x0f, 0xf3, 0x02], "psllq mm0, qword [edx]");
-    test_display(&[0x0f, 0xf4, 0x02], "pmuludq mm0, qword [edx]");
-    test_display(&[0x0f, 0xf5, 0x02], "pmaddwd mm0, qword [edx]");
-    test_display(&[0x0f, 0xf6, 0x02], "psadbw mm0, qword [edx]");
-    test_display(&[0x0f, 0xf8, 0x02], "psubb mm0, qword [edx]");
-    test_display(&[0x0f, 0xf9, 0x02], "psubw mm0, qword [edx]");
-    test_display(&[0x0f, 0xfa, 0x02], "psubd mm0, qword [edx]");
-    test_display(&[0x0f, 0xfb, 0x02], "psubq mm0, qword [edx]");
-    test_display(&[0x0f, 0xfc, 0x02], "paddb mm0, qword [edx]");
-    test_display(&[0x0f, 0xfd, 0x02], "paddw mm0, qword [edx]");
-    test_display(&[0x0f, 0xfe, 0x02], "paddd mm0, qword [edx]");
-}
-
-#[test]
-fn test_cvt() {
-    test_display(&[0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm7");
-    test_display(&[0x0f, 0x2a, 0xcf], "cvtpi2ps xmm1, mm7");
-    test_display(&[0x0f, 0x2a, 0x00], "cvtpi2ps xmm0, qword [eax]");
-    test_display(&[0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [eax]");
-    test_display(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7");
-    test_display(&[0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, dword [eax]");
-    test_display(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi");
-    test_display(&[0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, dword [eax]");
-    test_display(&[0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi");
-}
-
-#[test]
-fn test_aesni() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_aesni(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    test_instr(&[0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [edi]");
-    test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [bx]");
-
-    test_instr(&[0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [edi]");
-    test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [bx]");
-
-    test_instr(&[0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [edi]");
-    test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [bx]");
-
-    test_instr(&[0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [edi]");
-    test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [bx]");
-
-    test_instr(&[0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [edi]");
-    test_instr(&[0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [bx]");
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0xdf, 0x0f, 0xaa], "aeskeygenassist xmm1, xmmword [edi], 0xaa");
-}
-
-#[test]
-fn test_sse2() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        // sse and sse2 are part of amd64, so x86_64, meaning even the minimal decoder must support
-        // them.
-        test_display_under(&InstDecoder::minimal(), bytes, text);
-    }
-
-    test_instr(&[0xf2, 0x0f, 0x10, 0x0c, 0xc7], "movsd xmm1, qword [edi + eax * 8]");
-    test_instr(&[0xf2, 0x0f, 0x11, 0x0c, 0xc7], "movsd qword [edi + eax * 8], xmm1");
-    test_instr(&[0x66, 0x0f, 0x11, 0x0c, 0xc7], "movupd xmmword [edi + eax * 8], xmm1");
-    test_instr(&[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, qword [ebx]"); // reg-mem is movlpd
-    test_instr(&[0x66, 0x0f, 0x13, 0x03], "movlpd qword [ebx], xmm0");
-    test_invalid(&[0x66, 0x0f, 0x13, 0xc3]);
-    test_instr(&[0x66, 0x0f, 0x14, 0x03], "unpcklpd xmm0, xmmword [ebx]");
-    test_instr(&[0x66, 0x0f, 0x14, 0xc3], "unpcklpd xmm0, xmm3");
-    test_instr(&[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, xmmword [ebx]");
-    test_instr(&[0x66, 0x0f, 0x15, 0xc3], "unpckhpd xmm0, xmm3");
-    test_instr(&[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, qword [ebx]");
-    test_invalid(&[0x66, 0x0f, 0x16, 0xc3]);
-    test_instr(&[0x66, 0x0f, 0x17, 0x03], "movhpd qword [ebx], xmm0");
-    test_invalid(&[0x66, 0x0f, 0x17, 0xc3]);
-
-    test_instr(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0");
-    test_instr(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]");
-
-    test_instr(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7");
-    test_instr(&[0x66, 0x0f, 0x2a, 0x0f], "cvtpi2pd xmm1, qword [edi]");
-    test_instr(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi");
-    test_instr(&[0xf2, 0x0f, 0x2a, 0x0f], "cvtsi2sd xmm1, dword [edi]");
-    test_instr(&[0x66, 0x0f, 0x2b, 0x0f], "movntpd xmmword [edi], xmm1");
-    test_instr(&[0x66, 0x0f, 0x2c, 0xcf], "cvttpd2pi mm1, xmm7");
-    test_instr(&[0x66, 0x0f, 0x2c, 0x0f], "cvttpd2pi mm1, xmmword [edi]");
-    test_instr(&[0xf2, 0x0f, 0x2c, 0xcf], "cvttsd2si ecx, xmm7");
-    test_instr(&[0xf2, 0x0f, 0x2c, 0x0f], "cvttsd2si ecx, qword [edi]");
-    test_instr(&[0x66, 0x0f, 0x2d, 0xcf], "cvtpd2pi mm1, xmm7");
-    test_instr(&[0x66, 0x0f, 0x2d, 0x0f], "cvtpd2pi mm1, xmmword [edi]");
-    test_instr(&[0xf2, 0x0f, 0x2d, 0xcf], "cvtsd2si ecx, xmm7");
-    test_instr(&[0xf2, 0x0f, 0x2d, 0x0f], "cvtsd2si ecx, qword [edi]");
-    test_instr(&[0x66, 0x0f, 0x2e, 0xcf], "ucomisd xmm1, xmm7");
-    test_instr(&[0x66, 0x0f, 0x2e, 0x0f], "ucomisd xmm1, qword [edi]");
-    test_instr(&[0x66, 0x0f, 0x2f, 0xcf], "comisd xmm1, xmm7");
-    test_instr(&[0x66, 0x0f, 0x2f, 0x0f], "comisd xmm1, qword [edi]");
-
-    /*
-     * .... 660f38
-     * .... 660f7f
-     */
-
-    test_invalid(&[0x66, 0x0f, 0x50, 0x01]);
-    test_instr(&[0x66, 0x0f, 0x50, 0xc1], "movmskpd eax, xmm1");
-    test_instr(&[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, qword [ecx]");
-    test_invalid(&[0x66, 0x0f, 0x52, 0x01]);
-    test_invalid(&[0x66, 0x0f, 0x53, 0x01]);
-    test_instr(&[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x57, 0x01], "xorpd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x58, 0x01], "addpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x58, 0x01], "addsd xmm0, qword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x59, 0x01], "mulpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x59, 0x01], "mulsd xmm0, qword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x5a, 0x01], "cvtpd2ps xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x5a, 0x01], "cvtsd2ss xmm0, qword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x5b, 0x01], "cvtps2dq xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x5c, 0x01], "subpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x5c, 0x01], "subsd xmm0, qword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x5d, 0x01], "minpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x5d, 0x01], "minsd xmm0, qword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x5e, 0x01], "divpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x5e, 0x01], "divsd xmm0, qword [ecx]");
-    test_instr(&[0x66, 0x0f, 0x5f, 0x01], "maxpd xmm0, xmmword [ecx]");
-    test_instr(&[0xf2, 0x0f, 0x5f, 0x01], "maxsd xmm0, qword [ecx]");
-    test_instr(
-        &[0x66, 0x0f, 0x60, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpcklbw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x61, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpcklwd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x62, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpckldq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x63, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "packsswb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x64, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "pcmpgtb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x65, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "pcmpgtw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x66, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "pcmpgtd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x67, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "packuswb xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x68, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpckhbw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x69, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpckhwd xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x6a, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpckhdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x6b, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "packssdw xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x6c, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpcklqdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x6d, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "punpckhqdq xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x6e, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "movd xmm3, dword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_instr(
-        &[0x66, 0x0f, 0x6f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "movdqa xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-
-    test_instr(&[0x66, 0x0f, 0x6e, 0xc0], "movd xmm0, eax");
-    test_instr(&[0x66, 0x0f, 0x70, 0xc0, 0x4e], "pshufd xmm0, xmm0, 0x4e");
-    test_instr(&[0xf2, 0x0f, 0x70, 0xc0, 0x4e], "pshuflw xmm0, xmm0, 0x4e");
-    test_instr(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e");
-    test_invalid(&[0x66, 0x0f, 0x71, 0x10, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x71, 0xd0, 0x8f], "psrlw xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x71, 0x20, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x71, 0xe0, 0x8f], "psraw xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x71, 0x30, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x71, 0xf0, 0x8f], "psllw xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x72, 0x10, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x72, 0xd0, 0x8f], "psrld xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x72, 0x20, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x72, 0xe0, 0x8f], "psrad xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x72, 0x30, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x72, 0xf0, 0x8f], "pslld xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x73, 0x10, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x73, 0x18, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x73, 0xd0, 0x8f], "psrlq xmm0, 0x8f");
-    test_instr(&[0x66, 0x0f, 0x73, 0xd8, 0x8f], "psrldq xmm0, 0x8f");
-    test_invalid(&[0x66, 0x0f, 0x73, 0x30, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x73, 0x38, 0x8f]);
-    test_instr(&[0x66, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm0, 0x8f");
-    test_instr(&[0x66, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm0, 0x8f");
-    test_instr(&[0x66, 0x0f, 0x7e, 0xc1], "movd ecx, xmm0");
-    test_instr(&[0x66, 0x0f, 0x7e, 0x01], "movd dword [ecx], xmm0");
-    test_instr(
-        &[0x66, 0x0f, 0x7f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "movdqa xmmword [esp + ebx * 4 - 0x334455cc], xmm3"
-    );
-
-    test_instr(&[0x66, 0x0f, 0xc2, 0xc3, 0x08], "cmppd xmm0, xmm3, 0x8");
-    test_instr(&[0x66, 0x0f, 0xc2, 0x03, 0x08], "cmppd xmm0, xmmword [ebx], 0x8");
-    test_instr(&[0xf2, 0x0f, 0xc2, 0xc3, 0x08], "cmpsd xmm0, xmm3, 0x8");
-    test_instr(&[0xf2, 0x0f, 0xc2, 0x03, 0x08], "cmpsd xmm0, qword [ebx], 0x8");
-
-    test_instr(&[0x66, 0x0f, 0xc4, 0xc3, 0x08], "pinsrw xmm0, ebx, 0x8");
-    test_instr(&[0x66, 0x0f, 0xc4, 0x03, 0x08], "pinsrw xmm0, word [ebx], 0x8");
-
-//    test_instr(&[0x66, 0x0f, 0xc5, 0xc3, 0x08], "pextrw eax, xmm3, 0x8");
-//    test_instr_invalid(&[0x66, 0x0f, 0xc5, 0x03, 0x08]);
-//    test_instr_invalid(&[0x66, 0x0f, 0xc5, 0x40, 0x08]);
-//    test_instr_invalid(&[0x66, 0x0f, 0xc5, 0x80, 0x08]);
-
-    test_instr(&[0x66, 0x0f, 0xc6, 0x03, 0x08], "shufpd xmm0, xmmword [ebx], 0x8");
-    test_instr(&[0x66, 0x0f, 0xc6, 0xc3, 0x08], "shufpd xmm0, xmm3, 0x8");
-    test_instr(&[0x66, 0x0f, 0xd1, 0xc1], "psrlw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd1, 0x01], "psrlw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xd2, 0xc1], "psrld xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd2, 0x01], "psrld xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xd3, 0xc1], "psrlq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd3, 0x01], "psrlq xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xd4, 0xc1], "paddq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd4, 0x01], "paddq xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xd5, 0xc1], "pmullw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd5, 0x01], "pmullw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xd6, 0xc1], "movq xmm1, xmm0");
-    test_instr(&[0x66, 0x0f, 0xd6, 0x01], "movq qword [ecx], xmm0");
-    test_invalid(&[0xf3, 0x0f, 0xd6, 0x03]);
-    test_instr(&[0xf3, 0x0f, 0xd6, 0xc3], "movq2dq xmm0, mm3");
-    test_instr(&[0xf2, 0x0f, 0xd6, 0xc3], "movdq2q mm0, xmm3");
-    test_instr(&[0x66, 0x0f, 0xd7, 0xc1], "pmovmskb eax, xmm1");
-    test_invalid(&[0x66, 0x0f, 0xd7, 0x01]);
-    test_instr(&[0x66, 0x0f, 0xd8, 0xc1], "psubusb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd8, 0x01], "psubusb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xd9, 0xc1], "psubusw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xd9, 0x01], "psubusw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xda, 0xc1], "pminub xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xda, 0x01], "pminub xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xdb, 0xc1], "pand xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xdb, 0x01], "pand xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xdc, 0xc1], "paddusb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xdc, 0x01], "paddusb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xdd, 0xc1], "paddusw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xdd, 0x01], "paddusw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xde, 0xc1], "pmaxub xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xde, 0x01], "pmaxub xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xdf, 0xc1], "pandn xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xdf, 0x01], "pandn xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe0, 0xc1], "pavgb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe0, 0x01], "pavgb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe1, 0xc1], "psraw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe1, 0x01], "psraw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe2, 0xc1], "psrad xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe2, 0x01], "psrad xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe3, 0xc1], "pavgw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe3, 0x01], "pavgw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe4, 0xc1], "pmulhuw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe4, 0x01], "pmulhuw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe5, 0xc1], "pmulhw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe5, 0x01], "pmulhw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe6, 0xc1], "cvttpd2dq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe6, 0x01], "cvttpd2dq xmm0, xmmword [ecx]");
-    test_invalid(&[0x66, 0x0f, 0xe7, 0xc1]);
-    test_instr(&[0x66, 0x0f, 0xe7, 0x01], "movntdq xmmword [ecx], xmm0");
-    test_instr(&[0x66, 0x0f, 0xe8, 0xc1], "psubsb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe8, 0x01], "psubsb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xe9, 0xc1], "psubsw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xe9, 0x01], "psubsw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xea, 0xc1], "pminsw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xea, 0x01], "pminsw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xeb, 0xc3], "por xmm0, xmm3");
-    test_instr(&[0x66, 0x0f, 0xeb, 0xc4], "por xmm0, xmm4");
-    test_instr(&[0x66, 0x0f, 0xeb, 0xd3], "por xmm2, xmm3");
-    test_instr(&[0x66, 0x0f, 0xeb, 0x12], "por xmm2, xmmword [edx]");
-    test_instr(&[0x66, 0x0f, 0xeb, 0xc1], "por xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xeb, 0x01], "por xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xec, 0xc1], "paddsb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xec, 0x01], "paddsb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xed, 0xc1], "paddsw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xed, 0x01], "paddsw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xee, 0xc1], "pmaxsw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xee, 0x01], "pmaxsw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xef, 0xc1], "pxor xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xef, 0x01], "pxor xmm0, xmmword [ecx]");
-    test_invalid(&[0x66, 0x0f, 0xf0, 0xc1]);
-    test_invalid(&[0x66, 0x0f, 0xf0, 0x01]);
-    test_instr(&[0x66, 0x0f, 0xf1, 0xc1], "psllw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf1, 0x01], "psllw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf2, 0xc1], "pslld xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf2, 0x01], "pslld xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf3, 0xc1], "psllq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf3, 0x01], "psllq xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf4, 0xc1], "pmuludq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf4, 0x01], "pmuludq xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf5, 0xc1], "pmaddwd xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf5, 0x01], "pmaddwd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf6, 0xc1], "psadbw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf6, 0x01], "psadbw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf7, 0xc1], "maskmovdqu xmm0, xmm1");
-    test_invalid(&[0x66, 0x0f, 0xf7, 0x01]);
-    test_instr(&[0x66, 0x0f, 0xf8, 0xc1], "psubb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf8, 0x01], "psubb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xf9, 0xc1], "psubw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xf9, 0x01], "psubw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xfa, 0xc1], "psubd xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xfa, 0x01], "psubd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xfb, 0xc1], "psubq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xfb, 0x01], "psubq xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xfc, 0xc1], "paddb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xfc, 0x01], "paddb xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xfd, 0xc1], "paddw xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xfe, 0xc1], "paddd xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, xmmword [ecx]");
-    test_instr(&[0x66, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
-    test_instr(&[0xf2, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
-    test_instr(&[0xf3, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
-    test_instr(&[0x66, 0x0f, 0xff, 0x01], "ud0 eax, dword [ecx]");
-
-    test_instr(&[0x66, 0x0f, 0x74, 0xc1], "pcmpeqb xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, xmmword [edx]");
-    test_instr(&[0x66, 0x0f, 0xf8, 0xc8], "psubb xmm1, xmm0");
-    test_instr(&[0x66, 0x0f, 0xf8, 0xd0], "psubb xmm2, xmm0");
-    test_instr(&[0x66, 0x0f, 0xf8, 0x12], "psubb xmm2, xmmword [edx]");
-}
-
-#[test]
-fn test_sse3() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_sse3(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-        // avx doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
-        // sse4 doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_sse4_1(), bytes);
-        test_invalid_under(&InstDecoder::minimal().with_sse4_2(), bytes);
-    }
-
-    fn test_instr_invalid(bytes: &[u8]) {
-        test_invalid_under(&InstDecoder::minimal().with_sse3(), bytes);
-        test_invalid_under(&InstDecoder::default(), bytes);
-    }
-    test_instr(&[0xf2, 0x0f, 0xf0, 0x0f], "lddqu xmm1, xmmword [edi]");
-    test_instr_invalid(&[0xf2, 0x0f, 0xf0, 0xcf]);
-    test_instr(&[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, xmmword [edi]");
-    test_instr(&[0xf2, 0x0f, 0xd0, 0xcf], "addsubps xmm1, xmm7");
-    test_invalid(&[0xf3, 0x0f, 0xd0, 0x0f]);
-    test_instr(&[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, xmmword [edi]");
-    test_instr(&[0x66, 0x0f, 0xd0, 0xcf], "addsubpd xmm1, xmm7");
-
-    test_instr(&[0xf2, 0x0f, 0x7c, 0x0f], "haddps xmm1, xmmword [edi]");
-    test_instr(&[0xf2, 0x0f, 0x7c, 0xcf], "haddps xmm1, xmm7");
-    test_instr(&[0x66, 0x0f, 0x7c, 0x0f], "haddpd xmm1, xmmword [edi]");
-    test_instr(&[0x66, 0x0f, 0x7c, 0xcf], "haddpd xmm1, xmm7");
-
-    test_instr(&[0xf2, 0x0f, 0x7d, 0x0f], "hsubps xmm1, xmmword [edi]");
-    test_instr(&[0xf2, 0x0f, 0x7d, 0xcf], "hsubps xmm1, xmm7");
-    test_instr(&[0x66, 0x0f, 0x7d, 0x0f], "hsubpd xmm1, xmmword [edi]");
-    test_instr(&[0x66, 0x0f, 0x7d, 0xcf], "hsubpd xmm1, xmm7");
-
-    test_instr(&[0xf3, 0x0f, 0x12, 0x0f], "movsldup xmm1, xmmword [edi]");
-    test_instr(&[0xf3, 0x0f, 0x12, 0xcf], "movsldup xmm1, xmm7");
-    test_instr(&[0xf3, 0x0f, 0x16, 0x0f], "movshdup xmm1, xmmword [edi]");
-    test_instr(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7");
-
-    test_instr(&[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, qword [edi]");
-    test_instr(&[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7");
-
-    test_instr(&[0x0f, 0x01, 0xc8], "monitor");
-    test_invalid(&[0x66, 0x0f, 0x01, 0xc8]);
-    test_invalid(&[0xf3, 0x0f, 0x01, 0xc8]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xc8]);
-
-    test_instr(&[0x0f, 0x01, 0xc9], "mwait");
-    test_invalid(&[0x66, 0x0f, 0x01, 0xc9]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xc9]);
-    test_invalid(&[0xf3, 0x0f, 0x01, 0xc9]);
-}
-
-#[test]
-fn test_sse4_2() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_sse4_2(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-        // avx doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
-    }
-
-    #[allow(unused)]
-    fn test_instr_invalid(bytes: &[u8]) {
-        test_invalid_under(&InstDecoder::minimal().with_sse4_2(), bytes);
-        test_invalid_under(&InstDecoder::default(), bytes);
-    }
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x37, 0x03], "pcmpgtq xmm0, xmmword [ebx]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x37, 0xc3], "pcmpgtq xmm0, xmm3");
-
-    test_instr(&[0xf2, 0x0f, 0x38, 0xf0, 0x06], "crc32 eax, byte [esi]");
-    test_instr(&[0xf2, 0x0f, 0x38, 0xf0, 0xc6], "crc32 eax, dh");
-    test_instr(&[0xf2, 0x0f, 0x38, 0xf1, 0x06], "crc32 eax, dword [esi]");
-    test_instr(&[0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, esi");
-    test_instr(&[0x66, 0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, si");
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x60, 0xc6, 0x54], "pcmpestrm xmm0, xmm6, 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x60, 0x06, 0x54], "pcmpestrm xmm0, xmmword [esi], 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x61, 0xc6, 0x54], "pcmpestri xmm0, xmm6, 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x61, 0x06, 0x54], "pcmpestri xmm0, xmmword [esi], 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x62, 0xc6, 0x54], "pcmpistrm xmm0, xmm6, 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x62, 0x06, 0x54], "pcmpistrm xmm0, xmmword [esi], 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x63, 0xc6, 0x54], "pcmpistri xmm0, xmm6, 0x54");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x63, 0x06, 0x54], "pcmpistri xmm0, xmmword [esi], 0x54");
-}
-
-#[test]
-fn test_sse4_1() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_sse4_1(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-        // avx doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
-        // sse4_2 doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_sse4_2(), bytes);
-    }
-
-    #[allow(unused)]
-    fn test_instr_invalid(bytes: &[u8]) {
-        test_invalid_under(&InstDecoder::minimal().with_sse4_1(), bytes);
-        test_invalid_under(&InstDecoder::default(), bytes);
-    }
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, xmmword [ecx], 0x22");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0xc1, 0x22], "blendps xmm0, xmm1, 0x22");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, xmmword [ecx], 0x22");
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0xc1, 0x22], "blendpd xmm0, xmm1, 0x22");
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x10, 0x06], "pblendvb xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x10, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x14, 0x06], "blendvps xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x14, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x15, 0x06], "blendvpd xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x15, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x17, 0x06], "ptest xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x17, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x20, 0x06], "pmovsxbw xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x20, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x21, 0x06], "pmovsxbd xmm0, dword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x21, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x22, 0x06], "pmovsxbq xmm0, word [esi]");
-    test_invalid(&[0x0f, 0x38, 0x22, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x23, 0x06], "pmovsxwd xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x23, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x24, 0x06], "pmovsxwq xmm0, dword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x24, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x25, 0x06], "pmovsxdq xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x25, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x28, 0x06], "pmuldq xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x28, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x29, 0x06], "pcmpeqq xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x29, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x2a, 0x06], "movntdqa xmm0, xmmword [esi]");
-    test_invalid(&[0x66, 0x0f, 0x38, 0x2a, 0xc6]);
-    test_invalid(&[0x0f, 0x38, 0x2a, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x2b, 0x06], "packusdw xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x2b, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x30, 0x06], "pmovzxbw xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x30, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x31, 0x06], "pmovzxbd xmm0, dword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x31, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x32, 0x06], "pmovzxbq xmm0, word [esi]");
-    test_invalid(&[0x0f, 0x38, 0x32, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x33, 0x06], "pmovzxwd xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x33, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x34, 0x06], "pmovzxwq xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x34, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x35, 0x06], "pmovzxdq xmm0, qword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x35, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x38, 0x06], "pminsb xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x38, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x39, 0x06], "pminsd xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x39, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x3a, 0x06], "pminuw xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x3a, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x3b, 0x06], "pminud xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x3b, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x3c, 0x06], "pmaxsb xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x3c, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x3d, 0x06], "pmaxsd xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x3d, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x3e, 0x06], "pmaxuw xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x3e, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x3f, 0x06], "pmaxud xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x3f, 0x06]);
-
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x40, 0x06], "pmulld xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x40, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x41, 0x06], "phminposuw xmm0, xmmword [esi]");
-    test_invalid(&[0x0f, 0x38, 0x41, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x08, 0x06, 0x31], "roundps xmm0, xmmword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x08, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x09, 0x06, 0x31], "roundpd xmm0, xmmword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x09, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0a, 0x06, 0x31], "roundss xmm0, dword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x0a, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0b, 0x06, 0x31], "roundsd xmm0, qword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x0b, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0e, 0x06, 0x31], "pblendw xmm0, xmmword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x0e, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x14, 0x06, 0x31], "pextrb byte [esi], xmm0, 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x14, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x15, 0x06, 0x31], "pextrw word [esi], xmm0, 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x15, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x16, 0x06, 0x31], "pextrd dword [esi], xmm0, 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x16, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x17, 0x06, 0x31], "extractps dword [esi], xmm0, 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x17, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x20, 0x06, 0x31], "pinsrb xmm0, byte [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x20, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x21, 0x06, 0x31], "insertps xmm0, dword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x21, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x22, 0x06, 0x31], "pinsrd xmm0, dword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x22, 0x06]);
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x40, 0x06, 0x31], "dpps xmm0, xmmword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x40, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x41, 0x06, 0x31], "dppd xmm0, xmmword [esi], 0x31");
-    test_invalid(&[0x0f, 0x3a, 0x41, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x3a, 0x42, 0x06, 0x44], "mpsadbw xmm0, xmmword [esi], 0x44");
-    test_invalid(&[0x0f, 0x3a, 0x42, 0x06]);
-}
-
-#[test]
-fn test_ssse3() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_ssse3(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-        // avx doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
-        // sse4 doesn't imply older instructions are necessarily valid
-        test_invalid_under(&InstDecoder::minimal().with_sse4_1(), bytes);
-        test_invalid_under(&InstDecoder::minimal().with_sse4_2(), bytes);
-    }
-
-    #[allow(unused)]
-    fn test_instr_invalid(bytes: &[u8]) {
-        test_invalid_under(&InstDecoder::minimal().with_ssse3(), bytes);
-        test_invalid_under(&InstDecoder::default(), bytes);
-    }
-    test_instr(&[0x66, 0x0f, 0x38, 0x00, 0xda], "pshufb xmm3, xmm2");
-    test_instr(&[0x66, 0x0f, 0x38, 0x00, 0x06], "pshufb xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x00, 0x06], "pshufb mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x01, 0x06], "phaddw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x01, 0x06], "phaddw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x02, 0x06], "phaddd xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x02, 0x06], "phaddd mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x03, 0x06], "phaddsw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x03, 0x06], "phaddsw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x04, 0x06], "pmaddubsw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x04, 0x06], "pmaddubsw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x05, 0x06], "phsubw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x05, 0x06], "phsubw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x06, 0x06], "phsubd xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x06, 0x06], "phsubd mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x07, 0x06], "phsubsw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x07, 0x06], "phsubsw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x08, 0x06], "psignb xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x08, 0x06], "psignb mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x09, 0x06], "psignw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x09, 0x06], "psignw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x0a, 0x06], "psignd xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x0a, 0x06], "psignd mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x0b, 0x06], "pmulhrsw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x0b, 0x06], "pmulhrsw mm0, qword [esi]");
-
-    test_instr(&[0x66, 0x0f, 0x38, 0x1c, 0x06], "pabsb xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x1c, 0x06], "pabsb mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x1d, 0x06], "pabsw xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x1d, 0x06], "pabsw mm0, qword [esi]");
-    test_instr(&[0x66, 0x0f, 0x38, 0x1e, 0x06], "pabsd xmm0, xmmword [esi]");
-    test_instr(&[0x0f, 0x38, 0x1e, 0x06], "pabsd mm0, qword [esi]");
-
-    test_instr(&[0x66, 0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr xmm0, xmmword [esi], 0x30");
-    test_instr(&[0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr mm0, qword [esi], 0x30");
-}
-
-#[test]
-fn test_0f01() {
-    // drawn heavily from "Table A-6.  Opcode Extensions for One- and Two-byte Opcodes by Group
-    // Number"
-    test_display(&[0x0f, 0x01, 0x38], "invlpg byte [eax]");
-    test_display(&[0x0f, 0x01, 0x3f], "invlpg byte [edi]");
-    test_display(&[0x0f, 0x01, 0x40, 0xff], "sgdt far [eax - 0x1]");
-    test_display(&[0x0f, 0x01, 0x41, 0xff], "sgdt far [ecx - 0x1]");
-    test_display(&[0x0f, 0x01, 0x49, 0xff], "sidt far [ecx - 0x1]");
-    test_display(&[0x0f, 0x01, 0x51, 0xff], "lgdt far [ecx - 0x1]");
-    test_display(&[0x0f, 0x01, 0x59, 0xff], "lidt far [ecx - 0x1]");
-    test_display(&[0x0f, 0x01, 0x61, 0xff], "smsw word [ecx - 0x1]");
-    test_invalid(&[0x0f, 0x01, 0x69, 0xff]);
-    test_display(&[0x0f, 0x01, 0x71, 0xff], "lmsw word [ecx - 0x1]");
-    test_display(&[0x0f, 0x01, 0x79, 0xff], "invlpg byte [ecx - 0x1]");
-    test_display(&[0x0f, 0x01, 0xc0], "enclv");
-    test_display(&[0x0f, 0x01, 0xc1], "vmcall");
-    test_display(&[0x0f, 0x01, 0xc2], "vmlaunch");
-    test_display(&[0x0f, 0x01, 0xc3], "vmresume");
-    test_display(&[0x0f, 0x01, 0xc4], "vmxoff");
-    test_display(&[0x0f, 0x01, 0xc5], "pconfig");
-    test_invalid(&[0x0f, 0x01, 0xc6]);
-    test_invalid(&[0x0f, 0x01, 0xc7]);
-    test_display(&[0x0f, 0x01, 0xc8], "monitor");
-    test_display(&[0x0f, 0x01, 0xc9], "mwait");
-    test_display(&[0x0f, 0x01, 0xca], "clac");
-    test_display(&[0x0f, 0x01, 0xcb], "stac");
-    test_invalid(&[0x0f, 0x01, 0xcc]);
-    test_invalid(&[0x0f, 0x01, 0xcd]);
-    test_invalid(&[0x0f, 0x01, 0xce]);
-    test_display(&[0x0f, 0x01, 0xcf], "encls");
-    test_display(&[0x0f, 0x01, 0xd0], "xgetbv");
-    test_display(&[0x0f, 0x01, 0xd1], "xsetbv");
-    test_invalid(&[0x0f, 0x01, 0xd2]);
-    test_invalid(&[0x0f, 0x01, 0xd3]);
-    test_display(&[0x0f, 0x01, 0xd4], "vmfunc");
-    test_display(&[0x0f, 0x01, 0xd5], "xend");
-    test_display(&[0x0f, 0x01, 0xd6], "xtest");
-    test_display(&[0x0f, 0x01, 0xd7], "enclu");
-    test_display(&[0x0f, 0x01, 0xd8], "vmrun eax");
-    test_display(&[0x0f, 0x01, 0xd9], "vmmcall");
-    test_display(&[0x0f, 0x01, 0xda], "vmload eax");
-    test_display(&[0x0f, 0x01, 0xdb], "vmsave eax");
-    test_display(&[0x0f, 0x01, 0xdc], "stgi");
-    test_display(&[0x0f, 0x01, 0xdd], "clgi");
-    test_display(&[0x0f, 0x01, 0xde], "skinit eax");
-    test_display(&[0x0f, 0x01, 0xdf], "invlpga eax, ecx");
-// TODO: not clear what SHOULD be reported for invlpgb. certainly not a `rax` operand. xed claims
-// that this is UD in protected mode. the AMD manual explicitly says this does not #UD in protected
-// mode. same for tlbsync.
-//    test_display(&[0x0f, 0x01, 0xfe], "invlpgb rax, edx, ecx");
-//    test_display(&[0x0f, 0x01, 0xff], "tlbsync");
-//    test_display(&[0x2e, 0x67, 0x65, 0x2e, 0x46, 0x0f, 0x01, 0xff], "tlbsync");
-    test_display(&[0x0f, 0x01, 0xe0], "smsw eax");
-    test_display(&[0x0f, 0x01, 0xe1], "smsw ecx");
-    test_display(&[0x0f, 0x01, 0xe2], "smsw edx");
-    test_display(&[0x0f, 0x01, 0xe3], "smsw ebx");
-    test_display(&[0x0f, 0x01, 0xe4], "smsw esp");
-    test_display(&[0x0f, 0x01, 0xe5], "smsw ebp");
-    test_display(&[0x0f, 0x01, 0xe6], "smsw esi");
-    test_display(&[0x0f, 0x01, 0xe7], "smsw edi");
-    test_invalid(&[0x0f, 0x01, 0xe8]);
-    test_invalid(&[0x0f, 0x01, 0xe8]);
-    test_invalid(&[0x0f, 0x01, 0xe9]);
-    test_invalid(&[0x0f, 0x01, 0xea]);
-    test_invalid(&[0x0f, 0x01, 0xeb]);
-    test_display(&[0x0f, 0x01, 0xee], "rdpkru");
-    test_display(&[0x0f, 0x01, 0xef], "wrpkru");
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xee]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xef]);
-    test_display(&[0x0f, 0x01, 0xf0], "lmsw ax");
-    test_display(&[0x0f, 0x01, 0xf1], "lmsw cx");
-    test_display(&[0x0f, 0x01, 0xf2], "lmsw dx");
-    test_display(&[0x0f, 0x01, 0xf3], "lmsw bx");
-    test_display(&[0x0f, 0x01, 0xf4], "lmsw sp");
-    test_display(&[0x0f, 0x01, 0xf5], "lmsw bp");
-    test_display(&[0x0f, 0x01, 0xf6], "lmsw si");
-    test_display(&[0x0f, 0x01, 0xf7], "lmsw di");
-    test_invalid(&[0x0f, 0x01, 0xf8]);
-    test_display(&[0x0f, 0x01, 0xf9], "rdtscp");
-    test_display(&[0x0f, 0x01, 0xfa], "monitorx");
-    test_display(&[0x0f, 0x01, 0xfb], "mwaitx");
-    test_display(&[0x0f, 0x01, 0xfc], "clzero");
-    test_display(&[0x0f, 0x01, 0xfd], "rdpru ecx");
-}
-
-#[test]
-fn test_0fae() {
-    let intel = InstDecoder::minimal().with_intel_quirks();
-    let amd = InstDecoder::minimal().with_amd_quirks();
-    let default = InstDecoder::default();
-    let minimal = InstDecoder::minimal();
-    // drawn heavily from "Table A-6.  Opcode Extensions for One- and Two-byte Opcodes by Group
-    // Number"
-    test_invalid(&[0xf3, 0x0f, 0xae, 0x87]);
-    test_invalid(&[0xf3, 0x0f, 0xae, 0x04, 0x4f]);
-    test_display(&[0x0f, 0xae, 0x04, 0x4f], "fxsave ptr [edi + ecx * 2]");
-    test_display(&[0x0f, 0xae, 0x0c, 0x4f], "fxrstor ptr [edi + ecx * 2]");
-    test_display(&[0x0f, 0xae, 0x14, 0x4f], "ldmxcsr dword [edi + ecx * 2]");
-    test_display(&[0x0f, 0xae, 0x1c, 0x4f], "stmxcsr dword [edi + ecx * 2]");
-    test_display(&[0x0f, 0xae, 0x24, 0x4f], "xsave ptr [edi + ecx * 2]");
-    test_display(&[0x0f, 0xc7, 0x5c, 0x24, 0x40], "xrstors ptr [esp + 0x40]");
-    test_display(&[0x0f, 0xc7, 0x64, 0x24, 0x40], "xsavec ptr [esp + 0x40]");
-    test_display(&[0x0f, 0xc7, 0x6c, 0x24, 0x40], "xsaves ptr [esp + 0x40]");
-    test_display(&[0x0f, 0xc7, 0x74, 0x24, 0x40], "vmptrld qword [esp + 0x40]");
-    test_display(&[0x0f, 0xc7, 0x7c, 0x24, 0x40], "vmptrst qword [esp + 0x40]");
-    test_display(&[0x0f, 0xae, 0x2c, 0x4f], "xrstor ptr [edi + ecx * 2]");
-    test_display(&[0x0f, 0xae, 0x34, 0x4f], "xsaveopt ptr [edi + ecx * 2]");
-    test_display(&[0x0f, 0xae, 0x3c, 0x4f], "clflush zmmword [edi + ecx * 2]");
-
-    for (modrm, text) in &[(0xe8u8, "lfence"), (0xf0u8, "mfence"), (0xf8u8, "sfence")] {
-        test_display_under(&intel, &[0x0f, 0xae, *modrm], text);
-        test_display_under(&amd, &[0x0f, 0xae, *modrm], text);
-        test_display_under(&default, &[0x0f, 0xae, *modrm], text);
-        test_display_under(&minimal, &[0x0f, 0xae, *modrm], text);
+mod _0fae {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // drawn heavily from "Table A-6.  Opcode Extensions for One- and Two-byte Opcodes by Group
+        // Number"
+        testcase!(invalid: &[0xf3, 0x0f, 0xae, 0x87]),
+        testcase!(invalid: &[0xf3, 0x0f, 0xae, 0x04, 0x4f]),
+        testcase!(&[0x0f, 0xae, 0x04, 0x4f], "fxsave ptr [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xae, 0x0c, 0x4f], "fxrstor ptr [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xae, 0x14, 0x4f], "ldmxcsr dword [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xae, 0x1c, 0x4f], "stmxcsr dword [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xae, 0x24, 0x4f], "xsave ptr [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xc7, 0x5c, 0x24, 0x40], "xrstors ptr [esp + 0x40]"),
+        testcase!(&[0x0f, 0xc7, 0x64, 0x24, 0x40], "xsavec ptr [esp + 0x40]"),
+        testcase!(&[0x0f, 0xc7, 0x6c, 0x24, 0x40], "xsaves ptr [esp + 0x40]"),
+        testcase!(&[0x0f, 0xc7, 0x74, 0x24, 0x40], "vmptrld qword [esp + 0x40]"),
+        testcase!(&[0x0f, 0xc7, 0x7c, 0x24, 0x40], "vmptrst qword [esp + 0x40]"),
+        testcase!(&[0x0f, 0xae, 0x2c, 0x4f], "xrstor ptr [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xae, 0x34, 0x4f], "xsaveopt ptr [edi + ecx * 2]"),
+        testcase!(&[0x0f, 0xae, 0x3c, 0x4f], "clflush zmmword [edi + ecx * 2]"),
+
+        testcase!(features nodefault { Intel: true, Amd: true, Minimal: true, Default: true } &[0x0f, 0xae, 0xe8], "lfence"),
         // it turns out intel and amd accept m != 0 for {l,m,s}fence:
         // from intel:
         // ```
@@ -931,2349 +1790,2727 @@ fn test_0fae() {
         // ```
         // whereas amd does not discuss the r/m field at all. at least as of zen, amd also accepts
         // these encodings.
-        for m in 1u8..8u8 {
-            test_display_under(&intel, &[0x0f, 0xae, modrm | m], text);
-            test_display_under(&amd, &[0x0f, 0xae, modrm | m], text);
-            test_display_under(&default, &[0x0f, 0xae, modrm | m], text);
-            test_invalid_under(&minimal, &[0x0f, 0xae, modrm | m]);
-        }
+        //
+        // similar for mfence and sfence, below.
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 1], "lfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 2], "lfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 3], "lfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 4], "lfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 5], "lfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 6], "lfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xe8 | 7], "lfence"),
+
+        testcase!(features nodefault { Intel: true, Amd: true, Minimal: true, Default: true } &[0x0f, 0xae, 0xf0], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 1], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 2], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 3], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 4], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 5], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 6], "mfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf0 | 7], "mfence"),
+
+        testcase!(features nodefault { Intel: true, Amd: true, Minimal: true, Default: true } &[0x0f, 0xae, 0xf8], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 1], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 2], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 3], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 4], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 5], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 6], "sfence"),
+        testcase!(features { Intel: true, Amd: true } &[0x0f, 0xae, 0xf8 | 7], "sfence"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod system {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x63, 0xc1], "arpl cx, ax"),
+        testcase!(&[0x63, 0x04, 0xba], "arpl word [edx + edi * 4], ax"),
+        testcase!(&[0x66, 0x0f, 0xb2, 0x00], "lss ax, word [eax]"),
+        testcase!(&[0x67, 0x0f, 0xb2, 0x00], "lss eax, far [bx + si * 1]"),
+        testcase!(&[0x0f, 0xb2, 0x00], "lss eax, far [eax]"),
+        testcase!(&[0x66, 0x0f, 0xb2, 0x00], "lss ax, word [eax]"),
+        testcase!(invalid: &[0x0f, 0x22, 0xc8]),
+        testcase!(invalid: &[0x0f, 0x20, 0xc8]),
+        testcase!(&[0x0f, 0x22, 0xd0], "mov cr2, eax"),
+        testcase!(invalid: &[0x0f, 0x22, 0xcf]),
+        testcase!(&[0x0f, 0x22, 0xd7], "mov cr2, edi"),
+        testcase!(&[0x0f, 0x20, 0xd0], "mov eax, cr2"),
+
+        testcase!(&[0x0f, 0x23, 0xc8], "mov dr1, eax"),
+        testcase!(&[0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0x0f, 0x06], "clts"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod arithmetic {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x81, 0xec, 0x10, 0x03, 0x00, 0x00], "sub esp, 0x310"),
+        testcase!(&[0x0f, 0xaf, 0xc2], "imul eax, edx"),
+        testcase!(&[0x69, 0x43, 0x6f, 0x6d, 0x70, 0x6c, 0x65], "imul eax, dword [ebx + 0x6f], 0x656c706d"),
+        testcase!(&[0x66, 0x0f, 0xaf, 0xd1], "imul dx, cx"),
+        testcase!(&[0xf6, 0xe8], "imul al"),
+        testcase!(&[0xf6, 0x28], "imul byte [eax]"),
+        testcase!(&[0x6b, 0x43, 0x6f, 0x6d], "imul eax, dword [ebx + 0x6f], 0x6d"),
+        testcase!(&[0x00, 0xcc], "add ah, cl"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
     }
 }
 
-#[test]
-fn test_system() {
-    test_display(&[0x63, 0xc1], "arpl cx, ax");
-    test_display(&[0x63, 0x04, 0xba], "arpl word [edx + edi * 4], ax");
-    test_display(&[0x66, 0x0f, 0xb2, 0x00], "lss ax, word [eax]");
-    test_display(&[0x67, 0x0f, 0xb2, 0x00], "lss eax, far [bx + si * 1]");
-    test_display(&[0x0f, 0xb2, 0x00], "lss eax, far [eax]");
-    test_display(&[0x66, 0x0f, 0xb2, 0x00], "lss ax, word [eax]");
-    test_invalid(&[0x0f, 0x22, 0xc8]);
-    test_invalid(&[0x0f, 0x20, 0xc8]);
-    test_display(&[0x0f, 0x22, 0xd0], "mov cr2, eax");
-    test_invalid(&[0x0f, 0x22, 0xcf]);
-    test_display(&[0x0f, 0x22, 0xd7], "mov cr2, edi");
-    test_display(&[0x0f, 0x20, 0xd0], "mov eax, cr2");
-
-    test_display(&[0x0f, 0x23, 0xc8], "mov dr1, eax");
-    test_display(&[0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0x0f, 0x06], "clts");
-}
-
-#[test]
-fn test_arithmetic() {
-    test_display(&[0x81, 0xec, 0x10, 0x03, 0x00, 0x00], "sub esp, 0x310");
-    test_display(&[0x0f, 0xaf, 0xc2], "imul eax, edx");
-    test_display(&[0x69, 0x43, 0x6f, 0x6d, 0x70, 0x6c, 0x65], "imul eax, dword [ebx + 0x6f], 0x656c706d");
-    test_display(&[0x66, 0x0f, 0xaf, 0xd1], "imul dx, cx");
-    test_display(&[0xf6, 0xe8], "imul al");
-    test_display(&[0xf6, 0x28], "imul byte [eax]");
-    test_display(&[0x6b, 0x43, 0x6f, 0x6d], "imul eax, dword [ebx + 0x6f], 0x6d");
-    test_display(&[0x00, 0xcc], "add ah, cl");
-}
-
-#[test]
 #[allow(non_snake_case)]
-fn test_E_decode() {
-    test_display(&[0xff, 0x75, 0xb8], "push dword [ebp - 0x48]");
-    test_display(&[0xff, 0x75, 0x08], "push dword [ebp + 0x8]");
-}
-
-#[test]
-fn test_sse() {
-    test_display(&[0xf3, 0x0f, 0x10, 0x0c, 0xc7], "movss xmm1, dword [edi + eax * 8]");
-    test_display(&[0xf3, 0x0f, 0x11, 0x0c, 0xc7], "movss dword [edi + eax * 8], xmm1");
-    test_display(&[0x0f, 0x28, 0x00], "movaps xmm0, xmmword [eax]");
-    test_display(&[0x0f, 0x29, 0x00], "movaps xmmword [eax], xmm0");
-    test_display(&[0xf3, 0x0f, 0x2a, 0xc1], "cvtsi2ss xmm0, ecx");
-    test_display(&[0xf3, 0x0f, 0x2a, 0x01], "cvtsi2ss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x2b, 0x00], "movntps xmmword [eax], xmm0");
-    test_display(&[0xf3, 0x0f, 0x2c, 0xc1], "cvttss2si eax, xmm1");
-    test_display(&[0xf3, 0x0f, 0x2c, 0x01], "cvttss2si eax, dword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x2d, 0xc1], "cvtss2si eax, xmm1");
-    test_display(&[0xf3, 0x0f, 0x2d, 0x01], "cvtss2si eax, dword [ecx]");
-    test_display(&[0x0f, 0x2e, 0x00], "ucomiss xmm0, dword [eax]");
-    test_display(&[0x0f, 0x2f, 0x00], "comiss xmm0, dword [eax]");
-    test_display(&[0x0f, 0x28, 0xd0], "movaps xmm2, xmm0");
-    test_display(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0");
-    test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]");
-    test_display(&[0x67, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si * 1]");
-    test_display(&[0x66, 0x0f, 0x29, 0x00], "movapd xmmword [eax], xmm0");
-    test_invalid(&[0x0f, 0x50, 0x00]);
-    test_display(&[0x0f, 0x50, 0xc1], "movmskps eax, xmm1");
-    test_display(&[0x0f, 0x51, 0x01], "sqrtps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x51, 0x01], "sqrtss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x52, 0x01], "rsqrtps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x52, 0x01], "rsqrtss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x53, 0x01], "rcpps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x53, 0x01], "rcpss xmm0, dword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x53, 0xc1], "rcpss xmm0, xmm1");
-    test_display(&[0x0f, 0x54, 0x01], "andps xmm0, xmmword [ecx]");
-    test_display(&[0x0f, 0x55, 0x01], "andnps xmm0, xmmword [ecx]");
-    test_display(&[0x0f, 0x56, 0x01], "orps xmm0, xmmword [ecx]");
-    test_display(&[0x0f, 0x57, 0x01], "xorps xmm0, xmmword [ecx]");
-    test_display(&[0x0f, 0x58, 0x01], "addps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x58, 0x01], "addss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x59, 0x01], "mulps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x59, 0x01], "mulss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x5a, 0x01], "cvtps2pd xmm0, qword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x5a, 0x01], "cvtss2sd xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x5b, 0x01], "cvttps2dq xmm0, xmmword [ecx]");
-    test_display(&[0x67, 0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x5c, 0x01], "subps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x5c, 0x01], "subss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x5d, 0x01], "minps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x5d, 0x01], "minss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x5e, 0x01], "divps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x5e, 0x01], "divss xmm0, dword [ecx]");
-    test_display(&[0x0f, 0x5f, 0x01], "maxps xmm0, xmmword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x5f, 0x01], "maxss xmm0, dword [ecx]");
-
-    test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [eax], 0x7f");
-
-    test_display(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0");
-    test_display(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0");
-    test_display(&[0xf2, 0x0f, 0x10, 0x0c, 0xc6], "movsd xmm1, qword [esi + eax * 8]");
-    test_display(&[0xf3, 0x0f, 0x10, 0x04, 0x86], "movss xmm0, dword [esi + eax * 4]");
-    test_display(&[0xf2, 0x0f, 0x59, 0xc8], "mulsd xmm1, xmm0");
-    test_display(&[0xf3, 0x0f, 0x59, 0xc8], "mulss xmm1, xmm0");
-
-    test_display(
-        &[0xf3, 0x0f, 0x6f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "movdqu xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
-    );
-    test_display(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e");
-    test_display(&[0xf3, 0x0f, 0x7e, 0xc1], "movq xmm0, xmm1");
-    test_display(
-        &[0xf3, 0x0f, 0x7f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
-        "movdqu xmmword [esp + ebx * 4 - 0x334455cc], xmm3"
-    );
-
-    test_display(&[0xf3, 0x0f, 0xc2, 0xc3, 0x08], "cmpss xmm0, xmm3, 0x8");
-    test_display(&[0xf3, 0x0f, 0xc2, 0x03, 0x08], "cmpss xmm0, dword [ebx], 0x8");
+mod E_decode {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xff, 0x75, 0xb8], "push dword [ebp - 0x48]"),
+        testcase!(&[0xff, 0x75, 0x08], "push dword [ebp + 0x8]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sse {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x10, 0x0c, 0xc7], "movss xmm1, dword [edi + eax * 8]"),
+        testcase!(&[0xf3, 0x0f, 0x11, 0x0c, 0xc7], "movss dword [edi + eax * 8], xmm1"),
+        testcase!(&[0x0f, 0x28, 0x00], "movaps xmm0, xmmword [eax]"),
+        testcase!(&[0x0f, 0x29, 0x00], "movaps xmmword [eax], xmm0"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0xc1], "cvtsi2ss xmm0, ecx"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0x01], "cvtsi2ss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x2b, 0x00], "movntps xmmword [eax], xmm0"),
+        testcase!(&[0xf3, 0x0f, 0x2c, 0xc1], "cvttss2si eax, xmm1"),
+        testcase!(&[0xf3, 0x0f, 0x2c, 0x01], "cvttss2si eax, dword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x2d, 0xc1], "cvtss2si eax, xmm1"),
+        testcase!(&[0xf3, 0x0f, 0x2d, 0x01], "cvtss2si eax, dword [ecx]"),
+        testcase!(&[0x0f, 0x2e, 0x00], "ucomiss xmm0, dword [eax]"),
+        testcase!(&[0x0f, 0x2f, 0x00], "comiss xmm0, dword [eax]"),
+        testcase!(&[0x0f, 0x28, 0xd0], "movaps xmm2, xmm0"),
+        testcase!(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0"),
+        testcase!(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0x29, 0x00], "movapd xmmword [eax], xmm0"),
+        testcase!(invalid: &[0x0f, 0x50, 0x00]),
+        testcase!(&[0x0f, 0x50, 0xc1], "movmskps eax, xmm1"),
+        testcase!(&[0x0f, 0x51, 0x01], "sqrtps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x51, 0x01], "sqrtss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x52, 0x01], "rsqrtps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x52, 0x01], "rsqrtss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x53, 0x01], "rcpps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x53, 0x01], "rcpss xmm0, dword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x53, 0xc1], "rcpss xmm0, xmm1"),
+        testcase!(&[0x0f, 0x54, 0x01], "andps xmm0, xmmword [ecx]"),
+        testcase!(&[0x0f, 0x55, 0x01], "andnps xmm0, xmmword [ecx]"),
+        testcase!(&[0x0f, 0x56, 0x01], "orps xmm0, xmmword [ecx]"),
+        testcase!(&[0x0f, 0x57, 0x01], "xorps xmm0, xmmword [ecx]"),
+        testcase!(&[0x0f, 0x58, 0x01], "addps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x58, 0x01], "addss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x59, 0x01], "mulps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x59, 0x01], "mulss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x5a, 0x01], "cvtps2pd xmm0, qword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x5a, 0x01], "cvtss2sd xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x5b, 0x01], "cvttps2dq xmm0, xmmword [ecx]"),
+        testcase!(&[0x67, 0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5c, 0x01], "subps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x5c, 0x01], "subss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x5d, 0x01], "minps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x5d, 0x01], "minss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x5e, 0x01], "divps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x5e, 0x01], "divss xmm0, dword [ecx]"),
+        testcase!(&[0x0f, 0x5f, 0x01], "maxps xmm0, xmmword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x5f, 0x01], "maxss xmm0, dword [ecx]"),
+
+        testcase!(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [eax], 0x7f"),
+
+        testcase!(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0"),
+        testcase!(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0"),
+        testcase!(&[0xf2, 0x0f, 0x10, 0x0c, 0xc6], "movsd xmm1, qword [esi + eax * 8]"),
+        testcase!(&[0xf3, 0x0f, 0x10, 0x04, 0x86], "movss xmm0, dword [esi + eax * 4]"),
+        testcase!(&[0xf2, 0x0f, 0x59, 0xc8], "mulsd xmm1, xmm0"),
+        testcase!(&[0xf3, 0x0f, 0x59, 0xc8], "mulss xmm1, xmm0"),
+
+        testcase!(
+            &[0xf3, 0x0f, 0x6f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "movdqu xmm3, xmmword [esp + ebx * 4 - 0x334455cc]"
+        ),
+        testcase!(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e"),
+        testcase!(&[0xf3, 0x0f, 0x7e, 0xc1], "movq xmm0, xmm1"),
+        testcase!(
+            &[0xf3, 0x0f, 0x7f, 0x9c, 0x9c, 0x34, 0xaa, 0xbb, 0xcc],
+            "movdqu xmmword [esp + ebx * 4 - 0x334455cc], xmm3"
+        ),
+
+        testcase!(&[0xf3, 0x0f, 0xc2, 0xc3, 0x08], "cmpss xmm0, xmm3, 0x8"),
+        testcase!(&[0xf3, 0x0f, 0xc2, 0x03, 0x08], "cmpss xmm0, dword [ebx], 0x8"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 // SETLE, SETNG, ...
 
-#[test]
-fn test_mov() {
-    test_display(&[0xa0, 0x93, 0x62, 0xc4, 0x00], "mov al, byte [0xc46293]");
-    test_display(&[0x67, 0xa0, 0x93, 0x62], "mov al, byte [0x6293]");
-    test_display(&[0xa1, 0x93, 0x62, 0xc4, 0x00], "mov eax, dword [0xc46293]");
-    test_display(&[0x67, 0xa1, 0x93, 0x62], "mov eax, dword [0x6293]");
-    test_display(&[0xa2, 0x93, 0x62, 0xc4, 0x00], "mov byte [0xc46293], al");
-    test_display(&[0x67, 0xa2, 0x93, 0x62], "mov byte [0x6293], al");
-    test_display(&[0xa3, 0x93, 0x62, 0xc4, 0x00], "mov dword [0xc46293], eax");
-    test_display(&[0x67, 0xa3, 0x93, 0x62], "mov dword [0x6293], eax");
-    test_display(&[0xba, 0x01, 0x00, 0x00, 0x00], "mov edx, 0x1");
-    test_display(&[0xc7, 0x04, 0x24, 0x00, 0x00, 0x00, 0x00], "mov dword [esp], 0x0");
-    test_display(&[0x89, 0x44, 0x24, 0x08], "mov dword [esp + 0x8], eax");
-    test_display(&[0x89, 0x43, 0x18], "mov dword [ebx + 0x18], eax");
-    test_display(&[0xc7, 0x43, 0x10, 0x00, 0x00, 0x00, 0x00], "mov dword [ebx + 0x10], 0x0");
-    test_display(&[0x89, 0x4e, 0x08], "mov dword [esi + 0x8], ecx");
-    test_display(&[0x8b, 0x32], "mov esi, dword [edx]");
-    test_display(&[0x8b, 0x4c, 0x10, 0xf8], "mov ecx, dword [eax + edx * 1 - 0x8]");
-    test_display(&[0x89, 0x46, 0x10], "mov dword [esi + 0x10], eax");
-    test_display(&[0x0f, 0x43, 0xec], "cmovnb ebp, esp");
-    test_display(&[0x0f, 0xb6, 0x06], "movzx eax, byte [esi]");
-    test_display(&[0x0f, 0xb7, 0x06], "movzx eax, word [esi]");
-    test_display(&[0x89, 0x55, 0x94], "mov dword [ebp - 0x6c], edx");
-    test_display(&[0x65, 0x89, 0x04, 0x25, 0xa8, 0x01, 0x00, 0x00], "mov dword gs:[0x1a8], eax");
-    test_display(&[0x0f, 0xbe, 0x83, 0xb4, 0x00, 0x00, 0x00], "movsx eax, byte [ebx + 0xb4]");
-    test_display(&[0xf3, 0x0f, 0x6f, 0x07], "movdqu xmm0, xmmword [edi]");
-    test_display(&[0xf3, 0x0f, 0x7f, 0x45, 0x00], "movdqu xmmword [ebp], xmm0");
-
-    test_display(&[0x0f, 0x97, 0xc0], "seta al");
-    test_display(&[0x0f, 0x97, 0xc8], "seta al");
-    test_display(&[0x0f, 0x97, 0x00], "seta byte [eax]");
-    test_display(&[0x0f, 0x97, 0x08], "seta byte [eax]");
-//    test_display(&[0xd6], "salc");
-    test_display(&[0x8e, 0x00], "mov es, word [eax]");
-    test_display(&[0x8e, 0xc0], "mov es, ax");
-    test_display(&[0x8c, 0xc0], "mov eax, es");
-    // cs is not an allowed destination
-    test_invalid(&[0x8e, 0x08]);
-    test_display(&[0x8e, 0x10], "mov ss, word [eax]");
-    test_display(&[0x8e, 0xd0], "mov ss, ax");
-    test_display(&[0x8c, 0xd0], "mov eax, ss");
-    test_display(&[0x8e, 0x18], "mov ds, word [eax]");
-    test_display(&[0x8e, 0xd8], "mov ds, ax");
-    test_display(&[0x8c, 0xd8], "mov eax, ds");
-    test_display(&[0x8e, 0x20], "mov fs, word [eax]");
-    test_display(&[0x8e, 0xe0], "mov fs, ax");
-    test_display(&[0x8c, 0xe0], "mov eax, fs");
-    test_display(&[0x8e, 0x28], "mov gs, word [eax]");
-    test_display(&[0x8e, 0xe8], "mov gs, ax");
-    test_display(&[0x8c, 0xe8], "mov eax, gs");
-    test_invalid(&[0x8e, 0x30]);
-    test_invalid(&[0x8e, 0x38]);
-}
-
-#[test]
-fn test_xchg() {
-    test_display(&[0x90], "nop");
-    test_display(&[0x91], "xchg eax, ecx");
-    test_display(&[0x66, 0x91], "xchg ax, cx");
-}
-
-#[test]
-fn test_stack() {
-    test_display(&[0x66, 0x50], "push ax");
-}
-
-#[test]
-fn test_prefixes() {
-    test_display(&[0x66, 0x31, 0xc0], "xor ax, ax");
-    test_display(&[0x66, 0x32, 0xc0], "xor al, al");
-    test_display(&[0x66, 0x32, 0xc5], "xor al, ch");
-    test_invalid(&[0xf0, 0x33, 0xc0]);
-    test_display(&[0xf0, 0x31, 0x00], "lock xor dword [eax], eax");
-    test_display(&[0xf0, 0x80, 0x30, 0x00], "lock xor byte [eax], 0x0");
-    test_display(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc dword [edi], edx");
-    test_display(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "xacquire lock btc word cs:[ebx], dx");
-    test_invalid(&[0xf0, 0xc7, 0x00, 0x00, 0x00, 0x00]);
-    test_display(&[0x0f, 0xc1, 0xcc], "xadd esp, ecx");
-    test_display(&[0x66, 0x0f, 0xc1, 0xcc], "xadd sp, cx");
-    test_display(&[0xf2, 0x0f, 0xc1, 0xcc], "xadd esp, ecx");
-    test_display(&[0xf3, 0x0f, 0xc1, 0xcc], "xadd esp, ecx");
-    test_display(&[0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0x66, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0xf2, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0xf3, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
-}
-
-#[test]
-fn test_control_flow() {
-    test_display(&[0x73, 0x31], "jnb $+0x31");
-    test_display(&[0x72, 0x5a], "jb $+0x5a");
-    test_display(&[0x72, 0xf0], "jb $-0x10");
-    test_display(&[0xe8, 0x01, 0x00, 0x00, 0x00], "call $+0x1");
-    test_display(&[0xe8, 0x80, 0x00, 0x00, 0x00], "call $+0x80");
-    test_display(&[0xe8, 0xff, 0xff, 0xff, 0xff], "call $-0x1");
-    test_display(&[0xe9, 0x01, 0x00, 0x00, 0x00], "jmp $+0x1");
-    test_display(&[0xe9, 0x80, 0x00, 0x00, 0x00], "jmp $+0x80");
-    test_display(&[0xe9, 0xff, 0xff, 0xff, 0xff], "jmp $-0x1");
-    test_display(&[0x0f, 0x86, 0x8b, 0x01, 0x00, 0x00], "jna $+0x18b");
-    test_display(&[0x0f, 0x85, 0x3b, 0x25, 0x00, 0x00], "jnz $+0x253b");
-    test_display(&[0x74, 0x47], "jz $+0x47");
-    test_display(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call dword [0x24727e]");
-    test_display(&[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "jmp dword [ecx * 8 + 0x1bca070]");
-    test_display(&[0xff, 0x14, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "call dword [ecx * 8 + 0x1bca070]");
-    test_display(&[0xff, 0xe0], "jmp eax");
-    test_display(&[0xff, 0xd0], "call eax");
-    test_display(&[0x66, 0xff, 0xe0], "jmp ax");
-    test_display(&[0x67, 0xff, 0xe0], "jmp eax");
-    test_display(&[0x66, 0xff, 0xd0], "call ax");
-    test_display(&[0x67, 0xff, 0xd0], "call eax");
-    test_invalid(&[0xff, 0xd8]);
-    test_display(&[0xff, 0x18], "callf far [eax]");
-    test_display(&[0xe0, 0x12], "loopnz $+0x12");
-    test_display(&[0xe1, 0x12], "loopz $+0x12");
-    test_display(&[0xe2, 0x12], "loop $+0x12");
-    test_display(&[0xe3, 0x12], "jecxz $+0x12");
-    test_display(&[0xe3, 0xf0], "jecxz $-0x10");
-    test_display(&[0x67, 0xe3, 0x12], "jcxz $+0x12");
-    test_display(&[0x67, 0xe3, 0xf0], "jcxz $-0x10");
-    test_display(&[0xc3], "ret");
+mod mov {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xa0, 0x93, 0x62, 0xc4, 0x00], "mov al, byte [0xc46293]"),
+        testcase!(&[0x67, 0xa0, 0x93, 0x62], "mov al, byte [0x6293]"),
+        testcase!(&[0xa1, 0x93, 0x62, 0xc4, 0x00], "mov eax, dword [0xc46293]"),
+        testcase!(&[0x67, 0xa1, 0x93, 0x62], "mov eax, dword [0x6293]"),
+        testcase!(&[0xa2, 0x93, 0x62, 0xc4, 0x00], "mov byte [0xc46293], al"),
+        testcase!(&[0x67, 0xa2, 0x93, 0x62], "mov byte [0x6293], al"),
+        testcase!(&[0xa3, 0x93, 0x62, 0xc4, 0x00], "mov dword [0xc46293], eax"),
+        testcase!(&[0x67, 0xa3, 0x93, 0x62], "mov dword [0x6293], eax"),
+        testcase!(&[0xba, 0x01, 0x00, 0x00, 0x00], "mov edx, 0x1"),
+        testcase!(&[0xc7, 0x04, 0x24, 0x00, 0x00, 0x00, 0x00], "mov dword [esp], 0x0"),
+        testcase!(&[0x89, 0x44, 0x24, 0x08], "mov dword [esp + 0x8], eax"),
+        testcase!(&[0x89, 0x43, 0x18], "mov dword [ebx + 0x18], eax"),
+        testcase!(&[0xc7, 0x43, 0x10, 0x00, 0x00, 0x00, 0x00], "mov dword [ebx + 0x10], 0x0"),
+        testcase!(&[0x89, 0x4e, 0x08], "mov dword [esi + 0x8], ecx"),
+        testcase!(&[0x8b, 0x32], "mov esi, dword [edx]"),
+        testcase!(&[0x8b, 0x4c, 0x10, 0xf8], "mov ecx, dword [eax + edx * 1 - 0x8]"),
+        testcase!(&[0x89, 0x46, 0x10], "mov dword [esi + 0x10], eax"),
+        testcase!(&[0x0f, 0x43, 0xec], "cmovnb ebp, esp"),
+        testcase!(&[0x0f, 0xb6, 0x06], "movzx eax, byte [esi]"),
+        testcase!(&[0x0f, 0xb7, 0x06], "movzx eax, word [esi]"),
+        testcase!(&[0x89, 0x55, 0x94], "mov dword [ebp - 0x6c], edx"),
+        testcase!(&[0x65, 0x89, 0x04, 0x25, 0xa8, 0x01, 0x00, 0x00], "mov dword gs:[0x1a8], eax"),
+        testcase!(&[0x0f, 0xbe, 0x83, 0xb4, 0x00, 0x00, 0x00], "movsx eax, byte [ebx + 0xb4]"),
+        testcase!(&[0xf3, 0x0f, 0x6f, 0x07], "movdqu xmm0, xmmword [edi]"),
+        testcase!(&[0xf3, 0x0f, 0x7f, 0x45, 0x00], "movdqu xmmword [ebp], xmm0"),
+
+        testcase!(&[0x0f, 0x97, 0xc0], "seta al"),
+        testcase!(&[0x0f, 0x97, 0xc8], "seta al"),
+        testcase!(&[0x0f, 0x97, 0x00], "seta byte [eax]"),
+        testcase!(&[0x0f, 0x97, 0x08], "seta byte [eax]"),
+    //    testcase!(&[0xd6], "salc"),
+        testcase!(&[0x8e, 0x00], "mov es, word [eax]"),
+        testcase!(&[0x8e, 0xc0], "mov es, ax"),
+        testcase!(&[0x8c, 0xc0], "mov eax, es"),
+        // cs is not an allowed destination
+        testcase!(invalid: &[0x8e, 0x08]),
+        testcase!(&[0x8e, 0x10], "mov ss, word [eax]"),
+        testcase!(&[0x8e, 0xd0], "mov ss, ax"),
+        testcase!(&[0x8c, 0xd0], "mov eax, ss"),
+        testcase!(&[0x8e, 0x18], "mov ds, word [eax]"),
+        testcase!(&[0x8e, 0xd8], "mov ds, ax"),
+        testcase!(&[0x8c, 0xd8], "mov eax, ds"),
+        testcase!(&[0x8e, 0x20], "mov fs, word [eax]"),
+        testcase!(&[0x8e, 0xe0], "mov fs, ax"),
+        testcase!(&[0x8c, 0xe0], "mov eax, fs"),
+        testcase!(&[0x8e, 0x28], "mov gs, word [eax]"),
+        testcase!(&[0x8e, 0xe8], "mov gs, ax"),
+        testcase!(&[0x8c, 0xe8], "mov eax, gs"),
+        testcase!(invalid: &[0x8e, 0x30]),
+        testcase!(invalid: &[0x8e, 0x38]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod xchg {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x90], "nop"),
+        testcase!(&[0x91], "xchg eax, ecx"),
+        testcase!(&[0x66, 0x91], "xchg ax, cx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod stack {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x50], "push ax"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod prefixes {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x31, 0xc0], "xor ax, ax"),
+        testcase!(&[0x66, 0x32, 0xc0], "xor al, al"),
+        testcase!(&[0x66, 0x32, 0xc5], "xor al, ch"),
+        testcase!(invalid: &[0xf0, 0x33, 0xc0]),
+        testcase!(&[0xf0, 0x31, 0x00], "lock xor dword [eax], eax"),
+        testcase!(&[0xf0, 0x80, 0x30, 0x00], "lock xor byte [eax], 0x0"),
+        testcase!(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc dword [edi], edx"),
+        testcase!(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "xacquire lock btc word cs:[ebx], dx"),
+        testcase!(invalid: &[0xf0, 0xc7, 0x00, 0x00, 0x00, 0x00]),
+        testcase!(&[0x0f, 0xc1, 0xcc], "xadd esp, ecx"),
+        testcase!(&[0x66, 0x0f, 0xc1, 0xcc], "xadd sp, cx"),
+        testcase!(&[0xf2, 0x0f, 0xc1, 0xcc], "xadd esp, ecx"),
+        testcase!(&[0xf3, 0x0f, 0xc1, 0xcc], "xadd esp, ecx"),
+        testcase!(&[0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0x66, 0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0xf2, 0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0xf3, 0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod control_flow {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x73, 0x31], "jnb $+0x31"),
+        testcase!(&[0x72, 0x5a], "jb $+0x5a"),
+        testcase!(&[0x72, 0xf0], "jb $-0x10"),
+        testcase!(&[0xe8, 0x01, 0x00, 0x00, 0x00], "call $+0x1"),
+        testcase!(&[0xe8, 0x80, 0x00, 0x00, 0x00], "call $+0x80", masm: "call near ptr $+85h"),
+        testcase!(&[0xe8, 0xff, 0xff, 0xff, 0xff], "call $-0x1"),
+        testcase!(&[0xe9, 0x01, 0x00, 0x00, 0x00], "jmp $+0x1"),
+        testcase!(&[0xe9, 0x80, 0x00, 0x00, 0x00], "jmp $+0x80", masm: "jmp near ptr $+85h"),
+        testcase!(&[0xe9, 0xff, 0xff, 0xff, 0xff], "jmp $-0x1"),
+        testcase!(&[0x0f, 0x86, 0x8b, 0x01, 0x00, 0x00], "jna $+0x18b"),
+        testcase!(&[0x0f, 0x85, 0x3b, 0x25, 0x00, 0x00], "jnz $+0x253b"),
+        testcase!(&[0x74, 0x47], "jz $+0x47"),
+        testcase!(&[0xff, 0x15, 0x7e, 0x72, 0x24, 0x00], "call dword [0x24727e]", masm: "call dword ptr [0024727Eh]"),
+        testcase!(&[0xff, 0x24, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "jmp dword [ecx * 8 + 0x1bca070]"),
+        testcase!(&[0xff, 0x14, 0xcd, 0x70, 0xa0, 0xbc, 0x01], "call dword [ecx * 8 + 0x1bca070]"),
+        testcase!(&[0xff, 0xe0], "jmp eax"),
+        testcase!(&[0xff, 0xd0], "call eax"),
+        testcase!(&[0x66, 0xff, 0xe0], "jmp ax"),
+        testcase!(&[0x67, 0xff, 0xe0], "jmp eax"),
+        testcase!(&[0x66, 0xff, 0xd0], "call ax"),
+        testcase!(&[0x67, 0xff, 0xd0], "call eax"),
+        testcase!(invalid: &[0xff, 0xd8]),
+        testcase!(&[0xff, 0x18], "callf far [eax]", masm: "call fword ptr [eax]"),
+        testcase!(&[0xe0, 0x12], "loopnz $+0x12"),
+        testcase!(&[0xe1, 0x12], "loopz $+0x12"),
+        testcase!(&[0xe2, 0x12], "loop $+0x12"),
+        testcase!(&[0xe3, 0x12], "jecxz $+0x12"),
+        testcase!(&[0xe3, 0xf0], "jecxz $-0x10"),
+        testcase!(&[0x67, 0xe3, 0x12], "jcxz $+0x12"),
+        testcase!(&[0x67, 0xe3, 0xf0], "jcxz $-0x10"),
+        testcase!(&[0xc3], "ret"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
  
-#[test]
-fn bad_instructions() {
-    // too long
-    test_invalid(&[
-         0x2e, 0x2e, 0x2e, 0x2e,
-         0x2e, 0x2e, 0x2e, 0x2e,
-         0x2e, 0x2e, 0x2e, 0x2e,
-         0x2e, 0x2e, 0x2e, 0x2e,
-         0x33, 0xc0,
-    ]);
-}
-
-
-#[test]
-fn test_test_cmp() {
-    test_display(&[0xf6, 0x05, 0x2c, 0x9b, 0xff, 0xff, 0x01], "test byte [0xffff9b2c], 0x1");
-    test_display(&[0x3d, 0x01, 0xf0, 0xff, 0xff], "cmp eax, -0xfff");
-    test_display(&[0x83, 0xf8, 0xff], "cmp eax, -0x1");
-    test_display(&[0x39, 0xc6], "cmp esi, eax");
-}
-
-#[test]
-fn test_push_pop() {
-    test_display(&[0x5b], "pop ebx");
-    test_display(&[0x5e], "pop esi");
-    test_display(&[0x68, 0x7f, 0x63, 0xc4, 0x00], "push 0xc4637f");
-    test_display(&[0x66, 0x8f, 0x00], "pop word [eax]");
-    test_display(&[0x8f, 0x00], "pop dword [eax]");
-}
-
-#[test]
-fn test_bmi1() {
-    let bmi1 = InstDecoder::minimal().with_bmi1();
-    let no_bmi1 = InstDecoder::minimal();
-    test_display_under(&bmi1, &[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt edx, ebx");
-    test_display_under(&bmi1, &[0xf2, 0x0f, 0xbc, 0xd3], "bsf edx, ebx");
-    test_display_under(&bmi1, &[0x0f, 0xbc, 0xd3], "bsf edx, ebx");
-    test_display_under(&no_bmi1, &[0xf3, 0x0f, 0xbc, 0xd3], "bsf edx, ebx");
-
-    // from the intel manual [`ANDN`, though this is true for `BMI1` generally]:
-    // ```
-    // VEX.W1 is ignored in non-64-bit modes.
-    // ```
-
-    // just 0f38
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0x60, 0xf2, 0x01], "andn eax, ebx, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0xe0, 0xf2, 0x01], "andn eax, ebx, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x09], "blsr eax, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x09], "blsr eax, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x11], "blsmsk eax, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x11], "blsmsk eax, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0x78, 0xf3, 0x19], "blsi eax, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0xf8, 0xf3, 0x19], "blsi eax, dword [ecx]");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0x60, 0xf7, 0x01], "bextr eax, dword [ecx], ebx");
-    test_display_under(&bmi1, &[0xc4, 0xe2, 0xe0, 0xf7, 0x01], "bextr eax, dword [ecx], ebx");
-}
-
-#[test]
-fn test_bmi2() {
-    let bmi2 = InstDecoder::minimal().with_bmi2();
-
-    // from the intel manual [`PDEP`, though this is true for `BMI2` generally]:
-    // ```
-    // VEX.W1 is ignored in non-64-bit modes.
-    // ```
-
-    // f2 0f3a
-    test_display_under(&bmi2, &[0xc4, 0xe3, 0x7b, 0xf0, 0x01, 0x05], "rorx eax, dword [ecx], 0x5");
-    test_display_under(&bmi2, &[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05], "rorx eax, dword [ecx], 0x5");
-
-    // f2 0f38 map
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf5, 0x07], "pdep eax, ebx, dword [edi]");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf5, 0x07], "pdep eax, ebx, dword [edi]");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf6, 0x07], "mulx eax, ebx, dword [edi]");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf6, 0x07], "mulx eax, ebx, dword [edi]");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x63, 0xf7, 0x01], "shrx eax, dword [ecx], ebx");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe3, 0xf7, 0x01], "shrx eax, dword [ecx], ebx");
-
-    // f3 0f38 map
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x62, 0xf5, 0x07], "pext eax, ebx, dword [edi]");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe2, 0xf5, 0x07], "pext eax, ebx, dword [edi]");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x62, 0xf7, 0x01], "sarx eax, dword [ecx], ebx");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe2, 0xf7, 0x01], "sarx eax, dword [ecx], ebx");
-
-    // just 0f38
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x60, 0xf5, 0x07], "bzhi eax, dword [edi], ebx");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe0, 0xf5, 0x07], "bzhi eax, dword [edi], ebx");
-
-    // 66 0f38
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0x61, 0xf7, 0x01], "shlx eax, dword [ecx], ebx");
-    test_display_under(&bmi2, &[0xc4, 0xe2, 0xe1, 0xf7, 0x01], "shlx eax, dword [ecx], ebx");
-}
-
-#[test]
-fn test_popcnt() {
-    let popcnt = InstDecoder::minimal().with_popcnt();
-    let intel_popcnt = InstDecoder::minimal().with_intel_quirks().with_sse4_2();
-    let no_popcnt = InstDecoder::minimal();
-    test_display_under(&popcnt, &[0xf3, 0x0f, 0xb8, 0xc1], "popcnt eax, ecx");
-    test_display_under(&intel_popcnt, &[0xf3, 0x0f, 0xb8, 0xc1], "popcnt eax, ecx");
-    test_invalid_under(&no_popcnt, &[0xf3, 0x0f, 0xb8, 0xc1]);
-}
-
-#[test]
-fn test_bitwise() {
-    test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbc, 0xd3], "bsf edx, ebx");
-    test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbb, 0x17], "btc dword [edi], edx");
-    test_display_under(&InstDecoder::minimal(), &[0xf0, 0x0f, 0xbb, 0x17], "lock btc dword [edi], edx");
-    test_display(&[0x0f, 0xa3, 0xd0], "bt eax, edx");
-    test_display(&[0x0f, 0xab, 0xd0], "bts eax, edx");
-    test_display(&[0x0f, 0xb3, 0xd0], "btr eax, edx");
-    test_display(&[0x66, 0x0f, 0xb3, 0xc0], "btr ax, ax");
-    test_display(&[0xd2, 0xe0], "shl al, cl");
-}
-
-#[test]
-fn test_misc() {
-    test_display(&[0xf1], "int 0x1");
-    test_display(&[0xf5], "cmc");
-    test_display(&[0xc8, 0x01, 0x02, 0x03], "enter 0x201, 0x3");
-    test_display(&[0xc9], "leave");
-    test_display(&[0xca, 0x12, 0x34], "retf 0x3412");
-    test_display(&[0xcb], "retf");
-    test_display(&[0x66, 0xcf], "iret");
-    test_display(&[0xcf], "iretd");
-    test_display(&[0xf2, 0x0f, 0x38, 0xf0, 0xc1], "crc32 eax, cl");
-    test_display(&[0xf2, 0x0f, 0x38, 0xf1, 0xc1], "crc32 eax, ecx");
-    test_display(&[0xfe, 0x00], "inc byte [eax]");
-    test_display(&[0xfe, 0x08], "dec byte [eax]");
-    test_display(&[0xff, 0x00], "inc dword [eax]");
-    test_display(&[0xff, 0x08], "dec dword [eax]");
-    test_display(&[0xe4, 0x99], "in al, 0x99");
-    test_display(&[0xe5, 0x99], "in eax, 0x99");
-    test_display(&[0x67, 0xe5, 0x99], "in eax, 0x99");
-    test_display(&[0xe5, 0x99], "in eax, 0x99");
-    test_display(&[0xe6, 0x99], "out 0x99, al");
-    test_display(&[0xe7, 0x99], "out 0x99, eax");
-    test_display(&[0xec], "in al, dx");
-    test_display(&[0xed], "in eax, dx");
-    test_display(&[0xee], "out dx, al");
-    test_display(&[0xef], "out dx, eax");
-    test_display(&[0xcd, 0x00], "int 0x0");
-    test_display(&[0xcd, 0xff], "int 0xff");
-    test_display(&[0x9c], "pushf");
-    test_display(&[0x98], "cwde");
-    test_display(&[0x66, 0x99], "cwd");
-    test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop word cs:[eax + eax * 1]");
-    test_display(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop word [eax + eax * 1]");
-    test_display(&[0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea esp, dword [edi + eax * 8 + 0x12000020]");
-    test_display(&[0x33, 0xc0], "xor eax, eax");
-    test_display(&[0x8d, 0x53, 0x08], "lea edx, dword [ebx + 0x8]");
-    test_invalid(&[0x8d, 0xdd]);
-    test_display(&[0x31, 0xc9], "xor ecx, ecx");
-    test_display(&[0x29, 0xc8], "sub eax, ecx");
-    test_display(&[0x03, 0x0b], "add ecx, dword [ebx]");
-    test_display(&[0x8d, 0x0c, 0x12], "lea ecx, dword [edx + edx * 1]");
-    test_display(&[0xf6, 0xc2, 0x18], "test dl, 0x18");
-    test_display(&[0xf3, 0xab], "rep stos dword es:[edi], eax");
-    test_display(&[0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]");
-    test_display(&[0xf3, 0x0f, 0xbc, 0xd7], "tzcnt edx, edi");
-
-    // TODO:
-    // this is actually vmx
-    // test_invalid(&[0x66, 0x0f, 0xc7, 0x03]);
-    test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [ebx]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [ebx]");
-
-    test_display(&[0xf3, 0x0f, 0xae, 0x26], "ptwrite dword [esi]");
-    test_display(&[0xf3, 0x0f, 0xae, 0xe6], "ptwrite esi");
-    test_invalid(&[0x66, 0xf3, 0x0f, 0xae, 0xe6]);
-    test_display(&[0xf3, 0x0f, 0xae, 0xc4], "rdfsbase esp");
-    test_display(&[0xf3, 0x0f, 0xae, 0xcc], "rdgsbase esp");
-    test_display(&[0xf3, 0x0f, 0xae, 0xd4], "wrfsbase esp");
-    test_display(&[0xf3, 0x0f, 0xae, 0xdc], "wrgsbase esp");
-    test_display(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt zmmword [edi]"); // or clflush without 66
-    test_invalid(&[0x66, 0x0f, 0xae, 0xff]);
-    test_display(&[0x66, 0x0f, 0xae, 0x37], "clwb zmmword [edi]");
-    test_display(&[0x66, 0x0f, 0xae, 0xf7], "tpause edi");
-    test_display(&[0xf3, 0x0f, 0xae, 0xf1], "umonitor ecx");
-    test_display(&[0x67, 0xf3, 0x0f, 0xae, 0xf1], "umonitor cx");
-    test_display(&[0xf2, 0x0f, 0xae, 0xf1], "umwait ecx");
-    test_display(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, xmmword [edi]");
-    test_invalid(&[0x0f, 0x38, 0x80, 0x2f]);
-    test_display(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, xmmword [edi]");
-    test_invalid(&[0x0f, 0x38, 0x81, 0x2f]);
-    test_display(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, xmmword [edi]");
-    test_invalid(&[0x0f, 0x38, 0x82, 0x2f]);
-    test_display(&[0x66, 0x0f, 0xae, 0xf1], "tpause ecx");
-    test_display(&[0xc4, 0b111_00011, 0b0_1111_101, 0x1d, 0b11_001_010, 0x77], "vcvtps2ph xmm2, ymm1, 0x77");
-}
-
-#[test]
-fn evex() {
-    // vpbroadcastmw2d. similar to `vpmovm2*`, out-of-range `k` are just masked down.
-    test_display(&[0x62, 0xd2, 0x7e, 0x28, 0x3a, 0xca], "vpbroadcastmw2d ymm1, k2");
-    // vpmovm2b (and larger forms). for some reason the source operand is a mask register but uses
-    // modrm bits as a register selector. out-of-range `k` seem to just get masked down..
-    test_display(&[0x62, 0xd2, 0x7e, 0x08, 0x28, 0xc2], "vpmovm2b xmm0, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x28, 0xc1], "vpmovm2b xmm0, k1");
-    // vpmovb2m (and larger forms). out-of-range `k` are invalid in 64-bit mode, are part of the
-    // `bound` instruction for 32- and 16-bit modes.
-    test_display(&[0x62, 0x72, 0x7e /* , 0x28, 0x29, 0xfd */], "bound esi, qword [edx + 0x7e]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x29, 0xfd], "vpmovb2m k7, ymm5");
-
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa zmm0, zmmword [eax + eax * 2 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa xmm0, xmmword [eax + eax * 2 + 0x10]");
-}
-
-#[test]
-fn test_vex() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_avx(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    fn test_avx2(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_avx().with_avx2(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    fn test_instr_vex_aesni(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_avx().with_aesni(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    fn test_instr_vex_f16c(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_avx().with_f16c(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
-        test_invalid_under(&InstDecoder::minimal().with_f16c(), bytes);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    #[allow(dead_code)]
-    fn test_instr_invalid(bytes: &[u8]) {
-        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
-        test_invalid_under(&InstDecoder::default(), bytes);
-    }
-
-    // prefix 03
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x00, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x00, 0b11_001_010, 0x77]);
-    test_avx2(&[0xc4, 0b110_00011, 0b1_1111_101, 0x00, 0b11_001_010, 0x77], "vpermq ymm1, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x01, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x01, 0b11_001_010, 0x77]);
-    test_avx2(&[0xc4, 0b110_00011, 0b1_1111_101, 0x01, 0b11_001_010, 0x77], "vpermpd ymm1, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x02, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x02, 0b11_001_010, 0x77]);
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_001, 0x02, 0b11_001_010, 0x77], "vpblendd xmm1, xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_001, 0x02, 0b00_001_010, 0x77], "vpblendd xmm1, xmm0, xmmword [edx], 0x77");
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x02, 0b11_001_010, 0x77], "vpblendd ymm1, ymm0, ymm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x02, 0b00_001_010, 0x77], "vpblendd ymm1, ymm0, ymmword [edx], 0x77");
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x04, 0b11_001_010, 0x77], "vpermilps xmm1, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x04, 0b11_001_010, 0x77], "vpermilps ymm1, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x05, 0b11_001_010, 0x77], "vpermilpd xmm1, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x05, 0b11_001_010, 0x77], "vpermilpd ymm1, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x06, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x06, 0b11_001_010, 0x77], "vperm2f128 ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x06, 0b00_001_010, 0x77], "vperm2f128 ymm1, ymm0, ymmword [edx], 0x77");
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0c, 0b11_001_010, 0x77], "vblendps xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0c, 0b11_001_010, 0x77], "vblendps ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0d, 0b11_001_010, 0x77], "vblendpd xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0d, 0b11_001_010, 0x77], "vblendpd ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0e, 0b11_001_010, 0x77], "vpblendw xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0e, 0b11_001_010, 0x77], "vpblendw ymm1, ymm0, ymm2, 0x77");
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x08, 0b11_001_010, 0x77], "vroundps xmm1, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x08, 0b11_001_010, 0x77], "vroundps ymm1, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x08, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x08, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x09, 0b11_001_010, 0x77], "vroundpd xmm1, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x09, 0b11_001_010, 0x77], "vroundpd ymm1, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x09, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x09, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0a, 0b11_001_010, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0a, 0b11_001_010, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x0b, 0b11_001_010, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x0b, 0b11_001_010, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77");
-
-    test_instr(&[0xc4, 0b110_00011, 0b1_0111_001, 0x0f, 0b11_001_010, 0x77], "vpalignr xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b1_0111_101, 0x0f, 0b11_001_010, 0x77], "vpalignr ymm1, ymm0, ymm2, 0x77");
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x14, 0b11_001_010, 0x77], "vpextrb edx, xmm1, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x14, 0b00_001_010, 0x77], "vpextrb byte [edx], xmm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x14, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x14, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x15, 0b11_001_010, 0x77], "vpextrw edx, xmm1, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x15, 0b00_001_010, 0x77], "vpextrw word [edx], xmm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x15, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x15, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x16, 0b11_001_010, 0x77], "vpextrd edx, xmm1, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x16, 0b00_001_010, 0x77], "vpextrd dword [edx], xmm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x16, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x16, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b1_1111_001, 0x16, 0b11_001_010, 0x77], "vpextrd edx, xmm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x16, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b1_1111_001, 0x16, 0b00_001_010, 0x77], "vpextrd dword [edx], xmm1, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x17, 0b11_001_010, 0x77], "vextractps edx, xmm1, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x17, 0b00_001_010, 0x77], "vextractps dword [edx], xmm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x17, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x17, 0b00_001_010, 0x77]);
-
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x18, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x18, 0b11_001_010, 0x77], "vinsertf128 ymm1, ymm0, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x19, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_101, 0x19, 0b11_001_010, 0x77], "vextractf128 xmm2, ymm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]);
-
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x38, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x38, 0b11_001_010, 0x77]);
-    test_avx2(&[0xc4, 0b110_00011, 0b0_0111_101, 0x38, 0b11_001_010, 0x77], "vinserti128 ymm1, ymm0, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x39, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x39, 0b11_001_010, 0x77]);
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x39, 0b11_001_010, 0x77], "vextracti128 xmm2, ymm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]);
-
-    test_instr_vex_f16c(&[0xc4, 0b110_00011, 0b0_1111_101, 0x1d, 0b11_001_010, 0x77], "vcvtps2ph xmm2, ymm1, 0x77");
-    test_instr_vex_f16c(&[0xc4, 0b110_00011, 0b0_1111_101, 0x1d, 0b11_001_010, 0x77], "vcvtps2ph xmm2, ymm1, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x1d, 0b11_001_010, 0x77]);
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x20, 0b11_001_010, 0x77], "vpinsrb xmm1, xmm0, edx, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x20, 0b00_001_010, 0x77], "vpinsrb xmm1, xmm0, byte [edx], 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x20, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x21, 0b11_001_010, 0x77], "vinsertps xmm1, xmm0, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x21, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x22, 0b11_001_010, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x22, 0b00_001_010, 0x77], "vpinsrd xmm1, xmm0, dword [edx], 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x22, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b1_0111_001, 0x22, 0b11_001_010, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b1_0111_001, 0x22, 0b00_001_010, 0x77], "vpinsrd xmm1, xmm0, dword [edx], 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x22, 0b00_001_010, 0x77]);
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x40, 0b11_001_010, 0x77], "vdpps xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_101, 0x40, 0b11_001_010, 0x77], "vdpps ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x41, 0b11_001_010, 0x77], "vdppd xmm1, xmm0, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x41, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x42, 0b11_001_010, 0x77], "vmpsadbw xmm1, xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00011, 0b0_0111_101, 0x42, 0b11_001_010, 0x77], "vmpsadbw ymm1, ymm0, ymm2, 0x77");
-
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x46, 0b11_001_010, 0x77], "vperm2i128 ymm1, ymm0, ymm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00011, 0b0_1111_101, 0x46, 0b00_001_010, 0x77], "vperm2i128 ymm1, ymm0, ymmword [edx], 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x46, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x46, 0b11_001_010, 0x77]);
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_0111_001, 0x4c, 0b11_001_010, 0x77], "vpblendvb xmm1, xmm0, xmm2, xmm7");
-    test_avx2(&[0xc4, 0b110_00011, 0b0_0111_101, 0x4c, 0b11_001_010, 0x77], "vpblendvb ymm1, ymm0, ymm2, ymm7");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x4c, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x4c, 0b11_001_010, 0x77]);
-
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x60, 0b11_001_010, 0x77], "vpcmpestrm xmm1, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x60, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x60, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x60, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x61, 0b11_001_010, 0x77], "vpcmpestri xmm1, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x61, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x61, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x61, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x62, 0b11_001_010, 0x77], "vpcmpistrm xmm1, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x62, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x62, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x62, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00011, 0b0_1111_001, 0x63, 0b11_001_010, 0x77], "vpcmpistri xmm1, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x63, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x63, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x63, 0b11_001_010, 0x77]);
-
-    test_instr_vex_aesni(&[0xc4, 0b110_00011, 0b1_1111_001, 0xdf, 0b11_001_010, 0x77], "vaeskeygenassist xmm1, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0xdf, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0xdf, 0b11_001_010, 0x77]);
-
-    // prefix 02
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x00, 0b11_001_010], "vpshufb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x00, 0b11_001_010], "vpshufb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x01, 0b11_001_010], "vphaddw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x01, 0b11_001_010], "vphaddw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x02, 0b11_001_010], "vphaddd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x02, 0b11_001_010], "vphaddd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x03, 0b11_001_010], "vphaddsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x03, 0b11_001_010], "vphaddsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x04, 0b11_001_010], "vpmaddubsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x04, 0b11_001_010], "vpmaddubsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x05, 0b11_001_010], "vphsubw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x05, 0b11_001_010], "vphsubw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x06, 0b11_001_010], "vphsubd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x06, 0b11_001_010], "vphsubd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x07, 0b11_001_010], "vphsubsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x07, 0b11_001_010], "vphsubsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x08, 0b11_001_010], "vpsignb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x08, 0b11_001_010], "vpsignb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x09, 0b11_001_010], "vpsignw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x09, 0b11_001_010], "vpsignw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0a, 0b11_001_010], "vpsignd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0a, 0b11_001_010], "vpsignd ymm1, ymm0, ymm2");
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0b, 0b11_001_010], "vpmulhrsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0b, 0b11_001_010], "vpmulhrsw ymm1, ymm0, ymm2");
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x0c, 0b11_001_010], "vpermilps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_101, 0x0c, 0b11_001_010], "vpermilps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x0d, 0b11_001_010], "vpermilpd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_101, 0x0d, 0b11_001_010], "vpermilpd ymm1, ymm0, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x0d, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x0d, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0e, 0b11_001_010], "vtestps xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0e, 0b11_001_010], "vtestps ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x0e, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x0f, 0b11_001_010], "vtestpd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x0f, 0b11_001_010], "vtestpd ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x0f, 0b11_001_010]);
-    test_instr_vex_f16c(&[0xc4, 0b111_00010, 0b0_1111_001, 0x13, 0b11_001_010], "vcvtph2ps xmm1, xmm2");
-    test_invalid(&[0xc4, 0b111_00010, 0b1_1111_001, 0x13, 0b11_001_010]);
-
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x16, 0b11_001_010], "vpermps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x16, 0b00_001_010], "vpermps ymm1, ymm0, ymmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x16, 0b00_011_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x16, 0b00_011_010]);
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x17, 0b11_001_010], "vptest xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x17, 0b11_001_010], "vptest ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x17, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x17, 0b11_001_010]);
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x18, 0b00_001_010], "vbroadcastss xmm1, dword [edx]");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b00_001_010], "vbroadcastss ymm1, dword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_001, 0x18, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x18, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b00_001_010], "vbroadcastsd ymm1, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x19, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1a, 0b00_001_010], "vbroadcastf128 ymm1, xmmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x1a, 0b00_001_010]); // vex.w=1 is invalid
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b00_001_010], "vbroadcasti128 ymm1, xmmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x5a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x5a, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x18, 0b11_001_010], "vbroadcastss xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b11_001_010], "vbroadcastss ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b00_001_010], "vbroadcastss ymm1, dword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x18, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x18, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x19, 0b11_001_010]); // "vbroadcastsd xmm, xmm" is not legal (L!=0)
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b11_001_010], "vbroadcastsd ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b00_001_010], "vbroadcastsd ymm1, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x19, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x19, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b11_001_010]);
-
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x1c, 0b11_001_010], "vpabsb xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1c, 0b11_001_010], "vpabsb ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1c, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x1d, 0b11_001_010], "vpabsw xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1d, 0b11_001_010], "vpabsw ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1d, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x1e, 0b11_001_010], "vpabsd xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x1e, 0b11_001_010], "vpabsd ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1e, 0b11_001_010]);
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x20, 0b11_001_010], "vpmovsxbw xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x20, 0b11_001_010], "vpmovsxbw ymm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x20, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x21, 0b11_001_010], "vpmovsxbd xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x21, 0b11_001_010], "vpmovsxbd ymm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x21, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x22, 0b11_001_010], "vpmovsxbq xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x22, 0b11_001_010], "vpmovsxbq ymm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x22, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x23, 0b11_001_010], "vpmovsxwd xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x23, 0b11_001_010], "vpmovsxwd ymm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x23, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x24, 0b11_001_010], "vpmovsxwq xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x24, 0b11_001_010], "vpmovsxwq ymm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x24, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x25, 0b11_001_010], "vpmovsxdq xmm1, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x25, 0b11_001_010], "vpmovsxdq ymm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x25, 0b11_001_010]);
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x28, 0b11_001_010], "vpmuldq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x28, 0b11_001_010], "vpmuldq ymm1, ymm0, ymm2");
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x29, 0b11_001_010], "vpcmpeqq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x29, 0b11_001_010], "vpcmpeqq ymm1, ymm0, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x2a, 0b00_001_010], "vmovntdqa xmm1, xmmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b00_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x2a, 0b00_001_010], "vmovntdqa ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2b, 0b11_001_010], "vpackusdw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2b, 0b11_001_010], "vpackusdw ymm1, ymm0, ymm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2b, 0b00_001_010], "vpackusdw ymm1, ymm0, ymmword [edx]");
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2c, 0b00_001_010], "vmaskmovps xmm1, xmm0, xmmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2c, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2c, 0b00_001_010], "vmaskmovps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2d, 0b00_001_010], "vmaskmovpd xmm1, xmm0, xmmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2d, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2d, 0b00_001_010], "vmaskmovpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2e, 0b00_001_010], "vmaskmovps xmmword [edx], xmm0, xmm1");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2e, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2e, 0b00_001_010], "vmaskmovps ymmword [edx], ymm0, ymm1");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2f, 0b00_001_010], "vmaskmovpd xmmword [edx], xmm0, xmm1");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2f, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2f, 0b00_001_010], "vmaskmovpd ymmword [edx], ymm0, ymm1");
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x30, 0b11_001_010], "vpmovzxbw xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x30, 0b11_001_010], "vpmovzxbw ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x31, 0b11_001_010], "vpmovzxbd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x31, 0b11_001_010], "vpmovzxbd ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x32, 0b11_001_010], "vpmovzxbq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x32, 0b11_001_010], "vpmovzxbq ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x33, 0b11_001_010], "vpmovzxwd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x33, 0b11_001_010], "vpmovzxwd ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x34, 0b11_001_010], "vpmovzxwq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x34, 0b11_001_010], "vpmovzxwq ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x35, 0b11_001_010], "vpmovzxdq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_101, 0x35, 0b11_001_010], "vpmovzxdq ymm1, xmm2");
-
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x30, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x30, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x31, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x31, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x32, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x32, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x33, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x33, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x34, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x34, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x35, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x35, 0b11_001_010]);
-
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x36, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x36, 0b11_001_010], "vpermd ymm1, ymm0, ymm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x36, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x37, 0b11_001_010], "vpcmpgtq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x37, 0b11_001_010], "vpcmpgtq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x38, 0b11_001_010], "vpminsb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x38, 0b11_001_010], "vpminsb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x39, 0b11_001_010], "vpminsd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x39, 0b11_001_010], "vpminsd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3a, 0b11_001_010], "vpminuw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3a, 0b11_001_010], "vpminuw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3b, 0b11_001_010], "vpminud xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3b, 0b11_001_010], "vpminud ymm1, ymm0, ymm2");
-
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3c, 0b11_001_010], "vpmaxsb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3c, 0b11_001_010], "vpmaxsb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3d, 0b11_001_010], "vpmaxsd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3d, 0b11_001_010], "vpmaxsd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3e, 0b11_001_010], "vpmaxuw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3e, 0b11_001_010], "vpmaxuw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x3f, 0b11_001_010], "vpmaxud xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x3f, 0b11_001_010], "vpmaxud ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_0111_001, 0x40, 0b11_001_010], "vpmulld xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_0111_101, 0x40, 0b11_001_010], "vpmulld ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00010, 0b0_1111_001, 0x41, 0b11_001_010], "vphminposuw xmm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x41, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x41, 0b11_001_010]);
-// TODO: should something b11at opcode 42 here?
-//    test_instr(&[0xc4, 0b110_00010, 0b1_0111_001, 0x42, 0b11_001_010], "vphminposuw xmm");
-//    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x41, 0b11_001_010]);
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x45, 0b00_001_010], "vpsrlvd xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x45, 0b00_001_010], "vpsrlvd ymm1, ymm0, ymmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x45, 0b11_001_010], "vpsrlvd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x45, 0b11_001_010], "vpsrlvd ymm1, ymm0, ymm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x45, 0b00_001_010], "vpsrlvq xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x45, 0b00_001_010], "vpsrlvq ymm1, ymm0, ymmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x45, 0b11_001_010], "vpsrlvq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x45, 0b11_001_010], "vpsrlvq ymm1, ymm0, ymm2");
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x46, 0b00_001_010], "vpsravd xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x46, 0b00_001_010], "vpsravd ymm1, ymm0, ymmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_001, 0x46, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x46, 0b00_001_010]);
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x47, 0b00_001_010], "vpsllvd xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x47, 0b00_001_010], "vpsllvd ymm1, ymm0, ymmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x47, 0b11_001_010], "vpsllvd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x47, 0b11_001_010], "vpsllvd ymm1, ymm0, ymm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x47, 0b00_001_010], "vpsllvq xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x47, 0b00_001_010], "vpsllvq ymm1, ymm0, ymmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x47, 0b11_001_010], "vpsllvq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x47, 0b11_001_010], "vpsllvq ymm1, ymm0, ymm2");
-
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_001, 0x58, 0b11_000_001], "vpbroadcastd xmm0, xmm1");
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_101, 0x58, 0b11_000_001], "vpbroadcastd ymm0, ymm1");
-    test_invalid(&[0xc4, 0b111_00010, 0b1_1111_001, 0x58, 0b11_000_001]);
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_001, 0x59, 0b11_000_001], "vpbroadcastq xmm0, xmm1");
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_101, 0x59, 0b11_000_001], "vpbroadcastq ymm0, ymm1");
-    test_invalid(&[0xc4, 0b111_00010, 0b1_1111_001, 0x59, 0b11_000_001]);
-
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_001, 0x78, 0b11_000_001], "vpbroadcastb xmm0, xmm1");
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_101, 0x78, 0b11_000_001], "vpbroadcastb ymm0, ymm1");
-    test_invalid(&[0xc4, 0b111_00010, 0b1_1111_001, 0x78, 0b11_000_001]);
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_001, 0x79, 0b11_000_001], "vpbroadcastw xmm0, xmm1");
-    test_avx2(&[0xc4, 0b111_00010, 0b0_1111_101, 0x79, 0b11_000_001], "vpbroadcastw ymm0, ymm1");
-    test_invalid(&[0xc4, 0b111_00010, 0b1_1111_001, 0x79, 0b11_000_001]);
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b00_001_010], "vpmaskmovd xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x8c, 0b00_001_010], "vpmaskmovd ymm1, ymm0, ymmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x8c, 0b00_001_010], "vpmaskmovq xmm1, xmm0, xmmword [edx]");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x8c, 0b00_001_010], "vpmaskmovq ymm1, ymm0, ymmword [edx]");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]);
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b00_001_010], "vpmaskmovd xmmword [edx], xmm0, xmm1");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x8e, 0b00_001_010], "vpmaskmovd ymmword [edx], ymm0, ymm1");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]);
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x8e, 0b00_001_010], "vpmaskmovq xmmword [edx], xmm0, xmm1");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x8e, 0b00_001_010], "vpmaskmovq ymmword [edx], ymm0, ymm1");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]);
-
-    /*
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x90, 0b00_000_100, 0xa1], "vpgatherdd xmm0, dword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x90, 0b00_000_100, 0xa1], "vpgatherdd ymm0, dword [ecx + ymm12 * 4], ymm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x90, 0b00_000_100, 0xa1], "vpgatherdq xmm0, dword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x90, 0b00_000_100, 0xa1], "vpgatherdq ymm0, qword [ecx + ymm12 * 4], ymm0");
-
-    test_avx2(&[0xc4, 0b000_00010, 0b0_1111_001, 0x91, 0b00_000_100, 0xa1], "vpgatherqd xmm0, dword xmmword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b000_00010, 0b0_1111_101, 0x91, 0b00_000_100, 0xa1], "vpgatherqd xmm0, dword xmmword [ecx + ymm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b000_00010, 0b1_1111_001, 0x91, 0b00_000_100, 0xa1], "vpgatherqq xmm0, dword xmmword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b000_00010, 0b1_1111_101, 0x91, 0b00_000_100, 0xa1], "vpgatherqq ymm0, qword xmmword [ecx + ymm12 * 4], ymm0");
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x92, 0b00_000_100, 0xa1], "vgatherdps xmm0, dword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x92, 0b00_000_100, 0xa1], "vgatherdps ymm0, qword [ecx + ymm12 * 4], ymm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x92, 0b00_000_100, 0xa1], "vgatherdpd xmm0, dword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x92, 0b00_000_100, 0xa1], "vgatherdpd ymm0, qword [ecx + ymm12 * 4], ymm0");
-
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_001, 0x93, 0b00_000_100, 0xa1], "vgatherqps xmm0, dword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b0_1111_101, 0x93, 0b00_000_100, 0xa1], "vgatherqps ymm0, qword [ecx + ymm12 * 4], ymm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_001, 0x93, 0b00_000_100, 0xa1], "vgatherqpd xmm0, dword [ecx + xmm12 * 4], xmm0");
-    test_avx2(&[0xc4, 0b110_00010, 0b1_1111_101, 0x93, 0b00_000_100, 0xa1], "vgatherqpd ymm0, qword [ecx + ymm12 * 4], ymm0");
-    */
-
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b0_1111_001, 0xdb, 0b11_001_010], "vaesimc xmm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0xdb, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdb, 0b11_001_010]);
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xdc, 0b11_001_010], "vaesenc xmm1, xmm0, xmm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdc, 0b11_001_010], "vaesenc ymm1, ymm0, ymm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xdd, 0b11_001_010], "vaesenclast xmm1, xmm0, xmm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdd, 0b11_001_010], "vaesenclast ymm1, ymm0, ymm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xde, 0b11_001_010], "vaesdec xmm1, xmm0, xmm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xde, 0b11_001_010], "vaesdec ymm1, ymm0, ymm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_001, 0xdf, 0b11_001_010], "vaesdeclast xmm1, xmm0, xmm2");
-    test_instr_vex_aesni(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdf, 0b11_001_010], "vaesdeclast ymm1, ymm0, ymm2");
-
-    // prefix 01
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x10, 0b00_001_010], "vmovsd xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x10, 0b00_001_010], "vmovsd xmm1, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0x10, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x10, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x10, 0b00_001_010], "vmovupd xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x10, 0b00_001_010], "vmovupd ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x11, 0b00_001_010], "vmovupd xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x11, 0b00_001_010], "vmovupd ymmword [edx], ymm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x11, 0b00_001_010], "vmovsd qword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x11, 0b00_001_010], "vmovsd qword [edx], xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x10, 0b00_001_010], "vmovupd xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x10, 0b00_001_010], "vmovupd ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x11, 0b00_001_010], "vmovupd xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x11, 0b00_001_010], "vmovupd ymmword [edx], ymm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x10, 0b00_001_010], "vmovss xmm1, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x10, 0b00_001_010], "vmovss xmm1, dword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_010, 0x10, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_110, 0x10, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x10, 0b00_001_010], "vmovups xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x10, 0b00_001_010], "vmovups ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x11, 0b00_001_010], "vmovups xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x11, 0b00_001_010], "vmovups ymmword [edx], ymm1");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b11_001_010], "vmovsd xmm2, xmm0, xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b11_001_010], "vmovsd xmm2, xmm0, xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x11, 0b00_001_010], "vmovss dword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x11, 0b00_001_010], "vmovss dword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x11, 0b00_001_010], "vmovups xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x11, 0b00_001_010], "vmovups ymmword [edx], ymm1");
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x12, 0b00_001_010], "vmovddup xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x12, 0b00_001_010], "vmovddup ymm1, ymmword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_011, 0x12, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_111, 0x12, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x12, 0b11_001_010], "vmovhlps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x12, 0b00_001_010], "vmovlps xmm1, xmm0, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x12, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x12, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x12, 0b00_001_010], "vmovsldup xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x12, 0b00_001_010], "vmovsldup ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x12, 0b00_001_010], "vmovsldup xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x12, 0b00_001_010], "vmovsldup ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x12, 0b00_001_010], "vmovlpd xmm1, xmm0, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x12, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x13, 0b00_001_010], "vmovlpd qword [edx], xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x13, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x13, 0b00_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_000, 0x14, 0b00_001_010], "vunpcklps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_100, 0x14, 0b00_001_010], "vunpcklps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x14, 0b00_001_010], "vunpcklpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0x14, 0b00_001_010], "vunpcklpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_000, 0x15, 0b00_001_010], "vunpckhps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_100, 0x15, 0b00_001_010], "vunpckhps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x15, 0b00_001_010], "vunpckhpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0x15, 0b00_001_010], "vunpckhpd ymm1, ymm0, ymmword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x16, 0b11_001_010], "vmovshdup xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x16, 0b11_001_010], "vmovshdup ymm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_010, 0x16, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_110, 0x16, 0b11_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x16, 0b00_001_010], "vmovhps xmm1, xmm0, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x16, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b00_001_010], "vmovhpd xmm1, xmm0, qword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x16, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x17, 0b00_001_010], "vmovhps qword [edx], xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_000, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x17, 0b00_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x17, 0b00_001_010], "vmovhpd qword [edx], xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x17, 0b00_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x28, 0b11_001_010], "vmovaps xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x28, 0b11_001_010], "vmovaps ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x29, 0b11_001_010], "vmovaps xmm2, xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x29, 0b11_001_010], "vmovaps ymm2, ymm1");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x28, 0b11_001_010], "vmovapd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x28, 0b11_001_010], "vmovapd ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x29, 0b11_001_010], "vmovapd xmm2, xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x29, 0b11_001_010], "vmovapd ymm2, ymm1");
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2a, 0b00_001_010], "vcvtsi2ss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x2a, 0b00_001_010], "vcvtsi2ss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2a, 0b00_001_010], "vcvtsi2sd xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x2a, 0b00_001_010], "vcvtsi2sd xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc5, 0b1_1111_011, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx");
-    test_instr(&[0xc5, 0b1_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx");
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b00_001_010], "vmovntps xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b00_001_010], "vmovntps ymmword [edx], ymm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b11_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b00_001_010], "vmovntpd xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b00_001_010], "vmovntpd ymmword [edx], ymm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]");
-    test_instr(&[0xc5, 0b1_1111_010, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2");
-    test_instr(&[0xc5, 0b1_1111_010, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]");
-    test_instr(&[0xc5, 0b1_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]");
-    test_instr(&[0xc5, 0b1_1111_011, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2");
-    test_instr(&[0xc5, 0b1_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2");
-    test_instr(&[0xc5, 0b1_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]");
-    test_instr(&[0xc5, 0b1_1111_010, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2");
-    test_instr(&[0xc5, 0b1_1111_010, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]");
-    test_instr(&[0xc5, 0b1_1111_110, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]");
-    test_instr(&[0xc5, 0b1_1111_011, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2");
-    test_instr(&[0xc5, 0b1_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2");
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2e, 0b00_001_010], "vucomisd xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2e, 0b00_001_010], "vucomisd xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2e, 0b11_001_010], "vucomisd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2e, 0b11_001_010], "vucomisd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2f, 0b00_001_010], "vcomisd xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2f, 0b00_001_010], "vcomisd xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2f, 0b11_001_010], "vcomisd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x2f, 0b11_001_010], "vcomisd xmm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b11_001_010]);
-
-    test_instr(&[0xc5, 0b1_1111_000, 0x2e, 0b11_001_010], "vucomiss xmm1, xmm2");
-    test_instr(&[0xc5, 0b1_1111_100, 0x2e, 0b00_001_010], "vucomiss xmm1, dword [edx]");
-    test_instr(&[0xc5, 0b1_1111_000, 0x2f, 0b11_001_010], "vcomiss xmm1, xmm2");
-    test_instr(&[0xc5, 0b1_1111_100, 0x2f, 0b00_001_010], "vcomiss xmm1, dword [edx]");
-    test_invalid(&[0xc5, 0b1_1111_111, 0x2f, 0b11_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b11_001_010], "vmovmskps ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b11_001_010], "vmovmskps ecx, ymm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b00_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x50, 0b11_001_010], "vmovmskpd ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x50, 0b11_001_010], "vmovmskpd ecx, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b11_001_010], "vmovmskpd ecx, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b11_001_010], "vmovmskpd ecx, ymm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x50, 0b00_001_010]);
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x51, 0b00_001_010], "vsqrtpd xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x51, 0b00_001_010], "vsqrtpd ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_011, 0x51, 0b00_001_010], "vsqrtsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_111, 0x51, 0b00_001_010], "vsqrtsd xmm1, xmm0, qword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x51, 0b00_001_010], "vsqrtps xmm1, xmmword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_000, 0x51, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x51, 0b00_001_010], "vsqrtps ymm1, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x51, 0b00_001_010], "vsqrtss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x51, 0b00_001_010], "vsqrtss xmm1, xmm0, dword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x52, 0b11_001_010], "vrsqrtps xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x52, 0b11_001_010], "vrsqrtps ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x52, 0b11_001_010], "vrsqrtss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x52, 0b11_001_010], "vrsqrtss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x53, 0b11_001_010], "vrcpps xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x53, 0b11_001_010], "vrcpps ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x53, 0b11_001_010], "vrcpss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x53, 0b11_001_010], "vrcpss xmm1, xmm0, xmm2");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x54, 0b11_001_010], "vandps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x54, 0b11_001_010], "vandps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x55, 0b11_001_010], "vandnps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x55, 0b11_001_010], "vandnps ymm1, ymm0, ymm2");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x54, 0b00_001_010], "vandpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x54, 0b00_001_010], "vandpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x55, 0b00_001_010], "vandnpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x55, 0b00_001_010], "vandnpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x56, 0b00_001_010], "vorpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x56, 0b00_001_010], "vorpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x56, 0b00_001_010], "vorps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x56, 0b00_001_010], "vorps ymm1, ymm0, ymmword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x57, 0b11_001_010], "vxorps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x57, 0b11_001_010], "vxorps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x57, 0b11_001_010], "vxorpd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x57, 0b11_001_010], "vxorpd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x58, 0b11_001_010], "vaddps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x58, 0b11_001_010], "vaddps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x58, 0b11_001_010], "vaddss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x58, 0b11_001_010], "vaddss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x58, 0b00_001_010], "vaddss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x58, 0b00_001_010], "vaddss xmm1, xmm0, dword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x58, 0b00_001_010], "vaddpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x58, 0b00_001_010], "vaddpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x58, 0b00_001_010], "vaddsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x58, 0b00_001_010], "vaddsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x59, 0b00_001_010], "vmulps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x59, 0b00_001_010], "vmulps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x59, 0b00_001_010], "vmulpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x59, 0b00_001_010], "vmulpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x59, 0b00_001_010], "vmulss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x59, 0b00_001_010], "vmulss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x59, 0b00_001_010], "vmulsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x59, 0b00_001_010], "vmulsd xmm1, xmm0, qword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5a, 0b11_001_010], "vcvtps2pd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5a, 0b11_001_010], "vcvtps2pd ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5a, 0b00_001_010], "vcvtps2pd xmm1, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5a, 0b00_001_010], "vcvtps2pd ymm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x5a, 0b11_001_010], "vcvtpd2ps xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x5a, 0b11_001_010], "vcvtpd2ps xmm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x5a, 0b11_001_010], "vcvtsd2ss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x5a, 0b11_001_010], "vcvtsd2ss xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_011, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_111, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b11_001_010], "vcvtss2sd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x5a, 0b11_001_010], "vcvtss2sd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x5b, 0b11_001_010], "vcvtps2dq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x5b, 0b11_001_010], "vcvtps2dq ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x5b, 0b11_001_010], "vcvttps2dq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0x5b, 0b11_001_010], "vcvttps2dq ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5b, 0b11_001_010], "vcvtdq2ps xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_000, 0x5b, 0b00_001_010], "vcvtdq2ps xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5b, 0b11_001_010], "vcvtdq2ps ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_100, 0x5b, 0b00_001_010], "vcvtdq2ps ymm1, ymmword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0x5c, 0b00_001_010], "vsubps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_100, 0x5c, 0b00_001_010], "vsubps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_010, 0x5c, 0b00_001_010], "vsubss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_110, 0x5c, 0b00_001_010], "vsubss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x5c, 0b00_001_010], "vsubpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x5c, 0b00_001_010], "vsubpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_011, 0x5c, 0b00_001_010], "vsubsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_111, 0x5c, 0b00_001_010], "vsubsd xmm1, xmm0, qword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5d, 0b00_001_010], "vminps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x5d, 0b00_001_010], "vminps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x5d, 0b00_001_010], "vminss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x5d, 0b00_001_010], "vminss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x5d, 0b00_001_010], "vminpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x5d, 0b00_001_010], "vminpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x5d, 0b00_001_010], "vminsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x5d, 0b00_001_010], "vminsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5e, 0b00_001_010], "vdivps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5e, 0b00_001_010], "vdivps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x5e, 0b00_001_010], "vdivpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x5e, 0b00_001_010], "vdivss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x5e, 0b00_001_010], "vdivsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x5e, 0b00_001_010], "vdivps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x5e, 0b00_001_010], "vdivpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x5e, 0b00_001_010], "vdivss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x5e, 0b00_001_010], "vdivsd xmm1, xmm0, qword [edx]");
-
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0x5f, 0b00_001_010], "vmaxps xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x5f, 0b00_001_010], "vmaxpd xmm1, xmm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_010, 0x5f, 0b00_001_010], "vmaxss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x5f, 0b00_001_010], "vmaxsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0x5f, 0b00_001_010], "vmaxps ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x5f, 0b00_001_010], "vmaxpd ymm1, ymm0, ymmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_110, 0x5f, 0b00_001_010], "vmaxss xmm1, xmm0, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x5f, 0b00_001_010], "vmaxsd xmm1, xmm0, qword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x60, 0b11_001_010], "vpunpcklbw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x60, 0b11_001_010], "vpunpcklbw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x61, 0b11_001_010], "vpunpcklwd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x61, 0b11_001_010], "vpunpcklwd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x62, 0b11_001_010], "vpunpckldq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x62, 0b11_001_010], "vpunpckldq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x63, 0b11_001_010], "vpacksswb xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0x63, 0b11_001_010], "vpacksswb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x64, 0b11_001_010], "vpcmpgtb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x64, 0b11_001_010], "vpcmpgtb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x65, 0b11_001_010], "vpcmpgtw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x65, 0b11_001_010], "vpcmpgtw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x66, 0b11_001_010], "vpcmpgtd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x66, 0b11_001_010], "vpcmpgtd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x67, 0b11_001_010], "vpackuswb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x67, 0b11_001_010], "vpackuswb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x68, 0b11_001_010], "vpunpckhbw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x68, 0b11_001_010], "vpunpckhbw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x69, 0b11_001_010], "vpunpckhwd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x69, 0b11_001_010], "vpunpckhwd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x6a, 0b11_001_010], "vpunpckhdq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x6a, 0b11_001_010], "vpunpckhdq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0x6b, 0b11_001_010], "vpackssdw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0x6b, 0b11_001_010], "vpackssdw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6c, 0b11_001_010], "vpunpcklqdq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6c, 0b11_001_010], "vpunpcklqdq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6d, 0b11_001_010], "vpunpckhqdq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6d, 0b11_001_010], "vpunpckhqdq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6e, 0b11_001_010], "vmovd xmm1, edx");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x6e, 0b00_001_010], "vmovd xmm1, dword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xd6, 0b00_001_010], "vmovq qword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xd6, 0b11_001_010], "vmovq xmm2, xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6e, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x6f, 0b11_001_010], "vmovdqa xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x6f, 0b11_001_010], "vmovdqa ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x6f, 0b11_001_010], "vmovdqu xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x6f, 0b11_001_010], "vmovdqu ymm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x70, 0b11_001_010, 0x77], "vpshufd xmm1, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x70, 0b11_001_010, 0x77], "vpshufd ymm1, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0x70, 0b11_001_010, 0x77], "vpshufhw xmm1, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_110, 0x70, 0b11_001_010, 0x77], "vpshufhw ymm1, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0x70, 0b11_001_010, 0x77], "vpshuflw xmm1, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_111, 0x70, 0b11_001_010, 0x77], "vpshuflw ymm1, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_010_010, 0x77], "vpsrlw xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x71, 0b11_010_010, 0x77], "vpsrlw xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_010_010, 0x77], "vpsrlw ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_011_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_100_010, 0x77], "vpsraw xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_100_010, 0x77], "vpsraw ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_101_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_110_010, 0x77], "vpsllw xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_110_010, 0x77], "vpsllw ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_000_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_010_010, 0x77], "vpsrld xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_010_010, 0x77], "vpsrld ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_011_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_100_010, 0x77], "vpsrad xmm0, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_100_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_100_010, 0x77], "vpsrad ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_101_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_110_010, 0x77], "vpslld xmm0, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_110_010, 0x77]);
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_110_010, 0x77], "vpslld ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_111_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_000_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_010_010, 0x77], "vpsrlq xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_011_010, 0x77], "vpsrldq xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_010_010, 0x77], "vpsrlq ymm0, ymm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_011_010, 0x77], "vpsrldq ymm0, ymm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_100_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_101_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_110_010, 0x77], "vpsllq xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_111_010, 0x77], "vpslldq xmm0, xmm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_110_010, 0x77], "vpsllq ymm0, ymm2, 0x77");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_111_010, 0x77], "vpslldq ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x74, 0b11_001_010], "vpcmpeqb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0x74, 0b11_001_010], "vpcmpeqb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x75, 0b11_001_010], "vpcmpeqw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0x75, 0b11_001_010], "vpcmpeqw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x76, 0b11_001_010], "vpcmpeqd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0x76, 0b11_001_010], "vpcmpeqd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x7c, 0b11_001_010], "vhaddpd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x7c, 0b11_001_010], "vhaddpd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x7c, 0b11_001_010], "vhaddps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x7c, 0b11_001_010], "vhaddps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0x7d, 0b11_001_010], "vhsubpd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0x7d, 0b11_001_010], "vhsubpd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0x7d, 0b11_001_010], "vhsubps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0x7d, 0b11_001_010], "vhsubps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x7e, 0b11_001_010], "vmovd edx, xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_101, 0x7e, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0x7e, 0b11_001_010], "vmovd edx, xmm1");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x7e, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0x7f, 0b11_001_010], "vmovdqa xmm2, xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_101, 0x7f, 0b11_001_010], "vmovdqa ymm2, ymm1");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_010, 0x7f, 0b11_001_010], "vmovdqu xmm2, xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_110, 0x7f, 0b11_001_010], "vmovdqu ymm2, ymm1");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b00_010_001], "vldmxcsr dword [ecx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_010_001]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_010_001]);
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b00_011_001], "vstmxcsr dword [ecx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_011_001]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_011_001]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_000, 0xc2, 0b11_001_010, 0x77], "vcmpps xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_100, 0xc2, 0b11_001_010, 0x77], "vcmpps ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xc2, 0b11_001_010, 0x77], "vcmppd xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0xc2, 0b11_001_010, 0x77], "vcmppd ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0xc2, 0b11_001_010, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0xc2, 0b11_001_010, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xc4, 0b11_001_010, 0x77], "vpinsrw xmm1, xmm0, edx, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xc4, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b00_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b11_001_010, 0x77], "vpextrw ecx, xmm2, 0x77");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xc5, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xc5, 0b11_001_010, 0x77]);
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xc6, 0b11_001_010, 0x77], "vshufpd xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_101, 0xc6, 0b11_001_010, 0x77], "vshufpd ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_000, 0xc6, 0b11_001_010, 0x77], "vshufps xmm1, xmm0, xmm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_100, 0xc6, 0b11_001_010, 0x77], "vshufps ymm1, ymm0, ymm2, 0x77");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd0, 0b11_001_010], "vaddsubpd xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd0, 0b11_001_010], "vaddsubpd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_011, 0xd0, 0b11_001_010], "vaddsubps xmm1, xmm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_111, 0xd0, 0b11_001_010], "vaddsubps ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd1, 0b11_001_010], "vpsrlw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd1, 0b11_001_010], "vpsrlw ymm1, ymm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd1, 0b00_001_010], "vpsrlw ymm1, ymm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd2, 0b11_001_010], "vpsrld xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd2, 0b11_001_010], "vpsrld ymm1, ymm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd2, 0b00_001_010], "vpsrld ymm1, ymm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd3, 0b11_001_010], "vpsrlq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd3, 0b11_001_010], "vpsrlq ymm1, ymm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd3, 0b00_001_010], "vpsrlq ymm1, ymm0, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd4, 0b11_001_010], "vpaddq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd4, 0b11_001_010], "vpaddq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xd5, 0b11_001_010], "vpmullw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xd5, 0b11_001_010], "vpmullw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b11_001_010], "vpmovmskb ecx, xmm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b00_001_010]);
-    test_avx2(&[0xc4, 0b110_00001, 0b0_1111_101, 0xd7, 0b11_001_010], "vpmovmskb ecx, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd8, 0b11_001_010], "vpsubusb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd8, 0b11_001_010], "vpsubusb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xd9, 0b11_001_010], "vpsubusw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xd9, 0b11_001_010], "vpsubusw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xda, 0b11_001_010], "vpminub xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xda, 0b11_001_010], "vpminub ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdb, 0b11_001_010], "vpand xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdb, 0b11_001_010], "vpand ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdc, 0b11_001_010], "vpaddusb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdc, 0b11_001_010], "vpaddusb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdd, 0b11_001_010], "vpaddusw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdd, 0b11_001_010], "vpaddusw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xde, 0b11_001_010], "vpmaxub xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xde, 0b11_001_010], "vpmaxub ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xdf, 0b11_001_010], "vpandn xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xdf, 0b11_001_010], "vpandn ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe0, 0b11_001_010], "vpavgb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe0, 0b11_001_010], "vpavgb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe1, 0b11_001_010], "vpsraw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe1, 0b11_001_010], "vpsraw ymm1, ymm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe2, 0b11_001_010], "vpsrad xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe2, 0b11_001_010], "vpsrad ymm1, ymm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe3, 0b11_001_010], "vpavgw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe3, 0b11_001_010], "vpavgw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe4, 0b11_001_010], "vpmulhuw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe4, 0b11_001_010], "vpmulhuw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe5, 0b11_001_010], "vpmulhw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe5, 0b11_001_010], "vpmulhw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe6, 0b11_001_010], "vcvttpd2dq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe6, 0b11_001_010], "vcvttpd2dq xmm1, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_010, 0xe6, 0b11_001_010], "vcvtdq2pd xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_110, 0xe6, 0b11_001_010], "vcvtdq2pd ymm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0xe6, 0b11_001_010], "vcvtpd2dq xmm1, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0xe6, 0b11_001_010], "vcvtpd2dq xmm1, ymm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b00_001_010], "vmovntdq xmmword [edx], xmm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b00_001_010], "vmovntdq ymmword [edx], ymm1");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe8, 0b11_001_010], "vpsubsb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe8, 0b11_001_010], "vpsubsb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xe9, 0b11_001_010], "vpsubsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xe9, 0b11_001_010], "vpsubsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xea, 0b11_001_010], "vpminsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xea, 0b11_001_010], "vpminsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xeb, 0b11_001_010], "vpor xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xeb, 0b11_001_010], "vpor ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xec, 0b11_001_010], "vpaddsb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xec, 0b11_001_010], "vpaddsb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xed, 0b11_001_010], "vpaddsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xed, 0b11_001_010], "vpaddsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xee, 0b11_001_010], "vpmaxsw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xee, 0b11_001_010], "vpmaxsw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b0_0111_001, 0xef, 0b11_001_010], "vpxor xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b0_0111_101, 0xef, 0b11_001_010], "vpxor ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b00_001_010], "vlddqu xmm1, xmmword [edx]");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b00_001_010], "vlddqu ymm1, ymmword [edx]");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf1, 0b11_001_010], "vpsllw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf1, 0b11_001_010], "vpsllw ymm1, ymm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf2, 0b11_001_010], "vpslld xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf2, 0b11_001_010], "vpslld ymm1, ymm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf3, 0b11_001_010], "vpsllq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf3, 0b11_001_010], "vpsllq ymm1, ymm0, xmm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf4, 0b11_001_010], "vpmuludq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf4, 0b11_001_010], "vpmuludq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf5, 0b11_001_010], "vpmaddwd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf5, 0b11_001_010], "vpmaddwd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf6, 0b11_001_010], "vpsadbw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf6, 0b11_001_010], "vpsadbw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b11_001_010], "vmaskmovdqu xmm1, xmm2");
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf7, 0b11_001_010]);
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf8, 0b11_001_010], "vpsubb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf8, 0b11_001_010], "vpsubb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xf9, 0b11_001_010], "vpsubw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xf9, 0b11_001_010], "vpsubw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfa, 0b11_001_010], "vpsubd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfa, 0b11_001_010], "vpsubd ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfb, 0b11_001_010], "vpsubq xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfb, 0b11_001_010], "vpsubq ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfc, 0b11_001_010], "vpaddb xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfc, 0b11_001_010], "vpaddb ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfd, 0b11_001_010], "vpaddw xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfd, 0b11_001_010], "vpaddw ymm1, ymm0, ymm2");
-    test_instr(&[0xc4, 0b110_00001, 0b1_0111_001, 0xfe, 0b11_001_010], "vpaddd xmm1, xmm0, xmm2");
-    test_avx2(&[0xc4, 0b110_00001, 0b1_0111_101, 0xfe, 0b11_001_010], "vpaddd ymm1, ymm0, ymm2");
-
-    test_instr(&[0xc5, 0xf8, 0x10, 0x00], "vmovups xmm0, xmmword [eax]");
-    test_instr(&[0xc5, 0xf8, 0x10, 0x01], "vmovups xmm0, xmmword [ecx]");
-}
-
-#[test]
-fn strange_prefixing() {
-    test_display(&[0x66, 0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0xf2, 0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0xf3, 0x0f, 0x21, 0xc8], "mov eax, dr1");
-}
-
-#[test]
-fn prefixed_0f() {
-    test_display(&[0x0f, 0x02, 0x01], "lar eax, word [ecx]");
-    test_display(&[0x0f, 0x02, 0xc1], "lar eax, ecx");
-    test_display(&[0x66, 0x0f, 0x02, 0x01], "lar ax, word [ecx]");
-    test_display(&[0x66, 0x0f, 0x02, 0xc1], "lar ax, cx");
-    test_display(&[0x0f, 0x03, 0x01], "lsl eax, word [ecx]");
-    test_display(&[0x0f, 0x03, 0xc1], "lsl eax, ecx");
-    test_display(&[0x66, 0x0f, 0x03, 0x01], "lsl ax, word [ecx]");
-    test_display(&[0x66, 0x0f, 0x03, 0xc1], "lsl ax, cx");
-    test_display(&[0x0f, 0x05], "syscall");
-    test_display(&[0x66, 0x0f, 0x05], "syscall");
-    test_display(&[0x0f, 0x06], "clts");
-    test_display(&[0xf2, 0x0f, 0x06], "clts");
-    test_display(&[0x0f, 0x07], "sysret");
-    test_display(&[0xf2, 0x0f, 0x07], "sysret");
-    test_display(&[0x0f, 0x12, 0x0f], "movlps xmm1, qword [edi]");
-    test_display(&[0x0f, 0x12, 0xcf], "movhlps xmm1, xmm7");
-    test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [edi]");
-    test_display(&[0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7");
-    test_display(&[0x0f, 0x12, 0xc0], "movhlps xmm0, xmm0");
-    test_invalid(&[0x0f, 0x13, 0xc0]);
-    test_display(&[0x0f, 0x13, 0x00], "movlps qword [eax], xmm0");
-    test_display(&[0x0f, 0x14, 0x08], "unpcklps xmm1, xmmword [eax]");
-    test_display(&[0x0f, 0x15, 0x08], "unpckhps xmm1, xmmword [eax]");
-    test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [edi]");
-    test_display(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0");
-    test_invalid(&[0x0f, 0x17, 0xc0]);
-    test_display(&[0x0f, 0x17, 0x00], "movhps qword [eax], xmm0");
-    test_display(&[0x0f, 0x18, 0xc0], "nop eax"); // capstone says invalid, xed says nop
-    test_display(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [eax]");
-    test_display(&[0x0f, 0x18, 0x08], "prefetcht0 zmmword [eax]");
-    test_display(&[0x0f, 0x18, 0x10], "prefetcht1 zmmword [eax]");
-    test_display(&[0x0f, 0x18, 0x18], "prefetcht2 zmmword [eax]");
-    test_display(&[0x0f, 0x18, 0x20], "nop zmmword [eax]");
-    test_display(&[0x0f, 0x18, 0xcc], "nop esp");
-    test_display(&[0x0f, 0x19, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x1a, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x1b, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x1c, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x1d, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x1e, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x1f, 0x20], "nop dword [eax]");
-    test_display(&[0x0f, 0x20, 0xc0], "mov eax, cr0");
-    test_invalid(&[0x0f, 0x20, 0xc8]);
-    test_display(&[0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0x0f, 0x22, 0xc0], "mov cr0, eax");
-    test_invalid(&[0x0f, 0x22, 0xc8]);
-    test_display(&[0x0f, 0x22, 0xc7], "mov cr0, edi");
-    test_display(&[0x0f, 0x23, 0xc8], "mov dr1, eax");
-    test_display(&[0x0f, 0x23, 0xcf], "mov dr1, edi");
-    test_display(&[0x0f, 0x30], "wrmsr");
-    test_display(&[0x0f, 0x31], "rdtsc");
-    test_display(&[0x0f, 0x32], "rdmsr");
-    test_display(&[0x0f, 0x33], "rdpmc");
-    test_display(&[0x0f, 0x34], "sysenter");
-    test_display(&[0x0f, 0x35], "sysexit");
-    test_invalid(&[0x0f, 0x36]);
-    test_display(&[0x0f, 0x37], "getsec");
-    test_invalid(&[0x66, 0x0f, 0x37]);
-    test_invalid(&[0xf2, 0x0f, 0x37]);
-    test_invalid(&[0xf3, 0x0f, 0x37]);
-    test_display(&[0x0f, 0x60, 0x00], "punpcklbw mm0, dword [eax]");
-    test_display(&[0x0f, 0x60, 0xc2], "punpcklbw mm0, mm2");
-    test_display(&[0x0f, 0x61, 0x00], "punpcklwd mm0, dword [eax]");
-    test_display(&[0x0f, 0x61, 0xc2], "punpcklwd mm0, mm2");
-    test_display(&[0x0f, 0x62, 0x00], "punpckldq mm0, dword [eax]");
-    test_display(&[0x0f, 0x62, 0xc2], "punpckldq mm0, mm2");
-    test_display(&[0x0f, 0x63, 0x00], "packsswb mm0, qword [eax]");
-    test_display(&[0x0f, 0x63, 0xc2], "packsswb mm0, mm2");
-    test_display(&[0x0f, 0x64, 0x00], "pcmpgtb mm0, qword [eax]");
-    test_display(&[0x0f, 0x64, 0xc2], "pcmpgtb mm0, mm2");
-    test_display(&[0x0f, 0x65, 0x00], "pcmpgtw mm0, qword [eax]");
-    test_display(&[0x0f, 0x65, 0xc2], "pcmpgtw mm0, mm2");
-    test_display(&[0x0f, 0x66, 0x00], "pcmpgtd mm0, qword [eax]");
-    test_display(&[0x0f, 0x66, 0xc2], "pcmpgtd mm0, mm2");
-    test_display(&[0x0f, 0x67, 0x00], "packuswb mm0, qword [eax]");
-    test_display(&[0x0f, 0x67, 0xc2], "packuswb mm0, mm2");
-    test_display(&[0x0f, 0x68, 0x00], "punpckhbw mm0, qword [eax]");
-    test_display(&[0x0f, 0x68, 0xc2], "punpckhbw mm0, mm2");
-    test_display(&[0x0f, 0x69, 0x00], "punpckhwd mm0, qword [eax]");
-    test_display(&[0x0f, 0x69, 0xc2], "punpckhwd mm0, mm2");
-    test_display(&[0x0f, 0x6a, 0x00], "punpckhdq mm0, qword [eax]");
-    test_display(&[0x0f, 0x6a, 0xc2], "punpckhdq mm0, mm2");
-    test_display(&[0x0f, 0x6b, 0x00], "packssdw mm0, qword [eax]");
-    test_display(&[0x0f, 0x6b, 0xc2], "packssdw mm0, mm2");
-    test_invalid(&[0x0f, 0x6c]);
-    test_invalid(&[0x0f, 0x6d]);
-    test_display(&[0x0f, 0x6e, 0x00], "movd mm0, dword [eax]");
-    test_display(&[0x0f, 0x6e, 0xc2], "movd mm0, edx");
-    test_display(&[0x0f, 0x6f, 0x00], "movq mm0, qword [eax]");
-    test_display(&[0x0f, 0x6f, 0xc2], "movq mm0, mm2");
-    test_display(&[0x0f, 0x6f, 0xfb], "movq mm7, mm3");
-    test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [eax], 0x7f");
-    test_invalid(&[0x0f, 0x71, 0x00, 0x7f]);
-    test_invalid(&[0x0f, 0x71, 0xc0, 0x7f]);
-    test_display(&[0x0f, 0x71, 0xd0, 0x7f], "psrlw mm0, 0x7f");
-    test_display(&[0x0f, 0x71, 0xe0, 0x7f], "psraw mm0, 0x7f");
-    test_display(&[0x0f, 0x71, 0xf0, 0x7f], "psllw mm0, 0x7f");
-    test_invalid(&[0x0f, 0x72, 0x00, 0x7f]);
-    test_invalid(&[0x0f, 0x72, 0xc0, 0x7f]);
-    test_display(&[0x0f, 0x72, 0xd0, 0x7f], "psrld mm0, 0x7f");
-    test_display(&[0x0f, 0x72, 0xe0, 0x7f], "psrad mm0, 0x7f");
-    test_display(&[0x0f, 0x72, 0xf0, 0x7f], "pslld mm0, 0x7f");
-    test_invalid(&[0x0f, 0x73, 0x00, 0x7f]);
-    test_invalid(&[0x0f, 0x73, 0xc0, 0x7f]);
-    test_display(&[0x0f, 0x73, 0xd0, 0x7f], "psrlq mm0, 0x7f");
-    test_invalid(&[0x0f, 0x73, 0xe0, 0x7f]);
-    test_display(&[0x0f, 0x73, 0xf0, 0x7f], "psllq mm0, 0x7f");
-    test_display(&[0x0f, 0xa0], "push fs");
-    test_display(&[0x0f, 0xa1], "pop fs");
-    test_display(&[0x0f, 0xa2], "cpuid");
-    test_display(&[0x0f, 0xa4, 0xc0, 0x11], "shld eax, eax, 0x11");
-    test_display(&[0x66, 0x0f, 0xa4, 0xcf, 0x11], "shld di, cx, 0x11");
-    test_display(&[0x0f, 0xa5, 0xc0], "shld eax, eax, cl");
-    test_display(&[0x0f, 0xa5, 0xc9], "shld ecx, ecx, cl");
-    test_display(&[0x0f, 0xac, 0xc0, 0x11], "shrd eax, eax, 0x11");
-    test_display(&[0x66, 0x0f, 0xac, 0xcf, 0x11], "shrd di, cx, 0x11");
-    test_display(&[0x0f, 0xad, 0xc9], "shrd ecx, ecx, cl");
-}
-
-#[test]
-fn prefixed_660f() {
-    test_display(&[0x66, 0x0f, 0x10, 0xc0], "movupd xmm0, xmm0");
-    test_display(&[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0], "movsd xmm0, xmm0");
-}
-
-#[test]
-fn prefixed_f20f() {
-    test_invalid(&[0xf2, 0x0f, 0x16, 0xcf]);
-    test_invalid(&[0x66, 0xf2, 0x66, 0x0f, 0x16, 0xcf]);
-}
-
-#[test]
-fn prefixed_f30f() {
-    test_display(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7");
-    test_display(&[0xf3, 0x0f, 0x1e, 0xfa], "endbr64");
-    test_display(&[0xf3, 0x0f, 0x1e, 0xfb], "endbr32");
-    test_display(&[0xf3, 0x0f, 0x1e, 0xfc], "nop esp, edi");
-}
-
-#[test]
-fn only_32bit() {
-    test_display(&[0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66], "callf 0x6655:0x44332211");
-    test_display(&[0x66, 0x9a, 0x11, 0x22, 0x33, 0x44], "callf 0x4433:0x2211");
-    test_display(&[0x67, 0xac], "lods al, byte ds:[si]");
-    test_display(&[0x67, 0xae], "scas byte es:[di], al");
-    test_display(&[0xac], "lods al, byte ds:[esi]");
-    test_display(&[0xae], "scas byte es:[edi], al");
-    test_display(&[0x67, 0xf3, 0xa4], "rep movs byte es:[di], byte ds:[si]");
-    test_display(&[0xf3, 0xa4], "rep movs byte es:[edi], byte ds:[esi]");
-    test_display(&[0x67, 0xf3, 0xa5], "rep movs dword es:[di], dword ds:[si]");
-    test_display(&[0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]");
-    test_display(&[0x66, 0x67, 0x8b, 0x0e, 0x55, 0xaa], "mov cx, word [0xaa55]");
-    test_display(&[0x66, 0x8b, 0x0e], "mov cx, word [esi]");
-    test_display(&[0x40], "inc eax");
-    test_display(&[0x41], "inc ecx");
-    test_display(&[0x47], "inc edi");
-    test_display(&[0x48], "dec eax");
-    test_display(&[0x4f], "dec edi");
-
-    test_display(&[0xa0, 0xc0, 0xb0, 0xa0, 0x90], "mov al, byte [0x90a0b0c0]");
-    test_display(&[0x67, 0xa0, 0xc0, 0xb0], "mov al, byte [0xb0c0]");
-    test_display(&[0x67, 0xa1, 0xc0, 0xb0], "mov eax, dword [0xb0c0]");
-    test_display(&[0x66, 0x67, 0xa1, 0xc0, 0xb0], "mov ax, word [0xb0c0]");
-
-    test_display(&[0x60], "pushad");
-    test_display(&[0x61], "popad");
-    test_display(&[0x66, 0x60], "pusha");
-    test_display(&[0x66, 0x61], "popa");
-    test_display(&[0xce], "into");
-    test_display(&[0x06], "push es");
-    test_display(&[0x07], "pop es");
-    test_display(&[0x0e], "push cs");
-    test_display(&[0x16], "push ss");
-    test_display(&[0x17], "pop ss");
-    test_display(&[0x1e], "push ds");
-    test_display(&[0x1f], "pop ds");
-    test_display(&[0x27], "daa");
-    test_display(&[0x2f], "das");
-    test_display(&[0x37], "aaa");
-    test_display(&[0x3f], "aas");
-    test_display(&[0xd4, 0x01], "aam 0x1");
-    test_display(&[0xd4, 0x0a], "aam 0xa");
-    test_display(&[0xd5, 0x01], "aad 0x1");
-    test_display(&[0xd5, 0x0a], "aad 0xa");
-
-    test_display(&[0xc5, 0x78, 0x10], "lds edi, far [eax + 0x10]");
-    test_display(&[0x66, 0xc5, 0x78, 0x10], "lds di, dword [eax + 0x10]");
-}
-
-#[test]
-fn test_adx() {
-    test_display(&[0x66, 0x0f, 0x38, 0xf6, 0xc1], "adcx eax, ecx");
-    test_display(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, dword [ecx]");
-    test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0xc1], "adox eax, ecx");
-    test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, dword [ecx]");
-}
-
-#[test]
-fn test_prefetchw() {
-    test_display(&[0x0f, 0x0d, 0x08], "prefetchw zmmword [eax]");
-    test_display(&[0x0f, 0x0d, 0x00], "nop zmmword [eax]");
-    test_invalid(&[0x0f, 0x0d, 0xc0]);
-}
-
-#[test]
-fn test_lzcnt() {
-    test_display(&[0x66, 0xf3, 0x0f, 0xbd, 0xc1], "lzcnt ax, cx");
-    test_display(&[0xf3, 0x0f, 0xbd, 0xc1], "lzcnt eax, ecx");
-}
-
-#[test]
-fn test_svm() {
-    test_display(&[0x0f, 0x01, 0xdf], "invlpga eax, ecx");
-    test_display(&[0x0f, 0x01, 0xde], "skinit eax");
-    test_display(&[0x0f, 0x01, 0xdd], "clgi");
-    test_display(&[0x0f, 0x01, 0xdc], "stgi");
-    test_display(&[0x0f, 0x01, 0xdb], "vmsave eax");
-    test_display(&[0x0f, 0x01, 0xda], "vmload eax");
-    test_display(&[0x0f, 0x01, 0xd9], "vmmcall");
-    test_display(&[0x0f, 0x01, 0xd8], "vmrun eax");
-    test_display(&[0x0f, 0x78, 0xc4], "vmread esp, eax");
-    test_display(&[0x0f, 0x79, 0xc5], "vmwrite eax, ebp");
-    test_display(&[0x0f, 0x78, 0x0b], "vmread qword [ebx], ecx");
-    test_invalid(&[0x66, 0x0f, 0x78, 0x03]);
-    test_display(&[0x0f, 0x79, 0x0b], "vmwrite ecx, qword [ebx]");
-    test_invalid(&[0x66, 0x0f, 0x79, 0x03]);
-}
-
-#[test]
-fn test_movbe() {
-    test_display(&[0x0f, 0x38, 0xf0, 0x06], "movbe eax, dword [esi]");
-    test_invalid(&[0x0f, 0x38, 0xf0, 0xc6]);
-    test_display(&[0x0f, 0x38, 0xf1, 0x06], "movbe dword [esi], eax");
-    test_display(&[0x66, 0x0f, 0x38, 0xf1, 0x06], "movbe word [esi], ax");
-    test_invalid(&[0x66, 0x0f, 0x38, 0xf1, 0xc6]);
-}
-
-#[test]
-fn test_tsx() {
-    test_display(&[0xc6, 0xf8, 0x10], "xabort 0x10");
-    test_display(&[0xc7, 0xf8, 0x10, 0x12, 0x34, 0x56], "xbegin $+0x56341210");
-    test_display(&[0x66, 0xc7, 0xf8, 0x10, 0x12], "xbegin $+0x1210");
-    test_display(&[0x0f, 0x01, 0xd5], "xend");
-    test_display(&[0x0f, 0x01, 0xd6], "xtest");
-}
-
-#[test]
-fn test_rand() {
-    test_display(&[0x0f, 0xc7, 0xfd], "rdseed ebp");
-    test_display(&[0x66, 0x0f, 0xc7, 0xfd], "rdseed bp");
-    test_display(&[0x0f, 0xc7, 0xf5], "rdrand ebp");
-    test_display(&[0x66, 0x0f, 0xc7, 0xf5], "rdrand bp");
-}
-
-#[test]
-fn test_sha() {
-    test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, xmmword [edx], 0x40");
-    test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, xmmword [edx], 0xff");
-    // with astonishing dismay: 66-prefixed sha1rnds4 is #UD only in 32-bit and 16-bit mode.
-    test_invalid(&[0x66, 0x0f, 0x3a, 0xcc, 0x12, 0xff]);
-    test_display(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, xmmword [edx]");
-    test_display(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, xmmword [edx]");
-    test_display(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, xmmword [edx]");
-    test_display(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, xmmword [edx]");
-    test_display(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, xmmword [edx]");
-    test_display(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, xmmword [edx]");
-}
-
-#[test]
-fn test_vmx() {
-    fn test_display_vmx(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_vmx(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    test_display(&[0x0f, 0xc7, 0x3f], "vmptrst qword [edi]");
-    test_display(&[0x0f, 0xc7, 0x37], "vmptrld qword [edi]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon qword [edi]");
-    test_display(&[0x66, 0x0f, 0xc7, 0xf7], "rdrand di");
-    test_display(&[0x66, 0x0f, 0xc7, 0x37], "vmclear qword [edi]");
-
-    // this is actually vmx
-    // test_invalid(&[0x66, 0x0f, 0xc7, 0x03]);
-    test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [ebx]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [ebx]");
-
-    // these need vmx and invept features
-    test_display_vmx(&[0x66, 0x0f, 0x38, 0x80, 0x01], "invept eax, xmmword [ecx]");
-    test_display_vmx(&[0x66, 0x0f, 0x38, 0x81, 0x01], "invvpid eax, xmmword [ecx]");
-}
-
-#[test]
-fn test_rdpid() {
-    test_display(&[0xf3, 0x0f, 0xc7, 0xfd], "rdpid ebp");
-}
-
-#[test]
-fn test_cmpxchg8b() {
-    test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]");
-    test_display(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]");
-    test_display(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]");
-}
-
-#[test]
-fn test_x87() {
-//    test_display(&[0xd8, 0x03], "fadd st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x03], "fadd st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x0b], "fmul st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x0b], "fmul st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x13], "fcom st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x13], "fcom st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x1b], "fcomp st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x1b], "fcomp st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x23], "fsub st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x23], "fsub st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x2b], "fsubr st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x2b], "fsubr st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x33], "fdiv st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x33], "fdiv st(0), dword [ebx]");
-//    test_display(&[0xd8, 0x3b], "fdivr st, dword ptr [ebx]");
-    test_display(&[0xd8, 0x3b], "fdivr st(0), dword [ebx]");
-//    test_display(&[0xd8, 0xc3], "fadd st, st(3)");
-    test_display(&[0xd8, 0xc3], "fadd st(0), st(3)");
-//    test_display(&[0xd8, 0xcb], "fmul st, st(3)");
-    test_display(&[0xd8, 0xcb], "fmul st(0), st(3)");
-//    test_display(&[0xd8, 0xd3], "fcom st, st(3)");
-    test_display(&[0xd8, 0xd3], "fcom st(0), st(3)");
-//    test_display(&[0xd8, 0xdb], "fcomp st, st(3)");
-    test_display(&[0xd8, 0xdb], "fcomp st(0), st(3)");
-//    test_display(&[0xd8, 0xe3], "fsub st, st(3)");
-    test_display(&[0xd8, 0xe3], "fsub st(0), st(3)");
-//    test_display(&[0xd8, 0xeb], "fsubr st, st(3)");
-    test_display(&[0xd8, 0xeb], "fsubr st(0), st(3)");
-//    test_display(&[0xd8, 0xf3], "fdiv st, st(3)");
-    test_display(&[0xd8, 0xf3], "fdiv st(0), st(3)");
-//    test_display(&[0xd8, 0xfb], "fdivr st, st(3)");
-    test_display(&[0xd8, 0xfb], "fdivr st(0), st(3)");
-//    test_display(&[0xd9, 0x03], "fld st, dword ptr [ebx]");
-    test_display(&[0xd9, 0x03], "fld st(0), dword [ebx]");
-    test_invalid(&[0xd9, 0x08]);
-    test_invalid(&[0xd9, 0x09]);
-    test_invalid(&[0xd9, 0x0a]);
-    test_invalid(&[0xd9, 0x0b]);
-    test_invalid(&[0xd9, 0x0c]);
-    test_invalid(&[0xd9, 0x0d]);
-    test_invalid(&[0xd9, 0x0e]);
-    test_invalid(&[0xd9, 0x0f]);
-//    test_display(&[0xd9, 0x13], "fst dword ptr [ebx], st");
-    test_display(&[0xd9, 0x13], "fst dword [ebx], st(0)");
-//    test_display(&[0xd9, 0x1b], "fstp dword ptr [ebx], st");
-    test_display(&[0xd9, 0x1b], "fstp dword [ebx], st(0)");
-//    test_display(&[0xd9, 0x23], "fldenv ptr [ebx]");
-    test_display(&[0xd9, 0x23], "fldenv ptr [ebx]");
-//    test_display(&[0xd9, 0x2b], "fldcw word ptr [ebx]");
-    test_display(&[0xd9, 0x2b], "fldcw word [ebx]");
-//    test_display(&[0xd9, 0x33], "fnstenv ptr [ebx]");
-    test_display(&[0xd9, 0x33], "fnstenv ptr [ebx]");
-//    test_display(&[0xd9, 0x3b], "fnstcw word ptr [ebx]");
-    test_display(&[0xd9, 0x3b], "fnstcw word [ebx]");
-//    test_display(&[0xd9, 0xc3], "fld st, st(3)");
-    test_display(&[0xd9, 0xc3], "fld st(0), st(3)");
-//    test_display(&[0xd9, 0xcb], "fxch st, st(3)");
-    test_display(&[0xd9, 0xcb], "fxch st(0), st(3)");
-    test_display(&[0xd9, 0xd0], "fnop");
-    test_invalid(&[0xd9, 0xd1]);
-    test_invalid(&[0xd9, 0xd2]);
-    test_invalid(&[0xd9, 0xd3]);
-    test_invalid(&[0xd9, 0xd4]);
-    test_invalid(&[0xd9, 0xd5]);
-    test_invalid(&[0xd9, 0xd6]);
-    test_invalid(&[0xd9, 0xd7]);
-    // undocumented save for intel xed
-//    test_display(&[0xd9, 0xdb], "fstpnce st(3), st");
-    test_display(&[0xd9, 0xdb], "fstpnce st(3), st(0)");
-    test_display(&[0xd9, 0xe0], "fchs");
-    test_display(&[0xd9, 0xe1], "fabs");
-    test_invalid(&[0xd9, 0xe2]);
-    test_invalid(&[0xd9, 0xe3]);
-    test_display(&[0xd9, 0xe4], "ftst");
-    test_display(&[0xd9, 0xe5], "fxam");
-    test_invalid(&[0xd9, 0xe6]);
-    test_invalid(&[0xd9, 0xe7]);
-    test_display(&[0xd9, 0xe8], "fld1");
-    test_display(&[0xd9, 0xe9], "fldl2t");
-    test_display(&[0xd9, 0xea], "fldl2e");
-    test_display(&[0xd9, 0xeb], "fldpi");
-    test_display(&[0xd9, 0xec], "fldlg2");
-    test_display(&[0xd9, 0xed], "fldln2");
-    test_display(&[0xd9, 0xee], "fldz");
-    test_invalid(&[0xd9, 0xef]);
-    test_display(&[0xd9, 0xf0], "f2xm1");
-    test_display(&[0xd9, 0xf1], "fyl2x");
-    test_display(&[0xd9, 0xf2], "fptan");
-    test_display(&[0xd9, 0xf3], "fpatan");
-    test_display(&[0xd9, 0xf4], "fxtract");
-    test_display(&[0xd9, 0xf5], "fprem1");
-    test_display(&[0xd9, 0xf6], "fdecstp");
-    test_display(&[0xd9, 0xf7], "fincstp");
-    test_display(&[0xd9, 0xf8], "fprem");
-    test_display(&[0xd9, 0xf9], "fyl2xp1");
-    test_display(&[0xd9, 0xfa], "fsqrt");
-    test_display(&[0xd9, 0xfb], "fsincos");
-    test_display(&[0xd9, 0xfc], "frndint");
-    test_display(&[0xd9, 0xfd], "fscale");
-    test_display(&[0xd9, 0xfe], "fsin");
-    test_display(&[0xd9, 0xff], "fcos");
-//    test_display(&[0xda, 0x03], "fiadd st, dword ptr [ebx]");
-    test_display(&[0xda, 0x03], "fiadd st(0), dword [ebx]");
-//    test_display(&[0xda, 0x0b], "fimul st, dword ptr [ebx]");
-    test_display(&[0xda, 0x0b], "fimul st(0), dword [ebx]");
-//    test_display(&[0xda, 0x13], "ficom st, dword ptr [ebx]");
-    test_display(&[0xda, 0x13], "ficom st(0), dword [ebx]");
-//    test_display(&[0xda, 0x1b], "ficomp st, dword ptr [ebx]");
-    test_display(&[0xda, 0x1b], "ficomp st(0), dword [ebx]");
-//    test_display(&[0xda, 0x23], "fisub st, dword ptr [ebx]");
-    test_display(&[0xda, 0x23], "fisub st(0), dword [ebx]");
-//    test_display(&[0xda, 0x2b], "fisubr st, dword ptr [ebx]");
-    test_display(&[0xda, 0x2b], "fisubr st(0), dword [ebx]");
-//    test_display(&[0xda, 0x33], "fidiv st, dword ptr [ebx]");
-    test_display(&[0xda, 0x33], "fidiv st(0), dword [ebx]");
-//    test_display(&[0xda, 0x3b], "fidivr st, dword ptr [ebx]");
-    test_display(&[0xda, 0x3b], "fidivr st(0), dword [ebx]");
-//    test_display(&[0xda, 0xc3], "fcmovb st, st(3)");
-    test_display(&[0xda, 0xc3], "fcmovb st(0), st(3)");
-//    test_display(&[0xda, 0xcb], "fcmove st, st(3)");
-    test_display(&[0xda, 0xcb], "fcmove st(0), st(3)");
-//    test_display(&[0xda, 0xd3], "fcmovbe st, st(3)");
-    test_display(&[0xda, 0xd3], "fcmovbe st(0), st(3)");
-//    test_display(&[0xda, 0xdb], "fcmovu st, st(3)");
-    test_display(&[0xda, 0xdb], "fcmovu st(0), st(3)");
-    test_invalid(&[0xda, 0xe0]);
-    test_invalid(&[0xda, 0xe1]);
-    test_invalid(&[0xda, 0xe2]);
-    test_invalid(&[0xda, 0xe3]);
-    test_invalid(&[0xda, 0xe4]);
-    test_invalid(&[0xda, 0xe5]);
-    test_invalid(&[0xda, 0xe6]);
-    test_invalid(&[0xda, 0xe7]);
-    test_invalid(&[0xda, 0xe8]);
-    test_display(&[0xda, 0xe9], "fucompp");
-    test_invalid(&[0xda, 0xea]);
-    test_invalid(&[0xda, 0xeb]);
-    test_invalid(&[0xda, 0xec]);
-    test_invalid(&[0xda, 0xed]);
-    test_invalid(&[0xda, 0xee]);
-    test_invalid(&[0xda, 0xef]);
-    test_invalid(&[0xda, 0xf0]);
-    test_invalid(&[0xda, 0xf1]);
-    test_invalid(&[0xda, 0xf2]);
-    test_invalid(&[0xda, 0xf3]);
-    test_invalid(&[0xda, 0xf4]);
-    test_invalid(&[0xda, 0xf5]);
-    test_invalid(&[0xda, 0xf6]);
-    test_invalid(&[0xda, 0xf7]);
-    test_invalid(&[0xda, 0xf8]);
-    test_invalid(&[0xda, 0xf9]);
-    test_invalid(&[0xda, 0xfa]);
-    test_invalid(&[0xda, 0xfb]);
-    test_invalid(&[0xda, 0xfc]);
-    test_invalid(&[0xda, 0xfd]);
-    test_invalid(&[0xda, 0xfe]);
-    test_invalid(&[0xda, 0xff]);
-//    test_display(&[0xdb, 0x03], "fild st, dword ptr [ebx]");
-    test_display(&[0xdb, 0x03], "fild st(0), dword [ebx]");
-//    test_display(&[0xdb, 0x0b], "fisttp dword ptr [ebx], st");
-    test_display(&[0xdb, 0x0b], "fisttp dword [ebx], st(0)");
-//    test_display(&[0xdb, 0x13], "fist dword ptr [ebx], st");
-    test_display(&[0xdb, 0x13], "fist dword [ebx], st(0)");
-//    test_display(&[0xdb, 0x1b], "fistp dword ptr [ebx], st");
-    test_display(&[0xdb, 0x1b], "fistp dword [ebx], st(0)");
-    test_invalid(&[0xdb, 0x20]);
-    test_invalid(&[0xdb, 0x21]);
-    test_invalid(&[0xdb, 0x22]);
-    test_invalid(&[0xdb, 0x23]);
-    test_invalid(&[0xdb, 0x24]);
-    test_invalid(&[0xdb, 0x25]);
-    test_invalid(&[0xdb, 0x26]);
-    test_invalid(&[0xdb, 0x27]);
-//    test_display(&[0xdb, 0x2b], "fld st, ptr [ebx]");
-    test_display(&[0xdb, 0x2b], "fld st(0), mword [ebx]");
-    test_invalid(&[0xdb, 0x30]);
-    test_invalid(&[0xdb, 0x31]);
-    test_invalid(&[0xdb, 0x32]);
-    test_invalid(&[0xdb, 0x33]);
-    test_invalid(&[0xdb, 0x34]);
-    test_invalid(&[0xdb, 0x35]);
-    test_invalid(&[0xdb, 0x36]);
-    test_invalid(&[0xdb, 0x37]);
-//    test_display(&[0xdb, 0x3b], "fstp ptr [ebx], st");
-    test_display(&[0xdb, 0x3b], "fstp mword [ebx], st(0)");
-//    test_display(&[0xdb, 0xc3], "fcmovnb st, st(3)");
-    test_display(&[0xdb, 0xc3], "fcmovnb st(0), st(3)");
-//    test_display(&[0xdb, 0xcb], "fcmovne st, st(3)");
-    test_display(&[0xdb, 0xcb], "fcmovne st(0), st(3)");
-//    test_display(&[0xdb, 0xd3], "fcmovnbe st, st(3)");
-    test_display(&[0xdb, 0xd3], "fcmovnbe st(0), st(3)");
-//    test_display(&[0xdb, 0xdb], "fcmovnu st, st(3)");
-    test_display(&[0xdb, 0xdb], "fcmovnu st(0), st(3)");
-    test_display(&[0xdb, 0xe0], "feni8087_nop");
-    test_display(&[0xdb, 0xe1], "fdisi8087_nop");
-    test_display(&[0xdb, 0xe2], "fnclex");
-    test_display(&[0xdb, 0xe3], "fninit");
-    test_display(&[0xdb, 0xe4], "fsetpm287_nop");
-    test_invalid(&[0xdb, 0xe5]);
-    test_invalid(&[0xdb, 0xe6]);
-    test_invalid(&[0xdb, 0xe7]);
-//    test_display(&[0xdb, 0xeb], "fucomi st, st(3)");
-    test_display(&[0xdb, 0xeb], "fucomi st(0), st(3)");
-//    test_display(&[0xdb, 0xf3], "fcomi st, st(3)");
-    test_display(&[0xdb, 0xf3], "fcomi st(0), st(3)");
-    test_invalid(&[0xdb, 0xf8]);
-    test_invalid(&[0xdb, 0xf9]);
-    test_invalid(&[0xdb, 0xfa]);
-    test_invalid(&[0xdb, 0xfb]);
-    test_invalid(&[0xdb, 0xfc]);
-    test_invalid(&[0xdb, 0xfd]);
-    test_invalid(&[0xdb, 0xfe]);
-    test_invalid(&[0xdb, 0xff]);
-//    test_display(&[0xdc, 0x03], "fadd st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x03], "fadd st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x0b], "fmul st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x0b], "fmul st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x13], "fcom st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x13], "fcom st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x1b], "fcomp st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x1b], "fcomp st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x23], "fsub st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x23], "fsub st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x2b], "fsubr st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x2b], "fsubr st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x33], "fdiv st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x33], "fdiv st(0), qword [ebx]");
-//    test_display(&[0xdc, 0x3b], "fdivr st, qword ptr [ebx]");
-    test_display(&[0xdc, 0x3b], "fdivr st(0), qword [ebx]");
-//    test_display(&[0xdc, 0xc3], "fadd st(3), st");
-    test_display(&[0xdc, 0xc3], "fadd st(3), st(0)");
-//    test_display(&[0xdc, 0xcb], "fmul st(3), st");
-    test_display(&[0xdc, 0xcb], "fmul st(3), st(0)");
-//    test_display(&[0xdc, 0xd3], "fcom st, st(3)");
-    test_display(&[0xdc, 0xd3], "fcom st(0), st(3)");
-//    test_display(&[0xdc, 0xdb], "fcomp st, st(3)");
-    test_display(&[0xdc, 0xdb], "fcomp st(0), st(3)");
-//    test_display(&[0xdc, 0xe3], "fsubr st(3), st");
-    test_display(&[0xdc, 0xe3], "fsubr st(3), st(0)");
-//    test_display(&[0xdc, 0xeb], "fsub st(3), st");
-    test_display(&[0xdc, 0xeb], "fsub st(3), st(0)");
-//    test_display(&[0xdc, 0xf3], "fdivr st(3), st");
-    test_display(&[0xdc, 0xf3], "fdivr st(3), st(0)");
-//    test_display(&[0xdc, 0xfb], "fdiv st(3), st");
-    test_display(&[0xdc, 0xfb], "fdiv st(3), st(0)");
-//    test_display(&[0xdd, 0x03], "fld st, qword ptr [ebx]");
-    test_display(&[0xdd, 0x03], "fld st(0), qword [ebx]");
-//    test_display(&[0xdd, 0x0b], "fisttp qword ptr [ebx], st");
-    test_display(&[0xdd, 0x0b], "fisttp qword [ebx], st(0)");
-//    test_display(&[0xdd, 0x13], "fst qword ptr [ebx], st");
-    test_display(&[0xdd, 0x13], "fst qword [ebx], st(0)");
-//    test_display(&[0xdd, 0x1b], "fstp qword ptr [ebx], st");
-    test_display(&[0xdd, 0x1b], "fstp qword [ebx], st(0)");
-//    test_display(&[0xdd, 0x23], "frstor ptr [ebx]");
-    test_display(&[0xdd, 0x23], "frstor ptr [ebx]");
-    test_invalid(&[0xdd, 0x28]);
-    test_invalid(&[0xdd, 0x29]);
-    test_invalid(&[0xdd, 0x2a]);
-    test_invalid(&[0xdd, 0x2b]);
-    test_invalid(&[0xdd, 0x2c]);
-    test_invalid(&[0xdd, 0x2d]);
-    test_invalid(&[0xdd, 0x2e]);
-    test_invalid(&[0xdd, 0x2f]);
-//    test_display(&[0xdd, 0x33], "fnsave ptr [ebx]");
-    test_display(&[0xdd, 0x33], "fnsave ptr [ebx]");
-//    test_display(&[0xdd, 0x3b], "fnstsw word ptr [ebx]");
-    test_display(&[0xdd, 0x3b], "fnstsw word [ebx]");
-    test_display(&[0xdd, 0xc3], "ffree st(3)");
-//    test_display(&[0xdd, 0xcb], "fxch st, st(3)");
-    test_display(&[0xdd, 0xcb], "fxch st(0), st(3)");
-//    test_display(&[0xdd, 0xd3], "fst st(3), st");
-    test_display(&[0xdd, 0xd3], "fst st(3), st(0)");
-//    test_display(&[0xdd, 0xdb], "fstp st(3), st");
-    test_display(&[0xdd, 0xdb], "fstp st(3), st(0)");
-//    test_display(&[0xdd, 0xe3], "fucom st, st(3)");
-    test_display(&[0xdd, 0xe3], "fucom st(0), st(3)");
-//    test_display(&[0xdd, 0xeb], "fucomp st, st(3)");
-    test_display(&[0xdd, 0xeb], "fucomp st(0), st(3)");
-    test_invalid(&[0xdd, 0xf0]);
-    test_invalid(&[0xdd, 0xf1]);
-    test_invalid(&[0xdd, 0xf2]);
-    test_invalid(&[0xdd, 0xf3]);
-    test_invalid(&[0xdd, 0xf4]);
-    test_invalid(&[0xdd, 0xf5]);
-    test_invalid(&[0xdd, 0xf6]);
-    test_invalid(&[0xdd, 0xf7]);
-    test_invalid(&[0xdd, 0xf8]);
-    test_invalid(&[0xdd, 0xf9]);
-    test_invalid(&[0xdd, 0xfa]);
-    test_invalid(&[0xdd, 0xfb]);
-    test_invalid(&[0xdd, 0xfc]);
-    test_invalid(&[0xdd, 0xfd]);
-    test_invalid(&[0xdd, 0xfe]);
-    test_invalid(&[0xdd, 0xff]);
-//    test_display(&[0xde, 0x03], "fiadd st, word ptr [ebx]");
-    test_display(&[0xde, 0x03], "fiadd st(0), word [ebx]");
-//    test_display(&[0xde, 0x0b], "fimul st, word ptr [ebx]");
-    test_display(&[0xde, 0x0b], "fimul st(0), word [ebx]");
-//    test_display(&[0xde, 0x13], "ficom st, word ptr [ebx]");
-    test_display(&[0xde, 0x13], "ficom st(0), word [ebx]");
-//    test_display(&[0xde, 0x1b], "ficomp st, word ptr [ebx]");
-    test_display(&[0xde, 0x1b], "ficomp st(0), word [ebx]");
-//    test_display(&[0xde, 0x23], "fisub st, word ptr [ebx]");
-    test_display(&[0xde, 0x23], "fisub st(0), word [ebx]");
-//    test_display(&[0xde, 0x2b], "fisubr st, word ptr [ebx]");
-    test_display(&[0xde, 0x2b], "fisubr st(0), word [ebx]");
-//    test_display(&[0xde, 0x33], "fidiv st, word ptr [ebx]");
-    test_display(&[0xde, 0x33], "fidiv st(0), word [ebx]");
-//    test_display(&[0xde, 0x3b], "fidivr st, word ptr [ebx]");
-    test_display(&[0xde, 0x3b], "fidivr st(0), word [ebx]");
-//    test_display(&[0xde, 0xc3], "faddp st(3), st");
-    test_display(&[0xde, 0xc3], "faddp st(3), st(0)");
-//    test_display(&[0xde, 0xcb], "fmulp st(3), st");
-    test_display(&[0xde, 0xcb], "fmulp st(3), st(0)");
-//    test_display(&[0xde, 0xd3], "fcomp st, st(3)");
-    test_display(&[0xde, 0xd3], "fcomp st(0), st(3)");
-    test_invalid(&[0xde, 0xd8]);
-    test_display(&[0xde, 0xd9], "fcompp");
-    test_invalid(&[0xde, 0xda]);
-    test_invalid(&[0xde, 0xdb]);
-    test_invalid(&[0xde, 0xdc]);
-    test_invalid(&[0xde, 0xdd]);
-    test_invalid(&[0xde, 0xde]);
-    test_invalid(&[0xde, 0xdf]);
-//    test_display(&[0xde, 0xe3], "fsubrp st(3), st");
-    test_display(&[0xde, 0xe3], "fsubrp st(3), st(0)");
-//    test_display(&[0xde, 0xeb], "fsubp st(3), st");
-    test_display(&[0xde, 0xeb], "fsubp st(3), st(0)");
-//    test_display(&[0xde, 0xf3], "fdivrp st(3), st");
-    test_display(&[0xde, 0xf3], "fdivrp st(3), st(0)");
-//    test_display(&[0xde, 0xfb], "fdivp st(3), st");
-    test_display(&[0xde, 0xfb], "fdivp st(3), st(0)");
-//    test_display(&[0xdf, 0x03], "fild st, word ptr [ebx]");
-    test_display(&[0xdf, 0x03], "fild st(0), word [ebx]");
-//    test_display(&[0xdf, 0x0b], "fisttp word ptr [ebx], st");
-    test_display(&[0xdf, 0x0b], "fisttp word [ebx], st(0)");
-//    test_display(&[0xdf, 0x13], "fist word ptr [ebx], st");
-    test_display(&[0xdf, 0x13], "fist word [ebx], st(0)");
-//    test_display(&[0xdf, 0x1b], "fistp word ptr [ebx], st");
-    test_display(&[0xdf, 0x1b], "fistp word [ebx], st(0)");
-//    test_display(&[0xdf, 0x23], "fbld st, ptr [ebx]");
-    test_display(&[0xdf, 0x23], "fbld st(0), mword [ebx]");
-//    test_display(&[0xdf, 0x2b], "fild st, qword ptr [ebx]");
-    test_display(&[0xdf, 0x2b], "fild st(0), qword [ebx]");
-//    test_display(&[0xdf, 0x33], "fbstp ptr [ebx], st");
-    test_display(&[0xdf, 0x33], "fbstp mword [ebx], st(0)");
-//    test_display(&[0xdf, 0x3b], "fistp qword ptr [ebx], st");
-    test_display(&[0xdf, 0x3b], "fistp qword [ebx], st(0)");
-//    test_display(&[0xdf, 0xc3], "ffreep st(3)");
-    test_display(&[0xdf, 0xc3], "ffreep st(3)");
-//    test_display(&[0xdf, 0xcb], "fxch st, st(3)");
-    test_display(&[0xdf, 0xcb], "fxch st(0), st(3)");
-//    test_display(&[0xdf, 0xd3], "fstp st(3), st");
-    test_display(&[0xdf, 0xd3], "fstp st(3), st(0)");
-//    test_display(&[0xdf, 0xdb], "fstp st(3), st");
-    test_display(&[0xdf, 0xdb], "fstp st(3), st(0)");
-    test_display(&[0xdf, 0xe0], "fnstsw ax");
-    test_invalid(&[0xdf, 0xe1]);
-    test_invalid(&[0xdf, 0xe2]);
-    test_invalid(&[0xdf, 0xe3]);
-    test_invalid(&[0xdf, 0xe4]);
-    test_invalid(&[0xdf, 0xe5]);
-    test_invalid(&[0xdf, 0xe6]);
-    test_invalid(&[0xdf, 0xe7]);
-//    test_display(&[0xdf, 0xeb], "fucomip st, st(3)");
-    test_display(&[0xdf, 0xeb], "fucomip st(0), st(3)");
-//    test_display(&[0xdf, 0xf3], "fcomip st, st(3)");
-    test_display(&[0xdf, 0xf3], "fcomip st(0), st(3)");
-    test_invalid(&[0xdf, 0xf8]);
-    test_invalid(&[0xdf, 0xf9]);
-    test_invalid(&[0xdf, 0xfa]);
-    test_invalid(&[0xdf, 0xfb]);
-    test_invalid(&[0xdf, 0xfc]);
-    test_invalid(&[0xdf, 0xfd]);
-    test_invalid(&[0xdf, 0xfe]);
-    test_invalid(&[0xdf, 0xff]);
-}
-
-#[test]
-fn test_mishegos_finds() {
-    test_invalid(&[0xc5, 0x8c, 0x77]);
-    test_display(&[0x0f, 0xfc, 0xaf, 0x40, 0x38, 0x25, 0xbf], "paddb mm5, qword [edi - 0x40dac7c0]");
-    test_invalid(&[0xf3, 0x67, 0x0f, 0x3a, 0xf0, 0xfb, 0xb4]);
-    test_display(&[0x65, 0x66, 0x0f, 0x01, 0xdc], "stgi");
-    test_display(&[0x66, 0x0f, 0x01, 0xd8], "vmrun eax");
-    test_invalid(&[0x2e, 0x2e, 0xf2, 0x36, 0x0f, 0xb2, 0xdb, 0x42, 0xd6, 0xa3, 0x16]);
-    test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
-    test_display(&[0x26, 0x66, 0x67, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm4");
-    test_display(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword fs:[edi]");
-    test_invalid(&[0xf3, 0xf2, 0x0f, 0xae, 0x8f, 0x54, 0x3c, 0x58, 0xb7]);
-    /*
-    test_display(&[652e662e0f3814ff], "blendvps");
-    test_display(&[66666565450f3acf2b4b], "gf2 ");
-    */
-
-    // might just be yax trying to do a f20f decode when it should not be f2
-    // impossible instruction if operands could be read: lock is illegal here.
-    // test_display(&[f06565f2640f16], "???");
-//    test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd");
-    test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[eax - 0x5]");
-    test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]");
-    test_display(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b], "movntdqa xmm5, xmmword cs:[ebx]");
-    test_display(&[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c], "blendpd xmm7, xmmword cs:[bx + si * 1 + 0x2ff0], 0x7c");
-    test_display(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d], "pmovsxwd xmm3, qword [ebp + 0x2da80f69]");
-    test_display(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1], "insertps xmm1, dword fs:[ebx], -0x4f");
-    test_display(&[0x66, 0x26, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm2, xmmword es:[esi - 0x669d68c], 0x6a");
-    test_display(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03], "pmaxud xmm3, xmmword gs:[di + 0x3cc]");
-    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[ebp + 0x3e], edx");
-    test_invalid(&[0x66, 0x2e, 0x64, 0x66, 0x0f, 0x38, 0xf8, 0xe2]);
-    test_display(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1");
-    test_display(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, xmmword cs:[eax + 0x2d], 0x57");
-    test_display(&[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f], "lddqu xmm4, xmmword es:[bx + si * 1 + 0x5f1b]");
-    test_display(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, xmmword [eax], 0x48");
-
-    test_display(&[0x2e, 0x36, 0x0f, 0x18, 0xe7], "nop edi");
-    test_display(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg dword gs:[edi], ecx");
-    test_display(&[0x66, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75], "pclmulqdq xmm1, xmmword [eax + 0x3526adb3], 0x75");
-    test_display(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, dword [ebx - 0x54]");
-
-    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, zmmword ss:[ebx + 0x3f9d1c09]");
-    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, zmmword fs:[edx + 0x54]");
-    test_invalid(&[0xf3, 0x0f, 0x38, 0xf8, 0xf3]);
-
-    test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0");
-
-    test_invalid(&[0xf3, 0x2e, 0x0f, 0x6a, 0x18]);
-}
-
-#[test]
-fn test_cet() {
-    // see
-    // https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
-    // includes encodings:
-    // wruss{d,q} 066 f 38 f5
-    // wrss{d,q} 0f 38 f6
-    // rstorssp f3 0f 01 /5
-    // saveprevssp f3 0f 01 ea
-    // rdssp{d,q} f3 0f 1e
-    // incssp{d,q} f3 0f ae /5
-    // test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd [eax + ebx * 4 - 0x2c0accb3], ecx");
-    // setssbsy f3 0f 01 e8
-    // clrssbsy f3 0f ae /6
-    // endbr64 f3 0f ae fa
-    // endbr32 f3 0f ae fb
-    test_display(&[0xf3, 0x0f, 0xae, 0xe9], "incssp ecx");
-    test_display(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss dword [ebx], esp");
-    test_display(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss dword [edi - 0x17], eax");
-    test_invalid(&[0x0f, 0x38, 0xf5, 0x47, 0xe9]);
-    test_invalid(&[0x66, 0x3e, 0x65, 0x3e, 0x0f, 0x38, 0xf5, 0xf0]);
-    test_display(&[0xf3, 0x0f, 0x01, 0xe8], "setssbsy");
-    test_display(&[0xf3, 0x0f, 0x01, 0xea], "saveprevssp");
-    test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xe8], "setssbsy");
-    test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xea], "saveprevssp");
-    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xe8], "setssbsy");
-    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xea], "saveprevssp");
-    test_display(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp qword [ecx]");
-    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp qword [ecx]");
-    test_display(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy qword [eax]");
-}
-
-#[test]
-fn test_sse4a() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_sse4a(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-    }
-
-    test_instr(&[0xf2, 0x0f, 0x2b, 0x06], "movntsd qword [esi], xmm0");
-    test_invalid(&[0xf2, 0x0f, 0x2b, 0xc6]);
-    test_instr(&[0xf3, 0x0f, 0x2b, 0x06], "movntss dword [esi], xmm0");
-    test_invalid(&[0xf3, 0x0f, 0xba, 0xc6]);
-    test_instr(&[0x66, 0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7");
-    test_invalid(&[0x66, 0xf2, 0x0f, 0x79, 0x0f]);
-    test_instr(&[0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7");
-    test_instr(&[0xf2, 0x0f, 0x78, 0xf1, 0x4e, 0x76], "insertq xmm6, xmm1, 0x4e, 0x76");
-    test_invalid(&[0xf2, 0x0f, 0x79, 0x0f]);
-    test_instr(&[0x66, 0x0f, 0x79, 0xcf], "extrq xmm1, xmm7");
-    test_invalid(&[0x66, 0x0f, 0x79, 0x0f]);
-    test_instr(&[0x66, 0x0f, 0x78, 0xc1, 0x4e, 0x76], "extrq xmm1, 0x4e, 0x76");
-    test_invalid(&[0x66, 0x0f, 0x78, 0xc9, 0x4e, 0x76]);
-}
-
-#[test]
-fn test_3dnow() {
-    fn test_instr(bytes: &[u8], text: &'static str) {
-        test_display_under(&InstDecoder::minimal().with_3dnow(), bytes, text);
-        test_display_under(&InstDecoder::default(), bytes, text);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-        test_invalid_under(&InstDecoder::minimal(), bytes);
-        test_display_under(&yaxpeax_x86::protected_mode::uarch::amd::k8(), bytes, text);
-        test_invalid_under(&yaxpeax_x86::protected_mode::uarch::amd::bulldozer(), bytes);
-        test_invalid_under(&yaxpeax_x86::protected_mode::uarch::intel::netburst(), bytes);
-    }
-
-    test_instr(&[0x0f, 0x0f, 0xe0, 0x8a], "pfnacc mm4, mm0");
-    test_instr(&[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, qword [eax]");
-    test_instr(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
-    test_instr(&[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4], "pfmax mm4, qword cs:[ebx + edx * 4 - 0x6d]");
-    test_instr(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[eax - 0x5]");
-    test_instr(&[0x66, 0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6");
-    test_instr(&[0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6");
-    test_instr(&[0x0f, 0x0e], "femms");
+mod bad_instructions {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // too long
+        testcase!(invalid: &[
+             0x2e, 0x2e, 0x2e, 0x2e,
+             0x2e, 0x2e, 0x2e, 0x2e,
+             0x2e, 0x2e, 0x2e, 0x2e,
+             0x2e, 0x2e, 0x2e, 0x2e,
+             0x33, 0xc0,
+        ]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+
+mod test_cmp {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf6, 0x05, 0x2c, 0x9b, 0xff, 0xff, 0x01], "test byte [0xffff9b2c], 0x1"),
+        testcase!(&[0x3d, 0x01, 0xf0, 0xff, 0xff], "cmp eax, -0xfff"),
+        testcase!(&[0x83, 0xf8, 0xff], "cmp eax, -0x1"),
+        testcase!(&[0x39, 0xc6], "cmp esi, eax"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod push_pop {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x5b], "pop ebx"),
+        testcase!(&[0x5e], "pop esi"),
+        testcase!(&[0x68, 0x7f, 0x63, 0xc4, 0x00], "push 0xc4637f", masm: "push 0C4637Fh"),
+        testcase!(&[0x66, 0x8f, 0x00], "pop word [eax]", masm: "pop word ptr [eax]"),
+        testcase!(&[0x8f, 0x00], "pop dword [eax]", masm: "pop dword ptr [eax]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod bmi1 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features nodefault { BMI1: true } &[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt edx, ebx"),
+        testcase!(features nodefault { Minimal: true } &[0xf3, 0x0f, 0xbc, 0xd3], "bsf edx, ebx"),
+        testcase!(features nodefault { Minimal: true } &[0xf2, 0x0f, 0xbc, 0xd3], "bsf edx, ebx"),
+        testcase!(features nodefault { BMI1: true } &[0x0f, 0xbc, 0xd3], "bsf edx, ebx"),
+
+        // from the intel manual [`ANDN`, though this is true for `BMI1` generally]:
+        // ```
+        // VEX.W1 is ignored in non-64-bit modes.
+        // ```
+
+        // just 0f38
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0x60, 0xf2, 0x01], "andn eax, ebx, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0xe0, 0xf2, 0x01], "andn eax, ebx, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0x78, 0xf3, 0x09], "blsr eax, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0xf8, 0xf3, 0x09], "blsr eax, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0x78, 0xf3, 0x11], "blsmsk eax, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0xf8, 0xf3, 0x11], "blsmsk eax, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0x78, 0xf3, 0x19], "blsi eax, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0xf8, 0xf3, 0x19], "blsi eax, dword [ecx]"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0x60, 0xf7, 0x01], "bextr eax, dword [ecx], ebx"),
+        testcase!(features { BMI1: true } &[0xc4, 0xe2, 0xe0, 0xf7, 0x01], "bextr eax, dword [ecx], ebx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod bmi2 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // from the intel manual [`PDEP`, though this is true for `BMI2` generally]:
+        // ```
+        // VEX.W1 is ignored in non-64-bit modes.
+        // ```
+
+        // f2 0f3a
+        testcase!(features { BMI2: true } &[0xc4, 0xe3, 0x7b, 0xf0, 0x01, 0x05], "rorx eax, dword [ecx], 0x5"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05], "rorx eax, dword [ecx], 0x5"),
+
+        // f2 0f38 map
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x63, 0xf5, 0x07], "pdep eax, ebx, dword [edi]"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe3, 0xf5, 0x07], "pdep eax, ebx, dword [edi]"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x63, 0xf6, 0x07], "mulx eax, ebx, dword [edi]"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe3, 0xf6, 0x07], "mulx eax, ebx, dword [edi]"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x63, 0xf7, 0x01], "shrx eax, dword [ecx], ebx"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe3, 0xf7, 0x01], "shrx eax, dword [ecx], ebx"),
+
+        // f3 0f38 map
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x62, 0xf5, 0x07], "pext eax, ebx, dword [edi]"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe2, 0xf5, 0x07], "pext eax, ebx, dword [edi]"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x62, 0xf7, 0x01], "sarx eax, dword [ecx], ebx"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe2, 0xf7, 0x01], "sarx eax, dword [ecx], ebx"),
+
+        // just 0f38
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x60, 0xf5, 0x07], "bzhi eax, dword [edi], ebx"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe0, 0xf5, 0x07], "bzhi eax, dword [edi], ebx"),
+
+        // 66 0f38
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0x61, 0xf7, 0x01], "shlx eax, dword [ecx], ebx"),
+        testcase!(features { BMI2: true } &[0xc4, 0xe2, 0xe1, 0xf7, 0x01], "shlx eax, dword [ecx], ebx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod popcnt {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { Popcnt: true } &[0xf3, 0x0f, 0xb8, 0xc1], "popcnt eax, ecx"),
+        testcase!(features { SSE4_2_Intel: true } &[0xf3, 0x0f, 0xb8, 0xc1], "popcnt eax, ecx"),
+        testcase!(invalid: features nodefault { Minimal: false } &[0xf3, 0x0f, 0xb8, 0xc1]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod bitwise {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features nodefault { Minimal: true } &[0x0f, 0xbc, 0xd3], "bsf edx, ebx"),
+        testcase!(features nodefault { Minimal: true } &[0x0f, 0xbb, 0x17], "btc dword [edi], edx"),
+        testcase!(features nodefault { Minimal: true } &[0xf0, 0x0f, 0xbb, 0x17], "lock btc dword [edi], edx"),
+        testcase!(&[0x0f, 0xa3, 0xd0], "bt eax, edx"),
+        testcase!(&[0x0f, 0xab, 0xd0], "bts eax, edx"),
+        testcase!(&[0x0f, 0xb3, 0xd0], "btr eax, edx"),
+        testcase!(&[0x66, 0x0f, 0xb3, 0xc0], "btr ax, ax"),
+        testcase!(&[0xd2, 0xe0], "shl al, cl"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod misc {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf1], "int 0x1"),
+        testcase!(&[0xf5], "cmc"),
+        testcase!(&[0xc8, 0x01, 0x02, 0x03], "enter 0x201, 0x3"),
+        testcase!(&[0xc9], "leave"),
+        testcase!(&[0xca, 0x12, 0x34], "retf 0x3412"),
+        testcase!(&[0xcb], "retf"),
+        testcase!(&[0x66, 0xcf], "iret"),
+        testcase!(&[0xcf], "iretd"),
+        testcase!(&[0xf2, 0x0f, 0x38, 0xf0, 0xc1], "crc32 eax, cl"),
+        testcase!(&[0xf2, 0x0f, 0x38, 0xf1, 0xc1], "crc32 eax, ecx"),
+        testcase!(&[0xfe, 0x00], "inc byte [eax]"),
+        testcase!(&[0xfe, 0x08], "dec byte [eax]"),
+        testcase!(&[0xff, 0x00], "inc dword [eax]"),
+        testcase!(&[0xff, 0x08], "dec dword [eax]"),
+        testcase!(&[0xe4, 0x99], "in al, 0x99"),
+        testcase!(&[0xe5, 0x99], "in eax, 0x99", masm: "in eax, 99h"),
+        testcase!(&[0x67, 0xe5, 0x99], "in eax, 0x99"),
+        testcase!(&[0xe5, 0x99], "in eax, 0x99"),
+        testcase!(&[0xe6, 0x99], "out 0x99, al"),
+        testcase!(&[0xe7, 0x99], "out 0x99, eax", masm: "out 99h, eax"),
+        testcase!(&[0xec], "in al, dx"),
+        testcase!(&[0xed], "in eax, dx"),
+        testcase!(&[0xee], "out dx, al"),
+        testcase!(&[0xef], "out dx, eax"),
+        testcase!(&[0xcd, 0x00], "int 0x0"),
+        testcase!(&[0xcd, 0xff], "int 0xff"),
+        testcase!(&[0x9c], "pushf", masm: "pushfd"),
+        testcase!(&[0x98], "cwde"),
+        testcase!(&[0x66, 0x99], "cwd"),
+        testcase!(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop word cs:[eax + eax * 1]"),
+        testcase!(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop word [eax + eax * 1]"),
+        testcase!(&[0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea esp, dword [edi + eax * 8 + 0x12000020]"),
+        testcase!(&[0x33, 0xc0], "xor eax, eax"),
+        testcase!(&[0x8d, 0x53, 0x08], "lea edx, dword [ebx + 0x8]"),
+        testcase!(invalid: &[0x8d, 0xdd]),
+        testcase!(&[0x31, 0xc9], "xor ecx, ecx"),
+        testcase!(&[0x29, 0xc8], "sub eax, ecx"),
+        testcase!(&[0x03, 0x0b], "add ecx, dword [ebx]"),
+        testcase!(&[0x8d, 0x0c, 0x12], "lea ecx, dword [edx + edx * 1]"),
+        testcase!(&[0xf6, 0xc2, 0x18], "test dl, 0x18"),
+        testcase!(&[0xf3, 0xab], "rep stos dword es:[edi], eax"),
+        testcase!(&[0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]"),
+        testcase!(&[0xf3, 0x0f, 0xbc, 0xd7], "tzcnt edx, edi"),
+
+        // TODO:
+        // this is actually vmx
+        // testcase!(invalid: &[0x66, 0x0f, 0xc7, 0x03]),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [ebx]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [ebx]"),
+
+        testcase!(&[0xf3, 0x0f, 0xae, 0x26], "ptwrite dword [esi]"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xe6], "ptwrite esi"),
+        testcase!(invalid: &[0x66, 0xf3, 0x0f, 0xae, 0xe6]),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xc4], "rdfsbase esp"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xcc], "rdgsbase esp"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xd4], "wrfsbase esp"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xdc], "wrgsbase esp"),
+        testcase!(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt zmmword [edi]"), // or clflush without 66
+        testcase!(invalid: &[0x66, 0x0f, 0xae, 0xff]),
+        testcase!(&[0x66, 0x0f, 0xae, 0x37], "clwb zmmword [edi]"),
+        testcase!(&[0x66, 0x0f, 0xae, 0xf7], "tpause edi"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xf1], "umonitor ecx"),
+        testcase!(&[0x67, 0xf3, 0x0f, 0xae, 0xf1], "umonitor cx"),
+        testcase!(&[0xf2, 0x0f, 0xae, 0xf1], "umwait ecx"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, xmmword [edi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x80, 0x2f]),
+        testcase!(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, xmmword [edi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x81, 0x2f]),
+        testcase!(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, xmmword [edi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0x82, 0x2f]),
+        testcase!(&[0x66, 0x0f, 0xae, 0xf1], "tpause ecx"),
+        testcase!(&[0xc4, 0b111_00011, 0b0_1111_101, 0x1d, 0b11_001_010, 0x77], "vcvtps2ph xmm2, ymm1, 0x77"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod evex {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // vpbroadcastmw2d. similar to `vpmovm2*`, out-of-range `k` are just masked down.
+        testcase!(&[0x62, 0xd2, 0x7e, 0x28, 0x3a, 0xca], "vpbroadcastmw2d ymm1, k2"),
+        // vpmovm2b (and larger forms). for some reason the source operand is a mask register but uses
+        // modrm bits as a register selector. out-of-range `k` seem to just get masked down..
+        testcase!(&[0x62, 0xd2, 0x7e, 0x08, 0x28, 0xc2], "vpmovm2b xmm0, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x28, 0xc1], "vpmovm2b xmm0, k1"),
+        // vpmovb2m (and larger forms). out-of-range `k` are invalid in 64-bit mode, are part of the
+        // `bound` instruction for 32- and 16-bit modes.
+        testcase!(&[0x62, 0x72, 0x7e /* , 0x28, 0x29, 0xfd */], "bound esi, qword [edx + 0x7e]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x29, 0xfd], "vpmovb2m k7, ymm5"),
+
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa zmm0, zmmword [eax + eax * 2 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x44, 0x40, 0x01], "vmovntdqa xmm0, xmmword [eax + eax * 2 + 0x10]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod vex {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // prefix 03
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_001, 0x00, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x00, 0b11_001_010, 0x77]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b1_1111_101, 0x00, 0b11_001_010, 0x77], "vpermq ymm1, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_001, 0x01, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x01, 0b11_001_010, 0x77]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b1_1111_101, 0x01, 0b11_001_010, 0x77], "vpermpd ymm1, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_001, 0x02, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x02, 0b11_001_010, 0x77]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x02, 0b11_001_010, 0x77], "vpblendd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x02, 0b00_001_010, 0x77], "vpblendd xmm1, xmm0, xmmword [edx], 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x02, 0b11_001_010, 0x77], "vpblendd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x02, 0b00_001_010, 0x77], "vpblendd ymm1, ymm0, ymmword [edx], 0x77"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x04, 0b11_001_010, 0x77], "vpermilps xmm1, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x04, 0b11_001_010, 0x77], "vpermilps ymm1, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x05, 0b11_001_010, 0x77], "vpermilpd xmm1, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x05, 0b11_001_010, 0x77], "vpermilpd ymm1, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x06, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x06, 0b11_001_010, 0x77], "vperm2f128 ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x06, 0b00_001_010, 0x77], "vperm2f128 ymm1, ymm0, ymmword [edx], 0x77"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x0c, 0b11_001_010, 0x77], "vblendps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x0c, 0b11_001_010, 0x77], "vblendps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x0d, 0b11_001_010, 0x77], "vblendpd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x0d, 0b11_001_010, 0x77], "vblendpd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x0e, 0b11_001_010, 0x77], "vpblendw xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x0e, 0b11_001_010, 0x77], "vpblendw ymm1, ymm0, ymm2, 0x77"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x08, 0b11_001_010, 0x77], "vroundps xmm1, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x08, 0b11_001_010, 0x77], "vroundps ymm1, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x08, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x08, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x09, 0b11_001_010, 0x77], "vroundpd xmm1, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x09, 0b11_001_010, 0x77], "vroundpd ymm1, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x09, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x09, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x0a, 0b11_001_010, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x0a, 0b11_001_010, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x0b, 0b11_001_010, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x0b, 0b11_001_010, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b1_0111_001, 0x0f, 0b11_001_010, 0x77], "vpalignr xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b1_0111_101, 0x0f, 0b11_001_010, 0x77], "vpalignr ymm1, ymm0, ymm2, 0x77"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x14, 0b11_001_010, 0x77], "vpextrb edx, xmm1, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x14, 0b00_001_010, 0x77], "vpextrb byte [edx], xmm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x14, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x14, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x15, 0b11_001_010, 0x77], "vpextrw edx, xmm1, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x15, 0b00_001_010, 0x77], "vpextrw word [edx], xmm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x15, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x15, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x16, 0b11_001_010, 0x77], "vpextrd edx, xmm1, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x16, 0b00_001_010, 0x77], "vpextrd dword [edx], xmm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x16, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x16, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b1_1111_001, 0x16, 0b11_001_010, 0x77], "vpextrd edx, xmm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x16, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b1_1111_001, 0x16, 0b00_001_010, 0x77], "vpextrd dword [edx], xmm1, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x17, 0b11_001_010, 0x77], "vextractps edx, xmm1, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x17, 0b00_001_010, 0x77], "vextractps dword [edx], xmm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x17, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x17, 0b00_001_010, 0x77]),
+
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x18, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x18, 0b11_001_010, 0x77], "vinsertf128 ymm1, ymm0, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x19, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x19, 0b11_001_010, 0x77], "vextractf128 xmm2, ymm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]),
+
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x38, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x38, 0b11_001_010, 0x77]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x38, 0b11_001_010, 0x77], "vinserti128 ymm1, ymm0, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x39, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x39, 0b11_001_010, 0x77]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x39, 0b11_001_010, 0x77], "vextracti128 xmm2, ymm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]),
+
+        testcase!(features { AVX_F16C: true, AVX: false, F16C: false } &[0xc4, 0b110_00011, 0b0_1111_101, 0x1d, 0b11_001_010, 0x77], "vcvtps2ph xmm2, ymm1, 0x77"),
+        testcase!(features { AVX_F16C: true, AVX: false, F16C: false } &[0xc4, 0b110_00011, 0b0_1111_101, 0x1d, 0b11_001_010, 0x77], "vcvtps2ph xmm2, ymm1, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x1d, 0b11_001_010, 0x77]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x20, 0b11_001_010, 0x77], "vpinsrb xmm1, xmm0, edx, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x20, 0b00_001_010, 0x77], "vpinsrb xmm1, xmm0, byte [edx], 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x20, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x21, 0b11_001_010, 0x77], "vinsertps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x21, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x22, 0b11_001_010, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x22, 0b00_001_010, 0x77], "vpinsrd xmm1, xmm0, dword [edx], 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x22, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b1_0111_001, 0x22, 0b11_001_010, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b1_0111_001, 0x22, 0b00_001_010, 0x77], "vpinsrd xmm1, xmm0, dword [edx], 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x22, 0b00_001_010, 0x77]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x40, 0b11_001_010, 0x77], "vdpps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x40, 0b11_001_010, 0x77], "vdpps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x41, 0b11_001_010, 0x77], "vdppd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x41, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x42, 0b11_001_010, 0x77], "vmpsadbw xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x42, 0b11_001_010, 0x77], "vmpsadbw ymm1, ymm0, ymm2, 0x77"),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x46, 0b11_001_010, 0x77], "vperm2i128 ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_1111_101, 0x46, 0b00_001_010, 0x77], "vperm2i128 ymm1, ymm0, ymmword [edx], 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x46, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x46, 0b11_001_010, 0x77]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_0111_001, 0x4c, 0b11_001_010, 0x77], "vpblendvb xmm1, xmm0, xmm2, xmm7"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00011, 0b0_0111_101, 0x4c, 0b11_001_010, 0x77], "vpblendvb ymm1, ymm0, ymm2, ymm7"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x4c, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x4c, 0b11_001_010, 0x77]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x60, 0b11_001_010, 0x77], "vpcmpestrm xmm1, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x60, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x60, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x60, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x61, 0b11_001_010, 0x77], "vpcmpestri xmm1, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x61, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x61, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x61, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x62, 0b11_001_010, 0x77], "vpcmpistrm xmm1, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x62, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x62, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x62, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00011, 0b0_1111_001, 0x63, 0b11_001_010, 0x77], "vpcmpistri xmm1, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x63, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x63, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x63, 0b11_001_010, 0x77]),
+
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00011, 0b1_1111_001, 0xdf, 0b11_001_010, 0x77], "vaeskeygenassist xmm1, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0xdf, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0xdf, 0b11_001_010, 0x77]),
+
+        // prefix 02
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x00, 0b11_001_010], "vpshufb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x00, 0b11_001_010], "vpshufb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x01, 0b11_001_010], "vphaddw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x01, 0b11_001_010], "vphaddw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x02, 0b11_001_010], "vphaddd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x02, 0b11_001_010], "vphaddd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x03, 0b11_001_010], "vphaddsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x03, 0b11_001_010], "vphaddsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x04, 0b11_001_010], "vpmaddubsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x04, 0b11_001_010], "vpmaddubsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x05, 0b11_001_010], "vphsubw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x05, 0b11_001_010], "vphsubw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x06, 0b11_001_010], "vphsubd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x06, 0b11_001_010], "vphsubd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x07, 0b11_001_010], "vphsubsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x07, 0b11_001_010], "vphsubsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x08, 0b11_001_010], "vpsignb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x08, 0b11_001_010], "vpsignb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x09, 0b11_001_010], "vpsignw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x09, 0b11_001_010], "vpsignw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x0a, 0b11_001_010], "vpsignd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x0a, 0b11_001_010], "vpsignd ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x0b, 0b11_001_010], "vpmulhrsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x0b, 0b11_001_010], "vpmulhrsw ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x0c, 0b11_001_010], "vpermilps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x0c, 0b11_001_010], "vpermilps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x0d, 0b11_001_010], "vpermilpd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x0d, 0b11_001_010], "vpermilpd ymm1, ymm0, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x0d, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x0d, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x0e, 0b11_001_010], "vtestps xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x0e, 0b11_001_010], "vtestps ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x0e, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x0f, 0b11_001_010], "vtestpd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x0f, 0b11_001_010], "vtestpd ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x0f, 0b11_001_010]),
+        testcase!(features { AVX_F16C: true, AVX: false, F16C: false } &[0xc4, 0b111_00010, 0b0_1111_001, 0x13, 0b11_001_010], "vcvtph2ps xmm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b111_00010, 0b1_1111_001, 0x13, 0b11_001_010]),
+
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x16, 0b11_001_010], "vpermps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x16, 0b00_001_010], "vpermps ymm1, ymm0, ymmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x16, 0b00_011_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x16, 0b00_011_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x17, 0b11_001_010], "vptest xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x17, 0b11_001_010], "vptest ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x17, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x17, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x18, 0b00_001_010], "vbroadcastss xmm1, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b00_001_010], "vbroadcastss ymm1, dword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_001, 0x18, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x18, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b00_001_010], "vbroadcastsd ymm1, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x19, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x1a, 0b00_001_010], "vbroadcastf128 ymm1, xmmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x1a, 0b00_001_010]), // vex.w=1 is invalid
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b00_001_010], "vbroadcasti128 ymm1, xmmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x5a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x5a, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x18, 0b11_001_010], "vbroadcastss xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b11_001_010], "vbroadcastss ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x18, 0b00_001_010], "vbroadcastss ymm1, dword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x18, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x18, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x19, 0b11_001_010]), // "vbroadcastsd xmm, xmm" is not legal (L!=0)
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b11_001_010], "vbroadcastsd ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x19, 0b00_001_010], "vbroadcastsd ymm1, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x19, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x19, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b11_001_010]),
+
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x1c, 0b11_001_010], "vpabsb xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x1c, 0b11_001_010], "vpabsb ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x1c, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x1d, 0b11_001_010], "vpabsw xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x1d, 0b11_001_010], "vpabsw ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x1d, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x1e, 0b11_001_010], "vpabsd xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x1e, 0b11_001_010], "vpabsd ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x1e, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x20, 0b11_001_010], "vpmovsxbw xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x20, 0b11_001_010], "vpmovsxbw ymm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x20, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x21, 0b11_001_010], "vpmovsxbd xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x21, 0b11_001_010], "vpmovsxbd ymm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x21, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x22, 0b11_001_010], "vpmovsxbq xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x22, 0b11_001_010], "vpmovsxbq ymm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x22, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x23, 0b11_001_010], "vpmovsxwd xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x23, 0b11_001_010], "vpmovsxwd ymm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x23, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x24, 0b11_001_010], "vpmovsxwq xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x24, 0b11_001_010], "vpmovsxwq ymm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x24, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x25, 0b11_001_010], "vpmovsxdq xmm1, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x25, 0b11_001_010], "vpmovsxdq ymm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x25, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x28, 0b11_001_010], "vpmuldq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x28, 0b11_001_010], "vpmuldq ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x29, 0b11_001_010], "vpcmpeqq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x29, 0b11_001_010], "vpcmpeqq ymm1, ymm0, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x2a, 0b00_001_010], "vmovntdqa xmm1, xmmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b00_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x2a, 0b00_001_010], "vmovntdqa ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x2b, 0b11_001_010], "vpackusdw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x2b, 0b11_001_010], "vpackusdw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x2b, 0b00_001_010], "vpackusdw ymm1, ymm0, ymmword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x2c, 0b00_001_010], "vmaskmovps xmm1, xmm0, xmmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2c, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x2c, 0b00_001_010], "vmaskmovps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x2d, 0b00_001_010], "vmaskmovpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2d, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x2d, 0b00_001_010], "vmaskmovpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x2e, 0b00_001_010], "vmaskmovps xmmword [edx], xmm0, xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2e, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x2e, 0b00_001_010], "vmaskmovps ymmword [edx], ymm0, ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x2f, 0b00_001_010], "vmaskmovpd xmmword [edx], xmm0, xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2f, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x2f, 0b00_001_010], "vmaskmovpd ymmword [edx], ymm0, ymm1"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x30, 0b11_001_010], "vpmovzxbw xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x30, 0b11_001_010], "vpmovzxbw ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x31, 0b11_001_010], "vpmovzxbd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x31, 0b11_001_010], "vpmovzxbd ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x32, 0b11_001_010], "vpmovzxbq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x32, 0b11_001_010], "vpmovzxbq ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x33, 0b11_001_010], "vpmovzxwd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x33, 0b11_001_010], "vpmovzxwd ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x34, 0b11_001_010], "vpmovzxwq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x34, 0b11_001_010], "vpmovzxwq ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x35, 0b11_001_010], "vpmovzxdq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x35, 0b11_001_010], "vpmovzxdq ymm1, xmm2"),
+
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x30, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x30, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x31, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x31, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x32, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x32, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x33, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x33, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x34, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x34, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x35, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x35, 0b11_001_010]),
+
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x36, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x36, 0b11_001_010], "vpermd ymm1, ymm0, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x36, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x37, 0b11_001_010], "vpcmpgtq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x37, 0b11_001_010], "vpcmpgtq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x38, 0b11_001_010], "vpminsb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x38, 0b11_001_010], "vpminsb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x39, 0b11_001_010], "vpminsd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x39, 0b11_001_010], "vpminsd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x3a, 0b11_001_010], "vpminuw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x3a, 0b11_001_010], "vpminuw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x3b, 0b11_001_010], "vpminud xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x3b, 0b11_001_010], "vpminud ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x3c, 0b11_001_010], "vpmaxsb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x3c, 0b11_001_010], "vpmaxsb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x3d, 0b11_001_010], "vpmaxsd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x3d, 0b11_001_010], "vpmaxsd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x3e, 0b11_001_010], "vpmaxuw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x3e, 0b11_001_010], "vpmaxuw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x3f, 0b11_001_010], "vpmaxud xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x3f, 0b11_001_010], "vpmaxud ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_0111_001, 0x40, 0b11_001_010], "vpmulld xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_0111_101, 0x40, 0b11_001_010], "vpmulld ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x41, 0b11_001_010], "vphminposuw xmm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x41, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x41, 0b11_001_010]),
+    // TODO: should something b11at opcode 42 here?
+    //    testcase!(features { AVX: true } &[0xc4, 0b110_00010, 0b1_0111_001, 0x42, 0b11_001_010], "vphminposuw xmm"),
+    //    testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x41, 0b11_001_010]),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x45, 0b00_001_010], "vpsrlvd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x45, 0b00_001_010], "vpsrlvd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x45, 0b11_001_010], "vpsrlvd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x45, 0b11_001_010], "vpsrlvd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x45, 0b00_001_010], "vpsrlvq xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x45, 0b00_001_010], "vpsrlvq ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x45, 0b11_001_010], "vpsrlvq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x45, 0b11_001_010], "vpsrlvq ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x46, 0b00_001_010], "vpsravd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x46, 0b00_001_010], "vpsravd ymm1, ymm0, ymmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_001, 0x46, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x46, 0b00_001_010]),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x47, 0b00_001_010], "vpsllvd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x47, 0b00_001_010], "vpsllvd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x47, 0b11_001_010], "vpsllvd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x47, 0b11_001_010], "vpsllvd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x47, 0b00_001_010], "vpsllvq xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x47, 0b00_001_010], "vpsllvq ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x47, 0b11_001_010], "vpsllvq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x47, 0b11_001_010], "vpsllvq ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_001, 0x58, 0b11_000_001], "vpbroadcastd xmm0, xmm1"),
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_101, 0x58, 0b11_000_001], "vpbroadcastd ymm0, ymm1"),
+        testcase!(invalid: &[0xc4, 0b111_00010, 0b1_1111_001, 0x58, 0b11_000_001]),
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_001, 0x59, 0b11_000_001], "vpbroadcastq xmm0, xmm1"),
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_101, 0x59, 0b11_000_001], "vpbroadcastq ymm0, ymm1"),
+        testcase!(invalid: &[0xc4, 0b111_00010, 0b1_1111_001, 0x59, 0b11_000_001]),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_001, 0x78, 0b11_000_001], "vpbroadcastb xmm0, xmm1"),
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_101, 0x78, 0b11_000_001], "vpbroadcastb ymm0, ymm1"),
+        testcase!(invalid: &[0xc4, 0b111_00010, 0b1_1111_001, 0x78, 0b11_000_001]),
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_001, 0x79, 0b11_000_001], "vpbroadcastw xmm0, xmm1"),
+        testcase!(features { AVX2: true } &[0xc4, 0b111_00010, 0b0_1111_101, 0x79, 0b11_000_001], "vpbroadcastw ymm0, ymm1"),
+        testcase!(invalid: &[0xc4, 0b111_00010, 0b1_1111_001, 0x79, 0b11_000_001]),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b00_001_010], "vpmaskmovd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x8c, 0b00_001_010], "vpmaskmovd ymm1, ymm0, ymmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x8c, 0b00_001_010], "vpmaskmovq xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x8c, 0b00_001_010], "vpmaskmovq ymm1, ymm0, ymmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b00_001_010], "vpmaskmovd xmmword [edx], xmm0, xmm1"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x8e, 0b00_001_010], "vpmaskmovd ymmword [edx], ymm0, ymm1"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x8e, 0b00_001_010], "vpmaskmovq xmmword [edx], xmm0, xmm1"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x8e, 0b00_001_010], "vpmaskmovq ymmword [edx], ymm0, ymm1"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]),
+
+        /*
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x90, 0b00_000_100, 0xa1], "vpgatherdd xmm0, dword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x90, 0b00_000_100, 0xa1], "vpgatherdd ymm0, dword [ecx + ymm12 * 4], ymm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x90, 0b00_000_100, 0xa1], "vpgatherdq xmm0, dword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x90, 0b00_000_100, 0xa1], "vpgatherdq ymm0, qword [ecx + ymm12 * 4], ymm0"),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b000_00010, 0b0_1111_001, 0x91, 0b00_000_100, 0xa1], "vpgatherqd xmm0, dword xmmword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b000_00010, 0b0_1111_101, 0x91, 0b00_000_100, 0xa1], "vpgatherqd xmm0, dword xmmword [ecx + ymm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b000_00010, 0b1_1111_001, 0x91, 0b00_000_100, 0xa1], "vpgatherqq xmm0, dword xmmword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b000_00010, 0b1_1111_101, 0x91, 0b00_000_100, 0xa1], "vpgatherqq ymm0, qword xmmword [ecx + ymm12 * 4], ymm0"),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x92, 0b00_000_100, 0xa1], "vgatherdps xmm0, dword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x92, 0b00_000_100, 0xa1], "vgatherdps ymm0, qword [ecx + ymm12 * 4], ymm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x92, 0b00_000_100, 0xa1], "vgatherdpd xmm0, dword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x92, 0b00_000_100, 0xa1], "vgatherdpd ymm0, qword [ecx + ymm12 * 4], ymm0"),
+
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_001, 0x93, 0b00_000_100, 0xa1], "vgatherqps xmm0, dword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b0_1111_101, 0x93, 0b00_000_100, 0xa1], "vgatherqps ymm0, qword [ecx + ymm12 * 4], ymm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_001, 0x93, 0b00_000_100, 0xa1], "vgatherqpd xmm0, dword [ecx + xmm12 * 4], xmm0"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00010, 0b1_1111_101, 0x93, 0b00_000_100, 0xa1], "vgatherqpd ymm0, qword [ecx + ymm12 * 4], ymm0"),
+        */
+
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b0_1111_001, 0xdb, 0b11_001_010], "vaesimc xmm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0xdb, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0xdb, 0b11_001_010]),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_001, 0xdc, 0b11_001_010], "vaesenc xmm1, xmm0, xmm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_101, 0xdc, 0b11_001_010], "vaesenc ymm1, ymm0, ymm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_001, 0xdd, 0b11_001_010], "vaesenclast xmm1, xmm0, xmm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_101, 0xdd, 0b11_001_010], "vaesenclast ymm1, ymm0, ymm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_001, 0xde, 0b11_001_010], "vaesdec xmm1, xmm0, xmm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_101, 0xde, 0b11_001_010], "vaesdec ymm1, ymm0, ymm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_001, 0xdf, 0b11_001_010], "vaesdeclast xmm1, xmm0, xmm2"),
+        testcase!(features { AVX_AESNI: true, AVX: false, AESNI: false } &[0xc4, 0b110_00010, 0b1_0111_101, 0xdf, 0b11_001_010], "vaesdeclast ymm1, ymm0, ymm2"),
+
+        // prefix 01
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x10, 0b00_001_010], "vmovsd xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x10, 0b00_001_010], "vmovsd xmm1, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_011, 0x10, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0x10, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x10, 0b00_001_010], "vmovupd xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x10, 0b00_001_010], "vmovupd ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x11, 0b00_001_010], "vmovupd xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x11, 0b00_001_010], "vmovupd ymmword [edx], ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x11, 0b00_001_010], "vmovsd qword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x11, 0b00_001_010], "vmovsd qword [edx], xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x10, 0b00_001_010], "vmovupd xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x10, 0b00_001_010], "vmovupd ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x11, 0b00_001_010], "vmovupd xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x11, 0b00_001_010], "vmovupd ymmword [edx], ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x10, 0b00_001_010], "vmovss xmm1, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x10, 0b00_001_010], "vmovss xmm1, dword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_010, 0x10, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_110, 0x10, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x10, 0b00_001_010], "vmovups xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x10, 0b00_001_010], "vmovups ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x11, 0b00_001_010], "vmovups xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x11, 0b00_001_010], "vmovups ymmword [edx], ymm1"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b11_001_010], "vmovsd xmm2, xmm0, xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b11_001_010], "vmovsd xmm2, xmm0, xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x11, 0b00_001_010], "vmovss dword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x11, 0b00_001_010], "vmovss dword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x11, 0b00_001_010], "vmovups xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x11, 0b00_001_010], "vmovups ymmword [edx], ymm1"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x12, 0b00_001_010], "vmovddup xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x12, 0b00_001_010], "vmovddup ymm1, ymmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_011, 0x12, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_111, 0x12, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x12, 0b11_001_010], "vmovhlps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x12, 0b00_001_010], "vmovlps xmm1, xmm0, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_100, 0x12, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0x12, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x12, 0b00_001_010], "vmovsldup xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x12, 0b00_001_010], "vmovsldup ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x12, 0b00_001_010], "vmovsldup xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x12, 0b00_001_010], "vmovsldup ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x12, 0b00_001_010], "vmovlpd xmm1, xmm0, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x12, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x13, 0b00_001_010], "vmovlpd qword [edx], xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x13, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x13, 0b00_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_000, 0x14, 0b00_001_010], "vunpcklps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_100, 0x14, 0b00_001_010], "vunpcklps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x14, 0b00_001_010], "vunpcklpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x14, 0b00_001_010], "vunpcklpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_000, 0x15, 0b00_001_010], "vunpckhps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_100, 0x15, 0b00_001_010], "vunpckhps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x15, 0b00_001_010], "vunpckhpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x15, 0b00_001_010], "vunpckhpd ymm1, ymm0, ymmword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x16, 0b11_001_010], "vmovshdup xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x16, 0b11_001_010], "vmovshdup ymm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_010, 0x16, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_110, 0x16, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x16, 0b00_001_010], "vmovhps xmm1, xmm0, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_100, 0x16, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b00_001_010], "vmovhpd xmm1, xmm0, qword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x16, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x17, 0b00_001_010], "vmovhps qword [edx], xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_100, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_000, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_100, 0x17, 0b00_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x17, 0b00_001_010], "vmovhpd qword [edx], xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x17, 0b00_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_000, 0x28, 0b11_001_010], "vmovaps xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x28, 0b11_001_010], "vmovaps ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_000, 0x29, 0b11_001_010], "vmovaps xmm2, xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x29, 0b11_001_010], "vmovaps ymm2, ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x28, 0b11_001_010], "vmovapd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x28, 0b11_001_010], "vmovapd ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x29, 0b11_001_010], "vmovapd xmm2, xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x29, 0b11_001_010], "vmovapd ymm2, ymm1"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x2a, 0b00_001_010], "vcvtsi2ss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x2a, 0b00_001_010], "vcvtsi2ss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x2a, 0b11_001_010], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x2a, 0b00_001_010], "vcvtsi2sd xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x2a, 0b00_001_010], "vcvtsi2sd xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_011, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_111, 0x2a, 0b11_001_010], "vcvtsi2sd xmm1, xmm0, edx"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b00_001_010], "vmovntps xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b00_001_010], "vmovntps ymmword [edx], ymm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b00_001_010], "vmovntpd xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b00_001_010], "vmovntpd ymmword [edx], ymm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_010, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_010, 0x2c, 0b00_001_010], "vcvttss2si ecx, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_110, 0x2c, 0b11_001_010], "vcvttss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_011, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_111, 0x2c, 0b11_001_010], "vcvttsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_111, 0x2c, 0b00_001_010], "vcvttsd2si ecx, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_010, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_010, 0x2d, 0b00_001_010], "vcvtss2si ecx, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_110, 0x2d, 0b11_001_010], "vcvtss2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x2d, 0b00_001_010], "vcvtsd2si ecx, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_011, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_111, 0x2d, 0b11_001_010], "vcvtsd2si ecx, xmm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x2e, 0b00_001_010], "vucomisd xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x2e, 0b00_001_010], "vucomisd xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x2e, 0b11_001_010], "vucomisd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x2e, 0b11_001_010], "vucomisd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x2f, 0b00_001_010], "vcomisd xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x2f, 0b00_001_010], "vcomisd xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x2f, 0b11_001_010], "vcomisd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x2f, 0b11_001_010], "vcomisd xmm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_000, 0x2e, 0b11_001_010], "vucomiss xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_100, 0x2e, 0b00_001_010], "vucomiss xmm1, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_000, 0x2f, 0b11_001_010], "vcomiss xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc5, 0b1_1111_100, 0x2f, 0b00_001_010], "vcomiss xmm1, dword [edx]"),
+        testcase!(invalid: &[0xc5, 0b1_1111_111, 0x2f, 0b11_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b11_001_010], "vmovmskps ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b11_001_010], "vmovmskps ecx, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b00_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x50, 0b11_001_010], "vmovmskpd ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x50, 0b11_001_010], "vmovmskpd ecx, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b11_001_010], "vmovmskpd ecx, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b11_001_010], "vmovmskpd ecx, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x50, 0b00_001_010]),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x51, 0b00_001_010], "vsqrtpd xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x51, 0b00_001_010], "vsqrtpd ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_011, 0x51, 0b00_001_010], "vsqrtsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_111, 0x51, 0b00_001_010], "vsqrtsd xmm1, xmm0, qword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x51, 0b00_001_010], "vsqrtps xmm1, xmmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_000, 0x51, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x51, 0b00_001_010], "vsqrtps ymm1, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x51, 0b00_001_010], "vsqrtss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x51, 0b00_001_010], "vsqrtss xmm1, xmm0, dword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x52, 0b11_001_010], "vrsqrtps xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x52, 0b11_001_010], "vrsqrtps ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x52, 0b11_001_010], "vrsqrtss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x52, 0b11_001_010], "vrsqrtss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x53, 0b11_001_010], "vrcpps xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x53, 0b11_001_010], "vrcpps ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x53, 0b11_001_010], "vrcpss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x53, 0b11_001_010], "vrcpss xmm1, xmm0, xmm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x54, 0b11_001_010], "vandps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x54, 0b11_001_010], "vandps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x55, 0b11_001_010], "vandnps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x55, 0b11_001_010], "vandnps ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x54, 0b00_001_010], "vandpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x54, 0b00_001_010], "vandpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x55, 0b00_001_010], "vandnpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x55, 0b00_001_010], "vandnpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x56, 0b00_001_010], "vorpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x56, 0b00_001_010], "vorpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x56, 0b00_001_010], "vorps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x56, 0b00_001_010], "vorps ymm1, ymm0, ymmword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x57, 0b11_001_010], "vxorps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x57, 0b11_001_010], "vxorps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x57, 0b11_001_010], "vxorpd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x57, 0b11_001_010], "vxorpd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x58, 0b11_001_010], "vaddps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x58, 0b11_001_010], "vaddps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_010, 0x58, 0b11_001_010], "vaddss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_110, 0x58, 0b11_001_010], "vaddss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_010, 0x58, 0b00_001_010], "vaddss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_110, 0x58, 0b00_001_010], "vaddss xmm1, xmm0, dword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x58, 0b00_001_010], "vaddpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x58, 0b00_001_010], "vaddpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x58, 0b00_001_010], "vaddsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x58, 0b00_001_010], "vaddsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x59, 0b00_001_010], "vmulps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x59, 0b00_001_010], "vmulps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x59, 0b00_001_010], "vmulpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x59, 0b00_001_010], "vmulpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_010, 0x59, 0b00_001_010], "vmulss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_110, 0x59, 0b00_001_010], "vmulss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x59, 0b00_001_010], "vmulsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x59, 0b00_001_010], "vmulsd xmm1, xmm0, qword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x5a, 0b11_001_010], "vcvtps2pd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x5a, 0b11_001_010], "vcvtps2pd ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x5a, 0b00_001_010], "vcvtps2pd xmm1, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x5a, 0b00_001_010], "vcvtps2pd ymm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x5a, 0b11_001_010], "vcvtpd2ps xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x5a, 0b11_001_010], "vcvtpd2ps xmm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x5a, 0b11_001_010], "vcvtsd2ss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x5a, 0b11_001_010], "vcvtsd2ss xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_011, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_111, 0x5a, 0b00_001_010], "vcvtsd2ss xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b11_001_010], "vcvtss2sd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x5a, 0b11_001_010], "vcvtss2sd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x5a, 0b00_001_010], "vcvtss2sd xmm1, xmm0, dword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x5b, 0b11_001_010], "vcvtps2dq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x5b, 0b11_001_010], "vcvtps2dq ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x5b, 0b11_001_010], "vcvttps2dq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x5b, 0b11_001_010], "vcvttps2dq ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x5b, 0b11_001_010], "vcvtdq2ps xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_000, 0x5b, 0b00_001_010], "vcvtdq2ps xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x5b, 0b11_001_010], "vcvtdq2ps ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_100, 0x5b, 0b00_001_010], "vcvtdq2ps ymm1, ymmword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_000, 0x5c, 0b00_001_010], "vsubps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_100, 0x5c, 0b00_001_010], "vsubps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_010, 0x5c, 0b00_001_010], "vsubss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_110, 0x5c, 0b00_001_010], "vsubss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x5c, 0b00_001_010], "vsubpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x5c, 0b00_001_010], "vsubpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_011, 0x5c, 0b00_001_010], "vsubsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_111, 0x5c, 0b00_001_010], "vsubsd xmm1, xmm0, qword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x5d, 0b00_001_010], "vminps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x5d, 0b00_001_010], "vminps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_010, 0x5d, 0b00_001_010], "vminss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_110, 0x5d, 0b00_001_010], "vminss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x5d, 0b00_001_010], "vminpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x5d, 0b00_001_010], "vminpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x5d, 0b00_001_010], "vminsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x5d, 0b00_001_010], "vminsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x5e, 0b00_001_010], "vdivps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x5e, 0b00_001_010], "vdivps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x5e, 0b00_001_010], "vdivpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_010, 0x5e, 0b00_001_010], "vdivss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x5e, 0b00_001_010], "vdivsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x5e, 0b00_001_010], "vdivps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x5e, 0b00_001_010], "vdivpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_110, 0x5e, 0b00_001_010], "vdivss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x5e, 0b00_001_010], "vdivsd xmm1, xmm0, qword [edx]"),
+
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0x5f, 0b00_001_010], "vmaxps xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x5f, 0b00_001_010], "vmaxpd xmm1, xmm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_010, 0x5f, 0b00_001_010], "vmaxss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x5f, 0b00_001_010], "vmaxsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0x5f, 0b00_001_010], "vmaxps ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x5f, 0b00_001_010], "vmaxpd ymm1, ymm0, ymmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_110, 0x5f, 0b00_001_010], "vmaxss xmm1, xmm0, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x5f, 0b00_001_010], "vmaxsd xmm1, xmm0, qword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x60, 0b11_001_010], "vpunpcklbw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x60, 0b11_001_010], "vpunpcklbw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x61, 0b11_001_010], "vpunpcklwd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x61, 0b11_001_010], "vpunpcklwd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x62, 0b11_001_010], "vpunpckldq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x62, 0b11_001_010], "vpunpckldq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x63, 0b11_001_010], "vpacksswb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x63, 0b11_001_010], "vpacksswb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x64, 0b11_001_010], "vpcmpgtb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x64, 0b11_001_010], "vpcmpgtb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x65, 0b11_001_010], "vpcmpgtw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x65, 0b11_001_010], "vpcmpgtw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x66, 0b11_001_010], "vpcmpgtd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x66, 0b11_001_010], "vpcmpgtd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x67, 0b11_001_010], "vpackuswb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x67, 0b11_001_010], "vpackuswb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x68, 0b11_001_010], "vpunpckhbw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x68, 0b11_001_010], "vpunpckhbw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x69, 0b11_001_010], "vpunpckhwd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x69, 0b11_001_010], "vpunpckhwd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x6a, 0b11_001_010], "vpunpckhdq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x6a, 0b11_001_010], "vpunpckhdq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0x6b, 0b11_001_010], "vpackssdw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0x6b, 0b11_001_010], "vpackssdw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x6c, 0b11_001_010], "vpunpcklqdq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x6c, 0b11_001_010], "vpunpcklqdq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x6d, 0b11_001_010], "vpunpckhqdq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x6d, 0b11_001_010], "vpunpckhqdq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x6e, 0b11_001_010], "vmovd xmm1, edx"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x6e, 0b00_001_010], "vmovd xmm1, dword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xd6, 0b00_001_010], "vmovq qword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xd6, 0b11_001_010], "vmovq xmm2, xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x6e, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x6f, 0b11_001_010], "vmovdqa xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x6f, 0b11_001_010], "vmovdqa ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x6f, 0b11_001_010], "vmovdqu xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x6f, 0b11_001_010], "vmovdqu ymm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x70, 0b11_001_010, 0x77], "vpshufd xmm1, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x70, 0b11_001_010, 0x77], "vpshufd ymm1, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0x70, 0b11_001_010, 0x77], "vpshufhw xmm1, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0x70, 0b11_001_010, 0x77], "vpshufhw ymm1, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0x70, 0b11_001_010, 0x77], "vpshuflw xmm1, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0x70, 0b11_001_010, 0x77], "vpshuflw ymm1, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_010_010, 0x77], "vpsrlw xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x71, 0b11_010_010, 0x77], "vpsrlw xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_010_010, 0x77], "vpsrlw ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_011_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_100_010, 0x77], "vpsraw xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_100_010, 0x77], "vpsraw ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_101_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_110_010, 0x77], "vpsllw xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x71, 0b11_110_010, 0x77], "vpsllw ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_000_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_010_010, 0x77], "vpsrld xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_010_010, 0x77], "vpsrld ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_011_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_100_010, 0x77], "vpsrad xmm0, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_100_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_100_010, 0x77], "vpsrad ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_101_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b11_110_010, 0x77], "vpslld xmm0, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_110_010, 0x77]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_110_010, 0x77], "vpslld ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_111_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_000_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_010_010, 0x77], "vpsrlq xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_011_010, 0x77], "vpsrldq xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_010_010, 0x77], "vpsrlq ymm0, ymm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_011_010, 0x77], "vpsrldq ymm0, ymm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_100_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_101_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_110_010, 0x77], "vpsllq xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_111_010, 0x77], "vpslldq xmm0, xmm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_110_010, 0x77], "vpsllq ymm0, ymm2, 0x77"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0x73, 0b11_111_010, 0x77], "vpslldq ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x74, 0b11_001_010], "vpcmpeqb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x74, 0b11_001_010], "vpcmpeqb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x75, 0b11_001_010], "vpcmpeqw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x75, 0b11_001_010], "vpcmpeqw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x76, 0b11_001_010], "vpcmpeqd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x76, 0b11_001_010], "vpcmpeqd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x7c, 0b11_001_010], "vhaddpd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x7c, 0b11_001_010], "vhaddpd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x7c, 0b11_001_010], "vhaddps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x7c, 0b11_001_010], "vhaddps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0x7d, 0b11_001_010], "vhsubpd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0x7d, 0b11_001_010], "vhsubpd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0x7d, 0b11_001_010], "vhsubps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0x7d, 0b11_001_010], "vhsubps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x7e, 0b11_001_010], "vmovd edx, xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_101, 0x7e, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0x7e, 0b11_001_010], "vmovd edx, xmm1"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x7e, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0x7f, 0b11_001_010], "vmovdqa xmm2, xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0x7f, 0b11_001_010], "vmovdqa ymm2, ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_010, 0x7f, 0b11_001_010], "vmovdqu xmm2, xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_110, 0x7f, 0b11_001_010], "vmovdqu ymm2, ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b00_010_001], "vldmxcsr dword [ecx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_010_001]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_010_001]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b00_011_001], "vstmxcsr dword [ecx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_011_001]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_011_001]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_000, 0xc2, 0b11_001_010, 0x77], "vcmpps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_100, 0xc2, 0b11_001_010, 0x77], "vcmpps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xc2, 0b11_001_010, 0x77], "vcmppd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xc2, 0b11_001_010, 0x77], "vcmppd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0xc2, 0b11_001_010, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0xc2, 0b11_001_010, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xc4, 0b11_001_010, 0x77], "vpinsrw xmm1, xmm0, edx, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xc4, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b00_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b11_001_010, 0x77], "vpextrw ecx, xmm2, 0x77"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0xc5, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xc5, 0b11_001_010, 0x77]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xc6, 0b11_001_010, 0x77], "vshufpd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xc6, 0b11_001_010, 0x77], "vshufpd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_000, 0xc6, 0b11_001_010, 0x77], "vshufps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_100, 0xc6, 0b11_001_010, 0x77], "vshufps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd0, 0b11_001_010], "vaddsubpd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd0, 0b11_001_010], "vaddsubpd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_011, 0xd0, 0b11_001_010], "vaddsubps xmm1, xmm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_111, 0xd0, 0b11_001_010], "vaddsubps ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd1, 0b11_001_010], "vpsrlw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd1, 0b11_001_010], "vpsrlw ymm1, ymm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd1, 0b00_001_010], "vpsrlw ymm1, ymm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd2, 0b11_001_010], "vpsrld xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd2, 0b11_001_010], "vpsrld ymm1, ymm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd2, 0b00_001_010], "vpsrld ymm1, ymm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd3, 0b11_001_010], "vpsrlq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd3, 0b11_001_010], "vpsrlq ymm1, ymm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd3, 0b00_001_010], "vpsrlq ymm1, ymm0, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd4, 0b11_001_010], "vpaddq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd4, 0b11_001_010], "vpaddq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xd5, 0b11_001_010], "vpmullw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xd5, 0b11_001_010], "vpmullw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b11_001_010], "vpmovmskb ecx, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b00_001_010]),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_1111_101, 0xd7, 0b11_001_010], "vpmovmskb ecx, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd8, 0b11_001_010], "vpsubusb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd8, 0b11_001_010], "vpsubusb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xd9, 0b11_001_010], "vpsubusw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xd9, 0b11_001_010], "vpsubusw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xda, 0b11_001_010], "vpminub xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xda, 0b11_001_010], "vpminub ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xdb, 0b11_001_010], "vpand xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xdb, 0b11_001_010], "vpand ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xdc, 0b11_001_010], "vpaddusb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xdc, 0b11_001_010], "vpaddusb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xdd, 0b11_001_010], "vpaddusw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xdd, 0b11_001_010], "vpaddusw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xde, 0b11_001_010], "vpmaxub xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xde, 0b11_001_010], "vpmaxub ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xdf, 0b11_001_010], "vpandn xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xdf, 0b11_001_010], "vpandn ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe0, 0b11_001_010], "vpavgb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe0, 0b11_001_010], "vpavgb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe1, 0b11_001_010], "vpsraw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe1, 0b11_001_010], "vpsraw ymm1, ymm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe2, 0b11_001_010], "vpsrad xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe2, 0b11_001_010], "vpsrad ymm1, ymm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe3, 0b11_001_010], "vpavgw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe3, 0b11_001_010], "vpavgw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe4, 0b11_001_010], "vpmulhuw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe4, 0b11_001_010], "vpmulhuw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe5, 0b11_001_010], "vpmulhw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe5, 0b11_001_010], "vpmulhw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xe6, 0b11_001_010], "vcvttpd2dq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0xe6, 0b11_001_010], "vcvttpd2dq xmm1, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_010, 0xe6, 0b11_001_010], "vcvtdq2pd xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_110, 0xe6, 0b11_001_010], "vcvtdq2pd ymm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0xe6, 0b11_001_010], "vcvtpd2dq xmm1, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0xe6, 0b11_001_010], "vcvtpd2dq xmm1, ymm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b00_001_010], "vmovntdq xmmword [edx], xmm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b00_001_010], "vmovntdq ymmword [edx], ymm1"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe8, 0b11_001_010], "vpsubsb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe8, 0b11_001_010], "vpsubsb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xe9, 0b11_001_010], "vpsubsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xe9, 0b11_001_010], "vpsubsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xea, 0b11_001_010], "vpminsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xea, 0b11_001_010], "vpminsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xeb, 0b11_001_010], "vpor xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xeb, 0b11_001_010], "vpor ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xec, 0b11_001_010], "vpaddsb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xec, 0b11_001_010], "vpaddsb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xed, 0b11_001_010], "vpaddsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xed, 0b11_001_010], "vpaddsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xee, 0b11_001_010], "vpmaxsw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xee, 0b11_001_010], "vpmaxsw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b0_0111_001, 0xef, 0b11_001_010], "vpxor xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b0_0111_101, 0xef, 0b11_001_010], "vpxor ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b00_001_010], "vlddqu xmm1, xmmword [edx]"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b00_001_010], "vlddqu ymm1, ymmword [edx]"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_011, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xf1, 0b11_001_010], "vpsllw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xf1, 0b11_001_010], "vpsllw ymm1, ymm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xf2, 0b11_001_010], "vpslld xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xf2, 0b11_001_010], "vpslld ymm1, ymm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xf3, 0b11_001_010], "vpsllq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xf3, 0b11_001_010], "vpsllq ymm1, ymm0, xmm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xf4, 0b11_001_010], "vpmuludq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xf4, 0b11_001_010], "vpmuludq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xf5, 0b11_001_010], "vpmaddwd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0xf5, 0b11_001_010], "vpmaddwd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xf6, 0b11_001_010], "vpsadbw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_1111_101, 0xf6, 0b11_001_010], "vpsadbw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b11_001_010], "vmaskmovdqu xmm1, xmm2"),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xf7, 0b11_001_010]),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xf8, 0b11_001_010], "vpsubb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xf8, 0b11_001_010], "vpsubb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xf9, 0b11_001_010], "vpsubw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xf9, 0b11_001_010], "vpsubw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xfa, 0b11_001_010], "vpsubd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xfa, 0b11_001_010], "vpsubd ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xfb, 0b11_001_010], "vpsubq xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xfb, 0b11_001_010], "vpsubq ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xfc, 0b11_001_010], "vpaddb xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xfc, 0b11_001_010], "vpaddb ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xfd, 0b11_001_010], "vpaddw xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xfd, 0b11_001_010], "vpaddw ymm1, ymm0, ymm2"),
+        testcase!(features { AVX: true } &[0xc4, 0b110_00001, 0b1_0111_001, 0xfe, 0b11_001_010], "vpaddd xmm1, xmm0, xmm2"),
+        testcase!(features { AVX2: true } &[0xc4, 0b110_00001, 0b1_0111_101, 0xfe, 0b11_001_010], "vpaddd ymm1, ymm0, ymm2"),
+
+        testcase!(features { AVX: true } &[0xc5, 0xf8, 0x10, 0x00], "vmovups xmm0, xmmword [eax]"),
+        testcase!(features { AVX: true } &[0xc5, 0xf8, 0x10, 0x01], "vmovups xmm0, xmmword [ecx]"),
+    ];
+
+        #[test]
+        fn test() {
+            run_test(CASES);
+        }
+}
+
+mod strange_prefixing {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0xf2, 0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0xf3, 0x0f, 0x21, 0xc8], "mov eax, dr1"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod prefixed_0f {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0x02, 0x01], "lar eax, word [ecx]"),
+        testcase!(&[0x0f, 0x02, 0xc1], "lar eax, ecx"),
+        testcase!(&[0x66, 0x0f, 0x02, 0x01], "lar ax, word [ecx]"),
+        testcase!(&[0x66, 0x0f, 0x02, 0xc1], "lar ax, cx"),
+        testcase!(&[0x0f, 0x03, 0x01], "lsl eax, word [ecx]"),
+        testcase!(&[0x0f, 0x03, 0xc1], "lsl eax, ecx"),
+        testcase!(&[0x66, 0x0f, 0x03, 0x01], "lsl ax, word [ecx]"),
+        testcase!(&[0x66, 0x0f, 0x03, 0xc1], "lsl ax, cx"),
+        testcase!(&[0x0f, 0x05], "syscall"),
+        testcase!(&[0x66, 0x0f, 0x05], "syscall"),
+        testcase!(&[0x0f, 0x06], "clts"),
+        testcase!(&[0xf2, 0x0f, 0x06], "clts", masm: "clts"),
+        testcase!(&[0x0f, 0x07], "sysret"),
+        testcase!(&[0xf2, 0x0f, 0x07], "sysret", masm: "sysret"),
+        testcase!(&[0x0f, 0x12, 0x0f], "movlps xmm1, qword [edi]"),
+        testcase!(&[0x0f, 0x12, 0xcf], "movhlps xmm1, xmm7"),
+        testcase!(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [edi]"),
+        testcase!(&[0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7"),
+        testcase!(&[0x0f, 0x12, 0xc0], "movhlps xmm0, xmm0"),
+        testcase!(invalid: &[0x0f, 0x13, 0xc0]),
+        testcase!(&[0x0f, 0x13, 0x00], "movlps qword [eax], xmm0"),
+        testcase!(&[0x0f, 0x14, 0x08], "unpcklps xmm1, xmmword [eax]"),
+        testcase!(&[0x0f, 0x15, 0x08], "unpckhps xmm1, xmmword [eax]"),
+        testcase!(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [edi]"),
+        testcase!(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0"),
+        testcase!(invalid: &[0x0f, 0x17, 0xc0]),
+        testcase!(&[0x0f, 0x17, 0x00], "movhps qword [eax], xmm0"),
+        testcase!(&[0x0f, 0x18, 0xc0], "nop eax"), // capstone says invalid, xed says nop
+        testcase!(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [eax]", masm: "prefetchnta [eax]"),
+        testcase!(&[0x0f, 0x18, 0x08], "prefetcht0 zmmword [eax]", masm: "prefetcht0 [eax]"),
+        testcase!(&[0x0f, 0x18, 0x10], "prefetcht1 zmmword [eax]", masm: "prefetcht1 [eax]"),
+        testcase!(&[0x0f, 0x18, 0x18], "prefetcht2 zmmword [eax]", masm: "prefetcht2 [eax]"),
+        testcase!(&[0x0f, 0x18, 0x20], "nop zmmword [eax]"),
+        testcase!(&[0x0f, 0x18, 0xcc], "nop esp"),
+        testcase!(&[0x0f, 0x19, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x1a, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x1b, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x1c, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x1d, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x1e, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x1f, 0x20], "nop dword [eax]"),
+        testcase!(&[0x0f, 0x20, 0xc0], "mov eax, cr0"),
+        testcase!(invalid: &[0x0f, 0x20, 0xc8]),
+        testcase!(&[0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0x0f, 0x22, 0xc0], "mov cr0, eax"),
+        testcase!(invalid: &[0x0f, 0x22, 0xc8]),
+        testcase!(&[0x0f, 0x22, 0xc7], "mov cr0, edi"),
+        testcase!(&[0x0f, 0x23, 0xc8], "mov dr1, eax"),
+        testcase!(&[0x0f, 0x23, 0xcf], "mov dr1, edi"),
+        testcase!(&[0x0f, 0x30], "wrmsr"),
+        testcase!(&[0x0f, 0x31], "rdtsc"),
+        testcase!(&[0x0f, 0x32], "rdmsr"),
+        testcase!(&[0x0f, 0x33], "rdpmc"),
+        testcase!(&[0x0f, 0x34], "sysenter"),
+        testcase!(&[0x0f, 0x35], "sysexit"),
+        testcase!(invalid: &[0x0f, 0x36]),
+        testcase!(&[0x0f, 0x37], "getsec"),
+        testcase!(invalid: &[0x66, 0x0f, 0x37]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x37]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x37]),
+        testcase!(&[0x0f, 0x60, 0x00], "punpcklbw mm0, dword [eax]"),
+        testcase!(&[0x0f, 0x60, 0xc2], "punpcklbw mm0, mm2"),
+        testcase!(&[0x0f, 0x61, 0x00], "punpcklwd mm0, dword [eax]"),
+        testcase!(&[0x0f, 0x61, 0xc2], "punpcklwd mm0, mm2"),
+        testcase!(&[0x0f, 0x62, 0x00], "punpckldq mm0, dword [eax]"),
+        testcase!(&[0x0f, 0x62, 0xc2], "punpckldq mm0, mm2"),
+        testcase!(&[0x0f, 0x63, 0x00], "packsswb mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x63, 0xc2], "packsswb mm0, mm2"),
+        testcase!(&[0x0f, 0x64, 0x00], "pcmpgtb mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x64, 0xc2], "pcmpgtb mm0, mm2"),
+        testcase!(&[0x0f, 0x65, 0x00], "pcmpgtw mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x65, 0xc2], "pcmpgtw mm0, mm2"),
+        testcase!(&[0x0f, 0x66, 0x00], "pcmpgtd mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x66, 0xc2], "pcmpgtd mm0, mm2"),
+        testcase!(&[0x0f, 0x67, 0x00], "packuswb mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x67, 0xc2], "packuswb mm0, mm2"),
+        testcase!(&[0x0f, 0x68, 0x00], "punpckhbw mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x68, 0xc2], "punpckhbw mm0, mm2"),
+        testcase!(&[0x0f, 0x69, 0x00], "punpckhwd mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x69, 0xc2], "punpckhwd mm0, mm2"),
+        testcase!(&[0x0f, 0x6a, 0x00], "punpckhdq mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x6a, 0xc2], "punpckhdq mm0, mm2"),
+        testcase!(&[0x0f, 0x6b, 0x00], "packssdw mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x6b, 0xc2], "packssdw mm0, mm2"),
+        testcase!(invalid: &[0x0f, 0x6c]),
+        testcase!(invalid: &[0x0f, 0x6d]),
+        testcase!(&[0x0f, 0x6e, 0x00], "movd mm0, dword [eax]"),
+        testcase!(&[0x0f, 0x6e, 0xc2], "movd mm0, edx"),
+        testcase!(&[0x0f, 0x6f, 0x00], "movq mm0, qword [eax]"),
+        testcase!(&[0x0f, 0x6f, 0xc2], "movq mm0, mm2"),
+        testcase!(&[0x0f, 0x6f, 0xfb], "movq mm7, mm3"),
+        testcase!(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [eax], 0x7f"),
+        testcase!(invalid: &[0x0f, 0x71, 0x00, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x71, 0xc0, 0x7f]),
+        testcase!(&[0x0f, 0x71, 0xd0, 0x7f], "psrlw mm0, 0x7f"),
+        testcase!(&[0x0f, 0x71, 0xe0, 0x7f], "psraw mm0, 0x7f"),
+        testcase!(&[0x0f, 0x71, 0xf0, 0x7f], "psllw mm0, 0x7f"),
+        testcase!(invalid: &[0x0f, 0x72, 0x00, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x72, 0xc0, 0x7f]),
+        testcase!(&[0x0f, 0x72, 0xd0, 0x7f], "psrld mm0, 0x7f"),
+        testcase!(&[0x0f, 0x72, 0xe0, 0x7f], "psrad mm0, 0x7f"),
+        testcase!(&[0x0f, 0x72, 0xf0, 0x7f], "pslld mm0, 0x7f"),
+        testcase!(invalid: &[0x0f, 0x73, 0x00, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x73, 0xc0, 0x7f]),
+        testcase!(&[0x0f, 0x73, 0xd0, 0x7f], "psrlq mm0, 0x7f"),
+        testcase!(invalid: &[0x0f, 0x73, 0xe0, 0x7f]),
+        testcase!(&[0x0f, 0x73, 0xf0, 0x7f], "psllq mm0, 0x7f"),
+        testcase!(&[0x0f, 0xa0], "push fs"),
+        testcase!(&[0x0f, 0xa1], "pop fs"),
+        testcase!(&[0x0f, 0xa2], "cpuid"),
+        testcase!(&[0x0f, 0xa4, 0xc0, 0x11], "shld eax, eax, 0x11"),
+        testcase!(&[0x66, 0x0f, 0xa4, 0xcf, 0x11], "shld di, cx, 0x11"),
+        testcase!(&[0x0f, 0xa5, 0xc0], "shld eax, eax, cl"),
+        testcase!(&[0x0f, 0xa5, 0xc9], "shld ecx, ecx, cl"),
+        testcase!(&[0x0f, 0xac, 0xc0, 0x11], "shrd eax, eax, 0x11"),
+        testcase!(&[0x66, 0x0f, 0xac, 0xcf, 0x11], "shrd di, cx, 0x11"),
+        testcase!(&[0x0f, 0xad, 0xc9], "shrd ecx, ecx, cl"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod prefixed_660f {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x0f, 0x10, 0xc0], "movupd xmm0, xmm0"),
+        testcase!(&[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0], "movsd xmm0, xmm0"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod prefixed_f20f {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(invalid: &[0xf2, 0x0f, 0x16, 0xcf]),
+        testcase!(invalid: &[0x66, 0xf2, 0x66, 0x0f, 0x16, 0xcf]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod prefixed_f30f {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0xfa], "endbr64"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0xfb], "endbr32"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0xfc], "nop esp, edi"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod only_32bit {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66], "callf 0x6655:0x44332211"),
+        testcase!(&[0x66, 0x9a, 0x11, 0x22, 0x33, 0x44], "callf 0x4433:0x2211"),
+        testcase!(&[0x67, 0xac], "lods al, byte ds:[si]"),
+        testcase!(&[0x67, 0xae], "scas byte es:[di], al"),
+        testcase!(&[0xac], "lods al, byte ds:[esi]"),
+        testcase!(&[0xae], "scas byte es:[edi], al"),
+        testcase!(&[0x67, 0xf3, 0xa4], "rep movs byte es:[di], byte ds:[si]"),
+        testcase!(&[0xf3, 0xa4], "rep movs byte es:[edi], byte ds:[esi]"),
+        testcase!(&[0x67, 0xf3, 0xa5], "rep movs dword es:[di], dword ds:[si]"),
+        testcase!(&[0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]"),
+        testcase!(&[0x66, 0x67, 0x8b, 0x0e, 0x55, 0xaa], "mov cx, word [0xaa55]"),
+        testcase!(&[0x66, 0x8b, 0x0e], "mov cx, word [esi]"),
+        testcase!(&[0x40], "inc eax"),
+        testcase!(&[0x41], "inc ecx"),
+        testcase!(&[0x47], "inc edi"),
+        testcase!(&[0x48], "dec eax"),
+        testcase!(&[0x4f], "dec edi"),
+
+        testcase!(&[0xa0, 0xc0, 0xb0, 0xa0, 0x90], "mov al, byte [0x90a0b0c0]"),
+        testcase!(&[0x67, 0xa0, 0xc0, 0xb0], "mov al, byte [0xb0c0]"),
+        testcase!(&[0x67, 0xa1, 0xc0, 0xb0], "mov eax, dword [0xb0c0]"),
+        testcase!(&[0x66, 0x67, 0xa1, 0xc0, 0xb0], "mov ax, word [0xb0c0]"),
+
+        testcase!(&[0x60], "pushad"),
+        testcase!(&[0x61], "popad"),
+        testcase!(&[0x66, 0x60], "pusha"),
+        testcase!(&[0x66, 0x61], "popa"),
+        testcase!(&[0xce], "into"),
+        testcase!(&[0x06], "push es"),
+        testcase!(&[0x07], "pop es"),
+        testcase!(&[0x0e], "push cs"),
+        testcase!(&[0x16], "push ss"),
+        testcase!(&[0x17], "pop ss"),
+        testcase!(&[0x1e], "push ds"),
+        testcase!(&[0x1f], "pop ds"),
+        testcase!(&[0x27], "daa"),
+        testcase!(&[0x2f], "das"),
+        testcase!(&[0x37], "aaa"),
+        testcase!(&[0x3f], "aas"),
+        testcase!(&[0xd4, 0x01], "aam 0x1", masm: "aam 1"),
+        testcase!(&[0xd4, 0x0a], "aam 0xa", masm: "aam"),
+        testcase!(&[0xd5, 0x01], "aad 0x1", masm: "aad 1"),
+        testcase!(&[0xd5, 0x0a], "aad 0xa", masm: "aad"),
+
+        testcase!(&[0xc5, 0x78, 0x10], "lds edi, far [eax + 0x10]"),
+        testcase!(&[0x66, 0xc5, 0x78, 0x10], "lds di, dword [eax + 0x10]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod adx {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x0f, 0x38, 0xf6, 0xc1], "adcx eax, ecx"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, dword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xf6, 0xc1], "adox eax, ecx"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, dword [ecx]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod prefetchw {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0x0d, 0x08], "prefetchw zmmword [eax]"),
+        testcase!(&[0x0f, 0x0d, 0x00], "nop zmmword [eax]"),
+        testcase!(invalid: &[0x0f, 0x0d, 0xc0]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod lzcnt {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0xf3, 0x0f, 0xbd, 0xc1], "lzcnt ax, cx"),
+        testcase!(&[0xf3, 0x0f, 0xbd, 0xc1], "lzcnt eax, ecx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod svm {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0x01, 0xdf], "invlpga eax, ecx"),
+        testcase!(&[0x0f, 0x01, 0xde], "skinit eax"),
+        testcase!(&[0x0f, 0x01, 0xdd], "clgi"),
+        testcase!(&[0x0f, 0x01, 0xdc], "stgi"),
+        testcase!(&[0x0f, 0x01, 0xdb], "vmsave eax"),
+        testcase!(&[0x0f, 0x01, 0xda], "vmload eax"),
+        testcase!(&[0x0f, 0x01, 0xd9], "vmmcall"),
+        testcase!(&[0x0f, 0x01, 0xd8], "vmrun eax"),
+        testcase!(&[0x0f, 0x78, 0xc4], "vmread esp, eax"),
+        testcase!(&[0x0f, 0x79, 0xc5], "vmwrite eax, ebp"),
+        testcase!(&[0x0f, 0x78, 0x0b], "vmread qword [ebx], ecx"),
+        testcase!(invalid: &[0x66, 0x0f, 0x78, 0x03]),
+        testcase!(&[0x0f, 0x79, 0x0b], "vmwrite ecx, qword [ebx]"),
+        testcase!(invalid: &[0x66, 0x0f, 0x79, 0x03]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod movbe {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0x38, 0xf0, 0x06], "movbe eax, dword [esi]"),
+        testcase!(invalid: &[0x0f, 0x38, 0xf0, 0xc6]),
+        testcase!(&[0x0f, 0x38, 0xf1, 0x06], "movbe dword [esi], eax"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xf1, 0x06], "movbe word [esi], ax"),
+        testcase!(invalid: &[0x66, 0x0f, 0x38, 0xf1, 0xc6]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod tsx {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xc6, 0xf8, 0x10], "xabort 0x10"),
+        testcase!(&[0xc7, 0xf8, 0x10, 0x12, 0x34, 0x56], "xbegin $+0x56341210"),
+        testcase!(&[0x66, 0xc7, 0xf8, 0x10, 0x12], "xbegin $+0x1210"),
+        testcase!(&[0x0f, 0x01, 0xd5], "xend"),
+        testcase!(&[0x0f, 0x01, 0xd6], "xtest"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod rand {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0xc7, 0xfd], "rdseed ebp"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0xfd], "rdseed bp"),
+        testcase!(&[0x0f, 0xc7, 0xf5], "rdrand ebp"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0xf5], "rdrand bp"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sha {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, xmmword [edx], 0x40"),
+        testcase!(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, xmmword [edx], 0xff"),
+        // with astonishing dismay: 66-prefixed sha1rnds4 is #UD only in 32-bit and 16-bit mode.
+        testcase!(invalid: &[0x66, 0x0f, 0x3a, 0xcc, 0x12, 0xff]),
+        testcase!(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, xmmword [edx]"),
+        testcase!(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, xmmword [edx]"),
+        testcase!(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, xmmword [edx]"),
+        testcase!(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, xmmword [edx]"),
+        testcase!(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, xmmword [edx]"),
+        testcase!(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, xmmword [edx]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod vmx {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0xc7, 0x3f], "vmptrst qword [edi]"),
+        testcase!(&[0x0f, 0xc7, 0x37], "vmptrld qword [edi]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon qword [edi]"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0xf7], "rdrand di"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x37], "vmclear qword [edi]"),
+
+        // this is actually vmx
+        // testcase!(invalid: &[0x66, 0x0f, 0xc7, 0x03]),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [ebx]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [ebx]"),
+
+        // these need vmx and invept features
+        testcase!(features { VMX: true } &[0x66, 0x0f, 0x38, 0x80, 0x01], "invept eax, xmmword [ecx]"),
+        testcase!(features { VMX: true } &[0x66, 0x0f, 0x38, 0x81, 0x01], "invvpid eax, xmmword [ecx]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod rdpid {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0xc7, 0xfd], "rdpid ebp"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod cmpxchg8b {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"),
+        testcase!(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod x87 {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+    //    testcase!(&[0xd8, 0x03], "fadd st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x03], "fadd st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x0b], "fmul st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x0b], "fmul st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x13], "fcom st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x13], "fcom st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x1b], "fcomp st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x1b], "fcomp st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x23], "fsub st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x23], "fsub st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x2b], "fsubr st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x2b], "fsubr st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x33], "fdiv st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x33], "fdiv st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0x3b], "fdivr st, dword ptr [ebx]"),
+        testcase!(&[0xd8, 0x3b], "fdivr st(0), dword [ebx]"),
+    //    testcase!(&[0xd8, 0xc3], "fadd st, st(3)"),
+        testcase!(&[0xd8, 0xc3], "fadd st(0), st(3)", masm: "fadd st, st(3)"),
+    //    testcase!(&[0xd8, 0xcb], "fmul st, st(3)"),
+        testcase!(&[0xd8, 0xcb], "fmul st(0), st(3)"),
+    //    testcase!(&[0xd8, 0xd3], "fcom st, st(3)"),
+        testcase!(&[0xd8, 0xd3], "fcom st(0), st(3)"),
+    //    testcase!(&[0xd8, 0xdb], "fcomp st, st(3)"),
+        testcase!(&[0xd8, 0xdb], "fcomp st(0), st(3)"),
+    //    testcase!(&[0xd8, 0xe3], "fsub st, st(3)"),
+        testcase!(&[0xd8, 0xe3], "fsub st(0), st(3)"),
+    //    testcase!(&[0xd8, 0xeb], "fsubr st, st(3)"),
+        testcase!(&[0xd8, 0xeb], "fsubr st(0), st(3)"),
+    //    testcase!(&[0xd8, 0xf3], "fdiv st, st(3)"),
+        testcase!(&[0xd8, 0xf3], "fdiv st(0), st(3)"),
+    //    testcase!(&[0xd8, 0xfb], "fdivr st, st(3)"),
+        testcase!(&[0xd8, 0xfb], "fdivr st(0), st(3)"),
+    //    testcase!(&[0xd9, 0x03], "fld st, dword ptr [ebx]"),
+        testcase!(&[0xd9, 0x03], "fld st(0), dword [ebx]"),
+        testcase!(invalid: &[0xd9, 0x08]),
+        testcase!(invalid: &[0xd9, 0x09]),
+        testcase!(invalid: &[0xd9, 0x0a]),
+        testcase!(invalid: &[0xd9, 0x0b]),
+        testcase!(invalid: &[0xd9, 0x0c]),
+        testcase!(invalid: &[0xd9, 0x0d]),
+        testcase!(invalid: &[0xd9, 0x0e]),
+        testcase!(invalid: &[0xd9, 0x0f]),
+    //    testcase!(&[0xd9, 0x13], "fst dword ptr [ebx], st"),
+        testcase!(&[0xd9, 0x13], "fst dword [ebx], st(0)"),
+    //    testcase!(&[0xd9, 0x1b], "fstp dword ptr [ebx], st"),
+        testcase!(&[0xd9, 0x1b], "fstp dword [ebx], st(0)"),
+    //    testcase!(&[0xd9, 0x23], "fldenv ptr [ebx]"),
+        testcase!(&[0xd9, 0x23], "fldenv ptr [ebx]"),
+    //    testcase!(&[0xd9, 0x2b], "fldcw word ptr [ebx]"),
+        testcase!(&[0xd9, 0x2b], "fldcw word [ebx]"),
+    //    testcase!(&[0xd9, 0x33], "fnstenv ptr [ebx]"),
+        testcase!(&[0xd9, 0x33], "fnstenv ptr [ebx]"),
+    //    testcase!(&[0xd9, 0x3b], "fnstcw word ptr [ebx]"),
+        testcase!(&[0xd9, 0x3b], "fnstcw word [ebx]"),
+    //    testcase!(&[0xd9, 0xc3], "fld st, st(3)"),
+        testcase!(&[0xd9, 0xc3], "fld st(0), st(3)"),
+    //    testcase!(&[0xd9, 0xcb], "fxch st, st(3)"),
+        testcase!(&[0xd9, 0xcb], "fxch st(0), st(3)"),
+        testcase!(&[0xd9, 0xd0], "fnop"),
+        testcase!(invalid: &[0xd9, 0xd1]),
+        testcase!(invalid: &[0xd9, 0xd2]),
+        testcase!(invalid: &[0xd9, 0xd3]),
+        testcase!(invalid: &[0xd9, 0xd4]),
+        testcase!(invalid: &[0xd9, 0xd5]),
+        testcase!(invalid: &[0xd9, 0xd6]),
+        testcase!(invalid: &[0xd9, 0xd7]),
+        // undocumented save for intel xed
+    //    testcase!(&[0xd9, 0xdb], "fstpnce st(3), st"),
+        testcase!(&[0xd9, 0xdb], "fstpnce st(3), st(0)"),
+        testcase!(&[0xd9, 0xe0], "fchs"),
+        testcase!(&[0xd9, 0xe1], "fabs"),
+        testcase!(invalid: &[0xd9, 0xe2]),
+        testcase!(invalid: &[0xd9, 0xe3]),
+        testcase!(&[0xd9, 0xe4], "ftst"),
+        testcase!(&[0xd9, 0xe5], "fxam"),
+        testcase!(invalid: &[0xd9, 0xe6]),
+        testcase!(invalid: &[0xd9, 0xe7]),
+        testcase!(&[0xd9, 0xe8], "fld1"),
+        testcase!(&[0xd9, 0xe9], "fldl2t"),
+        testcase!(&[0xd9, 0xea], "fldl2e"),
+        testcase!(&[0xd9, 0xeb], "fldpi"),
+        testcase!(&[0xd9, 0xec], "fldlg2"),
+        testcase!(&[0xd9, 0xed], "fldln2"),
+        testcase!(&[0xd9, 0xee], "fldz"),
+        testcase!(invalid: &[0xd9, 0xef]),
+        testcase!(&[0xd9, 0xf0], "f2xm1"),
+        testcase!(&[0xd9, 0xf1], "fyl2x"),
+        testcase!(&[0xd9, 0xf2], "fptan"),
+        testcase!(&[0xd9, 0xf3], "fpatan"),
+        testcase!(&[0xd9, 0xf4], "fxtract"),
+        testcase!(&[0xd9, 0xf5], "fprem1"),
+        testcase!(&[0xd9, 0xf6], "fdecstp"),
+        testcase!(&[0xd9, 0xf7], "fincstp"),
+        testcase!(&[0xd9, 0xf8], "fprem"),
+        testcase!(&[0xd9, 0xf9], "fyl2xp1"),
+        testcase!(&[0xd9, 0xfa], "fsqrt"),
+        testcase!(&[0xd9, 0xfb], "fsincos"),
+        testcase!(&[0xd9, 0xfc], "frndint"),
+        testcase!(&[0xd9, 0xfd], "fscale"),
+        testcase!(&[0xd9, 0xfe], "fsin"),
+        testcase!(&[0xd9, 0xff], "fcos"),
+    //    testcase!(&[0xda, 0x03], "fiadd st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x03], "fiadd st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x0b], "fimul st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x0b], "fimul st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x13], "ficom st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x13], "ficom st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x1b], "ficomp st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x1b], "ficomp st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x23], "fisub st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x23], "fisub st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x2b], "fisubr st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x2b], "fisubr st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x33], "fidiv st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x33], "fidiv st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0x3b], "fidivr st, dword ptr [ebx]"),
+        testcase!(&[0xda, 0x3b], "fidivr st(0), dword [ebx]"),
+    //    testcase!(&[0xda, 0xc3], "fcmovb st, st(3)"),
+        testcase!(&[0xda, 0xc3], "fcmovb st(0), st(3)"),
+    //    testcase!(&[0xda, 0xcb], "fcmove st, st(3)"),
+        testcase!(&[0xda, 0xcb], "fcmove st(0), st(3)"),
+    //    testcase!(&[0xda, 0xd3], "fcmovbe st, st(3)"),
+        testcase!(&[0xda, 0xd3], "fcmovbe st(0), st(3)"),
+    //    testcase!(&[0xda, 0xdb], "fcmovu st, st(3)"),
+        testcase!(&[0xda, 0xdb], "fcmovu st(0), st(3)"),
+        testcase!(invalid: &[0xda, 0xe0]),
+        testcase!(invalid: &[0xda, 0xe1]),
+        testcase!(invalid: &[0xda, 0xe2]),
+        testcase!(invalid: &[0xda, 0xe3]),
+        testcase!(invalid: &[0xda, 0xe4]),
+        testcase!(invalid: &[0xda, 0xe5]),
+        testcase!(invalid: &[0xda, 0xe6]),
+        testcase!(invalid: &[0xda, 0xe7]),
+        testcase!(invalid: &[0xda, 0xe8]),
+        testcase!(&[0xda, 0xe9], "fucompp"),
+        testcase!(invalid: &[0xda, 0xea]),
+        testcase!(invalid: &[0xda, 0xeb]),
+        testcase!(invalid: &[0xda, 0xec]),
+        testcase!(invalid: &[0xda, 0xed]),
+        testcase!(invalid: &[0xda, 0xee]),
+        testcase!(invalid: &[0xda, 0xef]),
+        testcase!(invalid: &[0xda, 0xf0]),
+        testcase!(invalid: &[0xda, 0xf1]),
+        testcase!(invalid: &[0xda, 0xf2]),
+        testcase!(invalid: &[0xda, 0xf3]),
+        testcase!(invalid: &[0xda, 0xf4]),
+        testcase!(invalid: &[0xda, 0xf5]),
+        testcase!(invalid: &[0xda, 0xf6]),
+        testcase!(invalid: &[0xda, 0xf7]),
+        testcase!(invalid: &[0xda, 0xf8]),
+        testcase!(invalid: &[0xda, 0xf9]),
+        testcase!(invalid: &[0xda, 0xfa]),
+        testcase!(invalid: &[0xda, 0xfb]),
+        testcase!(invalid: &[0xda, 0xfc]),
+        testcase!(invalid: &[0xda, 0xfd]),
+        testcase!(invalid: &[0xda, 0xfe]),
+        testcase!(invalid: &[0xda, 0xff]),
+    //    testcase!(&[0xdb, 0x03], "fild st, dword ptr [ebx]"),
+        testcase!(&[0xdb, 0x03], "fild st(0), dword [ebx]"),
+    //    testcase!(&[0xdb, 0x0b], "fisttp dword ptr [ebx], st"),
+        testcase!(&[0xdb, 0x0b], "fisttp dword [ebx], st(0)"),
+    //    testcase!(&[0xdb, 0x13], "fist dword ptr [ebx], st"),
+        testcase!(&[0xdb, 0x13], "fist dword [ebx], st(0)"),
+    //    testcase!(&[0xdb, 0x1b], "fistp dword ptr [ebx], st"),
+        testcase!(&[0xdb, 0x1b], "fistp dword [ebx], st(0)"),
+        testcase!(invalid: &[0xdb, 0x20]),
+        testcase!(invalid: &[0xdb, 0x21]),
+        testcase!(invalid: &[0xdb, 0x22]),
+        testcase!(invalid: &[0xdb, 0x23]),
+        testcase!(invalid: &[0xdb, 0x24]),
+        testcase!(invalid: &[0xdb, 0x25]),
+        testcase!(invalid: &[0xdb, 0x26]),
+        testcase!(invalid: &[0xdb, 0x27]),
+    //    testcase!(&[0xdb, 0x2b], "fld st, ptr [ebx]"),
+        testcase!(&[0xdb, 0x2b], "fld st(0), mword [ebx]"),
+        testcase!(invalid: &[0xdb, 0x30]),
+        testcase!(invalid: &[0xdb, 0x31]),
+        testcase!(invalid: &[0xdb, 0x32]),
+        testcase!(invalid: &[0xdb, 0x33]),
+        testcase!(invalid: &[0xdb, 0x34]),
+        testcase!(invalid: &[0xdb, 0x35]),
+        testcase!(invalid: &[0xdb, 0x36]),
+        testcase!(invalid: &[0xdb, 0x37]),
+    //    testcase!(&[0xdb, 0x3b], "fstp ptr [ebx], st"),
+        testcase!(&[0xdb, 0x3b], "fstp mword [ebx], st(0)"),
+    //    testcase!(&[0xdb, 0xc3], "fcmovnb st, st(3)"),
+        testcase!(&[0xdb, 0xc3], "fcmovnb st(0), st(3)"),
+    //    testcase!(&[0xdb, 0xcb], "fcmovne st, st(3)"),
+        testcase!(&[0xdb, 0xcb], "fcmovne st(0), st(3)"),
+    //    testcase!(&[0xdb, 0xd3], "fcmovnbe st, st(3)"),
+        testcase!(&[0xdb, 0xd3], "fcmovnbe st(0), st(3)"),
+    //    testcase!(&[0xdb, 0xdb], "fcmovnu st, st(3)"),
+        testcase!(&[0xdb, 0xdb], "fcmovnu st(0), st(3)"),
+        testcase!(&[0xdb, 0xe0], "feni8087_nop", masm: "feni"),
+        testcase!(&[0xdb, 0xe1], "fdisi8087_nop", masm: "fdisi"),
+        testcase!(&[0xdb, 0xe2], "fnclex"),
+        testcase!(&[0xdb, 0xe3], "fninit"),
+        testcase!(&[0xdb, 0xe4], "fsetpm287_nop", masm: "fsetpm"),
+        testcase!(invalid: &[0xdb, 0xe5]),
+        testcase!(invalid: &[0xdb, 0xe6]),
+        testcase!(invalid: &[0xdb, 0xe7]),
+    //    testcase!(&[0xdb, 0xeb], "fucomi st, st(3)"),
+        testcase!(&[0xdb, 0xeb], "fucomi st(0), st(3)"),
+    //    testcase!(&[0xdb, 0xf3], "fcomi st, st(3)"),
+        testcase!(&[0xdb, 0xf3], "fcomi st(0), st(3)"),
+        testcase!(invalid: &[0xdb, 0xf8]),
+        testcase!(invalid: &[0xdb, 0xf9]),
+        testcase!(invalid: &[0xdb, 0xfa]),
+        testcase!(invalid: &[0xdb, 0xfb]),
+        testcase!(invalid: &[0xdb, 0xfc]),
+        testcase!(invalid: &[0xdb, 0xfd]),
+        testcase!(invalid: &[0xdb, 0xfe]),
+        testcase!(invalid: &[0xdb, 0xff]),
+    //    testcase!(&[0xdc, 0x03], "fadd st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x03], "fadd st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x0b], "fmul st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x0b], "fmul st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x13], "fcom st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x13], "fcom st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x1b], "fcomp st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x1b], "fcomp st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x23], "fsub st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x23], "fsub st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x2b], "fsubr st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x2b], "fsubr st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x33], "fdiv st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x33], "fdiv st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0x3b], "fdivr st, qword ptr [ebx]"),
+        testcase!(&[0xdc, 0x3b], "fdivr st(0), qword [ebx]"),
+    //    testcase!(&[0xdc, 0xc3], "fadd st(3), st"),
+        testcase!(&[0xdc, 0xc3], "fadd st(3), st(0)"),
+    //    testcase!(&[0xdc, 0xcb], "fmul st(3), st"),
+        testcase!(&[0xdc, 0xcb], "fmul st(3), st(0)"),
+    //    testcase!(&[0xdc, 0xd3], "fcom st, st(3)"),
+        testcase!(&[0xdc, 0xd3], "fcom st(0), st(3)"),
+    //    testcase!(&[0xdc, 0xdb], "fcomp st, st(3)"),
+        testcase!(&[0xdc, 0xdb], "fcomp st(0), st(3)"),
+    //    testcase!(&[0xdc, 0xe3], "fsubr st(3), st"),
+        testcase!(&[0xdc, 0xe3], "fsubr st(3), st(0)"),
+    //    testcase!(&[0xdc, 0xeb], "fsub st(3), st"),
+        testcase!(&[0xdc, 0xeb], "fsub st(3), st(0)"),
+    //    testcase!(&[0xdc, 0xf3], "fdivr st(3), st"),
+        testcase!(&[0xdc, 0xf3], "fdivr st(3), st(0)"),
+    //    testcase!(&[0xdc, 0xfb], "fdiv st(3), st"),
+        testcase!(&[0xdc, 0xfb], "fdiv st(3), st(0)"),
+    //    testcase!(&[0xdd, 0x03], "fld st, qword ptr [ebx]"),
+        testcase!(&[0xdd, 0x03], "fld st(0), qword [ebx]"),
+    //    testcase!(&[0xdd, 0x0b], "fisttp qword ptr [ebx], st"),
+        testcase!(&[0xdd, 0x0b], "fisttp qword [ebx], st(0)"),
+    //    testcase!(&[0xdd, 0x13], "fst qword ptr [ebx], st"),
+        testcase!(&[0xdd, 0x13], "fst qword [ebx], st(0)"),
+    //    testcase!(&[0xdd, 0x1b], "fstp qword ptr [ebx], st"),
+        testcase!(&[0xdd, 0x1b], "fstp qword [ebx], st(0)"),
+    //    testcase!(&[0xdd, 0x23], "frstor ptr [ebx]"),
+        testcase!(&[0xdd, 0x23], "frstor ptr [ebx]"),
+        testcase!(invalid: &[0xdd, 0x28]),
+        testcase!(invalid: &[0xdd, 0x29]),
+        testcase!(invalid: &[0xdd, 0x2a]),
+        testcase!(invalid: &[0xdd, 0x2b]),
+        testcase!(invalid: &[0xdd, 0x2c]),
+        testcase!(invalid: &[0xdd, 0x2d]),
+        testcase!(invalid: &[0xdd, 0x2e]),
+        testcase!(invalid: &[0xdd, 0x2f]),
+    //    testcase!(&[0xdd, 0x33], "fnsave ptr [ebx]"),
+        testcase!(&[0xdd, 0x33], "fnsave ptr [ebx]"),
+    //    testcase!(&[0xdd, 0x3b], "fnstsw word ptr [ebx]"),
+        testcase!(&[0xdd, 0x3b], "fnstsw word [ebx]"),
+        testcase!(&[0xdd, 0xc3], "ffree st(3)"),
+    //    testcase!(&[0xdd, 0xcb], "fxch st, st(3)"),
+        testcase!(&[0xdd, 0xcb], "fxch st(0), st(3)"),
+    //    testcase!(&[0xdd, 0xd3], "fst st(3), st"),
+        testcase!(&[0xdd, 0xd3], "fst st(3), st(0)"),
+    //    testcase!(&[0xdd, 0xdb], "fstp st(3), st"),
+        testcase!(&[0xdd, 0xdb], "fstp st(3), st(0)"),
+    //    testcase!(&[0xdd, 0xe3], "fucom st, st(3)"),
+        testcase!(&[0xdd, 0xe3], "fucom st(0), st(3)"),
+    //    testcase!(&[0xdd, 0xeb], "fucomp st, st(3)"),
+        testcase!(&[0xdd, 0xeb], "fucomp st(0), st(3)"),
+        testcase!(invalid: &[0xdd, 0xf0]),
+        testcase!(invalid: &[0xdd, 0xf1]),
+        testcase!(invalid: &[0xdd, 0xf2]),
+        testcase!(invalid: &[0xdd, 0xf3]),
+        testcase!(invalid: &[0xdd, 0xf4]),
+        testcase!(invalid: &[0xdd, 0xf5]),
+        testcase!(invalid: &[0xdd, 0xf6]),
+        testcase!(invalid: &[0xdd, 0xf7]),
+        testcase!(invalid: &[0xdd, 0xf8]),
+        testcase!(invalid: &[0xdd, 0xf9]),
+        testcase!(invalid: &[0xdd, 0xfa]),
+        testcase!(invalid: &[0xdd, 0xfb]),
+        testcase!(invalid: &[0xdd, 0xfc]),
+        testcase!(invalid: &[0xdd, 0xfd]),
+        testcase!(invalid: &[0xdd, 0xfe]),
+        testcase!(invalid: &[0xdd, 0xff]),
+    //    testcase!(&[0xde, 0x03], "fiadd st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x03], "fiadd st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x0b], "fimul st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x0b], "fimul st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x13], "ficom st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x13], "ficom st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x1b], "ficomp st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x1b], "ficomp st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x23], "fisub st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x23], "fisub st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x2b], "fisubr st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x2b], "fisubr st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x33], "fidiv st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x33], "fidiv st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0x3b], "fidivr st, word ptr [ebx]"),
+        testcase!(&[0xde, 0x3b], "fidivr st(0), word [ebx]"),
+    //    testcase!(&[0xde, 0xc3], "faddp st(3), st"),
+        testcase!(&[0xde, 0xc3], "faddp st(3), st(0)"),
+    //    testcase!(&[0xde, 0xcb], "fmulp st(3), st"),
+        testcase!(&[0xde, 0xcb], "fmulp st(3), st(0)"),
+    //    testcase!(&[0xde, 0xd3], "fcomp st, st(3)"),
+        testcase!(&[0xde, 0xd3], "fcomp st(0), st(3)"),
+        testcase!(invalid: &[0xde, 0xd8]),
+        testcase!(&[0xde, 0xd9], "fcompp"),
+        testcase!(invalid: &[0xde, 0xda]),
+        testcase!(invalid: &[0xde, 0xdb]),
+        testcase!(invalid: &[0xde, 0xdc]),
+        testcase!(invalid: &[0xde, 0xdd]),
+        testcase!(invalid: &[0xde, 0xde]),
+        testcase!(invalid: &[0xde, 0xdf]),
+    //    testcase!(&[0xde, 0xe3], "fsubrp st(3), st"),
+        testcase!(&[0xde, 0xe3], "fsubrp st(3), st(0)"),
+    //    testcase!(&[0xde, 0xeb], "fsubp st(3), st"),
+        testcase!(&[0xde, 0xeb], "fsubp st(3), st(0)"),
+    //    testcase!(&[0xde, 0xf3], "fdivrp st(3), st"),
+        testcase!(&[0xde, 0xf3], "fdivrp st(3), st(0)"),
+    //    testcase!(&[0xde, 0xfb], "fdivp st(3), st"),
+        testcase!(&[0xde, 0xfb], "fdivp st(3), st(0)"),
+    //    testcase!(&[0xdf, 0x03], "fild st, word ptr [ebx]"),
+        testcase!(&[0xdf, 0x03], "fild st(0), word [ebx]"),
+    //    testcase!(&[0xdf, 0x0b], "fisttp word ptr [ebx], st"),
+        testcase!(&[0xdf, 0x0b], "fisttp word [ebx], st(0)"),
+    //    testcase!(&[0xdf, 0x13], "fist word ptr [ebx], st"),
+        testcase!(&[0xdf, 0x13], "fist word [ebx], st(0)"),
+    //    testcase!(&[0xdf, 0x1b], "fistp word ptr [ebx], st"),
+        testcase!(&[0xdf, 0x1b], "fistp word [ebx], st(0)"),
+    //    testcase!(&[0xdf, 0x23], "fbld st, ptr [ebx]"),
+        testcase!(&[0xdf, 0x23], "fbld st(0), mword [ebx]"),
+    //    testcase!(&[0xdf, 0x2b], "fild st, qword ptr [ebx]"),
+        testcase!(&[0xdf, 0x2b], "fild st(0), qword [ebx]"),
+    //    testcase!(&[0xdf, 0x33], "fbstp ptr [ebx], st"),
+        testcase!(&[0xdf, 0x33], "fbstp mword [ebx], st(0)"),
+    //    testcase!(&[0xdf, 0x3b], "fistp qword ptr [ebx], st"),
+        testcase!(&[0xdf, 0x3b], "fistp qword [ebx], st(0)"),
+    //    testcase!(&[0xdf, 0xc3], "ffreep st(3)"),
+        testcase!(&[0xdf, 0xc3], "ffreep st(3)"),
+    //    testcase!(&[0xdf, 0xcb], "fxch st, st(3)"),
+        testcase!(&[0xdf, 0xcb], "fxch st(0), st(3)"),
+    //    testcase!(&[0xdf, 0xd3], "fstp st(3), st"),
+        testcase!(&[0xdf, 0xd3], "fstp st(3), st(0)"),
+    //    testcase!(&[0xdf, 0xdb], "fstp st(3), st"),
+        testcase!(&[0xdf, 0xdb], "fstp st(3), st(0)"),
+        testcase!(&[0xdf, 0xe0], "fnstsw ax"),
+        testcase!(invalid: &[0xdf, 0xe1]),
+        testcase!(invalid: &[0xdf, 0xe2]),
+        testcase!(invalid: &[0xdf, 0xe3]),
+        testcase!(invalid: &[0xdf, 0xe4]),
+        testcase!(invalid: &[0xdf, 0xe5]),
+        testcase!(invalid: &[0xdf, 0xe6]),
+        testcase!(invalid: &[0xdf, 0xe7]),
+    //    testcase!(&[0xdf, 0xeb], "fucomip st, st(3)"),
+        testcase!(&[0xdf, 0xeb], "fucomip st(0), st(3)"),
+    //    testcase!(&[0xdf, 0xf3], "fcomip st, st(3)"),
+        testcase!(&[0xdf, 0xf3], "fcomip st(0), st(3)"),
+        testcase!(invalid: &[0xdf, 0xf8]),
+        testcase!(invalid: &[0xdf, 0xf9]),
+        testcase!(invalid: &[0xdf, 0xfa]),
+        testcase!(invalid: &[0xdf, 0xfb]),
+        testcase!(invalid: &[0xdf, 0xfc]),
+        testcase!(invalid: &[0xdf, 0xfd]),
+        testcase!(invalid: &[0xdf, 0xfe]),
+        testcase!(invalid: &[0xdf, 0xff]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod mishegos_finds {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(invalid: &[0xc5, 0x8c, 0x77]),
+        testcase!(&[0x0f, 0xfc, 0xaf, 0x40, 0x38, 0x25, 0xbf], "paddb mm5, qword [edi - 0x40dac7c0]"),
+        testcase!(invalid: &[0xf3, 0x67, 0x0f, 0x3a, 0xf0, 0xfb, 0xb4]),
+        testcase!(&[0x65, 0x66, 0x0f, 0x01, 0xdc], "stgi"),
+        testcase!(&[0x66, 0x0f, 0x01, 0xd8], "vmrun eax"),
+        testcase!(invalid: &[0x2e, 0x2e, 0xf2, 0x36, 0x0f, 0xb2, 0xdb, 0x42, 0xd6, 0xa3, 0x16]),
+        testcase!(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms"),
+        testcase!(&[0x26, 0x66, 0x67, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm4"),
+        testcase!(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword fs:[edi]"),
+        testcase!(invalid: &[0xf3, 0xf2, 0x0f, 0xae, 0x8f, 0x54, 0x3c, 0x58, 0xb7]),
+        /*
+        testcase!(&[652e662e0f3814ff], "blendvps"),
+        testcase!(&[66666565450f3acf2b4b], "gf2 "),
+        */
+
+        // might just be yax trying to do a f20f decode when it should not be f2
+        // impossible instruction if operands could be read: lock is illegal here.
+        // testcase!(&[f06565f2640f16], "???"),
+    //    testcase!(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd"),
+        testcase!(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[eax - 0x5]"),
+        testcase!(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [edi]"),
+        testcase!(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b], "movntdqa xmm5, xmmword cs:[ebx]"),
+        testcase!(&[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c], "blendpd xmm7, xmmword cs:[bx + si * 1 + 0x2ff0], 0x7c"),
+        testcase!(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d], "pmovsxwd xmm3, qword [ebp + 0x2da80f69]"),
+        testcase!(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1], "insertps xmm1, dword fs:[ebx], -0x4f"),
+        testcase!(&[0x66, 0x26, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm2, xmmword es:[esi - 0x669d68c], 0x6a"),
+        testcase!(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03], "pmaxud xmm3, xmmword gs:[di + 0x3cc]"),
+        testcase!(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[ebp + 0x3e], edx"),
+        testcase!(invalid: &[0x66, 0x2e, 0x64, 0x66, 0x0f, 0x38, 0xf8, 0xe2]),
+        testcase!(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1"),
+        testcase!(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, xmmword cs:[eax + 0x2d], 0x57"),
+        testcase!(&[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f], "lddqu xmm4, xmmword es:[bx + si * 1 + 0x5f1b]"),
+        testcase!(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, xmmword [eax], 0x48"),
+
+        testcase!(&[0x2e, 0x36, 0x0f, 0x18, 0xe7], "nop edi"),
+        testcase!(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg dword gs:[edi], ecx"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75], "pclmulqdq xmm1, xmmword [eax + 0x3526adb3], 0x75"),
+        testcase!(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, dword [ebx - 0x54]"),
+
+        testcase!(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, zmmword ss:[ebx + 0x3f9d1c09]"),
+        testcase!(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, zmmword fs:[edx + 0x54]"),
+        testcase!(invalid: &[0xf3, 0x0f, 0x38, 0xf8, 0xf3]),
+
+        testcase!(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0"),
+
+        testcase!(invalid: &[0xf3, 0x2e, 0x0f, 0x6a, 0x18]),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod cet {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // see
+        // https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
+        // includes encodings:
+        // wruss{d,q} 066 f 38 f5
+        // wrss{d,q} 0f 38 f6
+        // rstorssp f3 0f 01 /5
+        // saveprevssp f3 0f 01 ea
+        // rdssp{d,q} f3 0f 1e
+        // incssp{d,q} f3 0f ae /5
+        // testcase!(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd [eax + ebx * 4 - 0x2c0accb3], ecx"),
+        // setssbsy f3 0f 01 e8
+        // clrssbsy f3 0f ae /6
+        // endbr64 f3 0f ae fa
+        // endbr32 f3 0f ae fb
+        testcase!(&[0xf3, 0x0f, 0xae, 0xe9], "incssp ecx"),
+        testcase!(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss dword [ebx], esp"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss dword [edi - 0x17], eax"),
+        testcase!(invalid: &[0x0f, 0x38, 0xf5, 0x47, 0xe9]),
+        testcase!(invalid: &[0x66, 0x3e, 0x65, 0x3e, 0x0f, 0x38, 0xf5, 0xf0]),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xe8], "setssbsy"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xea], "saveprevssp"),
+        testcase!(&[0x66, 0xf3, 0x0f, 0x01, 0xe8], "setssbsy"),
+        testcase!(&[0x66, 0xf3, 0x0f, 0x01, 0xea], "saveprevssp"),
+        testcase!(&[0xf3, 0x66, 0x0f, 0x01, 0xe8], "setssbsy"),
+        testcase!(&[0xf3, 0x66, 0x0f, 0x01, 0xea], "saveprevssp"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp qword [ecx]"),
+        testcase!(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp qword [ecx]"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy qword [eax]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod sse4a {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { SSE4a: true } &[0xf2, 0x0f, 0x2b, 0x06], "movntsd qword [esi], xmm0"),
+        testcase!(invalid: &[0xf2, 0x0f, 0x2b, 0xc6]),
+        testcase!(features { SSE4a: true } &[0xf3, 0x0f, 0x2b, 0x06], "movntss dword [esi], xmm0"),
+        testcase!(invalid: &[0xf3, 0x0f, 0xba, 0xc6]),
+        testcase!(features { SSE4a: true } &[0x66, 0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7"),
+        testcase!(invalid: &[0x66, 0xf2, 0x0f, 0x79, 0x0f]),
+        testcase!(features { SSE4a: true } &[0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7"),
+        testcase!(features { SSE4a: true } &[0xf2, 0x0f, 0x78, 0xf1, 0x4e, 0x76], "insertq xmm6, xmm1, 0x4e, 0x76"),
+        testcase!(invalid: &[0xf2, 0x0f, 0x79, 0x0f]),
+        testcase!(features { SSE4a: true } &[0x66, 0x0f, 0x79, 0xcf], "extrq xmm1, xmm7"),
+        testcase!(invalid: &[0x66, 0x0f, 0x79, 0x0f]),
+        testcase!(features { SSE4a: true } &[0x66, 0x0f, 0x78, 0xc1, 0x4e, 0x76], "extrq xmm1, 0x4e, 0x76"),
+        testcase!(invalid: &[0x66, 0x0f, 0x78, 0xc9, 0x4e, 0x76]),
+    ];
+
+        #[test]
+        fn test() {
+            run_test(CASES);
+        }
+}
+
+mod _3dnow {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x0f, 0x0f, 0xe0, 0x8a], "pfnacc mm4, mm0"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, qword [eax]"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4], "pfmax mm4, qword cs:[ebx + edx * 4 - 0x6d]"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[eax - 0x5]"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x66, 0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6"),
+        testcase!(features { DecoderK8: true, DecoderBulldozer: false, DecoderNetburst: false } &[0x0f, 0x0e], "femms"),
+    ];
+
+        #[test]
+        fn test() {
+            run_test(CASES);
+        }
 }
 
 // first appeared in tremont
-#[test]
-fn test_direct_stores() {
-    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri dword cs:[ebp + 0x3e], edx");
-    test_display(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08], "movdir64b bp, zmmword es:[di + 0x80b]");
-    test_display(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, zmmword es:[ebp + 0x729080b]");
+mod direct_stores {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri dword cs:[ebp + 0x3e], edx"),
+        testcase!(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08], "movdir64b bp, zmmword es:[di + 0x80b]"),
+        testcase!(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, zmmword es:[ebp + 0x729080b]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_key_locker() {
-    test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0");
-    test_display(&[0xf3, 0x0f, 0x38, 0xfa, 0xde], "encodekey128 ebx, esi");
-    test_display(&[0xf3, 0x0f, 0x38, 0xfb, 0xde], "encodekey256 ebx, esi");
+mod key_locker {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xfa, 0xde], "encodekey128 ebx, esi"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xfb, 0xde], "encodekey256 ebx, esi"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 // these uinter test cases come from llvm:
 // https://reviews.llvm.org/differential/changeset/?ref=2226860
-#[test]
-fn test_uintr() {
-    test_display(&[0xf3, 0x0f, 0x01, 0xec], "uiret");
-    test_display(&[0xf3, 0x0f, 0x01, 0xed], "testui");
-    test_display(&[0xf3, 0x0f, 0x01, 0xee], "clui");
-    test_display(&[0xf3, 0x0f, 0x01, 0xef], "stui");
-    test_display(&[0xf3, 0x0f, 0xc7, 0xf0], "senduipi eax");
-    test_display(&[0xf3, 0x0f, 0xc7, 0xf2], "senduipi edx");
+mod uintr {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x01, 0xec], "uiret"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xed], "testui"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xee], "clui"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xef], "stui"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0xf0], "senduipi eax"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0xf2], "senduipi edx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 // started shipping in sapphire rapids
-#[test]
-fn test_enqcmd() {
-    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, zmmword ss:[ebx + 0x3f9d1c09]");
-    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, zmmword fs:[edx + 0x54]");
+mod enqcmd {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, zmmword ss:[ebx + 0x3f9d1c09]"),
+        testcase!(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, zmmword fs:[edx + 0x54]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_gfni() {
-    test_display(&[0x3e, 0x64, 0x64, 0x66, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b], "gf2p8affineinvqb xmm7, xmmword fs:[edx - 0x45fbdced], 0x6b");
-    test_display(&[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad], "gf2p8affineqb xmm1, xmmword ss:[esi + edx * 2 - 0x412e7d62], 0xad");
-    test_display(&[0x66, 0x0f, 0x38, 0xcf, 0x1c, 0x54], "gf2p8mulb xmm3, xmmword [esp + edx * 2]");
+mod gfni {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x3e, 0x64, 0x64, 0x66, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b], "gf2p8affineinvqb xmm7, xmmword fs:[edx - 0x45fbdced], 0x6b"),
+        testcase!(&[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad], "gf2p8affineqb xmm1, xmmword ss:[esi + edx * 2 - 0x412e7d62], 0xad"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xcf, 0x1c, 0x54], "gf2p8mulb xmm3, xmmword [esp + edx * 2]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_tdx() {
-    test_display(&[0x66, 0x0f, 0x01, 0xcc], "tdcall");
-    test_display(&[0x66, 0x0f, 0x01, 0xcd], "seamret");
-    test_display(&[0x66, 0x0f, 0x01, 0xce], "seamops");
-    test_display(&[0x66, 0x0f, 0x01, 0xcf], "seamcall");
+mod tdx {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x0f, 0x01, 0xcc], "tdcall"),
+        testcase!(&[0x66, 0x0f, 0x01, 0xcd], "seamret"),
+        testcase!(&[0x66, 0x0f, 0x01, 0xce], "seamops"),
+        testcase!(&[0x66, 0x0f, 0x01, 0xcf], "seamcall"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_tsxldtrk() {
-    test_display(&[0xf2, 0x0f, 0x01, 0xe8], "xsusldtrk");
-    test_display(&[0xf2, 0x0f, 0x01, 0xe9], "xresldtrk");
+mod tsxldtrk {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf2, 0x0f, 0x01, 0xe8], "xsusldtrk"),
+        testcase!(&[0xf2, 0x0f, 0x01, 0xe9], "xresldtrk"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_sevsnp() {
-    test_display(&[0xf3, 0x0f, 0x01, 0xff], "psmash");
-    test_display(&[0xf2, 0x0f, 0x01, 0xff], "pvalidate");
-    test_display(&[0xf3, 0x0f, 0x01, 0xfe], "rmpadjust");
-    test_display(&[0xf2, 0x0f, 0x01, 0xfe], "rmpupdate");
+mod sevsnp {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x01, 0xff], "psmash"),
+        testcase!(&[0xf2, 0x0f, 0x01, 0xff], "pvalidate"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xfe], "rmpadjust"),
+        testcase!(&[0xf2, 0x0f, 0x01, 0xfe], "rmpupdate"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_keylocker() {
-    test_display(&[0xf3, 0x0f, 0x38, 0xdd, 0x03], "aesdec128kl xmm0, m384b [ebx]");
+mod keylocker {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x38, 0xdd, 0x03], "aesdec128kl xmm0, m384b [ebx]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 // some test cases are best just lifted from llvm or gcc.
-#[test]
-fn from_llvm() {
-    test_display(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01], "hreset 0x1");
-    let mut reader = yaxpeax_arch::U8Reader::new(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01]);
-    let hreset = InstDecoder::default().decode(&mut reader).expect("can disassemble test instruction");
-    assert_eq!(hreset.operand_count(), 1);
-}
-
-#[test]
-fn from_reports() {
-    // negative compressed evex displacements should not overflow and panic
-    test_display(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [ecx - 0xb20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [edx - 0x70]{k7}, xmm4");
-    test_display(&[0xf3, 0x0f, 0x1e, 0x0f], "nop dword [edi], ecx");
+mod llvm {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01], "hreset 0x1", masm: "hreset 1, eax"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
+}
+
+mod from_reports {
+    use crate::protected_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // negative compressed evex displacements should not overflow and panic
+        testcase!(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [ecx - 0xb20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [edx - 0x70]{k7}, xmm4"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0x0f], "nop dword [edi], ecx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 mod reg_specs {
diff --git a/test/real_mode/mod.rs b/test/real_mode/mod.rs
index cccc77d..119cff3 100644
--- a/test/real_mode/mod.rs
+++ b/test/real_mode/mod.rs
@@ -5,8 +5,10 @@ mod behavior;
 
 use std::fmt::Write;
 
-use yaxpeax_arch::{AddressBase, Decoder, U8Reader, LengthedInstruction};
-use yaxpeax_x86::real_mode::InstDecoder;
+use yaxpeax_arch::{Decoder, U8Reader, LengthedInstruction};
+use yaxpeax_x86::real_mode::{Instruction, InstDecoder};
+#[cfg(feature="fmt")]
+use yaxpeax_x86::real_mode::DisplayStyle;
 
 fn test_invalid(data: &[u8]) {
     test_invalid_under(&InstDecoder::default(), data);
@@ -36,18600 +38,18996 @@ fn test_display(data: &[u8], expected: &'static str) {
     test_display_under(&InstDecoder::default(), data, expected);
 }
 
-fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) {
-    let mut hex = String::new();
-    for b in data {
-        write!(hex, "{:02x}", b).unwrap();
-    }
-    let mut reader = U8Reader::new(data);
-    match decoder.decode(&mut reader) {
+fn test_decode_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) -> Instruction {
+    let mut reader = yaxpeax_arch::U8Reader::new(data);
+    let instr = match decoder.decode(&mut reader) {
         Ok(instr) => {
-            cfg_if::cfg_if! {
-                if #[cfg(feature="fmt")] {
-                    let text = format!("{}", instr);
-                    assert!(
-                        text == expected,
-                        "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
-                        hex,
-                        instr,
-                        decoder,
-                        text,
-                        expected
-                    );
-                } else {
-                    eprintln!("non-fmt build cannot compare text equality")
-                }
-            }
-            // while we're at it, test that the instruction is as long, and no longer, than its
-            // input
-            assert_eq!((0u32.wrapping_offset(instr.len()).to_linear()) as usize, data.len(), "instruction length is incorrect, wanted instruction {}", expected);
+            assert_eq!(instr.len().to_const(), data.len() as u32, "instruction length is incorrect");
+            instr
         },
         Err(e) => {
+            let mut hex = String::new();
+            for b in data {
+                write!(hex, "{:02x}", b).unwrap();
+            }
             cfg_if::cfg_if! {
                 if #[cfg(feature="fmt")] {
-                    assert!(false, "decode error ({}) for {} under decoder {}:\n  expected: {}\n", e, hex, decoder, expected);
+                    panic!("decode error ({}) for {} under decoder {}:\n  expected: {}\n", e, hex, decoder, expected);
                 } else {
                     // avoid the unused `e` warning
                     let _ = e;
-                    assert!(false, "decode error (<non-fmt build>) for {} under decoder <non-fmt build>:\n  expected: {}\n", hex, expected);
+                    panic!("decode error (<non-fmt build>) for {} under decoder <non-fmt build>:\n  expected: {}\n", hex, expected);
                 }
             }
+        }
+    };
+    instr
+}
+
+fn test_display_under(decoder: &InstDecoder, data: &[u8], expected: &'static str) {
+    // testing that the instruction displays doesn't work if formatting is disabled, but we can
+    // test that it at least decodes..
+    let _instr = test_decode_under(decoder, data, expected);
+
+    #[cfg(feature="fmt")]
+    test_display_format(decoder, data, expected, DisplayStyle::Intel);
+}
+
+#[cfg(feature="fmt")]
+fn test_display_format(decoder: &InstDecoder, data: &[u8], expected: &'static str, style: DisplayStyle) {
+    let instr = test_decode_under(decoder, data, expected);
+
+    let mut hex = String::new();
+    for b in data {
+        write!(hex, "{:02x}", b).unwrap();
+    }
+
+    match style {
+        DisplayStyle::Intel => {
+            let text = format!("{}", instr.display_with(DisplayStyle::Intel));
+            assert!(
+                text == expected,
+                "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text,
+                expected
+            );
+
+            let mut text2 = String::new();
+            let mut out = yaxpeax_arch::display::FmtSink::new(&mut text2);
+            instr.write_to(&mut out).expect("printing succeeds");
+
+            assert!(
+                text2 == text,
+                "display error through FmtSink for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text2,
+                text,
+            );
+
+            #[cfg(feature="alloc")]
+            let mut formatter = yaxpeax_x86::real_mode::InstructionTextBuffer::new();
+            #[cfg(feature="alloc")]
+            let text3 = formatter.format_inst(&instr.display_with(DisplayStyle::Intel)).expect("printing succeeds");
+
+            #[cfg(feature="alloc")]
+            assert!(
+                text3 == text,
+                "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text3,
+                text,
+            );
+
+            let mut text4 = String::new();
+            instr.write_to(&mut text4).expect("printing succeeds");
+
+            assert!(
+                text4 == text,
+                "display error through String for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text4,
+                text,
+            );
+        }
+        DisplayStyle::Masm => {
+            let text = format!("{}", instr.display_with(DisplayStyle::Masm));
+            assert!(
+                text == expected,
+                "display error for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text,
+                expected
+            );
+
+            #[cfg(feature="alloc")]
+            let mut formatter = yaxpeax_x86::real_mode::InstructionTextBuffer::new();
+            #[cfg(feature="alloc")]
+            let text3 = formatter.format_inst(&instr.display_with(DisplayStyle::Masm)).expect("printing succeeds");
+
+            #[cfg(feature="alloc")]
+            assert!(
+                text3 == text,
+                "display error through InstructionTextBuffer for {}:\n  decoded: {:?} under decoder {}\n displayed: {}\n expected: {}\n",
+                hex,
+                instr,
+                decoder,
+                text3,
+                text,
+            );
+
+            // no `instr.display_with(DisplayStyle::Masm)` tests involving write_to
+            // since write_to unconditionally uses DisplayStyle::Intel
+        }
+        DisplayStyle::C => {
+            // panic!("no support for C-style display in testcases yet");
+        }
+    }
+}
+
+#[allow(non_camel_case_types)]
+enum FeatureSet {
+    Default,
+}
+
+impl FeatureSet {
+    fn into_decoder(&self) -> InstDecoder {
+        match self {
+            FeatureSet::Default => {
+                yaxpeax_x86::real_mode::InstDecoder::default()
+            }
+        }
+    }
+}
 
+struct Disasm {
+    display: &'static str,
+    c: Option<&'static str>,
+    masm: Option<&'static str>,
+}
+
+struct TestCase {
+    bytes: &'static [u8],
+    featuresets: Option<&'static [(FeatureSet, bool)]>,
+    decodes: Option<Disasm>,
+}
+
+fn check_decodes(decoder: &InstDecoder, decode_ok: bool, bytes: &[u8], disasm: &Disasm) {
+    if decode_ok {
+        test_display_under(&decoder, bytes, disasm.display);
+
+        #[cfg(feature = "fmt")]
+        if let Some(expected) = disasm.c.as_ref() {
+            test_display_format(&decoder, bytes, expected, DisplayStyle::C);
         }
+        #[cfg(feature = "fmt")]
+        if let Some(expected) = disasm.masm.as_ref() {
+            test_display_format(&decoder, bytes, expected, DisplayStyle::Masm);
+        }
+    } else {
+        test_invalid_under(&decoder, bytes);
     }
 }
 
-#[test]
-fn only_16bit() {
-    test_display(&[0x66, 0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66], "callf 0x6655:0x44332211");
-    test_display(&[0x9a, 0x11, 0x22, 0x33, 0x44], "callf 0x4433:0x2211");
-    test_display(&[0xac], "lods al, byte ds:[si]");
-    test_display(&[0xae], "scas byte es:[di], al");
-    test_display(&[0x67, 0xac], "lods al, byte ds:[esi]");
-    test_display(&[0x67, 0xae], "scas byte es:[edi], al");
-    test_display(&[0xf3, 0xa4], "rep movs byte es:[di], byte ds:[si]");
-    test_display(&[0x67, 0xf3, 0xa4], "rep movs byte es:[edi], byte ds:[esi]");
-    test_display(&[0xf3, 0xa5], "rep movs word es:[di], word ds:[si]");
-    test_display(&[0x67, 0xf3, 0xa5], "rep movs word es:[edi], word ds:[esi]");
-    test_display(&[0x8b, 0x0e, 0x55, 0xaa], "mov cx, word [0xaa55]");
-    test_display(&[0x66, 0x8b, 0x0e, 0x55, 0xaa], "mov ecx, dword [0xaa55]");
-    test_display(&[0x67, 0x8b, 0x0e], "mov cx, word [esi]");
-    test_display(&[0x66, 0x67, 0x8b, 0x0e], "mov ecx, dword [esi]");
+fn run_test(cases: &[TestCase]) {
+    for tc in cases {
+        if let Some(decodes) = tc.decodes.as_ref() {
+            // if there are explicit feature sets, run only those decodes; the default decoder is
+            // in the list if the test cares about it, and describes if it should work or not.
+            let featuresets = if let Some(featuresets) = tc.featuresets {
+                featuresets
+            } else {
+                &[(FeatureSet::Default, true)]
+            };
+
+            for (featureset, decode_ok) in featuresets {
+                let decoder = featureset.into_decoder();
+                check_decodes(&decoder, *decode_ok, tc.bytes, decodes);
+            }
+        } else {
+            // similar to above:
+            if let Some(featuresets) = tc.featuresets {
+                for (featureset, decode_ok) in featuresets {
+                    assert!(!decode_ok);
+                    let decoder = featureset.into_decoder();
+
+                    test_invalid_under(&decoder, tc.bytes);
+                }
+            } else {
+                test_invalid(tc.bytes);
+            }
+        }
+    }
+}
+
+// the extra { } in these arms are load-bearing to keep Rust from opening thousands of scopes for
+// each lifetime. at around 32k lifetimes it'll stack overflow.
+macro_rules! testcase {
+    (invalid: features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr) => {
+        {
+            use crate::real_mode::{TestCase, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: None,
+            }
+        }
+    };
+
+    (invalid: features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr) => {
+        {
+            use crate::real_mode::{TestCase, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, false),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: None,
+            }
+        }
+    };
+
+    (invalid: $bytes:expr) => {
+        {
+            use crate::real_mode::TestCase;
+
+            let bytes: &'static [u8] = $bytes;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: None,
+            }
+        }
+    };
+
+    (features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: Some($masm_text) })
+            }
+        }
+    };
+
+    (features nodefault { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    // need this above `($bytes:expr, $test:expr)` below to keep that case from
+    // matching inappropriately early.
+    (features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: Some($masm_text) })
+            }
+        }
+    };
+
+    // need this above `($bytes:expr, $test:expr)` below to keep that case from
+    // matching inappropriately early.
+    (features { $($feature:ident: $decode:expr$(,)?)+ } $bytes:expr, $text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode),)*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    ({ $($feature:ident: $decode:expr)+ } $bytes:expr, $text:expr, c: $c_text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm, FeatureSet};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let c: &'static str = $c_text;
+            let featuresets: &'static [(FeatureSet, bool)] = &[
+                (FeatureSet::Minimal, false),
+                (FeatureSet::Default, true),
+                $((FeatureSet::$feature, $decode))*
+            ];
+            TestCase {
+                bytes,
+                featuresets: Some(featuresets),
+                decodes: Some(Disasm { display: text, c: Some(c), masm: None })
+            }
+        }
+    };
+
+    ($bytes:expr, $text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: None, masm: None })
+            }
+        }
+    };
+
+    ($bytes:expr, $text:expr, c: $c_text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let c: &'static str = $c_text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: Some(c) })
+            }
+        }
+    };
+
+    ($bytes:expr, $text:expr, masm: $masm_text:expr) => {
+        {
+            use crate::real_mode::{TestCase, Disasm};
+
+            let bytes: &'static [u8] = $bytes;
+            let text: &'static str = $text;
+            let masm: &'static str = $masm_text;
+            TestCase {
+                bytes,
+                featuresets: None,
+                decodes: Some(Disasm { display: text, c: None, masm: Some(masm) })
+            }
+        }
+    };
+}
+
+mod only_16bit {
+    use crate::real_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x66, 0x9a, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66], "callf 0x6655:0x44332211"),
+        testcase!(&[0x9a, 0x11, 0x22, 0x33, 0x44], "callf 0x4433:0x2211"),
+        testcase!(&[0xac], "lods al, byte ds:[si]"),
+        testcase!(&[0xae], "scas byte es:[di], al"),
+        testcase!(&[0x67, 0xac], "lods al, byte ds:[esi]"),
+        testcase!(&[0x67, 0xae], "scas byte es:[edi], al"),
+        testcase!(&[0xf3, 0xa4], "rep movs byte es:[di], byte ds:[si]"),
+        testcase!(&[0x67, 0xf3, 0xa4], "rep movs byte es:[edi], byte ds:[esi]"),
+        testcase!(&[0xf3, 0xa5], "rep movs word es:[di], word ds:[si]"),
+        testcase!(&[0x67, 0xf3, 0xa5], "rep movs word es:[edi], word ds:[esi]"),
+        testcase!(&[0x8b, 0x0e, 0x55, 0xaa], "mov cx, word [0xaa55]"),
+        testcase!(&[0x66, 0x8b, 0x0e, 0x55, 0xaa], "mov ecx, dword [0xaa55]"),
+        testcase!(&[0x67, 0x8b, 0x0e], "mov cx, word [esi]"),
+        testcase!(&[0x66, 0x67, 0x8b, 0x0e], "mov ecx, dword [esi]"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_real_mode() {
-    test_display(&[0x00, 0xcc], "add ah, cl");
-    test_display(&[0x03, 0x0b], "add cx, word [bp + di * 1]");
-    test_display(&[0x06], "push es");
-    test_display(&[0x07], "pop es");
-    test_display(&[0x0e], "push cs");
-    test_display(&[0x0f, 0x01, 0x38], "invlpg byte [bx + si * 1]");
-    test_display(&[0x0f, 0x01, 0x3f], "invlpg byte [bx]");
-    test_display(&[0x0f, 0x01, 0x40, 0xff], "sgdt far [bx + si * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x41, 0xff], "sgdt far [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x49, 0xff], "sidt far [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x51, 0xff], "lgdt far [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x59, 0xff], "lidt far [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x61, 0xff], "smsw word [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x71, 0xff], "lmsw word [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0x79, 0xff], "invlpg byte [bx + di * 1 - 0x1]");
-    test_display(&[0x0f, 0x01, 0xc0], "enclv");
-    test_display(&[0x0f, 0x01, 0xc1], "vmcall");
-    test_display(&[0x0f, 0x01, 0xc2], "vmlaunch");
-    test_display(&[0x0f, 0x01, 0xc3], "vmresume");
-    test_display(&[0x0f, 0x01, 0xc4], "vmxoff");
-    test_display(&[0x0f, 0x01, 0xc5], "pconfig");
-    test_display(&[0x0f, 0x01, 0xc8], "monitor");
-    test_display(&[0x0f, 0x01, 0xc8], "monitor");
-    test_display(&[0x0f, 0x01, 0xc9], "mwait");
-    test_display(&[0x0f, 0x01, 0xc9], "mwait");
-    test_display(&[0x0f, 0x01, 0xca], "clac");
-    test_display(&[0x0f, 0x01, 0xcb], "stac");
-    test_display(&[0x0f, 0x01, 0xcf], "encls");
-    test_display(&[0x0f, 0x01, 0xd0], "xgetbv");
-    test_display(&[0x0f, 0x01, 0xd1], "xsetbv");
-    test_display(&[0x0f, 0x01, 0xd4], "vmfunc");
-    test_display(&[0x0f, 0x01, 0xd5], "xend");
-    test_display(&[0x0f, 0x01, 0xd6], "xtest");
-    test_display(&[0x0f, 0x01, 0xd7], "enclu");
-    test_display(&[0x0f, 0x01, 0xd8], "vmrun ax");
-    test_display(&[0x0f, 0x01, 0xd9], "vmmcall");
-    test_display(&[0x0f, 0x01, 0xda], "vmload ax");
-    test_display(&[0x0f, 0x01, 0xdb], "vmsave ax");
-    test_display(&[0x0f, 0x01, 0xdc], "stgi");
-    test_display(&[0x0f, 0x01, 0xdd], "clgi");
-    test_display(&[0x0f, 0x01, 0xde], "skinit eax");
-    test_display(&[0x0f, 0x01, 0xdf], "invlpga ax, ecx");
-    test_display(&[0x0f, 0x01, 0xe0], "smsw ax");
-    test_display(&[0x0f, 0x01, 0xe1], "smsw cx");
-    test_display(&[0x0f, 0x01, 0xe2], "smsw dx");
-    test_display(&[0x0f, 0x01, 0xe3], "smsw bx");
-    test_display(&[0x0f, 0x01, 0xe4], "smsw sp");
-    test_display(&[0x0f, 0x01, 0xe5], "smsw bp");
-    test_display(&[0x0f, 0x01, 0xe6], "smsw si");
-    test_display(&[0x0f, 0x01, 0xe7], "smsw di");
-    test_display(&[0x0f, 0x01, 0xee], "rdpkru");
-    test_display(&[0x0f, 0x01, 0xef], "wrpkru");
-    test_display(&[0x0f, 0x01, 0xf0], "lmsw ax");
-    test_display(&[0x0f, 0x01, 0xf1], "lmsw cx");
-    test_display(&[0x0f, 0x01, 0xf2], "lmsw dx");
-    test_display(&[0x0f, 0x01, 0xf3], "lmsw bx");
-    test_display(&[0x0f, 0x01, 0xf4], "lmsw sp");
-    test_display(&[0x0f, 0x01, 0xf5], "lmsw bp");
-    test_display(&[0x0f, 0x01, 0xf6], "lmsw si");
-    test_display(&[0x0f, 0x01, 0xf7], "lmsw di");
-    test_display(&[0x0f, 0x01, 0xf9], "rdtscp");
-    test_display(&[0x0f, 0x01, 0xfa], "monitorx");
-    test_display(&[0x0f, 0x01, 0xfb], "mwaitx");
-    test_display(&[0x0f, 0x01, 0xfc], "clzero");
-    test_display(&[0x0f, 0x01, 0xfd], "rdpru ecx");
-    test_display(&[0x0f, 0x02, 0x01], "lar ax, word [bx + di * 1]");
-    test_display(&[0x0f, 0x02, 0xc1], "lar ax, cx");
-    test_display(&[0x0f, 0x03, 0x01], "lsl ax, word [bx + di * 1]");
-    test_display(&[0x0f, 0x03, 0xc1], "lsl ax, cx");
-    test_display(&[0x0f, 0x05], "syscall");
-    test_display(&[0x0f, 0x06], "clts");
-    test_display(&[0x0f, 0x07], "sysret");
-    test_display(&[0x0f, 0x0d, 0x08], "prefetchw zmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x0d, 0x00], "nop zmmword [bx + si * 1]");
-    test_invalid(&[0x0f, 0x0d, 0xc0]);
-    test_display(&[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6");
-    test_display(&[0x0f, 0x0f, 0xe0, 0x8a], "pfnacc mm4, mm0");
-    test_display(&[0x0f, 0x12, 0x0f], "movlps xmm1, qword [bx]");
-    test_display(&[0x0f, 0x12, 0xc0], "movhlps xmm0, xmm0");
-    test_display(&[0x0f, 0x12, 0xcf], "movhlps xmm1, xmm7");
-    test_display(&[0x0f, 0x13, 0x00], "movlps qword [bx + si * 1], xmm0");
-    test_display(&[0x0f, 0x14, 0x08], "unpcklps xmm1, xmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x15, 0x08], "unpckhps xmm1, xmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [bx]");
-    test_display(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0");
-    test_display(&[0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7");
-    test_display(&[0x0f, 0x17, 0x00], "movhps qword [bx + si * 1], xmm0");
-    test_display(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x18, 0x08], "prefetcht0 zmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x18, 0x10], "prefetcht1 zmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x18, 0x18], "prefetcht2 zmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x18, 0x20], "nop zmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x18, 0xc0], "nop ax");
-    test_display(&[0x0f, 0x18, 0xcc], "nop sp");
-    test_display(&[0x0f, 0x19, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x1a, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x1b, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x1c, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x1d, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x1e, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x1f, 0x20], "nop word [bx + si * 1]");
-    test_display(&[0x0f, 0x20, 0xc0], "mov eax, cr0");
-    test_display(&[0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0x0f, 0x22, 0xc0], "mov cr0, eax");
-    test_display(&[0x0f, 0x22, 0xc7], "mov cr0, edi");
-    test_display(&[0x0f, 0x23, 0xc8], "mov dr1, eax");
-    test_display(&[0x0f, 0x23, 0xcf], "mov dr1, edi");
-    test_display(&[0x0f, 0x28, 0x00], "movaps xmm0, xmmword [bx + si * 1]");
-    test_display(&[0x0f, 0x28, 0xd0], "movaps xmm2, xmm0");
-    test_display(&[0x0f, 0x29, 0x00], "movaps xmmword [bx + si * 1], xmm0");
-    test_display(&[0x0f, 0x2a, 0x00], "cvtpi2ps xmm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x2a, 0xcf], "cvtpi2ps xmm1, mm7");
-    test_display(&[0x0f, 0x2b, 0x00], "movntps xmmword [bx + si * 1], xmm0");
-    test_display(&[0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm7");
-    test_display(&[0x0f, 0x2e, 0x00], "ucomiss xmm0, dword [bx + si * 1]");
-    test_display(&[0x0f, 0x2f, 0x00], "comiss xmm0, dword [bx + si * 1]");
-    test_display(&[0x0f, 0x30], "wrmsr");
-    test_display(&[0x0f, 0x31], "rdtsc");
-    test_display(&[0x0f, 0x32], "rdmsr");
-    test_display(&[0x0f, 0x33], "rdpmc");
-    test_display(&[0x0f, 0x34], "sysenter");
-    test_display(&[0x0f, 0x35], "sysexit");
-    test_display(&[0x0f, 0x37], "getsec");
-    test_display(&[0x0f, 0x38, 0x00, 0xda], "pshufb mm3, mm2");
-    test_display(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x0f, 0x3a, 0x0f, 0xc1, 0x23], "palignr mm0, mm1, 0x23");
-    test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, xmmword [bp + si * 1], 0x40");
-    test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, xmmword [bp + si * 1], 0xff");
-    // with astonishing dismay: 66-prefixed sha1rnds4 is #UD only in 32-bit and 16-bit mode.
-    test_invalid(&[0x66, 0x0f, 0x3a, 0xcc, 0x12, 0xff]);
-    test_display(&[0x0f, 0x43, 0xec], "cmovnb bp, sp");
-    test_display(&[0x0f, 0x50, 0xc1], "movmskps eax, xmm1");
-    test_display(&[0x0f, 0x51, 0x01], "sqrtps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x52, 0x01], "rsqrtps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x53, 0x01], "rcpps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x54, 0x01], "andps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x55, 0x01], "andnps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x56, 0x01], "orps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x57, 0x01], "xorps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x58, 0x01], "addps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x59, 0x01], "mulps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x5a, 0x01], "cvtps2pd xmm0, qword [bx + di * 1]");
-    test_display(&[0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x5c, 0x01], "subps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x5d, 0x01], "minps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x5e, 0x01], "divps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x5f, 0x01], "maxps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x0f, 0x60, 0x00], "punpcklbw mm0, dword [bx + si * 1]");
-    test_display(&[0x0f, 0x60, 0xc2], "punpcklbw mm0, mm2");
-    test_display(&[0x0f, 0x61, 0x00], "punpcklwd mm0, dword [bx + si * 1]");
-    test_display(&[0x0f, 0x61, 0xc2], "punpcklwd mm0, mm2");
-    test_display(&[0x0f, 0x62, 0x00], "punpckldq mm0, dword [bx + si * 1]");
-    test_display(&[0x0f, 0x62, 0xc2], "punpckldq mm0, mm2");
-    test_display(&[0x0f, 0x63, 0x00], "packsswb mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x63, 0xc2], "packsswb mm0, mm2");
-    test_display(&[0x0f, 0x64, 0x00], "pcmpgtb mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x64, 0xc2], "pcmpgtb mm0, mm2");
-    test_display(&[0x0f, 0x65, 0x00], "pcmpgtw mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x65, 0xc2], "pcmpgtw mm0, mm2");
-    test_display(&[0x0f, 0x66, 0x00], "pcmpgtd mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x66, 0xc2], "pcmpgtd mm0, mm2");
-    test_display(&[0x0f, 0x67, 0x00], "packuswb mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x67, 0xc2], "packuswb mm0, mm2");
-    test_display(&[0x0f, 0x68, 0x00], "punpckhbw mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x68, 0xc2], "punpckhbw mm0, mm2");
-    test_display(&[0x0f, 0x69, 0x00], "punpckhwd mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x69, 0xc2], "punpckhwd mm0, mm2");
-    test_display(&[0x0f, 0x6a, 0x00], "punpckhdq mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x6a, 0xc2], "punpckhdq mm0, mm2");
-    test_display(&[0x0f, 0x6b, 0x00], "packssdw mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x6b, 0xc2], "packssdw mm0, mm2");
-    test_display(&[0x0f, 0x6e, 0x00], "movd mm0, dword [bx + si * 1]");
-    test_display(&[0x0f, 0x6e, 0xc2], "movd mm0, edx");
-    test_display(&[0x0f, 0x6f, 0x00], "movq mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0x6f, 0xc2], "movq mm0, mm2");
-    test_display(&[0x0f, 0x6f, 0xe9], "movq mm5, mm1");
-    test_display(&[0x0f, 0x6f, 0xfb], "movq mm7, mm3");
-    test_display(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [bx + si * 1], 0x7f");
-    test_display(&[0x0f, 0x71, 0xd0, 0x7f], "psrlw mm0, 0x7f");
-    test_display(&[0x0f, 0x71, 0xe0, 0x7f], "psraw mm0, 0x7f");
-    test_display(&[0x0f, 0x71, 0xf0, 0x7f], "psllw mm0, 0x7f");
-    test_display(&[0x0f, 0x72, 0xd0, 0x7f], "psrld mm0, 0x7f");
-    test_display(&[0x0f, 0x72, 0xe0, 0x7f], "psrad mm0, 0x7f");
-    test_display(&[0x0f, 0x72, 0xf0, 0x7f], "pslld mm0, 0x7f");
-    test_display(&[0x0f, 0x73, 0xd0, 0x7f], "psrlq mm0, 0x7f");
-    test_display(&[0x0f, 0x73, 0xf0, 0x7f], "psllq mm0, 0x7f");
-    test_display(&[0x0f, 0x74, 0xc2], "pcmpeqb mm0, mm2");
-    test_display(&[0x0f, 0x75, 0xc2], "pcmpeqw mm0, mm2");
-    test_display(&[0x0f, 0x76, 0xc2], "pcmpeqd mm0, mm2");
-    test_display(&[0x0f, 0x78, 0x0b], "vmread dword [bp + di * 1], ecx");
-    test_display(&[0x0f, 0x78, 0xc4], "vmread esp, eax");
-    test_display(&[0x0f, 0x79, 0x0b], "vmwrite ecx, dword [bp + di * 1]");
-    test_display(&[0x0f, 0x79, 0xc5], "vmwrite eax, ebp");
-    test_display(&[0x0f, 0x7e, 0xcf], "movd edi, mm1");
-    test_display(&[0x0f, 0x7f, 0x0f], "movq qword [bx], mm1");
-    test_display(&[0x0f, 0x7f, 0xcf], "movq mm7, mm1");
-    test_display(&[0x0f, 0x86, 0x8b, 0x01], "jna $+0x18b");
-    test_display(&[0x0f, 0x97, 0x00], "seta byte [bx + si * 1]");
-    test_display(&[0x0f, 0x97, 0x08], "seta byte [bx + si * 1]");
-    test_display(&[0x0f, 0x97, 0xc0], "seta al");
-    test_display(&[0x0f, 0x97, 0xc8], "seta al");
-    test_display(&[0x0f, 0xa0], "push fs");
-    test_display(&[0x0f, 0xa1], "pop fs");
-    test_display(&[0x0f, 0xa2], "cpuid");
-    test_display(&[0x0f, 0xa3, 0xd0], "bt ax, dx");
-    test_display(&[0x0f, 0xa4, 0xc0, 0x11], "shld ax, ax, 0x11");
-    test_display(&[0x0f, 0xa5, 0xc0], "shld ax, ax, cl");
-    test_display(&[0x0f, 0xa5, 0xc9], "shld cx, cx, cl");
-    test_display(&[0x0f, 0xab, 0xd0], "bts ax, dx");
-    test_display(&[0x0f, 0xac, 0xc0, 0x11], "shrd ax, ax, 0x11");
-    test_display(&[0x0f, 0xad, 0xc9], "shrd cx, cx, cl");
-    test_display(&[0x0f, 0xae, 0x04], "fxsave ptr [si]");
-    test_display(&[0x0f, 0xae, 0x0c], "fxrstor ptr [si]");
-    test_display(&[0x0f, 0xae, 0x14], "ldmxcsr dword [si]");
-    test_display(&[0x0f, 0xae, 0x1c], "stmxcsr dword [si]");
-    test_display(&[0x0f, 0xae, 0x24], "xsave ptr [si]");
-    test_display(&[0x0f, 0xae, 0x2c], "xrstor ptr [si]");
-    test_display(&[0x0f, 0xae, 0x34], "xsaveopt ptr [si]");
-    test_display(&[0x0f, 0xae, 0x3c], "clflush zmmword [si]");
-    test_display(&[0x0f, 0xaf, 0xc2], "imul ax, dx");
-    test_display(&[0x0f, 0xb3, 0xd0], "btr ax, dx");
-    test_display(&[0x0f, 0xbb, 0x17], "btc word [bx], dx");
-    test_display(&[0x0f, 0xbc, 0xd3], "bsf dx, bx");
-    test_display(&[0x0f, 0xbc, 0xd3], "bsf dx, bx");
-    test_display(&[0x0f, 0xbe, 0x83, 0xb4, 0x00], "movsx ax, byte [bp + di * 1 + 0xb4]");
-    test_display(&[0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0x0f, 0xc1, 0xcc], "xadd sp, cx");
-    test_display(&[0x0f, 0xc3, 0x03], "movnti dword [bp + di * 1], eax");
-    test_display(&[0x0f, 0xc4, 0x00, 0x14], "pinsrw mm0, word [bx + si * 1], 0x14");
-    test_display(&[0x0f, 0xc4, 0xc0, 0x14], "pinsrw mm0, eax, 0x14");
-    test_display(&[0x0f, 0xc5, 0xd1, 0x00], "pextrw edx, mm1, 0x0");
-    test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]");
-    test_display(&[0x0f, 0xc7, 0x37], "vmptrld qword [bx]");
-    test_display(&[0x0f, 0xc7, 0x3f], "vmptrst qword [bx]");
-    test_display(&[0x0f, 0xc7, 0x5c, 0x24], "xrstors ptr [si + 0x24]");
-    test_display(&[0x0f, 0xc7, 0x64, 0x24], "xsavec ptr [si + 0x24]");
-    test_display(&[0x0f, 0xc7, 0x6c, 0x24], "xsaves ptr [si + 0x24]");
-    test_display(&[0x0f, 0xc7, 0x74, 0x24], "vmptrld qword [si + 0x24]");
-    test_display(&[0x0f, 0xc7, 0x7c, 0x24], "vmptrst qword [si + 0x24]");
-    test_display(&[0x0f, 0xc7, 0xf5], "rdrand bp");
-    test_display(&[0x0f, 0xc7, 0xfd], "rdseed bp");
-    test_display(&[0x0f, 0xd1, 0x00], "psrlw mm0, qword [bx + si * 1]");
-    test_display(&[0x0f, 0xd1, 0xcf], "psrlw mm1, mm7");
-    test_display(&[0x0f, 0xd7, 0xcf], "pmovmskb ecx, mm7");
-    test_display(&[0x0f, 0xd8, 0xc2], "psubusb mm0, mm2");
-    test_display(&[0x0f, 0xd9, 0xc2], "psubusw mm0, mm2");
-    test_display(&[0x0f, 0xda, 0xc2], "pminub mm0, mm2");
-    test_display(&[0x0f, 0xdb, 0xc2], "pand mm0, mm2");
-    test_display(&[0x0f, 0xdc, 0xc2], "paddusb mm0, mm2");
-    test_display(&[0x0f, 0xdd, 0xc2], "paddusw mm0, mm2");
-    test_display(&[0x0f, 0xde, 0xc2], "pmaxub mm0, mm2");
-    test_display(&[0x0f, 0xdf, 0xc2], "pandn mm0, mm2");
-    test_display(&[0x0f, 0xe5, 0x3d], "pmulhw mm7, qword [di]");
-    test_display(&[0x0f, 0xe7, 0x03], "movntq qword [bp + di * 1], mm0");
-    test_display(&[0x0f, 0xe8, 0xc2], "psubsb mm0, mm2");
-    test_display(&[0x0f, 0xe9, 0xc2], "psubsw mm0, mm2");
-    test_display(&[0x0f, 0xea, 0xc2], "pminsw mm0, mm2");
-    test_display(&[0x0f, 0xeb, 0xc2], "por mm0, mm2");
-    test_display(&[0x0f, 0xec, 0xc2], "paddsb mm0, mm2");
-    test_display(&[0x0f, 0xed, 0xc2], "paddsw mm0, mm2");
-    test_display(&[0x0f, 0xee, 0xc2], "pmaxsw mm0, mm2");
-    test_display(&[0x0f, 0xef, 0xc2], "pxor mm0, mm2");
-    test_display(&[0x0f, 0xf1, 0x02], "psllw mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf1, 0xc2], "psllw mm0, mm2");
-    test_display(&[0x0f, 0xf2, 0x02], "pslld mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf2, 0xc2], "pslld mm0, mm2");
-    test_display(&[0x0f, 0xf3, 0x02], "psllq mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf3, 0xc2], "psllq mm0, mm2");
-    test_display(&[0x0f, 0xf4, 0x02], "pmuludq mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf4, 0xc2], "pmuludq mm0, mm2");
-    test_display(&[0x0f, 0xf5, 0x02], "pmaddwd mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf5, 0xc2], "pmaddwd mm0, mm2");
-    test_display(&[0x0f, 0xf6, 0x02], "psadbw mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf6, 0xc2], "psadbw mm0, mm2");
-    test_display(&[0x0f, 0xf7, 0xc1], "maskmovq mm0, mm1");
-    test_display(&[0x0f, 0xf8, 0x02], "psubb mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf8, 0xc2], "psubb mm0, mm2");
-    test_display(&[0x0f, 0xf9, 0x02], "psubw mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2");
-    test_display(&[0x0f, 0xfa, 0x02], "psubd mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xfa, 0xc2], "psubd mm0, mm2");
-    test_display(&[0x0f, 0xfb, 0x02], "psubq mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xfb, 0xc2], "psubq mm0, mm2");
-    test_display(&[0x0f, 0xfc, 0x02], "paddb mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xfc, 0xc2], "paddb mm0, mm2");
-    test_display(&[0x0f, 0xfd, 0x02], "paddw mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xfd, 0xc2], "paddw mm0, mm2");
-    test_display(&[0x0f, 0xfd, 0xd2], "paddw mm2, mm2");
-    test_display(&[0x0f, 0xfe, 0x02], "paddd mm0, qword [bp + si * 1]");
-    test_display(&[0x0f, 0xfe, 0xc2], "paddd mm0, mm2");
-    test_display(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, dword [bp + di * 1 - 0x54]");
-    test_display(&[0x16], "push ss");
-    test_display(&[0x17], "pop ss");
-    test_display(&[0x1e], "push ds");
-    test_display(&[0x1f], "pop ds");
-    test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[bx + si * 1 - 0x5]");
-    test_display(&[0x26, 0x66, 0x67, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm4");
-    test_display(&[0x27], "daa");
-    test_display(&[0x29, 0xc8], "sub ax, cx");
-    test_display(&[0x2e, 0x36, 0x0f, 0x18, 0xe7], "nop di");
-    test_display(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, xmmword [bx + si * 1], 0x48");
-    test_display(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, xmmword cs:[bx + si * 1 + 0x2d], 0x57");
-    test_display(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1], "insertps xmm1, dword fs:[bp + di * 1], -0x4f");
-    test_display(&[0x2f], "das");
-    test_display(&[0x31, 0xc9], "xor cx, cx");
-    test_display(&[0x33, 0x04], "xor ax, word [si]");
-    test_display(&[0x33, 0x05], "xor ax, word [di]");
-    test_display(&[0x33, 0x08], "xor cx, word [bx + si * 1]");
-    test_display(&[0x33, 0x20], "xor sp, word [bx + si * 1]");
-    test_display(&[0x33, 0x34], "xor si, word [si]");
-    test_display(&[0x33, 0x41, 0x23], "xor ax, word [bx + di * 1 + 0x23]");
-    test_display(&[0x33, 0x81, 0x23, 0x01], "xor ax, word [bx + di * 1 + 0x123]");
-    test_display(&[0x33, 0x84, 0xa5, 0x11], "xor ax, word [si + 0x11a5]");
-    test_display(&[0x33, 0xb4, 0x25, 0x20], "xor si, word [si + 0x2025]");
-    test_display(&[0x30, 0x40, 0x50], "xor byte [bx + si * 1 + 0x50], al");
-    test_display(&[0x33, 0xc0], "xor ax, ax");
-    test_display(&[0x33, 0xc1], "xor ax, cx");
-    test_display(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08], "movdir64b bp, zmmword es:[di + 0x80b]");
-    test_display(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, zmmword es:[ebp + 0x729080b]");
-    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[di + 0x3e], edx");
-    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[di + 0x3e], edx");
-    test_display(&[0x37], "aaa");
-    test_display(&[0x39, 0xc6], "cmp si, ax");
-    test_display(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss dword [bp + di * 1], esp");
-    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds si, zmmword fs:[bp + si * 1 + 0x54]");
-    test_display(&[0x3f], "aas");
-    test_display(&[0x40], "inc ax");
-    test_display(&[0x41], "inc cx");
-    test_display(&[0x47], "inc di");
-    test_display(&[0x48], "dec ax");
-    test_display(&[0x4f], "dec di");
-    test_display(&[0x5b], "pop bx");
-    test_display(&[0x5e], "pop si");
-    test_display(&[0x60], "pusha");
-    test_display(&[0x61], "popa");
-    test_display(&[0x66, 0x60], "pushad");
-    test_display(&[0x66, 0x61], "popad");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x10, 0x0a], "vmovups xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x10, 0x4a, 0x01], "vmovups xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x10, 0xca], "vmovups xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x11, 0x0a], "vmovups xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x11, 0x4a, 0x01], "vmovups xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x11, 0xca], "vmovups xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x12, 0x0a], "vmovlps xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x12, 0x4a, 0x01], "vmovlps xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x12, 0xca], "vmovhlps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x13, 0x0a], "vmovlps qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x13, 0x4a, 0x01], "vmovlps qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x14, 0x0a], "vunpcklps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x14, 0x4a, 0x01], "vunpcklps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x14, 0xca], "vunpcklps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x15, 0x0a], "vunpckhps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x15, 0x4a, 0x01], "vunpckhps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x15, 0xca], "vunpckhps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x16, 0x0a], "vmovhps xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x16, 0x4a, 0x01], "vmovhps xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x16, 0xca], "vmovlhps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x17, 0x0a], "vmovhps qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x17, 0x4a, 0x01], "vmovhps qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x28, 0x0a], "vmovaps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x28, 0x4a, 0x01], "vmovaps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x28, 0xca], "vmovaps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x29, 0x0a], "vmovaps xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x29, 0x4a, 0x01], "vmovaps xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x29, 0xca], "vmovaps xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x2b, 0x0a], "vmovntps xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x2b, 0x4a, 0x01], "vmovntps xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x51, 0x0a], "vsqrtps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x51, 0x4a, 0x01], "vsqrtps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x51, 0xca], "vsqrtps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x54, 0x0a], "vandps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x54, 0x4a, 0x01], "vandps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x54, 0xca], "vandps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x55, 0x0a], "vandnps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x55, 0x4a, 0x01], "vandnps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x55, 0xca], "vandnps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x56, 0x0a], "vorps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x56, 0x4a, 0x01], "vorps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x56, 0xca], "vorps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x57, 0x0a], "vxorps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x57, 0x4a, 0x01], "vxorps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x57, 0xca], "vxorps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x58, 0x0a], "vaddps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x58, 0x4a, 0x01], "vaddps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x58, 0xca], "vaddps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x59, 0x0a], "vmulps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x59, 0x4a, 0x01], "vmulps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x59, 0xca], "vmulps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5a, 0x0a], "vcvtps2pd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5a, 0xca], "vcvtps2pd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5b, 0x0a], "vcvtdq2ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5b, 0xca], "vcvtdq2ps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5c, 0x0a], "vsubps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5c, 0x4a, 0x01], "vsubps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5c, 0xca], "vsubps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5d, 0x0a], "vminps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5d, 0x4a, 0x01], "vminps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5d, 0xca], "vminps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5e, 0x0a], "vdivps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5e, 0x4a, 0x01], "vdivps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5e, 0xca], "vdivps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5f, 0x0a], "vmaxps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5f, 0x4a, 0x01], "vmaxps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x5f, 0xca], "vmaxps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x78, 0x0a], "vcvttps2udq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x78, 0xca], "vcvttps2udq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x79, 0x0a], "vcvtps2udq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0x79, 0xca], "vcvtps2udq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0xc2, 0x0a, 0xcc], "vcmpps k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0xc2, 0xca, 0xcc], "vcmpps k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0xc6, 0x0a, 0xcc], "vshufps xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x08, 0xc6, 0xca, 0xcc], "vshufps xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x10, 0x0a], "vmovups xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x10, 0x4a, 0x01], "vmovups xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x10, 0xca], "vmovups xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x11, 0x0a], "vmovups xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x11, 0x4a, 0x01], "vmovups xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x11, 0xca], "vmovups xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x14, 0x0a], "vunpcklps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x14, 0xca], "vunpcklps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x15, 0x0a], "vunpckhps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x15, 0xca], "vunpckhps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x28, 0x0a], "vmovaps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x28, 0x4a, 0x01], "vmovaps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x28, 0xca], "vmovaps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x29, 0x0a], "vmovaps xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x29, 0x4a, 0x01], "vmovaps xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x29, 0xca], "vmovaps xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x51, 0x0a], "vsqrtps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x51, 0xca], "vsqrtps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x54, 0x0a], "vandps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x54, 0xca], "vandps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x55, 0x0a], "vandnps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x55, 0xca], "vandnps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x56, 0x0a], "vorps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x56, 0xca], "vorps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x57, 0x0a], "vxorps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x57, 0xca], "vxorps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x58, 0x0a], "vaddps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x58, 0xca], "vaddps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x59, 0x0a], "vmulps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x59, 0xca], "vmulps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5a, 0xca], "vcvtps2pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5b, 0xca], "vcvtdq2ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5c, 0x0a], "vsubps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5c, 0xca], "vsubps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5d, 0x0a], "vminps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5d, 0xca], "vminps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5e, 0x0a], "vdivps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5e, 0xca], "vdivps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5f, 0x0a], "vmaxps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x5f, 0xca], "vmaxps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x78, 0xca], "vcvttps2udq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0x79, 0xca], "vcvtps2udq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x0d, 0xc6, 0xca, 0xcc], "vshufps xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x14, 0x0a], "vunpcklps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x14, 0x4a, 0x01], "vunpcklps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x15, 0x0a], "vunpckhps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x15, 0x4a, 0x01], "vunpckhps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x51, 0x0a], "vsqrtps xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x51, 0x4a, 0x01], "vsqrtps xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x51, 0xca], "vsqrtps zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x54, 0x0a], "vandps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x54, 0x4a, 0x01], "vandps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x55, 0x0a], "vandnps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x55, 0x4a, 0x01], "vandnps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x56, 0x0a], "vorps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x56, 0x4a, 0x01], "vorps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x57, 0x0a], "vxorps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x57, 0x4a, 0x01], "vxorps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x58, 0x0a], "vaddps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x58, 0x4a, 0x01], "vaddps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x58, 0xca], "vaddps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x59, 0x0a], "vmulps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x59, 0x4a, 0x01], "vmulps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x59, 0xca], "vmulps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5a, 0x0a], "vcvtps2pd xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5b, 0x0a], "vcvtdq2ps xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5b, 0xca], "vcvtdq2ps zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5c, 0x0a], "vsubps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5c, 0x4a, 0x01], "vsubps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5c, 0xca], "vsubps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5d, 0x0a], "vminps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5d, 0x4a, 0x01], "vminps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5e, 0x0a], "vdivps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5e, 0x4a, 0x01], "vdivps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5e, 0xca], "vdivps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5f, 0x0a], "vmaxps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x5f, 0x4a, 0x01], "vmaxps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x78, 0x0a], "vcvttps2udq xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x79, 0x0a], "vcvtps2udq xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0x79, 0xca], "vcvtps2udq zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0xc2, 0x0a, 0xcc], "vcmpps k1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0xc6, 0x0a, 0xcc], "vshufps xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x18, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x14, 0x0a], "vunpcklps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x15, 0x0a], "vunpckhps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x51, 0x0a], "vsqrtps xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x51, 0xca], "vsqrtps zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x54, 0x0a], "vandps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x55, 0x0a], "vandnps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x56, 0x0a], "vorps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x57, 0x0a], "vxorps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x58, 0x0a], "vaddps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x58, 0xca], "vaddps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x59, 0x0a], "vmulps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x59, 0xca], "vmulps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5c, 0x0a], "vsubps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5c, 0xca], "vsubps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5d, 0x0a], "vminps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5e, 0x0a], "vdivps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5e, 0xca], "vdivps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5f, 0x0a], "vmaxps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x1d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x10, 0x0a], "vmovups ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x10, 0x4a, 0x01], "vmovups ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x10, 0xca], "vmovups ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x11, 0x0a], "vmovups ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x11, 0x4a, 0x01], "vmovups ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x11, 0xca], "vmovups ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x14, 0x0a], "vunpcklps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x14, 0x4a, 0x01], "vunpcklps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x14, 0xca], "vunpcklps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x15, 0x0a], "vunpckhps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x15, 0x4a, 0x01], "vunpckhps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x15, 0xca], "vunpckhps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x28, 0x0a], "vmovaps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x28, 0x4a, 0x01], "vmovaps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x28, 0xca], "vmovaps ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x29, 0x0a], "vmovaps ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x29, 0x4a, 0x01], "vmovaps ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x29, 0xca], "vmovaps ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2b, 0x0a], "vmovntps ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2b, 0x4a, 0x01], "vmovntps ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2e, 0x0a], "vucomiss xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2e, 0x4a, 0x01], "vucomiss xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2e, 0xca], "vucomiss xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2f, 0x0a], "vcomiss xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2f, 0x4a, 0x01], "vcomiss xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x2f, 0xca], "vcomiss xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x51, 0x0a], "vsqrtps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x51, 0x4a, 0x01], "vsqrtps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x51, 0xca], "vsqrtps ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x54, 0x0a], "vandps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x54, 0x4a, 0x01], "vandps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x54, 0xca], "vandps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x55, 0x0a], "vandnps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x55, 0x4a, 0x01], "vandnps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x55, 0xca], "vandnps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x56, 0x0a], "vorps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x56, 0x4a, 0x01], "vorps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x56, 0xca], "vorps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x57, 0x0a], "vxorps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x57, 0x4a, 0x01], "vxorps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x57, 0xca], "vxorps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x58, 0x0a], "vaddps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x58, 0x4a, 0x01], "vaddps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x58, 0xca], "vaddps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x59, 0x0a], "vmulps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x59, 0x4a, 0x01], "vmulps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x59, 0xca], "vmulps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5a, 0x0a], "vcvtps2pd ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5a, 0xca], "vcvtps2pd ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5b, 0x0a], "vcvtdq2ps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5b, 0xca], "vcvtdq2ps ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5c, 0x0a], "vsubps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5c, 0x4a, 0x01], "vsubps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5c, 0xca], "vsubps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5d, 0x0a], "vminps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5d, 0x4a, 0x01], "vminps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5d, 0xca], "vminps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5e, 0x0a], "vdivps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5e, 0x4a, 0x01], "vdivps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5e, 0xca], "vdivps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5f, 0x0a], "vmaxps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5f, 0x4a, 0x01], "vmaxps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x5f, 0xca], "vmaxps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x78, 0x0a], "vcvttps2udq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x78, 0xca], "vcvttps2udq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x79, 0x0a], "vcvtps2udq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0x79, 0xca], "vcvtps2udq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0xc2, 0x0a, 0xcc], "vcmpps k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0xc2, 0xca, 0xcc], "vcmpps k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0xc6, 0x0a, 0xcc], "vshufps ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x28, 0xc6, 0xca, 0xcc], "vshufps ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x10, 0x0a], "vmovups ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x10, 0x4a, 0x01], "vmovups ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x10, 0xca], "vmovups ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x11, 0x0a], "vmovups ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x11, 0x4a, 0x01], "vmovups ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x11, 0xca], "vmovups ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x14, 0x0a], "vunpcklps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x14, 0xca], "vunpcklps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x15, 0x0a], "vunpckhps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x15, 0xca], "vunpckhps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x28, 0x0a], "vmovaps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x28, 0x4a, 0x01], "vmovaps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x28, 0xca], "vmovaps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x29, 0x0a], "vmovaps ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x29, 0x4a, 0x01], "vmovaps ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x29, 0xca], "vmovaps ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x51, 0x0a], "vsqrtps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x51, 0xca], "vsqrtps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x54, 0x0a], "vandps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x54, 0x4a, 0x01], "vandps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x54, 0xca], "vandps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x55, 0x0a], "vandnps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x55, 0xca], "vandnps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x56, 0x0a], "vorps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x56, 0x4a, 0x01], "vorps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x56, 0xca], "vorps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x57, 0x0a], "vxorps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x57, 0xca], "vxorps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x58, 0x0a], "vaddps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x58, 0xca], "vaddps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x59, 0x0a], "vmulps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x59, 0xca], "vmulps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5a, 0xca], "vcvtps2pd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5b, 0xca], "vcvtdq2ps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5c, 0x0a], "vsubps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5c, 0xca], "vsubps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5d, 0x0a], "vminps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5d, 0xca], "vminps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5e, 0x0a], "vdivps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5e, 0xca], "vdivps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5f, 0x0a], "vmaxps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x5f, 0xca], "vmaxps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x78, 0x0a], "vcvttps2udq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x78, 0xca], "vcvttps2udq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x79, 0x0a], "vcvtps2udq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0x79, 0xca], "vcvtps2udq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x2d, 0xc6, 0xca, 0xcc], "vshufps ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x14, 0x0a], "vunpcklps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x14, 0x4a, 0x01], "vunpcklps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x15, 0x0a], "vunpckhps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x15, 0x4a, 0x01], "vunpckhps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x51, 0x0a], "vsqrtps ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x51, 0x4a, 0x01], "vsqrtps ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x51, 0xca], "vsqrtps zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x54, 0x0a], "vandps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x54, 0x4a, 0x01], "vandps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x55, 0x0a], "vandnps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x55, 0x4a, 0x01], "vandnps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x56, 0x0a], "vorps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x56, 0x4a, 0x01], "vorps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x57, 0x0a], "vxorps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x57, 0x4a, 0x01], "vxorps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x58, 0x0a], "vaddps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x58, 0x4a, 0x01], "vaddps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x58, 0xca], "vaddps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x59, 0x0a], "vmulps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x59, 0x4a, 0x01], "vmulps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x59, 0xca], "vmulps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5a, 0x0a], "vcvtps2pd ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5b, 0x0a], "vcvtdq2ps ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5b, 0xca], "vcvtdq2ps zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5c, 0x0a], "vsubps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5c, 0x4a, 0x01], "vsubps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5c, 0xca], "vsubps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5d, 0x0a], "vminps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5d, 0x4a, 0x01], "vminps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5e, 0x0a], "vdivps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5e, 0x4a, 0x01], "vdivps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5e, 0xca], "vdivps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5f, 0x0a], "vmaxps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x5f, 0x4a, 0x01], "vmaxps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x78, 0x0a], "vcvttps2udq ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x79, 0x0a], "vcvtps2udq ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0x79, 0xca], "vcvtps2udq zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0xc2, 0x0a, 0xcc], "vcmpps k1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0xc6, 0x0a, 0xcc], "vshufps ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x38, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x14, 0x0a], "vunpcklps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x15, 0x0a], "vunpckhps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x51, 0x0a], "vsqrtps ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x51, 0xca], "vsqrtps zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x54, 0x0a], "vandps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x54, 0x4a, 0x01], "vandps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x55, 0x0a], "vandnps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x56, 0x0a], "vorps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x56, 0x4a, 0x01], "vorps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x57, 0x0a], "vxorps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x58, 0x0a], "vaddps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x58, 0xca], "vaddps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x59, 0x0a], "vmulps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x59, 0xca], "vmulps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5c, 0x0a], "vsubps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5c, 0xca], "vsubps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5d, 0x0a], "vminps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5e, 0x0a], "vdivps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5e, 0xca], "vdivps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5f, 0x0a], "vmaxps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x78, 0x0a], "vcvttps2udq ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x79, 0x0a], "vcvtps2udq ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x3d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x10, 0x0a], "vmovups zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x10, 0x4a, 0x01], "vmovups zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x10, 0xca], "vmovups zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x11, 0x0a], "vmovups zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x11, 0x4a, 0x01], "vmovups zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x11, 0xca], "vmovups zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x14, 0x0a], "vunpcklps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x14, 0x4a, 0x01], "vunpcklps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x14, 0xca], "vunpcklps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x15, 0x0a], "vunpckhps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x15, 0x4a, 0x01], "vunpckhps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x15, 0xca], "vunpckhps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x28, 0x0a], "vmovaps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x28, 0x4a, 0x01], "vmovaps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x28, 0xca], "vmovaps zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x29, 0x0a], "vmovaps zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x29, 0x4a, 0x01], "vmovaps zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x29, 0xca], "vmovaps zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x2b, 0x0a], "vmovntps zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x2b, 0x4a, 0x01], "vmovntps zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x51, 0x0a], "vsqrtps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x51, 0x4a, 0x01], "vsqrtps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x51, 0xca], "vsqrtps zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x54, 0x0a], "vandps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x54, 0x4a, 0x01], "vandps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x54, 0xca], "vandps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x55, 0x0a], "vandnps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x55, 0x4a, 0x01], "vandnps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x55, 0xca], "vandnps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x56, 0x0a], "vorps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x56, 0x4a, 0x01], "vorps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x56, 0xca], "vorps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x57, 0x0a], "vxorps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x57, 0x4a, 0x01], "vxorps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x57, 0xca], "vxorps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x58, 0x0a], "vaddps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x58, 0x4a, 0x01], "vaddps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x58, 0xca], "vaddps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x59, 0x0a], "vmulps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x59, 0x4a, 0x01], "vmulps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x59, 0xca], "vmulps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5a, 0x0a], "vcvtps2pd zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5a, 0xca], "vcvtps2pd zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5b, 0x0a], "vcvtdq2ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5b, 0xca], "vcvtdq2ps zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5c, 0x0a], "vsubps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5c, 0x4a, 0x01], "vsubps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5c, 0xca], "vsubps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5d, 0x0a], "vminps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5d, 0x4a, 0x01], "vminps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5d, 0xca], "vminps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5e, 0x0a], "vdivps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5e, 0x4a, 0x01], "vdivps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5e, 0xca], "vdivps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5f, 0x0a], "vmaxps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5f, 0x4a, 0x01], "vmaxps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x5f, 0xca], "vmaxps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x78, 0x0a], "vcvttps2udq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x78, 0xca], "vcvttps2udq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x79, 0x0a], "vcvtps2udq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0x79, 0xca], "vcvtps2udq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0xc2, 0x0a, 0xcc], "vcmpps k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0xc2, 0xca, 0xcc], "vcmpps k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0xc6, 0x0a, 0xcc], "vshufps zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x48, 0xc6, 0xca, 0xcc], "vshufps zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x10, 0x0a], "vmovups zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x10, 0x4a, 0x01], "vmovups zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x10, 0xca], "vmovups zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x11, 0x0a], "vmovups zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x11, 0x4a, 0x01], "vmovups zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x11, 0xca], "vmovups zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x14, 0x0a], "vunpcklps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x14, 0xca], "vunpcklps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x15, 0x0a], "vunpckhps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x15, 0xca], "vunpckhps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x28, 0x0a], "vmovaps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x28, 0x4a, 0x01], "vmovaps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x28, 0xca], "vmovaps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x29, 0x0a], "vmovaps zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x29, 0x4a, 0x01], "vmovaps zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x29, 0xca], "vmovaps zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x51, 0x0a], "vsqrtps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x51, 0xca], "vsqrtps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x54, 0x0a], "vandps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x54, 0x4a, 0x01], "vandps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x54, 0xca], "vandps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x55, 0x0a], "vandnps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x55, 0xca], "vandnps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x56, 0x0a], "vorps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x56, 0x4a, 0x01], "vorps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x56, 0xca], "vorps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x57, 0x0a], "vxorps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x57, 0xca], "vxorps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x58, 0x0a], "vaddps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x58, 0xca], "vaddps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x59, 0x0a], "vmulps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x59, 0xca], "vmulps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5a, 0xca], "vcvtps2pd zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5c, 0x0a], "vsubps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5c, 0xca], "vsubps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5d, 0x0a], "vminps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5d, 0xca], "vminps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5e, 0x0a], "vdivps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5e, 0xca], "vdivps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5f, 0x0a], "vmaxps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x5f, 0xca], "vmaxps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x78, 0x0a], "vcvttps2udq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x78, 0xca], "vcvttps2udq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x79, 0x0a], "vcvtps2udq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0x79, 0xca], "vcvtps2udq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x4d, 0xc6, 0xca, 0xcc], "vshufps zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x14, 0x0a], "vunpcklps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x14, 0x4a, 0x01], "vunpcklps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x15, 0x0a], "vunpckhps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x15, 0x4a, 0x01], "vunpckhps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x51, 0x0a], "vsqrtps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x51, 0x4a, 0x01], "vsqrtps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x51, 0xca], "vsqrtps zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x54, 0x0a], "vandps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x54, 0x4a, 0x01], "vandps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x55, 0x0a], "vandnps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x55, 0x4a, 0x01], "vandnps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x56, 0x0a], "vorps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x56, 0x4a, 0x01], "vorps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x57, 0x0a], "vxorps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x57, 0x4a, 0x01], "vxorps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x58, 0x0a], "vaddps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x58, 0x4a, 0x01], "vaddps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x58, 0xca], "vaddps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x59, 0x0a], "vmulps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x59, 0x4a, 0x01], "vmulps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x59, 0xca], "vmulps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5a, 0x0a], "vcvtps2pd zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5b, 0x0a], "vcvtdq2ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5b, 0xca], "vcvtdq2ps zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5c, 0x0a], "vsubps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5c, 0x4a, 0x01], "vsubps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5c, 0xca], "vsubps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5d, 0x0a], "vminps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5d, 0x4a, 0x01], "vminps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5e, 0x0a], "vdivps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5e, 0x4a, 0x01], "vdivps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5e, 0xca], "vdivps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5f, 0x0a], "vmaxps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x5f, 0x4a, 0x01], "vmaxps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x78, 0x0a], "vcvttps2udq zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x79, 0x0a], "vcvtps2udq zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0x79, 0xca], "vcvtps2udq zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0xc2, 0x0a, 0xcc], "vcmpps k1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0xc6, 0x0a, 0xcc], "vshufps zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x58, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x14, 0x0a], "vunpcklps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x15, 0x0a], "vunpckhps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x51, 0x0a], "vsqrtps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x51, 0xca], "vsqrtps zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x54, 0x0a], "vandps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x54, 0x4a, 0x01], "vandps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x55, 0x0a], "vandnps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x56, 0x0a], "vorps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x56, 0x4a, 0x01], "vorps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x57, 0x0a], "vxorps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x58, 0x0a], "vaddps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x58, 0xca], "vaddps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x59, 0x0a], "vmulps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x59, 0xca], "vmulps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5c, 0x0a], "vsubps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5c, 0xca], "vsubps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5d, 0x0a], "vminps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5e, 0x0a], "vdivps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5e, 0xca], "vdivps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5f, 0x0a], "vmaxps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x78, 0x0a], "vcvttps2udq zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x79, 0x0a], "vcvtps2udq zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x5d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x2e, 0xca], "vucomiss xmm1{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x2f, 0xca], "vcomiss xmm1{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x51, 0xca], "vsqrtps zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x58, 0xca], "vaddps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x59, 0xca], "vmulps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x5a, 0xca], "vcvtps2pd zmm1{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x5b, 0xca], "vcvtdq2ps zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x5c, 0xca], "vsubps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x5d, 0xca], "vminps zmm1{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x5e, 0xca], "vdivps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x5f, 0xca], "vmaxps zmm1{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x78, 0xca], "vcvttps2udq zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0x79, 0xca], "vcvtps2udq zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x78, 0xc2, 0xca, 0xcc], "vcmpps k1{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x51, 0xca], "vsqrtps zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x58, 0xca], "vaddps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x59, 0xca], "vmulps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x5a, 0xca], "vcvtps2pd zmm1{k5}{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x5c, 0xca], "vsubps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x5d, 0xca], "vminps zmm1{k5}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x5e, 0xca], "vdivps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x5f, 0xca], "vmaxps zmm1{k5}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x78, 0xca], "vcvttps2udq zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x7d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x10, 0x0a], "vmovups xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x10, 0x4a, 0x01], "vmovups xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x10, 0xca], "vmovups xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x11, 0xca], "vmovups xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x14, 0x0a], "vunpcklps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x14, 0xca], "vunpcklps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x15, 0x0a], "vunpckhps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x15, 0xca], "vunpckhps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x28, 0x0a], "vmovaps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x28, 0x4a, 0x01], "vmovaps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x28, 0xca], "vmovaps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x29, 0xca], "vmovaps xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x51, 0x0a], "vsqrtps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x51, 0xca], "vsqrtps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x54, 0x0a], "vandps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x54, 0xca], "vandps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x55, 0x0a], "vandnps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x55, 0xca], "vandnps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x56, 0x0a], "vorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x56, 0xca], "vorps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x57, 0x0a], "vxorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x57, 0xca], "vxorps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x58, 0x0a], "vaddps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x58, 0xca], "vaddps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x59, 0x0a], "vmulps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x59, 0xca], "vmulps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5a, 0xca], "vcvtps2pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5b, 0xca], "vcvtdq2ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5c, 0x0a], "vsubps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5c, 0xca], "vsubps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5d, 0x0a], "vminps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5d, 0xca], "vminps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5e, 0x0a], "vdivps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5e, 0xca], "vdivps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5f, 0x0a], "vmaxps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x5f, 0xca], "vmaxps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x78, 0xca], "vcvttps2udq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0x79, 0xca], "vcvtps2udq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x8d, 0xc6, 0xca, 0xcc], "vshufps xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x14, 0x0a], "vunpcklps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x15, 0x0a], "vunpckhps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x51, 0x0a], "vsqrtps xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x54, 0x0a], "vandps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x55, 0x0a], "vandnps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x56, 0x0a], "vorps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x57, 0x0a], "vxorps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x58, 0x0a], "vaddps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x58, 0xca], "vaddps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x59, 0x0a], "vmulps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x59, 0xca], "vmulps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5c, 0x0a], "vsubps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5c, 0xca], "vsubps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5d, 0x0a], "vminps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5e, 0x0a], "vdivps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5e, 0xca], "vdivps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5f, 0x0a], "vmaxps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0x9d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x10, 0x0a], "vmovups ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x10, 0x4a, 0x01], "vmovups ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x10, 0xca], "vmovups ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x11, 0xca], "vmovups ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x14, 0x0a], "vunpcklps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x14, 0xca], "vunpcklps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x15, 0x0a], "vunpckhps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x15, 0xca], "vunpckhps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x28, 0x0a], "vmovaps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x28, 0x4a, 0x01], "vmovaps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x28, 0xca], "vmovaps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x29, 0xca], "vmovaps ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x51, 0x0a], "vsqrtps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x51, 0xca], "vsqrtps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x54, 0x0a], "vandps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x54, 0x4a, 0x01], "vandps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x54, 0xca], "vandps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x55, 0x0a], "vandnps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x55, 0xca], "vandnps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x56, 0x0a], "vorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x56, 0x4a, 0x01], "vorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x56, 0xca], "vorps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x57, 0x0a], "vxorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x57, 0xca], "vxorps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x58, 0x0a], "vaddps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x58, 0xca], "vaddps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x59, 0x0a], "vmulps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x59, 0xca], "vmulps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5a, 0xca], "vcvtps2pd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5b, 0xca], "vcvtdq2ps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5c, 0x0a], "vsubps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5c, 0xca], "vsubps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5d, 0x0a], "vminps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5d, 0xca], "vminps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5e, 0x0a], "vdivps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5e, 0xca], "vdivps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5f, 0x0a], "vmaxps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x5f, 0xca], "vmaxps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x78, 0x0a], "vcvttps2udq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x78, 0xca], "vcvttps2udq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x79, 0x0a], "vcvtps2udq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0x79, 0xca], "vcvtps2udq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xad, 0xc6, 0xca, 0xcc], "vshufps ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x14, 0x0a], "vunpcklps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x15, 0x0a], "vunpckhps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x51, 0x0a], "vsqrtps ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x54, 0x0a], "vandps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x54, 0x4a, 0x01], "vandps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x55, 0x0a], "vandnps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x56, 0x0a], "vorps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x56, 0x4a, 0x01], "vorps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x57, 0x0a], "vxorps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x58, 0x0a], "vaddps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x58, 0xca], "vaddps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x59, 0x0a], "vmulps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x59, 0xca], "vmulps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5c, 0x0a], "vsubps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5c, 0xca], "vsubps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5d, 0x0a], "vminps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5e, 0x0a], "vdivps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5e, 0xca], "vdivps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5f, 0x0a], "vmaxps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x78, 0x0a], "vcvttps2udq ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x79, 0x0a], "vcvtps2udq ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xbd, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x10, 0x0a], "vmovups zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x10, 0x4a, 0x01], "vmovups zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x10, 0xca], "vmovups zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x11, 0xca], "vmovups zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x14, 0x0a], "vunpcklps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x14, 0xca], "vunpcklps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x15, 0x0a], "vunpckhps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x15, 0xca], "vunpckhps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x28, 0x0a], "vmovaps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x28, 0x4a, 0x01], "vmovaps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x28, 0xca], "vmovaps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x29, 0xca], "vmovaps zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x51, 0x0a], "vsqrtps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x54, 0x0a], "vandps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x54, 0x4a, 0x01], "vandps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x54, 0xca], "vandps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x55, 0x0a], "vandnps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x55, 0xca], "vandnps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x56, 0x0a], "vorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x56, 0x4a, 0x01], "vorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x56, 0xca], "vorps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x57, 0x0a], "vxorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x57, 0xca], "vxorps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x58, 0x0a], "vaddps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x58, 0xca], "vaddps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x59, 0x0a], "vmulps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x59, 0xca], "vmulps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5a, 0xca], "vcvtps2pd zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5c, 0x0a], "vsubps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5c, 0xca], "vsubps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5d, 0x0a], "vminps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5d, 0xca], "vminps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5e, 0x0a], "vdivps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5e, 0xca], "vdivps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5f, 0x0a], "vmaxps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x5f, 0xca], "vmaxps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x78, 0x0a], "vcvttps2udq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x78, 0xca], "vcvttps2udq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x79, 0x0a], "vcvtps2udq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xcd, 0xc6, 0xca, 0xcc], "vshufps zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x14, 0x0a], "vunpcklps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x15, 0x0a], "vunpckhps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x51, 0x0a], "vsqrtps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x54, 0x0a], "vandps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x54, 0x4a, 0x01], "vandps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x55, 0x0a], "vandnps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x56, 0x0a], "vorps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x56, 0x4a, 0x01], "vorps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x57, 0x0a], "vxorps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x58, 0x0a], "vaddps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x58, 0xca], "vaddps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x59, 0x0a], "vmulps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x59, 0xca], "vmulps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5c, 0x0a], "vsubps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5c, 0xca], "vsubps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5d, 0x0a], "vminps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5e, 0x0a], "vdivps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5e, 0xca], "vdivps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5f, 0x0a], "vmaxps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x78, 0x0a], "vcvttps2udq zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x79, 0x0a], "vcvtps2udq zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xdd, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x58, 0xca], "vaddps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x59, 0xca], "vmulps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x5a, 0xca], "vcvtps2pd zmm1{k5}{z}{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x5c, 0xca], "vsubps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x5d, 0xca], "vminps zmm1{k5}{z}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x5e, 0xca], "vdivps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x5f, 0xca], "vmaxps zmm1{k5}{z}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x78, 0xca], "vcvttps2udq zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7c, 0xfd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x5b, 0x0a], "vcvtps2dq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x5b, 0xca], "vcvtps2dq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x62, 0x0a], "vpunpckldq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x62, 0x4a, 0x01], "vpunpckldq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x62, 0xca], "vpunpckldq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x66, 0x0a], "vpcmpgtd k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x66, 0x4a, 0x01], "vpcmpgtd k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x66, 0xca], "vpcmpgtd k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6a, 0x0a], "vpunpckhdq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6a, 0xca], "vpunpckhdq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6b, 0x0a], "vpackssdw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6b, 0x4a, 0x01], "vpackssdw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6b, 0xca], "vpackssdw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6f, 0x0a], "vmovdqa32 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6f, 0x4a, 0x01], "vmovdqa32 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x6f, 0xca], "vmovdqa32 xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x70, 0x0a, 0xcc], "vpshufd xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x70, 0xca, 0xcc], "vpshufd xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x72, 0x0a, 0xcc], "vprold xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x72, 0xca, 0xcc], "vprold xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x76, 0x0a], "vpcmpeqd k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x76, 0x4a, 0x01], "vpcmpeqd k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x76, 0xca], "vpcmpeqd k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x78, 0x0a], "vcvttps2uqq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x78, 0xca], "vcvttps2uqq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x79, 0x0a], "vcvtps2uqq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x79, 0xca], "vcvtps2uqq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7a, 0x0a], "vcvttps2qq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7a, 0xca], "vcvttps2qq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7b, 0x0a], "vcvtps2qq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7b, 0xca], "vcvtps2qq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7f, 0x0a], "vmovdqa32 xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7f, 0x4a, 0x01], "vmovdqa32 xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0x7f, 0xca], "vmovdqa32 xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xd2, 0x0a], "vpsrld xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xd2, 0x4a, 0x01], "vpsrld xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xd2, 0xca], "vpsrld xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xdb, 0x0a], "vpandd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xdb, 0x4a, 0x01], "vpandd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xdb, 0xca], "vpandd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xdf, 0x0a], "vpandnd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xdf, 0x4a, 0x01], "vpandnd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xdf, 0xca], "vpandnd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xe2, 0x0a], "vpsrad xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xe2, 0x4a, 0x01], "vpsrad xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xe2, 0xca], "vpsrad xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xe7, 0x0a], "vmovntdq xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xe7, 0x4a, 0x01], "vmovntdq xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xeb, 0x0a], "vpord xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xeb, 0x4a, 0x01], "vpord xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xeb, 0xca], "vpord xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xef, 0x0a], "vpxord xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xef, 0x4a, 0x01], "vpxord xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xef, 0xca], "vpxord xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xf2, 0x0a], "vpslld xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xf2, 0x4a, 0x01], "vpslld xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xf2, 0xca], "vpslld xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xfa, 0x0a], "vpsubd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xfa, 0x4a, 0x01], "vpsubd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xfa, 0xca], "vpsubd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xfe, 0x0a], "vpaddd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xfe, 0x4a, 0x01], "vpaddd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x08, 0xfe, 0xca], "vpaddd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x5b, 0xca], "vcvtps2dq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x62, 0x0a], "vpunpckldq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x62, 0xca], "vpunpckldq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x66, 0x0a], "vpcmpgtd k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x66, 0xca], "vpcmpgtd k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6a, 0xca], "vpunpckhdq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6b, 0x0a], "vpackssdw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6b, 0xca], "vpackssdw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6f, 0x0a], "vmovdqa32 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqa32 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x6f, 0xca], "vmovdqa32 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x70, 0xca, 0xcc], "vpshufd xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x72, 0xca, 0xcc], "vprold xmm0{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x76, 0x0a], "vpcmpeqd k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x76, 0xca], "vpcmpeqd k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x78, 0xca], "vcvttps2uqq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x79, 0xca], "vcvtps2uqq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7a, 0xca], "vcvttps2qq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7b, 0xca], "vcvtps2qq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7f, 0x0a], "vmovdqa32 xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqa32 xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0x7f, 0xca], "vmovdqa32 xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xd2, 0x0a], "vpsrld xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xd2, 0x4a, 0x01], "vpsrld xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xd2, 0xca], "vpsrld xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xdb, 0x0a], "vpandd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xdb, 0xca], "vpandd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xdf, 0x0a], "vpandnd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xdf, 0xca], "vpandnd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xe2, 0x0a], "vpsrad xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xe2, 0x4a, 0x01], "vpsrad xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xe2, 0xca], "vpsrad xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xeb, 0x0a], "vpord xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xeb, 0xca], "vpord xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xef, 0x0a], "vpxord xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xef, 0xca], "vpxord xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xf2, 0x0a], "vpslld xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xf2, 0x4a, 0x01], "vpslld xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xf2, 0xca], "vpslld xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xfa, 0x0a], "vpsubd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xfa, 0xca], "vpsubd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xfe, 0x0a], "vpaddd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x0d, 0xfe, 0xca], "vpaddd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x5b, 0x0a], "vcvtps2dq xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x5b, 0xca], "vcvtps2dq zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x62, 0x0a], "vpunpckldq xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x62, 0x4a, 0x01], "vpunpckldq xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x66, 0x0a], "vpcmpgtd k1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x66, 0x4a, 0x01], "vpcmpgtd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x6a, 0x0a], "vpunpckhdq xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x6b, 0x0a], "vpackssdw xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x6b, 0x4a, 0x01], "vpackssdw xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x70, 0x0a, 0xcc], "vpshufd xmm1, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x72, 0x0a, 0xcc], "vprold xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x76, 0x0a], "vpcmpeqd k1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x76, 0x4a, 0x01], "vpcmpeqd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x78, 0x0a], "vcvttps2uqq xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x79, 0x0a], "vcvtps2uqq xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x79, 0xca], "vcvtps2uqq zmm1{rn-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x7a, 0x0a], "vcvttps2qq xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x7b, 0x0a], "vcvtps2qq xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0x7b, 0xca], "vcvtps2qq zmm1{rn-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xdb, 0x0a], "vpandd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xdb, 0x4a, 0x01], "vpandd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xdf, 0x0a], "vpandnd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xdf, 0x4a, 0x01], "vpandnd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xeb, 0x0a], "vpord xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xeb, 0x4a, 0x01], "vpord xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xef, 0x0a], "vpxord xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xef, 0x4a, 0x01], "vpxord xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xfa, 0x0a], "vpsubd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xfa, 0x4a, 0x01], "vpsubd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xfe, 0x0a], "vpaddd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x18, 0xfe, 0x4a, 0x01], "vpaddd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x62, 0x0a], "vpunpckldq xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x66, 0x0a], "vpcmpgtd k1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x6b, 0x0a], "vpackssdw xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x76, 0x0a], "vpcmpeqd k1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{rn-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{rn-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xdb, 0x0a], "vpandd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xdf, 0x0a], "vpandnd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xeb, 0x0a], "vpord xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xef, 0x0a], "vpxord xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xfa, 0x0a], "vpsubd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xfe, 0x0a], "vpaddd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x1d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x5b, 0x0a], "vcvtps2dq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x5b, 0xca], "vcvtps2dq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x62, 0x0a], "vpunpckldq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x62, 0x4a, 0x01], "vpunpckldq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x62, 0xca], "vpunpckldq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x66, 0x0a], "vpcmpgtd k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x66, 0x4a, 0x01], "vpcmpgtd k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x66, 0xca], "vpcmpgtd k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6a, 0x0a], "vpunpckhdq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6a, 0xca], "vpunpckhdq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6b, 0x0a], "vpackssdw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6b, 0x4a, 0x01], "vpackssdw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6b, 0xca], "vpackssdw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6f, 0x0a], "vmovdqa32 ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6f, 0x4a, 0x01], "vmovdqa32 ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x6f, 0xca], "vmovdqa32 ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x70, 0x0a, 0xcc], "vpshufd ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x70, 0xca, 0xcc], "vpshufd ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x72, 0x0a, 0xcc], "vprold ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x72, 0xca, 0xcc], "vprold ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x76, 0x0a], "vpcmpeqd k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x76, 0x4a, 0x01], "vpcmpeqd k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x76, 0xca], "vpcmpeqd k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x78, 0x0a], "vcvttps2uqq ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x78, 0xca], "vcvttps2uqq ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x79, 0x0a], "vcvtps2uqq ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x79, 0xca], "vcvtps2uqq ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7a, 0x0a], "vcvttps2qq ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7a, 0xca], "vcvttps2qq ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7b, 0x0a], "vcvtps2qq ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7b, 0xca], "vcvtps2qq ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7f, 0x0a], "vmovdqa32 ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7f, 0x4a, 0x01], "vmovdqa32 ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0x7f, 0xca], "vmovdqa32 ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xd2, 0x0a], "vpsrld ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xd2, 0x4a, 0x01], "vpsrld ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xd2, 0xca], "vpsrld ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xdb, 0x0a], "vpandd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xdb, 0x4a, 0x01], "vpandd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xdb, 0xca], "vpandd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xdf, 0x0a], "vpandnd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xdf, 0x4a, 0x01], "vpandnd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xdf, 0xca], "vpandnd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xe2, 0x0a], "vpsrad ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xe2, 0x4a, 0x01], "vpsrad ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xe2, 0xca], "vpsrad ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xe7, 0x0a], "vmovntdq ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xe7, 0x4a, 0x01], "vmovntdq ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xeb, 0x0a], "vpord ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xeb, 0x4a, 0x01], "vpord ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xeb, 0xca], "vpord ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xef, 0x0a], "vpxord ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xef, 0x4a, 0x01], "vpxord ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xef, 0xca], "vpxord ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xf2, 0x0a], "vpslld ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xf2, 0x4a, 0x01], "vpslld ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xf2, 0xca], "vpslld ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xfa, 0x0a], "vpsubd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xfa, 0x4a, 0x01], "vpsubd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xfa, 0xca], "vpsubd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xfe, 0x0a], "vpaddd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xfe, 0x4a, 0x01], "vpaddd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x28, 0xfe, 0xca], "vpaddd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x5b, 0xca], "vcvtps2dq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x62, 0x0a], "vpunpckldq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x62, 0xca], "vpunpckldq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x66, 0x0a], "vpcmpgtd k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x66, 0xca], "vpcmpgtd k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6a, 0xca], "vpunpckhdq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6b, 0x0a], "vpackssdw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6b, 0xca], "vpackssdw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6f, 0x0a], "vmovdqa32 ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqa32 ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x6f, 0xca], "vmovdqa32 ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x70, 0xca, 0xcc], "vpshufd ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x72, 0xca, 0xcc], "vprold ymm0{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x76, 0x0a], "vpcmpeqd k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x76, 0xca], "vpcmpeqd k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x78, 0xca], "vcvttps2uqq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x79, 0xca], "vcvtps2uqq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7a, 0xca], "vcvttps2qq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7b, 0xca], "vcvtps2qq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7f, 0x0a], "vmovdqa32 ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqa32 ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0x7f, 0xca], "vmovdqa32 ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xd2, 0x0a], "vpsrld ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xd2, 0x4a, 0x01], "vpsrld ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xd2, 0xca], "vpsrld ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xdb, 0x0a], "vpandd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xdb, 0xca], "vpandd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xdf, 0x0a], "vpandnd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xdf, 0xca], "vpandnd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xe2, 0x0a], "vpsrad ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xe2, 0x4a, 0x01], "vpsrad ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xe2, 0xca], "vpsrad ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xeb, 0x0a], "vpord ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xeb, 0xca], "vpord ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xef, 0x0a], "vpxord ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xef, 0xca], "vpxord ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xf2, 0x0a], "vpslld ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xf2, 0x4a, 0x01], "vpslld ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xf2, 0xca], "vpslld ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xfa, 0x0a], "vpsubd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xfa, 0xca], "vpsubd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xfe, 0x0a], "vpaddd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x2d, 0xfe, 0xca], "vpaddd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x5b, 0x0a], "vcvtps2dq ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x5b, 0xca], "vcvtps2dq zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x62, 0x0a], "vpunpckldq ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x62, 0x4a, 0x01], "vpunpckldq ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x66, 0x0a], "vpcmpgtd k1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x66, 0x4a, 0x01], "vpcmpgtd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x6a, 0x0a], "vpunpckhdq ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x6b, 0x0a], "vpackssdw ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x6b, 0x4a, 0x01], "vpackssdw ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x70, 0x0a, 0xcc], "vpshufd ymm1, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x72, 0x0a, 0xcc], "vprold ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x76, 0x0a], "vpcmpeqd k1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x76, 0x4a, 0x01], "vpcmpeqd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x78, 0x0a], "vcvttps2uqq ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x79, 0x0a], "vcvtps2uqq ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x79, 0xca], "vcvtps2uqq zmm1{rd-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x7a, 0x0a], "vcvttps2qq ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x7b, 0x0a], "vcvtps2qq ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0x7b, 0xca], "vcvtps2qq zmm1{rd-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xdb, 0x0a], "vpandd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xdb, 0x4a, 0x01], "vpandd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xdf, 0x0a], "vpandnd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xdf, 0x4a, 0x01], "vpandnd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xeb, 0x0a], "vpord ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xeb, 0x4a, 0x01], "vpord ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xef, 0x0a], "vpxord ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xef, 0x4a, 0x01], "vpxord ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xfa, 0x0a], "vpsubd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xfa, 0x4a, 0x01], "vpsubd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xfe, 0x0a], "vpaddd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x38, 0xfe, 0x4a, 0x01], "vpaddd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x62, 0x0a], "vpunpckldq ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x66, 0x0a], "vpcmpgtd k1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x6b, 0x0a], "vpackssdw ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x76, 0x0a], "vpcmpeqd k1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{rd-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{rd-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xdb, 0x0a], "vpandd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xdf, 0x0a], "vpandnd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xeb, 0x0a], "vpord ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xef, 0x0a], "vpxord ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xfa, 0x0a], "vpsubd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xfe, 0x0a], "vpaddd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x3d, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x5b, 0x0a], "vcvtps2dq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x5b, 0xca], "vcvtps2dq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x62, 0x0a], "vpunpckldq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x62, 0x4a, 0x01], "vpunpckldq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x62, 0xca], "vpunpckldq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x66, 0x0a], "vpcmpgtd k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x66, 0x4a, 0x01], "vpcmpgtd k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x66, 0xca], "vpcmpgtd k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6a, 0x0a], "vpunpckhdq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6a, 0xca], "vpunpckhdq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6b, 0x0a], "vpackssdw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6b, 0x4a, 0x01], "vpackssdw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6b, 0xca], "vpackssdw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6f, 0x0a], "vmovdqa32 zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6f, 0x4a, 0x01], "vmovdqa32 zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x6f, 0xca], "vmovdqa32 zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x70, 0x0a, 0xcc], "vpshufd zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x70, 0xca, 0xcc], "vpshufd zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x72, 0x0a, 0xcc], "vprold zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x72, 0xca, 0xcc], "vprold zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x76, 0x0a], "vpcmpeqd k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x76, 0x4a, 0x01], "vpcmpeqd k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x76, 0xca], "vpcmpeqd k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x78, 0x0a], "vcvttps2uqq zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x78, 0xca], "vcvttps2uqq zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x79, 0x0a], "vcvtps2uqq zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x79, 0xca], "vcvtps2uqq zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7a, 0x0a], "vcvttps2qq zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7a, 0xca], "vcvttps2qq zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7b, 0x0a], "vcvtps2qq zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7b, 0xca], "vcvtps2qq zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7f, 0x0a], "vmovdqa32 zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7f, 0x4a, 0x01], "vmovdqa32 zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0x7f, 0xca], "vmovdqa32 zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xd2, 0x0a], "vpsrld zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xd2, 0x4a, 0x01], "vpsrld zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xd2, 0xca], "vpsrld zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xdb, 0x0a], "vpandd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xdb, 0x4a, 0x01], "vpandd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xdb, 0xca], "vpandd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xdf, 0x0a], "vpandnd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xdf, 0x4a, 0x01], "vpandnd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xdf, 0xca], "vpandnd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xe2, 0x0a], "vpsrad zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xe2, 0x4a, 0x01], "vpsrad zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xe2, 0xca], "vpsrad zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xe7, 0x0a], "vmovntdq zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xe7, 0x4a, 0x01], "vmovntdq zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xeb, 0x0a], "vpord zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xeb, 0x4a, 0x01], "vpord zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xeb, 0xca], "vpord zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xef, 0x0a], "vpxord zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xef, 0x4a, 0x01], "vpxord zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xef, 0xca], "vpxord zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xf2, 0x0a], "vpslld zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xf2, 0x4a, 0x01], "vpslld zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xf2, 0xca], "vpslld zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xfa, 0x0a], "vpsubd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xfa, 0x4a, 0x01], "vpsubd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xfa, 0xca], "vpsubd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xfe, 0x0a], "vpaddd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xfe, 0x4a, 0x01], "vpaddd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x48, 0xfe, 0xca], "vpaddd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x62, 0x0a], "vpunpckldq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x62, 0xca], "vpunpckldq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x66, 0x0a], "vpcmpgtd k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x66, 0xca], "vpcmpgtd k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6a, 0xca], "vpunpckhdq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6b, 0x0a], "vpackssdw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6b, 0xca], "vpackssdw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6f, 0x0a], "vmovdqa32 zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqa32 zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x6f, 0xca], "vmovdqa32 zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x70, 0xca, 0xcc], "vpshufd zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x72, 0xca, 0xcc], "vprold zmm0{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x76, 0x0a], "vpcmpeqd k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x76, 0xca], "vpcmpeqd k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x78, 0xca], "vcvttps2uqq zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7a, 0xca], "vcvttps2qq zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7f, 0x0a], "vmovdqa32 zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqa32 zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0x7f, 0xca], "vmovdqa32 zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xd2, 0x0a], "vpsrld zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xd2, 0x4a, 0x01], "vpsrld zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xd2, 0xca], "vpsrld zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xdb, 0x0a], "vpandd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xdb, 0xca], "vpandd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xdf, 0x0a], "vpandnd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xdf, 0xca], "vpandnd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xe2, 0x0a], "vpsrad zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xe2, 0x4a, 0x01], "vpsrad zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xe2, 0xca], "vpsrad zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xeb, 0x0a], "vpord zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xeb, 0xca], "vpord zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xef, 0x0a], "vpxord zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xef, 0xca], "vpxord zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xf2, 0x0a], "vpslld zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xf2, 0x4a, 0x01], "vpslld zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xf2, 0xca], "vpslld zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xfa, 0x0a], "vpsubd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xfa, 0xca], "vpsubd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xfe, 0x0a], "vpaddd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x4d, 0xfe, 0xca], "vpaddd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x5b, 0x0a], "vcvtps2dq zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x5b, 0xca], "vcvtps2dq zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x62, 0x0a], "vpunpckldq zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x62, 0x4a, 0x01], "vpunpckldq zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x66, 0x0a], "vpcmpgtd k1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x66, 0x4a, 0x01], "vpcmpgtd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x6a, 0x0a], "vpunpckhdq zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x6b, 0x0a], "vpackssdw zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x6b, 0x4a, 0x01], "vpackssdw zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x70, 0x0a, 0xcc], "vpshufd zmm1, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x72, 0x0a, 0xcc], "vprold zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x76, 0x0a], "vpcmpeqd k1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x76, 0x4a, 0x01], "vpcmpeqd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x78, 0x0a], "vcvttps2uqq zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x79, 0x0a], "vcvtps2uqq zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x79, 0xca], "vcvtps2uqq zmm1{ru-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x7a, 0x0a], "vcvttps2qq zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x7b, 0x0a], "vcvtps2qq zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0x7b, 0xca], "vcvtps2qq zmm1{ru-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xdb, 0x0a], "vpandd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xdb, 0x4a, 0x01], "vpandd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xdf, 0x0a], "vpandnd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xdf, 0x4a, 0x01], "vpandnd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xeb, 0x0a], "vpord zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xeb, 0x4a, 0x01], "vpord zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xef, 0x0a], "vpxord zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xef, 0x4a, 0x01], "vpxord zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xfa, 0x0a], "vpsubd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xfa, 0x4a, 0x01], "vpsubd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xfe, 0x0a], "vpaddd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x58, 0xfe, 0x4a, 0x01], "vpaddd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x62, 0x0a], "vpunpckldq zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x66, 0x0a], "vpcmpgtd k1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x6b, 0x0a], "vpackssdw zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x76, 0x0a], "vpcmpeqd k1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{ru-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{ru-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xdb, 0x0a], "vpandd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xdf, 0x0a], "vpandnd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xeb, 0x0a], "vpord zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xef, 0x0a], "vpxord zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xfa, 0x0a], "vpsubd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xfe, 0x0a], "vpaddd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x5d, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x78, 0x5b, 0xca], "vcvtps2dq zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x78, 0x78, 0xca], "vcvttps2uqq zmm1{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x78, 0x79, 0xca], "vcvtps2uqq zmm1{rz-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x78, 0x7a, 0xca], "vcvttps2qq zmm1{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x78, 0x7b, 0xca], "vcvtps2qq zmm1{rz-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x7d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x7d, 0x78, 0xca], "vcvttps2uqq zmm1{k5}{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x7d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{rz-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x7d, 0x7a, 0xca], "vcvttps2qq zmm1{k5}{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x7d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{rz-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x5b, 0xca], "vcvtps2dq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x62, 0x0a], "vpunpckldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x62, 0xca], "vpunpckldq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6a, 0xca], "vpunpckhdq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6b, 0x0a], "vpackssdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6b, 0xca], "vpackssdw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6f, 0x0a], "vmovdqa32 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqa32 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x6f, 0xca], "vmovdqa32 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x70, 0xca, 0xcc], "vpshufd xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x72, 0xca, 0xcc], "vprold xmm0{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x78, 0xca], "vcvttps2uqq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x79, 0xca], "vcvtps2uqq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7a, 0xca], "vcvttps2qq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7b, 0xca], "vcvtps2qq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0x7f, 0xca], "vmovdqa32 xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xd2, 0x0a], "vpsrld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xd2, 0x4a, 0x01], "vpsrld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xd2, 0xca], "vpsrld xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xdb, 0x0a], "vpandd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xdb, 0xca], "vpandd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xdf, 0x0a], "vpandnd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xdf, 0xca], "vpandnd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xe2, 0x0a], "vpsrad xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xe2, 0x4a, 0x01], "vpsrad xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xe2, 0xca], "vpsrad xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xeb, 0x0a], "vpord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xeb, 0xca], "vpord xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xef, 0x0a], "vpxord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xef, 0xca], "vpxord xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xf2, 0x0a], "vpslld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xf2, 0x4a, 0x01], "vpslld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xf2, 0xca], "vpslld xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xfa, 0x0a], "vpsubd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xfa, 0xca], "vpsubd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xfe, 0x0a], "vpaddd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0x8d, 0xfe, 0xca], "vpaddd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x62, 0x0a], "vpunpckldq xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x6b, 0x0a], "vpackssdw xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{rn-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{rn-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xdb, 0x0a], "vpandd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xdf, 0x0a], "vpandnd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xeb, 0x0a], "vpord xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xef, 0x0a], "vpxord xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xfa, 0x0a], "vpsubd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xfe, 0x0a], "vpaddd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0x9d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x5b, 0xca], "vcvtps2dq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x62, 0x0a], "vpunpckldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x62, 0xca], "vpunpckldq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6a, 0xca], "vpunpckhdq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6b, 0x0a], "vpackssdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6b, 0xca], "vpackssdw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6f, 0x0a], "vmovdqa32 ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6f, 0x4a, 0x01], "vmovdqa32 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x6f, 0xca], "vmovdqa32 ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x70, 0xca, 0xcc], "vpshufd ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x72, 0xca, 0xcc], "vprold ymm0{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x78, 0xca], "vcvttps2uqq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x79, 0xca], "vcvtps2uqq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7a, 0xca], "vcvttps2qq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7b, 0xca], "vcvtps2qq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0x7f, 0xca], "vmovdqa32 ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xd2, 0x0a], "vpsrld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xd2, 0x4a, 0x01], "vpsrld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xd2, 0xca], "vpsrld ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xdb, 0x0a], "vpandd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xdb, 0xca], "vpandd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xdf, 0x0a], "vpandnd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xdf, 0xca], "vpandnd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xe2, 0x0a], "vpsrad ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xe2, 0x4a, 0x01], "vpsrad ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xe2, 0xca], "vpsrad ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xeb, 0x0a], "vpord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xeb, 0xca], "vpord ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xef, 0x0a], "vpxord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xef, 0xca], "vpxord ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xf2, 0x0a], "vpslld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xf2, 0x4a, 0x01], "vpslld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xf2, 0xca], "vpslld ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xfa, 0x0a], "vpsubd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xfa, 0xca], "vpsubd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xfe, 0x0a], "vpaddd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xad, 0xfe, 0xca], "vpaddd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x62, 0x0a], "vpunpckldq ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x6b, 0x0a], "vpackssdw ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{rd-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{rd-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xdb, 0x0a], "vpandd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xdf, 0x0a], "vpandnd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xeb, 0x0a], "vpord ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xef, 0x0a], "vpxord ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xfa, 0x0a], "vpsubd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xfe, 0x0a], "vpaddd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xbd, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x62, 0x0a], "vpunpckldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x62, 0xca], "vpunpckldq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6a, 0xca], "vpunpckhdq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6b, 0x0a], "vpackssdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6b, 0xca], "vpackssdw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6f, 0x0a], "vmovdqa32 zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqa32 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x6f, 0xca], "vmovdqa32 zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x70, 0xca, 0xcc], "vpshufd zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x72, 0xca, 0xcc], "vprold zmm0{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x78, 0xca], "vcvttps2uqq zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7a, 0xca], "vcvttps2qq zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0x7f, 0xca], "vmovdqa32 zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xd2, 0x0a], "vpsrld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xd2, 0x4a, 0x01], "vpsrld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xd2, 0xca], "vpsrld zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xdb, 0x0a], "vpandd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xdb, 0xca], "vpandd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xdf, 0x0a], "vpandnd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xdf, 0xca], "vpandnd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xe2, 0x0a], "vpsrad zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xe2, 0x4a, 0x01], "vpsrad zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xe2, 0xca], "vpsrad zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xeb, 0x0a], "vpord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xeb, 0xca], "vpord zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xef, 0x0a], "vpxord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xef, 0xca], "vpxord zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xf2, 0x0a], "vpslld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xf2, 0x4a, 0x01], "vpslld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xf2, 0xca], "vpslld zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xfa, 0x0a], "vpsubd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xfa, 0xca], "vpsubd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xfe, 0x0a], "vpaddd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7d, 0xcd, 0xfe, 0xca], "vpaddd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x62, 0x0a], "vpunpckldq zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x6b, 0x0a], "vpackssdw zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{ru-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{ru-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xdb, 0x0a], "vpandd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xdf, 0x0a], "vpandnd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xeb, 0x0a], "vpord zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xef, 0x0a], "vpxord zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xfa, 0x0a], "vpsubd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xfe, 0x0a], "vpaddd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xdd, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7d, 0xfd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xfd, 0x78, 0xca], "vcvttps2uqq zmm1{k5}{z}{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xfd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{rz-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xfd, 0x7a, 0xca], "vcvttps2qq zmm1{k5}{z}{sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7d, 0xfd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{rz-sae}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x12, 0x0a], "vmovsldup xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x12, 0x4a, 0x01], "vmovsldup xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x12, 0xca], "vmovsldup xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x16, 0x0a], "vmovshdup xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x16, 0x4a, 0x01], "vmovshdup xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x16, 0xca], "vmovshdup xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x5b, 0x0a], "vcvttps2dq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x5b, 0xca], "vcvttps2dq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x6f, 0x0a], "vmovdqu32 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu32 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x6f, 0xca], "vmovdqu32 xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x7a, 0x0a], "vcvtudq2pd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x7a, 0xca], "vcvtudq2pd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x7f, 0x0a], "vmovdqu32 xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu32 xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0x7f, 0xca], "vmovdqu32 xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0xe6, 0x0a], "vcvtdq2pd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x08, 0xe6, 0xca], "vcvtdq2pd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x12, 0x0a], "vmovsldup xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x12, 0x4a, 0x01], "vmovsldup xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x12, 0xca], "vmovsldup xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x16, 0x0a], "vmovshdup xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x16, 0x4a, 0x01], "vmovshdup xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x16, 0xca], "vmovshdup xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x5b, 0xca], "vcvttps2dq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x6f, 0x0a], "vmovdqu32 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu32 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x6f, 0xca], "vmovdqu32 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x7a, 0xca], "vcvtudq2pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x7f, 0x0a], "vmovdqu32 xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu32 xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0x7f, 0xca], "vmovdqu32 xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x0d, 0xe6, 0xca], "vcvtdq2pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x51, 0xca], "vsqrtss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x58, 0xca], "vaddss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x59, 0xca], "vmulss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x5b, 0x0a], "vcvttps2dq xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x5c, 0xca], "vsubss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x5e, 0xca], "vdivss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x7a, 0x0a], "vcvtudq2pd xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0xe6, 0x0a], "vcvtdq2pd xmm1, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x18, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x51, 0xca], "vsqrtss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x58, 0xca], "vaddss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x59, 0xca], "vmulss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x5c, 0xca], "vsubss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x5e, 0xca], "vdivss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x1d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x10, 0x0a], "vmovss xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x10, 0x4a, 0x01], "vmovss xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x10, 0xca], "vmovss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x11, 0x0a], "vmovss dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x11, 0x4a, 0x01], "vmovss dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x11, 0xca], "vmovss xmm2, xmm0, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x12, 0x0a], "vmovsldup ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x12, 0x4a, 0x01], "vmovsldup ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x12, 0xca], "vmovsldup ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x16, 0x0a], "vmovshdup ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x16, 0x4a, 0x01], "vmovshdup ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x16, 0xca], "vmovshdup ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x51, 0x0a], "vsqrtss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x51, 0x4a, 0x01], "vsqrtss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x51, 0xca], "vsqrtss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x58, 0x0a], "vaddss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x58, 0x4a, 0x01], "vaddss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x58, 0xca], "vaddss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x59, 0x0a], "vmulss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x59, 0x4a, 0x01], "vmulss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x59, 0xca], "vmulss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5a, 0x0a], "vcvtss2sd xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5a, 0x4a, 0x01], "vcvtss2sd xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5a, 0xca], "vcvtss2sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5b, 0x0a], "vcvttps2dq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5b, 0xca], "vcvttps2dq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5c, 0x0a], "vsubss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5c, 0x4a, 0x01], "vsubss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5c, 0xca], "vsubss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5d, 0x0a], "vminss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5d, 0x4a, 0x01], "vminss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5d, 0xca], "vminss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5e, 0x0a], "vdivss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5e, 0x4a, 0x01], "vdivss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5e, 0xca], "vdivss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5f, 0x0a], "vmaxss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5f, 0x4a, 0x01], "vmaxss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x5f, 0xca], "vmaxss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x6f, 0x0a], "vmovdqu32 ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu32 ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x6f, 0xca], "vmovdqu32 ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x7a, 0x0a], "vcvtudq2pd ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x7a, 0xca], "vcvtudq2pd ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x7f, 0x0a], "vmovdqu32 ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu32 ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0x7f, 0xca], "vmovdqu32 ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0xc2, 0x0a, 0xcc], "vcmpss k1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmpss k1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0xc2, 0xca, 0xcc], "vcmpss k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0xe6, 0x0a], "vcvtdq2pd ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x28, 0xe6, 0xca], "vcvtdq2pd ymm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x10, 0x0a], "vmovss xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x10, 0x4a, 0x01], "vmovss xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x10, 0xca], "vmovss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x11, 0x0a], "vmovss dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x11, 0x4a, 0x01], "vmovss dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x11, 0xca], "vmovss xmm2{k5}, xmm0, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x12, 0x0a], "vmovsldup ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x12, 0x4a, 0x01], "vmovsldup ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x12, 0xca], "vmovsldup ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x16, 0x0a], "vmovshdup ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x16, 0x4a, 0x01], "vmovshdup ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x16, 0xca], "vmovshdup ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x51, 0x0a], "vsqrtss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x51, 0x4a, 0x01], "vsqrtss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x51, 0xca], "vsqrtss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x58, 0x0a], "vaddss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x58, 0x4a, 0x01], "vaddss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x58, 0xca], "vaddss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x59, 0x0a], "vmulss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x59, 0x4a, 0x01], "vmulss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x59, 0xca], "vmulss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5a, 0x0a], "vcvtss2sd xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5a, 0x4a, 0x01], "vcvtss2sd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5a, 0xca], "vcvtss2sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5b, 0xca], "vcvttps2dq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5c, 0x0a], "vsubss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5c, 0x4a, 0x01], "vsubss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5c, 0xca], "vsubss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5d, 0x0a], "vminss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5d, 0x4a, 0x01], "vminss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5d, 0xca], "vminss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5e, 0x0a], "vdivss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5e, 0x4a, 0x01], "vdivss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5e, 0xca], "vdivss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5f, 0x0a], "vmaxss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5f, 0x4a, 0x01], "vmaxss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x5f, 0xca], "vmaxss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x6f, 0x0a], "vmovdqu32 ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu32 ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x6f, 0xca], "vmovdqu32 ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x7a, 0xca], "vcvtudq2pd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x7f, 0x0a], "vmovdqu32 ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu32 ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0x7f, 0xca], "vmovdqu32 ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0xc2, 0x0a, 0xcc], "vcmpss k1{k5}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpss k1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0xc2, 0xca, 0xcc], "vcmpss k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x2d, 0xe6, 0xca], "vcvtdq2pd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x51, 0xca], "vsqrtss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x58, 0xca], "vaddss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x59, 0xca], "vmulss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x5b, 0x0a], "vcvttps2dq ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x5c, 0xca], "vsubss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x5e, 0xca], "vdivss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x7a, 0x0a], "vcvtudq2pd ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0xe6, 0x0a], "vcvtdq2pd ymm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x38, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x51, 0xca], "vsqrtss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x58, 0xca], "vaddss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x59, 0xca], "vmulss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x5c, 0xca], "vsubss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x5e, 0xca], "vdivss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x3d, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x12, 0x0a], "vmovsldup zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x12, 0x4a, 0x01], "vmovsldup zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x12, 0xca], "vmovsldup zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x16, 0x0a], "vmovshdup zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x16, 0x4a, 0x01], "vmovshdup zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x16, 0xca], "vmovshdup zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x5b, 0x0a], "vcvttps2dq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x5b, 0xca], "vcvttps2dq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x6f, 0x0a], "vmovdqu32 zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu32 zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x6f, 0xca], "vmovdqu32 zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x7a, 0x0a], "vcvtudq2pd zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x7a, 0xca], "vcvtudq2pd zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x7f, 0x0a], "vmovdqu32 zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu32 zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0x7f, 0xca], "vmovdqu32 zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0xe6, 0x0a], "vcvtdq2pd zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x48, 0xe6, 0xca], "vcvtdq2pd zmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x12, 0x0a], "vmovsldup zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x12, 0x4a, 0x01], "vmovsldup zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x12, 0xca], "vmovsldup zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x16, 0x0a], "vmovshdup zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x16, 0x4a, 0x01], "vmovshdup zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x16, 0xca], "vmovshdup zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x5b, 0xca], "vcvttps2dq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x6f, 0x0a], "vmovdqu32 zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu32 zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x6f, 0xca], "vmovdqu32 zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x7a, 0xca], "vcvtudq2pd zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x7f, 0x0a], "vmovdqu32 zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu32 zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0x7f, 0xca], "vmovdqu32 zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x4d, 0xe6, 0xca], "vcvtdq2pd zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x51, 0xca], "vsqrtss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x58, 0xca], "vaddss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x59, 0xca], "vmulss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x5b, 0x0a], "vcvttps2dq zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x5c, 0xca], "vsubss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x5e, 0xca], "vdivss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x7a, 0x0a], "vcvtudq2pd zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0xe6, 0x0a], "vcvtdq2pd zmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x58, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x51, 0xca], "vsqrtss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x58, 0xca], "vaddss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x59, 0xca], "vmulss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x5c, 0xca], "vsubss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x5e, 0xca], "vdivss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x5d, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x51, 0xca], "vsqrtss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x58, 0xca], "vaddss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x59, 0xca], "vmulss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x5a, 0xca], "vcvtss2sd xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x5b, 0xca], "vcvttps2dq zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x5c, 0xca], "vsubss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x5d, 0xca], "vminss xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x5e, 0xca], "vdivss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0x5f, 0xca], "vmaxss xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x78, 0xc2, 0xca, 0xcc], "vcmpss k1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x51, 0xca], "vsqrtss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x58, 0xca], "vaddss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x59, 0xca], "vmulss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x5a, 0xca], "vcvtss2sd xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x5b, 0xca], "vcvttps2dq zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x5c, 0xca], "vsubss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x5d, 0xca], "vminss xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x5e, 0xca], "vdivss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0x5f, 0xca], "vmaxss xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x7d, 0xc2, 0xca, 0xcc], "vcmpss k1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x12, 0x0a], "vmovsldup xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x12, 0x4a, 0x01], "vmovsldup xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x12, 0xca], "vmovsldup xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x16, 0x0a], "vmovshdup xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x16, 0x4a, 0x01], "vmovshdup xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x16, 0xca], "vmovshdup xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x5b, 0xca], "vcvttps2dq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x6f, 0x0a], "vmovdqu32 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu32 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x6f, 0xca], "vmovdqu32 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x7a, 0xca], "vcvtudq2pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0x7f, 0xca], "vmovdqu32 xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0x7e, 0x8d, 0xe6, 0xca], "vcvtdq2pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x58, 0xca], "vaddss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x59, 0xca], "vmulss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x5c, 0xca], "vsubss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x5e, 0xca], "vdivss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}{z}, dword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0x9d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x10, 0x0a], "vmovss xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x10, 0x4a, 0x01], "vmovss xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x10, 0xca], "vmovss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x11, 0xca], "vmovss xmm2{k5}{z}, xmm0, xmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x12, 0x0a], "vmovsldup ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x12, 0x4a, 0x01], "vmovsldup ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x12, 0xca], "vmovsldup ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x16, 0x0a], "vmovshdup ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x16, 0x4a, 0x01], "vmovshdup ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x16, 0xca], "vmovshdup ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x51, 0x0a], "vsqrtss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x51, 0x4a, 0x01], "vsqrtss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x51, 0xca], "vsqrtss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x58, 0x0a], "vaddss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x58, 0x4a, 0x01], "vaddss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x58, 0xca], "vaddss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x59, 0x0a], "vmulss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x59, 0x4a, 0x01], "vmulss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x59, 0xca], "vmulss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5a, 0x0a], "vcvtss2sd xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5a, 0x4a, 0x01], "vcvtss2sd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5a, 0xca], "vcvtss2sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5b, 0xca], "vcvttps2dq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5c, 0x0a], "vsubss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5c, 0x4a, 0x01], "vsubss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5c, 0xca], "vsubss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5d, 0x0a], "vminss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5d, 0x4a, 0x01], "vminss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5d, 0xca], "vminss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5e, 0x0a], "vdivss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5e, 0x4a, 0x01], "vdivss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5e, 0xca], "vdivss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5f, 0x0a], "vmaxss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5f, 0x4a, 0x01], "vmaxss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x5f, 0xca], "vmaxss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x6f, 0x0a], "vmovdqu32 ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu32 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x6f, 0xca], "vmovdqu32 ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x7a, 0xca], "vcvtudq2pd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0x7f, 0xca], "vmovdqu32 ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xad, 0xe6, 0xca], "vcvtdq2pd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x58, 0xca], "vaddss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x59, 0xca], "vmulss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x5c, 0xca], "vsubss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x5e, 0xca], "vdivss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xbd, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x12, 0x0a], "vmovsldup zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x12, 0x4a, 0x01], "vmovsldup zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x12, 0xca], "vmovsldup zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x16, 0x0a], "vmovshdup zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x16, 0x4a, 0x01], "vmovshdup zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x16, 0xca], "vmovshdup zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x5b, 0xca], "vcvttps2dq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x6f, 0x0a], "vmovdqu32 zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu32 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x6f, 0xca], "vmovdqu32 zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x7a, 0xca], "vcvtudq2pd zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0x7f, 0xca], "vmovdqu32 zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7e, 0xcd, 0xe6, 0xca], "vcvtdq2pd zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x58, 0xca], "vaddss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x59, 0xca], "vmulss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x5c, 0xca], "vsubss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x5e, 0xca], "vdivss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xdd, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x58, 0xca], "vaddss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x59, 0xca], "vmulss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x5a, 0xca], "vcvtss2sd xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x5b, 0xca], "vcvttps2dq zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x5c, 0xca], "vsubss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x5d, 0xca], "vminss xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x5e, 0xca], "vdivss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7e, 0xfd, 0x5f, 0xca], "vmaxss xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x6f, 0x0a], "vmovdqu8 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu8 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x6f, 0xca], "vmovdqu8 xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x7a, 0x0a], "vcvtudq2ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x7a, 0xca], "vcvtudq2ps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x7f, 0x0a], "vmovdqu8 xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu8 xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x08, 0x7f, 0xca], "vmovdqu8 xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x6f, 0x0a], "vmovdqu8 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu8 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x6f, 0xca], "vmovdqu8 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x7a, 0xca], "vcvtudq2ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x7f, 0x0a], "vmovdqu8 xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu8 xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x0d, 0x7f, 0xca], "vmovdqu8 xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x18, 0x7a, 0x0a], "vcvtudq2ps xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x18, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x18, 0x7a, 0xca], "vcvtudq2ps zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x1d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x1d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x1d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x6f, 0x0a], "vmovdqu8 ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu8 ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x6f, 0xca], "vmovdqu8 ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x7a, 0x0a], "vcvtudq2ps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x7a, 0xca], "vcvtudq2ps ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x7f, 0x0a], "vmovdqu8 ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu8 ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x28, 0x7f, 0xca], "vmovdqu8 ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x6f, 0x0a], "vmovdqu8 ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu8 ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x6f, 0xca], "vmovdqu8 ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x7a, 0xca], "vcvtudq2ps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x7f, 0x0a], "vmovdqu8 ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu8 ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x2d, 0x7f, 0xca], "vmovdqu8 ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x38, 0x7a, 0x0a], "vcvtudq2ps ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x38, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x38, 0x7a, 0xca], "vcvtudq2ps zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x3d, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x3d, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x3d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x6f, 0x0a], "vmovdqu8 zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu8 zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x6f, 0xca], "vmovdqu8 zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x7a, 0x0a], "vcvtudq2ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x7a, 0xca], "vcvtudq2ps zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x7f, 0x0a], "vmovdqu8 zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu8 zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x48, 0x7f, 0xca], "vmovdqu8 zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x6f, 0x0a], "vmovdqu8 zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu8 zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x6f, 0xca], "vmovdqu8 zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x7f, 0x0a], "vmovdqu8 zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu8 zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x4d, 0x7f, 0xca], "vmovdqu8 zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x58, 0x7a, 0x0a], "vcvtudq2ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x58, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x58, 0x7a, 0xca], "vcvtudq2ps zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x5d, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x5d, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x5d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x78, 0x7a, 0xca], "vcvtudq2ps zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x7d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x6f, 0x0a], "vmovdqu8 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu8 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x6f, 0xca], "vmovdqu8 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x7a, 0xca], "vcvtudq2ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0x8d, 0x7f, 0xca], "vmovdqu8 xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0x9d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x9d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf1, 0x7f, 0x9d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x6f, 0x0a], "vmovdqu8 ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu8 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x6f, 0xca], "vmovdqu8 ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x7a, 0xca], "vcvtudq2ps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xad, 0x7f, 0xca], "vmovdqu8 ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0xbd, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7f, 0xbd, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf1, 0x7f, 0xbd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x6f, 0x0a], "vmovdqu8 zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu8 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x6f, 0xca], "vmovdqu8 zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xcd, 0x7f, 0xca], "vmovdqu8 zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0x7f, 0xdd, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7f, 0xdd, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf1, 0x7f, 0xdd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0x7f, 0xfd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x5b, 0x0a], "vcvtqq2ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x5b, 0xca], "vcvtqq2ps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x78, 0x0a], "vcvttpd2udq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x78, 0xca], "vcvttpd2udq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x79, 0x0a], "vcvtpd2udq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x08, 0x79, 0xca], "vcvtpd2udq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x78, 0xca], "vcvttpd2udq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x0d, 0x79, 0xca], "vcvtpd2udq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x5b, 0x0a], "vcvtqq2ps xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x5b, 0xca], "vcvtqq2ps ymm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x78, 0x0a], "vcvttpd2udq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x79, 0x0a], "vcvtpd2udq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x18, 0x79, 0xca], "vcvtpd2udq ymm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x1d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x5b, 0x0a], "vcvtqq2ps xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x5b, 0xca], "vcvtqq2ps xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x78, 0x0a], "vcvttpd2udq xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x78, 0xca], "vcvttpd2udq xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x79, 0x0a], "vcvtpd2udq xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x28, 0x79, 0xca], "vcvtpd2udq xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x78, 0xca], "vcvttpd2udq xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x2d, 0x79, 0xca], "vcvtpd2udq xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x5b, 0x0a], "vcvtqq2ps xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x5b, 0xca], "vcvtqq2ps ymm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x78, 0x0a], "vcvttpd2udq xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x79, 0x0a], "vcvtpd2udq xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x38, 0x79, 0xca], "vcvtpd2udq ymm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x3d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x5b, 0x0a], "vcvtqq2ps ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x5b, 0xca], "vcvtqq2ps ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x78, 0x0a], "vcvttpd2udq ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x78, 0xca], "vcvttpd2udq ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x79, 0x0a], "vcvtpd2udq ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x48, 0x79, 0xca], "vcvtpd2udq ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x78, 0xca], "vcvttpd2udq ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x4d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x5b, 0x0a], "vcvtqq2ps ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x5b, 0xca], "vcvtqq2ps ymm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x78, 0x0a], "vcvttpd2udq ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x79, 0x0a], "vcvtpd2udq ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x58, 0x79, 0xca], "vcvtpd2udq ymm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x5d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x78, 0x5b, 0xca], "vcvtqq2ps ymm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x78, 0x78, 0xca], "vcvttpd2udq ymm1{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x78, 0x79, 0xca], "vcvtpd2udq ymm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x7d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x7d, 0x78, 0xca], "vcvttpd2udq ymm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x7d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x78, 0xca], "vcvttpd2udq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfc, 0x8d, 0x79, 0xca], "vcvtpd2udq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfc, 0x9d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x78, 0xca], "vcvttpd2udq xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xad, 0x79, 0xca], "vcvtpd2udq xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xbd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x78, 0xca], "vcvttpd2udq ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfc, 0xcd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfc, 0xdd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xfd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xfd, 0x78, 0xca], "vcvttpd2udq ymm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfc, 0xfd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x10, 0x0a], "vmovupd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x10, 0x4a, 0x01], "vmovupd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x10, 0xca], "vmovupd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x11, 0x0a], "vmovupd xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x11, 0x4a, 0x01], "vmovupd xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x11, 0xca], "vmovupd xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x12, 0x0a], "vmovlpd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x12, 0x4a, 0x01], "vmovlpd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x13, 0x0a], "vmovlpd qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x13, 0x4a, 0x01], "vmovlpd qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x14, 0x0a], "vunpcklpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x14, 0x4a, 0x01], "vunpcklpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x14, 0xca], "vunpcklpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x15, 0x0a], "vunpckhpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x15, 0x4a, 0x01], "vunpckhpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x15, 0xca], "vunpckhpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x16, 0x0a], "vmovhpd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x16, 0x4a, 0x01], "vmovhpd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x17, 0x0a], "vmovhpd qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x17, 0x4a, 0x01], "vmovhpd qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x28, 0x0a], "vmovapd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x28, 0x4a, 0x01], "vmovapd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x28, 0xca], "vmovapd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x29, 0x0a], "vmovapd xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x29, 0x4a, 0x01], "vmovapd xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x29, 0xca], "vmovapd xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x2b, 0x0a], "vmovntpd xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x2b, 0x4a, 0x01], "vmovntpd xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x51, 0x0a], "vsqrtpd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x51, 0x4a, 0x01], "vsqrtpd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x51, 0xca], "vsqrtpd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x54, 0x0a], "vandpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x54, 0x4a, 0x01], "vandpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x54, 0xca], "vandpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x55, 0x0a], "vandnpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x55, 0x4a, 0x01], "vandnpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x55, 0xca], "vandnpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x56, 0x0a], "vorpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x56, 0x4a, 0x01], "vorpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x56, 0xca], "vorpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x57, 0x0a], "vxorpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x57, 0x4a, 0x01], "vxorpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x57, 0xca], "vxorpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x58, 0x0a], "vaddpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x58, 0x4a, 0x01], "vaddpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x58, 0xca], "vaddpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x59, 0x0a], "vmulpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x59, 0x4a, 0x01], "vmulpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x59, 0xca], "vmulpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5a, 0x0a], "vcvtpd2ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5a, 0xca], "vcvtpd2ps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5c, 0x0a], "vsubpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5c, 0x4a, 0x01], "vsubpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5c, 0xca], "vsubpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5d, 0x0a], "vminpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5d, 0x4a, 0x01], "vminpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5d, 0xca], "vminpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5e, 0x0a], "vdivpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5e, 0x4a, 0x01], "vdivpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5e, 0xca], "vdivpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5f, 0x0a], "vmaxpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5f, 0x4a, 0x01], "vmaxpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x5f, 0xca], "vmaxpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x60, 0x0a], "vpunpcklbw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x60, 0x4a, 0x01], "vpunpcklbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x60, 0xca], "vpunpcklbw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x61, 0x0a], "vpunpcklwd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x61, 0x4a, 0x01], "vpunpcklwd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x61, 0xca], "vpunpcklwd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x63, 0x0a], "vpacksswb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x63, 0x4a, 0x01], "vpacksswb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x63, 0xca], "vpacksswb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x64, 0x0a], "vpcmpgtb k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x64, 0x4a, 0x01], "vpcmpgtb k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x64, 0xca], "vpcmpgtb k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x65, 0x0a], "vpcmpgtw k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x65, 0x4a, 0x01], "vpcmpgtw k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x65, 0xca], "vpcmpgtw k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x67, 0x0a], "vpackuswb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x67, 0x4a, 0x01], "vpackuswb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x67, 0xca], "vpackuswb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x68, 0x0a], "vpunpckhbw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x68, 0x4a, 0x01], "vpunpckhbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x68, 0xca], "vpunpckhbw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x69, 0x0a], "vpunpckhwd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x69, 0x4a, 0x01], "vpunpckhwd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x69, 0xca], "vpunpckhwd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6c, 0x0a], "vpunpcklqdq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6c, 0xca], "vpunpcklqdq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6d, 0x0a], "vpunpckhqdq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6d, 0xca], "vpunpckhqdq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6e, 0x0a], "vmovd xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6e, 0x4a, 0x01], "vmovd xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6e, 0xca], "vmovd xmm1, edx");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6f, 0x0a], "vmovdqa64 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6f, 0x4a, 0x01], "vmovdqa64 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x6f, 0xca], "vmovdqa64 xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x72, 0x0a, 0xcc], "vprolq xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x72, 0xca, 0xcc], "vprolq xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x74, 0x0a], "vpcmpeqb k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x74, 0x4a, 0x01], "vpcmpeqb k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x74, 0xca], "vpcmpeqb k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x75, 0x0a], "vpcmpeqw k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x75, 0x4a, 0x01], "vpcmpeqw k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x75, 0xca], "vpcmpeqw k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x78, 0x0a], "vcvttpd2uqq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x78, 0xca], "vcvttpd2uqq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x79, 0x0a], "vcvtpd2uqq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x79, 0xca], "vcvtpd2uqq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7a, 0x0a], "vcvttpd2qq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7a, 0xca], "vcvttpd2qq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7b, 0x0a], "vcvtpd2qq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7b, 0xca], "vcvtpd2qq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7e, 0x0a], "vmovd dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7e, 0x4a, 0x01], "vmovd dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7e, 0xca], "vmovd edx, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7f, 0x0a], "vmovdqa64 xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7f, 0x4a, 0x01], "vmovdqa64 xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0x7f, 0xca], "vmovdqa64 xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc2, 0x0a, 0xcc], "vcmppd k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc2, 0xca, 0xcc], "vcmppd k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc4, 0x0a, 0xcc], "vpinsrw xmm1, xmm0, word [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc4, 0x4a, 0x01, 0xcc], "vpinsrw xmm1, xmm0, word [bp + si * 1 + 0x2], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc4, 0xca, 0xcc], "vpinsrw xmm1, xmm0, edx, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc5, 0xca, 0xcc], "vpextrw ecx, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc6, 0x0a, 0xcc], "vshufpd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xc6, 0xca, 0xcc], "vshufpd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd1, 0x0a], "vpsrlw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd1, 0x4a, 0x01], "vpsrlw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd1, 0xca], "vpsrlw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd3, 0x0a], "vpsrlq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd3, 0x4a, 0x01], "vpsrlq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd3, 0xca], "vpsrlq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd4, 0x0a], "vpaddq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd4, 0x4a, 0x01], "vpaddq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd4, 0xca], "vpaddq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd5, 0x0a], "vpmullw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd5, 0x4a, 0x01], "vpmullw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd5, 0xca], "vpmullw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd6, 0x0a], "vmovq qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd6, 0x4a, 0x01], "vmovq qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd6, 0xca], "vmovq xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd8, 0x0a], "vpsubusb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd8, 0x4a, 0x01], "vpsubusb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd8, 0xca], "vpsubusb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd9, 0x0a], "vpsubusw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd9, 0x4a, 0x01], "vpsubusw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xd9, 0xca], "vpsubusw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xda, 0x0a], "vpminub xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xda, 0x4a, 0x01], "vpminub xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xda, 0xca], "vpminub xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdb, 0x0a], "vpandq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdb, 0x4a, 0x01], "vpandq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdb, 0xca], "vpandq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdc, 0x0a], "vpaddusb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdc, 0x4a, 0x01], "vpaddusb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdc, 0xca], "vpaddusb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdd, 0x0a], "vpaddusw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdd, 0x4a, 0x01], "vpaddusw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdd, 0xca], "vpaddusw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xde, 0x0a], "vpmaxub xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xde, 0x4a, 0x01], "vpmaxub xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xde, 0xca], "vpmaxub xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdf, 0x0a], "vpandnq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdf, 0x4a, 0x01], "vpandnq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xdf, 0xca], "vpandnq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe0, 0x0a], "vpavgb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe0, 0x4a, 0x01], "vpavgb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe0, 0xca], "vpavgb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe1, 0x0a], "vpsraw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe1, 0x4a, 0x01], "vpsraw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe1, 0xca], "vpsraw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe2, 0x0a], "vpsraq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe2, 0x4a, 0x01], "vpsraq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe2, 0xca], "vpsraq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe3, 0x0a], "vpavgw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe3, 0x4a, 0x01], "vpavgw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe3, 0xca], "vpavgw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe4, 0x0a], "vpmulhuw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe4, 0x4a, 0x01], "vpmulhuw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe4, 0xca], "vpmulhuw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe5, 0x0a], "vpmulhw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe5, 0x4a, 0x01], "vpmulhw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe5, 0xca], "vpmulhw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe6, 0x0a], "vcvttpd2dq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe6, 0xca], "vcvttpd2dq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe8, 0x0a], "vpsubsb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe8, 0x4a, 0x01], "vpsubsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe8, 0xca], "vpsubsb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe9, 0x0a], "vpsubsw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe9, 0x4a, 0x01], "vpsubsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xe9, 0xca], "vpsubsw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xea, 0x0a], "vpminsw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xea, 0x4a, 0x01], "vpminsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xea, 0xca], "vpminsw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xeb, 0x0a], "vporq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xeb, 0x4a, 0x01], "vporq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xeb, 0xca], "vporq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xec, 0x0a], "vpaddsb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xec, 0x4a, 0x01], "vpaddsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xec, 0xca], "vpaddsb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xed, 0x0a], "vpaddsw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xed, 0x4a, 0x01], "vpaddsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xed, 0xca], "vpaddsw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xee, 0x0a], "vpmaxsw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xee, 0x4a, 0x01], "vpmaxsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xee, 0xca], "vpmaxsw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xef, 0x0a], "vpxorq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xef, 0x4a, 0x01], "vpxorq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xef, 0xca], "vpxorq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf1, 0x0a], "vpsllw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf1, 0x4a, 0x01], "vpsllw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf1, 0xca], "vpsllw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf3, 0x0a], "vpsllq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf3, 0x4a, 0x01], "vpsllq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf3, 0xca], "vpsllq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf4, 0x0a], "vpmuludq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf4, 0x4a, 0x01], "vpmuludq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf4, 0xca], "vpmuludq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf5, 0x0a], "vpmaddwd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf5, 0x4a, 0x01], "vpmaddwd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf5, 0xca], "vpmaddwd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf6, 0x0a], "vpsadbw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf6, 0x4a, 0x01], "vpsadbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf6, 0xca], "vpsadbw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf8, 0x0a], "vpsubb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf8, 0x4a, 0x01], "vpsubb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf8, 0xca], "vpsubb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf9, 0x0a], "vpsubw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf9, 0x4a, 0x01], "vpsubw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xf9, 0xca], "vpsubw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfb, 0x0a], "vpsubq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfb, 0x4a, 0x01], "vpsubq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfb, 0xca], "vpsubq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfc, 0x0a], "vpaddb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfc, 0x4a, 0x01], "vpaddb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfc, 0xca], "vpaddb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfd, 0x0a], "vpaddw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfd, 0x4a, 0x01], "vpaddw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x08, 0xfd, 0xca], "vpaddw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x10, 0x0a], "vmovupd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x10, 0x4a, 0x01], "vmovupd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x10, 0xca], "vmovupd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x11, 0x0a], "vmovupd xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x11, 0x4a, 0x01], "vmovupd xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x11, 0xca], "vmovupd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x14, 0x0a], "vunpcklpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x14, 0xca], "vunpcklpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x15, 0x0a], "vunpckhpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x15, 0xca], "vunpckhpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x28, 0x0a], "vmovapd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x28, 0x4a, 0x01], "vmovapd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x28, 0xca], "vmovapd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x29, 0x0a], "vmovapd xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x29, 0x4a, 0x01], "vmovapd xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x29, 0xca], "vmovapd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x51, 0x0a], "vsqrtpd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x51, 0xca], "vsqrtpd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x54, 0x0a], "vandpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x54, 0xca], "vandpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x55, 0x0a], "vandnpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x55, 0xca], "vandnpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x56, 0x0a], "vorpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x56, 0xca], "vorpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x57, 0x0a], "vxorpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x57, 0xca], "vxorpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x58, 0x0a], "vaddpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x58, 0xca], "vaddpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x59, 0x0a], "vmulpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x59, 0xca], "vmulpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5c, 0x0a], "vsubpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5c, 0xca], "vsubpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5d, 0x0a], "vminpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5d, 0xca], "vminpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5e, 0x0a], "vdivpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5e, 0xca], "vdivpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5f, 0x0a], "vmaxpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x5f, 0xca], "vmaxpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x60, 0x0a], "vpunpcklbw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x60, 0x4a, 0x01], "vpunpcklbw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x60, 0xca], "vpunpcklbw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x61, 0x0a], "vpunpcklwd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x61, 0x4a, 0x01], "vpunpcklwd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x61, 0xca], "vpunpcklwd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x63, 0x0a], "vpacksswb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x63, 0x4a, 0x01], "vpacksswb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x63, 0xca], "vpacksswb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x64, 0x0a], "vpcmpgtb k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x64, 0x4a, 0x01], "vpcmpgtb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x64, 0xca], "vpcmpgtb k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x65, 0x0a], "vpcmpgtw k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x65, 0x4a, 0x01], "vpcmpgtw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x65, 0xca], "vpcmpgtw k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x67, 0x0a], "vpackuswb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x67, 0x4a, 0x01], "vpackuswb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x67, 0xca], "vpackuswb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x68, 0x0a], "vpunpckhbw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x68, 0x4a, 0x01], "vpunpckhbw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x68, 0xca], "vpunpckhbw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x69, 0x0a], "vpunpckhwd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x69, 0x4a, 0x01], "vpunpckhwd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x69, 0xca], "vpunpckhwd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6c, 0xca], "vpunpcklqdq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6d, 0xca], "vpunpckhqdq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6f, 0x0a], "vmovdqa64 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqa64 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x6f, 0xca], "vmovdqa64 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x72, 0xca, 0xcc], "vprolq xmm0{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x74, 0x0a], "vpcmpeqb k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x74, 0x4a, 0x01], "vpcmpeqb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x74, 0xca], "vpcmpeqb k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x75, 0x0a], "vpcmpeqw k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x75, 0x4a, 0x01], "vpcmpeqw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x75, 0xca], "vpcmpeqw k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x78, 0xca], "vcvttpd2uqq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x79, 0xca], "vcvtpd2uqq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7a, 0xca], "vcvttpd2qq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7b, 0xca], "vcvtpd2qq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7f, 0x0a], "vmovdqa64 xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqa64 xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0x7f, 0xca], "vmovdqa64 xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xc6, 0xca, 0xcc], "vshufpd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd1, 0x0a], "vpsrlw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd1, 0x4a, 0x01], "vpsrlw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd1, 0xca], "vpsrlw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd3, 0x0a], "vpsrlq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd3, 0x4a, 0x01], "vpsrlq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd3, 0xca], "vpsrlq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd4, 0x0a], "vpaddq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd4, 0xca], "vpaddq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd5, 0x0a], "vpmullw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd5, 0x4a, 0x01], "vpmullw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd5, 0xca], "vpmullw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd8, 0x0a], "vpsubusb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd8, 0x4a, 0x01], "vpsubusb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd8, 0xca], "vpsubusb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd9, 0x0a], "vpsubusw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd9, 0x4a, 0x01], "vpsubusw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xd9, 0xca], "vpsubusw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xda, 0x0a], "vpminub xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xda, 0x4a, 0x01], "vpminub xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xda, 0xca], "vpminub xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdb, 0x0a], "vpandq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdb, 0xca], "vpandq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdc, 0x0a], "vpaddusb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdc, 0x4a, 0x01], "vpaddusb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdc, 0xca], "vpaddusb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdd, 0x0a], "vpaddusw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdd, 0x4a, 0x01], "vpaddusw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdd, 0xca], "vpaddusw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xde, 0x0a], "vpmaxub xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xde, 0x4a, 0x01], "vpmaxub xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xde, 0xca], "vpmaxub xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdf, 0x0a], "vpandnq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xdf, 0xca], "vpandnq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe0, 0x0a], "vpavgb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe0, 0x4a, 0x01], "vpavgb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe0, 0xca], "vpavgb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe1, 0x0a], "vpsraw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe1, 0x4a, 0x01], "vpsraw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe1, 0xca], "vpsraw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe2, 0x0a], "vpsraq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe2, 0x4a, 0x01], "vpsraq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe2, 0xca], "vpsraq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe3, 0x0a], "vpavgw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe3, 0x4a, 0x01], "vpavgw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe3, 0xca], "vpavgw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe4, 0x0a], "vpmulhuw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe4, 0x4a, 0x01], "vpmulhuw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe4, 0xca], "vpmulhuw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe5, 0x0a], "vpmulhw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe5, 0x4a, 0x01], "vpmulhw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe5, 0xca], "vpmulhw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe8, 0x0a], "vpsubsb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe8, 0x4a, 0x01], "vpsubsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe8, 0xca], "vpsubsb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe9, 0x0a], "vpsubsw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe9, 0x4a, 0x01], "vpsubsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xe9, 0xca], "vpsubsw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xea, 0x0a], "vpminsw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xea, 0x4a, 0x01], "vpminsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xea, 0xca], "vpminsw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xeb, 0x0a], "vporq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xeb, 0xca], "vporq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xec, 0x0a], "vpaddsb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xec, 0x4a, 0x01], "vpaddsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xec, 0xca], "vpaddsb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xed, 0x0a], "vpaddsw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xed, 0x4a, 0x01], "vpaddsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xed, 0xca], "vpaddsw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xee, 0x0a], "vpmaxsw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xee, 0x4a, 0x01], "vpmaxsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xee, 0xca], "vpmaxsw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xef, 0x0a], "vpxorq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xef, 0xca], "vpxorq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf1, 0x0a], "vpsllw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf1, 0x4a, 0x01], "vpsllw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf1, 0xca], "vpsllw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf3, 0x0a], "vpsllq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf3, 0x4a, 0x01], "vpsllq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf3, 0xca], "vpsllq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf4, 0x0a], "vpmuludq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf4, 0xca], "vpmuludq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf5, 0x0a], "vpmaddwd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf5, 0x4a, 0x01], "vpmaddwd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf5, 0xca], "vpmaddwd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf8, 0x0a], "vpsubb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf8, 0x4a, 0x01], "vpsubb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf8, 0xca], "vpsubb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf9, 0x0a], "vpsubw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf9, 0x4a, 0x01], "vpsubw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xf9, 0xca], "vpsubw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfb, 0x0a], "vpsubq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfb, 0xca], "vpsubq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfc, 0x0a], "vpaddb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfc, 0x4a, 0x01], "vpaddb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfc, 0xca], "vpaddb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfd, 0x0a], "vpaddw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfd, 0x4a, 0x01], "vpaddw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x0d, 0xfd, 0xca], "vpaddw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x14, 0x0a], "vunpcklpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x14, 0x4a, 0x01], "vunpcklpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x15, 0x0a], "vunpckhpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x15, 0x4a, 0x01], "vunpckhpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x51, 0x0a], "vsqrtpd xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x51, 0x4a, 0x01], "vsqrtpd xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x51, 0xca], "vsqrtpd zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x54, 0x0a], "vandpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x54, 0x4a, 0x01], "vandpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x55, 0x0a], "vandnpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x55, 0x4a, 0x01], "vandnpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x56, 0x0a], "vorpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x56, 0x4a, 0x01], "vorpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x57, 0x0a], "vxorpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x57, 0x4a, 0x01], "vxorpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x58, 0x0a], "vaddpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x58, 0x4a, 0x01], "vaddpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x58, 0xca], "vaddpd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x59, 0x0a], "vmulpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x59, 0x4a, 0x01], "vmulpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x59, 0xca], "vmulpd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5a, 0x0a], "vcvtpd2ps xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5a, 0xca], "vcvtpd2ps ymm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5c, 0x0a], "vsubpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5c, 0x4a, 0x01], "vsubpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5c, 0xca], "vsubpd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5d, 0x0a], "vminpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5d, 0x4a, 0x01], "vminpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5e, 0x0a], "vdivpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5e, 0x4a, 0x01], "vdivpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5e, 0xca], "vdivpd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5f, 0x0a], "vmaxpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x5f, 0x4a, 0x01], "vmaxpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x6c, 0x0a], "vpunpcklqdq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x6d, 0x0a], "vpunpckhqdq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x72, 0x0a, 0xcc], "vprolq xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x78, 0x0a], "vcvttpd2uqq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x79, 0x0a], "vcvtpd2uqq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x79, 0xca], "vcvtpd2uqq zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x7a, 0x0a], "vcvttpd2qq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x7b, 0x0a], "vcvtpd2qq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0x7b, 0xca], "vcvtpd2qq zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xc2, 0x0a, 0xcc], "vcmppd k1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xc6, 0x0a, 0xcc], "vshufpd xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xd4, 0x0a], "vpaddq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xd4, 0x4a, 0x01], "vpaddq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xdb, 0x0a], "vpandq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xdb, 0x4a, 0x01], "vpandq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xdf, 0x0a], "vpandnq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xdf, 0x4a, 0x01], "vpandnq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xe6, 0x0a], "vcvttpd2dq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xeb, 0x0a], "vporq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xeb, 0x4a, 0x01], "vporq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xef, 0x0a], "vpxorq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xef, 0x4a, 0x01], "vpxorq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xf4, 0x0a], "vpmuludq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xf4, 0x4a, 0x01], "vpmuludq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xfb, 0x0a], "vpsubq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x18, 0xfb, 0x4a, 0x01], "vpsubq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x14, 0x0a], "vunpcklpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x15, 0x0a], "vunpckhpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x51, 0x0a], "vsqrtpd xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x51, 0xca], "vsqrtpd zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x54, 0x0a], "vandpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x55, 0x0a], "vandnpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x56, 0x0a], "vorpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x57, 0x0a], "vxorpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x58, 0x0a], "vaddpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x58, 0xca], "vaddpd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x59, 0x0a], "vmulpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x59, 0xca], "vmulpd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5c, 0x0a], "vsubpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5c, 0xca], "vsubpd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5d, 0x0a], "vminpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5e, 0x0a], "vdivpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5e, 0xca], "vdivpd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5f, 0x0a], "vmaxpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xd4, 0x0a], "vpaddq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xdb, 0x0a], "vpandq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xdf, 0x0a], "vpandnq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xeb, 0x0a], "vporq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xef, 0x0a], "vpxorq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xf4, 0x0a], "vpmuludq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xfb, 0x0a], "vpsubq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x1d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x10, 0x0a], "vmovupd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x10, 0x4a, 0x01], "vmovupd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x10, 0xca], "vmovupd ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x11, 0x0a], "vmovupd ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x11, 0x4a, 0x01], "vmovupd ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x11, 0xca], "vmovupd ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x14, 0x0a], "vunpcklpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x14, 0x4a, 0x01], "vunpcklpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x14, 0xca], "vunpcklpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x15, 0x0a], "vunpckhpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x15, 0x4a, 0x01], "vunpckhpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x15, 0xca], "vunpckhpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x28, 0x0a], "vmovapd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x28, 0x4a, 0x01], "vmovapd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x28, 0xca], "vmovapd ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x29, 0x0a], "vmovapd ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x29, 0x4a, 0x01], "vmovapd ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x29, 0xca], "vmovapd ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2b, 0x0a], "vmovntpd ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2b, 0x4a, 0x01], "vmovntpd ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2e, 0x0a], "vucomisd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2e, 0x4a, 0x01], "vucomisd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2e, 0xca], "vucomisd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2f, 0x0a], "vcomisd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2f, 0x4a, 0x01], "vcomisd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x2f, 0xca], "vcomisd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x51, 0x0a], "vsqrtpd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x51, 0x4a, 0x01], "vsqrtpd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x51, 0xca], "vsqrtpd ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x54, 0x0a], "vandpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x54, 0x4a, 0x01], "vandpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x54, 0xca], "vandpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x55, 0x0a], "vandnpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x55, 0x4a, 0x01], "vandnpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x55, 0xca], "vandnpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x56, 0x0a], "vorpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x56, 0x4a, 0x01], "vorpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x56, 0xca], "vorpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x57, 0x0a], "vxorpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x57, 0x4a, 0x01], "vxorpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x57, 0xca], "vxorpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x58, 0x0a], "vaddpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x58, 0x4a, 0x01], "vaddpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x58, 0xca], "vaddpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x59, 0x0a], "vmulpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x59, 0x4a, 0x01], "vmulpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x59, 0xca], "vmulpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5a, 0x0a], "vcvtpd2ps xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5a, 0xca], "vcvtpd2ps xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5c, 0x0a], "vsubpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5c, 0x4a, 0x01], "vsubpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5c, 0xca], "vsubpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5d, 0x0a], "vminpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5d, 0x4a, 0x01], "vminpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5d, 0xca], "vminpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5e, 0x0a], "vdivpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5e, 0x4a, 0x01], "vdivpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5e, 0xca], "vdivpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5f, 0x0a], "vmaxpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5f, 0x4a, 0x01], "vmaxpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x5f, 0xca], "vmaxpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x60, 0x0a], "vpunpcklbw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x60, 0x4a, 0x01], "vpunpcklbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x60, 0xca], "vpunpcklbw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x61, 0x0a], "vpunpcklwd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x61, 0x4a, 0x01], "vpunpcklwd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x61, 0xca], "vpunpcklwd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x63, 0x0a], "vpacksswb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x63, 0x4a, 0x01], "vpacksswb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x63, 0xca], "vpacksswb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x64, 0x0a], "vpcmpgtb k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x64, 0x4a, 0x01], "vpcmpgtb k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x64, 0xca], "vpcmpgtb k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x65, 0x0a], "vpcmpgtw k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x65, 0x4a, 0x01], "vpcmpgtw k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x65, 0xca], "vpcmpgtw k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x67, 0x0a], "vpackuswb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x67, 0x4a, 0x01], "vpackuswb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x67, 0xca], "vpackuswb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x68, 0x0a], "vpunpckhbw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x68, 0x4a, 0x01], "vpunpckhbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x68, 0xca], "vpunpckhbw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x69, 0x0a], "vpunpckhwd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x69, 0x4a, 0x01], "vpunpckhwd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x69, 0xca], "vpunpckhwd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6c, 0x0a], "vpunpcklqdq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6c, 0xca], "vpunpcklqdq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6d, 0x0a], "vpunpckhqdq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6d, 0xca], "vpunpckhqdq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6f, 0x0a], "vmovdqa64 ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6f, 0x4a, 0x01], "vmovdqa64 ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x6f, 0xca], "vmovdqa64 ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x72, 0x0a, 0xcc], "vprolq ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x72, 0xca, 0xcc], "vprolq ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x74, 0x0a], "vpcmpeqb k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x74, 0x4a, 0x01], "vpcmpeqb k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x74, 0xca], "vpcmpeqb k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x75, 0x0a], "vpcmpeqw k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x75, 0x4a, 0x01], "vpcmpeqw k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x75, 0xca], "vpcmpeqw k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x78, 0x0a], "vcvttpd2uqq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x78, 0xca], "vcvttpd2uqq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x79, 0x0a], "vcvtpd2uqq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x79, 0xca], "vcvtpd2uqq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7a, 0x0a], "vcvttpd2qq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7a, 0xca], "vcvttpd2qq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7b, 0x0a], "vcvtpd2qq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7b, 0xca], "vcvtpd2qq ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7f, 0x0a], "vmovdqa64 ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7f, 0x4a, 0x01], "vmovdqa64 ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0x7f, 0xca], "vmovdqa64 ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xc2, 0x0a, 0xcc], "vcmppd k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xc2, 0xca, 0xcc], "vcmppd k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xc6, 0x0a, 0xcc], "vshufpd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xc6, 0xca, 0xcc], "vshufpd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd1, 0x0a], "vpsrlw ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd1, 0x4a, 0x01], "vpsrlw ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd1, 0xca], "vpsrlw ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd3, 0x0a], "vpsrlq ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd3, 0x4a, 0x01], "vpsrlq ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd3, 0xca], "vpsrlq ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd4, 0x0a], "vpaddq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd4, 0x4a, 0x01], "vpaddq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd4, 0xca], "vpaddq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd5, 0x0a], "vpmullw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd5, 0x4a, 0x01], "vpmullw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd5, 0xca], "vpmullw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd8, 0x0a], "vpsubusb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd8, 0x4a, 0x01], "vpsubusb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd8, 0xca], "vpsubusb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd9, 0x0a], "vpsubusw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd9, 0x4a, 0x01], "vpsubusw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xd9, 0xca], "vpsubusw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xda, 0x0a], "vpminub ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xda, 0x4a, 0x01], "vpminub ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xda, 0xca], "vpminub ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdb, 0x0a], "vpandq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdb, 0x4a, 0x01], "vpandq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdb, 0xca], "vpandq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdc, 0x0a], "vpaddusb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdc, 0x4a, 0x01], "vpaddusb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdc, 0xca], "vpaddusb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdd, 0x0a], "vpaddusw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdd, 0x4a, 0x01], "vpaddusw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdd, 0xca], "vpaddusw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xde, 0x0a], "vpmaxub ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xde, 0x4a, 0x01], "vpmaxub ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xde, 0xca], "vpmaxub ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdf, 0x0a], "vpandnq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdf, 0x4a, 0x01], "vpandnq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xdf, 0xca], "vpandnq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe0, 0x0a], "vpavgb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe0, 0x4a, 0x01], "vpavgb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe0, 0xca], "vpavgb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe1, 0x0a], "vpsraw ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe1, 0x4a, 0x01], "vpsraw ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe1, 0xca], "vpsraw ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe2, 0x0a], "vpsraq ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe2, 0x4a, 0x01], "vpsraq ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe2, 0xca], "vpsraq ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe3, 0x0a], "vpavgw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe3, 0x4a, 0x01], "vpavgw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe3, 0xca], "vpavgw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe4, 0x0a], "vpmulhuw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe4, 0x4a, 0x01], "vpmulhuw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe4, 0xca], "vpmulhuw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe5, 0x0a], "vpmulhw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe5, 0x4a, 0x01], "vpmulhw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe5, 0xca], "vpmulhw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe6, 0x0a], "vcvttpd2dq xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe6, 0xca], "vcvttpd2dq xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe8, 0x0a], "vpsubsb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe8, 0x4a, 0x01], "vpsubsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe8, 0xca], "vpsubsb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe9, 0x0a], "vpsubsw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe9, 0x4a, 0x01], "vpsubsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xe9, 0xca], "vpsubsw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xea, 0x0a], "vpminsw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xea, 0x4a, 0x01], "vpminsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xea, 0xca], "vpminsw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xeb, 0x0a], "vporq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xeb, 0x4a, 0x01], "vporq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xeb, 0xca], "vporq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xec, 0x0a], "vpaddsb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xec, 0x4a, 0x01], "vpaddsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xec, 0xca], "vpaddsb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xed, 0x0a], "vpaddsw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xed, 0x4a, 0x01], "vpaddsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xed, 0xca], "vpaddsw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xee, 0x0a], "vpmaxsw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xee, 0x4a, 0x01], "vpmaxsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xee, 0xca], "vpmaxsw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xef, 0x0a], "vpxorq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xef, 0x4a, 0x01], "vpxorq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xef, 0xca], "vpxorq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf1, 0x0a], "vpsllw ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf1, 0x4a, 0x01], "vpsllw ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf1, 0xca], "vpsllw ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf3, 0x0a], "vpsllq ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf3, 0x4a, 0x01], "vpsllq ymm1, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf3, 0xca], "vpsllq ymm1, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf4, 0x0a], "vpmuludq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf4, 0x4a, 0x01], "vpmuludq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf4, 0xca], "vpmuludq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf5, 0x0a], "vpmaddwd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf5, 0x4a, 0x01], "vpmaddwd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf5, 0xca], "vpmaddwd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf6, 0x0a], "vpsadbw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf6, 0x4a, 0x01], "vpsadbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf6, 0xca], "vpsadbw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf8, 0x0a], "vpsubb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf8, 0x4a, 0x01], "vpsubb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf8, 0xca], "vpsubb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf9, 0x0a], "vpsubw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf9, 0x4a, 0x01], "vpsubw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xf9, 0xca], "vpsubw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfb, 0x0a], "vpsubq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfb, 0x4a, 0x01], "vpsubq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfb, 0xca], "vpsubq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfc, 0x0a], "vpaddb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfc, 0x4a, 0x01], "vpaddb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfc, 0xca], "vpaddb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfd, 0x0a], "vpaddw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfd, 0x4a, 0x01], "vpaddw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x28, 0xfd, 0xca], "vpaddw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x10, 0x0a], "vmovupd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x10, 0x4a, 0x01], "vmovupd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x10, 0xca], "vmovupd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x11, 0x0a], "vmovupd ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x11, 0x4a, 0x01], "vmovupd ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x11, 0xca], "vmovupd ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x14, 0x0a], "vunpcklpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x14, 0xca], "vunpcklpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x15, 0x0a], "vunpckhpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x15, 0xca], "vunpckhpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x28, 0x0a], "vmovapd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x28, 0x4a, 0x01], "vmovapd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x28, 0xca], "vmovapd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x29, 0x0a], "vmovapd ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x29, 0x4a, 0x01], "vmovapd ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x29, 0xca], "vmovapd ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x51, 0x0a], "vsqrtpd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x51, 0xca], "vsqrtpd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x54, 0x0a], "vandpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x54, 0xca], "vandpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x55, 0x0a], "vandnpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x55, 0xca], "vandnpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x56, 0x0a], "vorpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x56, 0xca], "vorpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x57, 0x0a], "vxorpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x57, 0xca], "vxorpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x58, 0x0a], "vaddpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x58, 0xca], "vaddpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x59, 0x0a], "vmulpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x59, 0xca], "vmulpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5c, 0x0a], "vsubpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5c, 0xca], "vsubpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5d, 0x0a], "vminpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5d, 0xca], "vminpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5e, 0x0a], "vdivpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5e, 0xca], "vdivpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5f, 0x0a], "vmaxpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x5f, 0xca], "vmaxpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x60, 0x0a], "vpunpcklbw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x60, 0x4a, 0x01], "vpunpcklbw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x60, 0xca], "vpunpcklbw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x61, 0x0a], "vpunpcklwd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x61, 0x4a, 0x01], "vpunpcklwd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x61, 0xca], "vpunpcklwd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x63, 0x0a], "vpacksswb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x63, 0x4a, 0x01], "vpacksswb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x63, 0xca], "vpacksswb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x64, 0x0a], "vpcmpgtb k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x64, 0x4a, 0x01], "vpcmpgtb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x64, 0xca], "vpcmpgtb k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x65, 0x0a], "vpcmpgtw k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x65, 0x4a, 0x01], "vpcmpgtw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x65, 0xca], "vpcmpgtw k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x67, 0x0a], "vpackuswb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x67, 0x4a, 0x01], "vpackuswb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x67, 0xca], "vpackuswb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x68, 0x0a], "vpunpckhbw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x68, 0x4a, 0x01], "vpunpckhbw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x68, 0xca], "vpunpckhbw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x69, 0x0a], "vpunpckhwd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x69, 0x4a, 0x01], "vpunpckhwd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x69, 0xca], "vpunpckhwd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6c, 0xca], "vpunpcklqdq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6d, 0xca], "vpunpckhqdq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6f, 0x0a], "vmovdqa64 ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqa64 ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x6f, 0xca], "vmovdqa64 ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x72, 0xca, 0xcc], "vprolq ymm0{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x74, 0x0a], "vpcmpeqb k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x74, 0x4a, 0x01], "vpcmpeqb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x74, 0xca], "vpcmpeqb k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x75, 0x0a], "vpcmpeqw k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x75, 0x4a, 0x01], "vpcmpeqw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x75, 0xca], "vpcmpeqw k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x78, 0xca], "vcvttpd2uqq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x79, 0xca], "vcvtpd2uqq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7a, 0xca], "vcvttpd2qq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7b, 0xca], "vcvtpd2qq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7f, 0x0a], "vmovdqa64 ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqa64 ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0x7f, 0xca], "vmovdqa64 ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xc6, 0xca, 0xcc], "vshufpd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd1, 0x0a], "vpsrlw ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd1, 0x4a, 0x01], "vpsrlw ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd1, 0xca], "vpsrlw ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd3, 0x0a], "vpsrlq ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd3, 0x4a, 0x01], "vpsrlq ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd3, 0xca], "vpsrlq ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd4, 0x0a], "vpaddq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd4, 0xca], "vpaddq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd5, 0x0a], "vpmullw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd5, 0x4a, 0x01], "vpmullw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd5, 0xca], "vpmullw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd8, 0x0a], "vpsubusb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd8, 0x4a, 0x01], "vpsubusb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd8, 0xca], "vpsubusb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd9, 0x0a], "vpsubusw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd9, 0x4a, 0x01], "vpsubusw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xd9, 0xca], "vpsubusw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xda, 0x0a], "vpminub ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xda, 0x4a, 0x01], "vpminub ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xda, 0xca], "vpminub ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdb, 0x0a], "vpandq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdb, 0xca], "vpandq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdc, 0x0a], "vpaddusb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdc, 0x4a, 0x01], "vpaddusb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdc, 0xca], "vpaddusb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdd, 0x0a], "vpaddusw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdd, 0x4a, 0x01], "vpaddusw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdd, 0xca], "vpaddusw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xde, 0x0a], "vpmaxub ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xde, 0x4a, 0x01], "vpmaxub ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xde, 0xca], "vpmaxub ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdf, 0x0a], "vpandnq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xdf, 0xca], "vpandnq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe0, 0x0a], "vpavgb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe0, 0x4a, 0x01], "vpavgb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe0, 0xca], "vpavgb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe1, 0x0a], "vpsraw ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe1, 0x4a, 0x01], "vpsraw ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe1, 0xca], "vpsraw ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe2, 0x0a], "vpsraq ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe2, 0x4a, 0x01], "vpsraq ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe2, 0xca], "vpsraq ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe3, 0x0a], "vpavgw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe3, 0x4a, 0x01], "vpavgw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe3, 0xca], "vpavgw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe4, 0x0a], "vpmulhuw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe4, 0x4a, 0x01], "vpmulhuw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe4, 0xca], "vpmulhuw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe5, 0x0a], "vpmulhw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe5, 0x4a, 0x01], "vpmulhw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe5, 0xca], "vpmulhw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe8, 0x0a], "vpsubsb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe8, 0x4a, 0x01], "vpsubsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe8, 0xca], "vpsubsb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe9, 0x0a], "vpsubsw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe9, 0x4a, 0x01], "vpsubsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xe9, 0xca], "vpsubsw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xea, 0x0a], "vpminsw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xea, 0x4a, 0x01], "vpminsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xea, 0xca], "vpminsw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xeb, 0x0a], "vporq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xeb, 0xca], "vporq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xec, 0x0a], "vpaddsb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xec, 0x4a, 0x01], "vpaddsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xec, 0xca], "vpaddsb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xed, 0x0a], "vpaddsw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xed, 0x4a, 0x01], "vpaddsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xed, 0xca], "vpaddsw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xee, 0x0a], "vpmaxsw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xee, 0x4a, 0x01], "vpmaxsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xee, 0xca], "vpmaxsw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xef, 0x0a], "vpxorq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xef, 0xca], "vpxorq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf1, 0x0a], "vpsllw ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf1, 0x4a, 0x01], "vpsllw ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf1, 0xca], "vpsllw ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf3, 0x0a], "vpsllq ymm1{k5}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf3, 0x4a, 0x01], "vpsllq ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf3, 0xca], "vpsllq ymm1{k5}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf4, 0x0a], "vpmuludq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf4, 0xca], "vpmuludq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf5, 0x0a], "vpmaddwd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf5, 0x4a, 0x01], "vpmaddwd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf5, 0xca], "vpmaddwd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf8, 0x0a], "vpsubb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf8, 0x4a, 0x01], "vpsubb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf8, 0xca], "vpsubb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf9, 0x0a], "vpsubw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf9, 0x4a, 0x01], "vpsubw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xf9, 0xca], "vpsubw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfb, 0x0a], "vpsubq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfb, 0xca], "vpsubq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfc, 0x0a], "vpaddb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfc, 0x4a, 0x01], "vpaddb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfc, 0xca], "vpaddb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfd, 0x0a], "vpaddw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfd, 0x4a, 0x01], "vpaddw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x2d, 0xfd, 0xca], "vpaddw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x14, 0x0a], "vunpcklpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x14, 0x4a, 0x01], "vunpcklpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x15, 0x0a], "vunpckhpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x15, 0x4a, 0x01], "vunpckhpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x51, 0x0a], "vsqrtpd ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x51, 0x4a, 0x01], "vsqrtpd ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x51, 0xca], "vsqrtpd zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x54, 0x0a], "vandpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x54, 0x4a, 0x01], "vandpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x55, 0x0a], "vandnpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x55, 0x4a, 0x01], "vandnpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x56, 0x0a], "vorpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x56, 0x4a, 0x01], "vorpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x57, 0x0a], "vxorpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x57, 0x4a, 0x01], "vxorpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x58, 0x0a], "vaddpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x58, 0x4a, 0x01], "vaddpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x58, 0xca], "vaddpd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x59, 0x0a], "vmulpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x59, 0x4a, 0x01], "vmulpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x59, 0xca], "vmulpd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5a, 0x0a], "vcvtpd2ps xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5a, 0xca], "vcvtpd2ps ymm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5c, 0x0a], "vsubpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5c, 0x4a, 0x01], "vsubpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5c, 0xca], "vsubpd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5d, 0x0a], "vminpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5d, 0x4a, 0x01], "vminpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5e, 0x0a], "vdivpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5e, 0x4a, 0x01], "vdivpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5e, 0xca], "vdivpd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5f, 0x0a], "vmaxpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x5f, 0x4a, 0x01], "vmaxpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x6c, 0x0a], "vpunpcklqdq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x6d, 0x0a], "vpunpckhqdq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x72, 0x0a, 0xcc], "vprolq ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x78, 0x0a], "vcvttpd2uqq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x79, 0x0a], "vcvtpd2uqq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x79, 0xca], "vcvtpd2uqq zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x7a, 0x0a], "vcvttpd2qq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x7b, 0x0a], "vcvtpd2qq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0x7b, 0xca], "vcvtpd2qq zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xc2, 0x0a, 0xcc], "vcmppd k1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xc6, 0x0a, 0xcc], "vshufpd ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xd4, 0x0a], "vpaddq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xd4, 0x4a, 0x01], "vpaddq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xdb, 0x0a], "vpandq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xdb, 0x4a, 0x01], "vpandq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xdf, 0x0a], "vpandnq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xdf, 0x4a, 0x01], "vpandnq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xe6, 0x0a], "vcvttpd2dq xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xeb, 0x0a], "vporq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xeb, 0x4a, 0x01], "vporq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xef, 0x0a], "vpxorq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xef, 0x4a, 0x01], "vpxorq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xf4, 0x0a], "vpmuludq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xf4, 0x4a, 0x01], "vpmuludq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xfb, 0x0a], "vpsubq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x38, 0xfb, 0x4a, 0x01], "vpsubq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x14, 0x0a], "vunpcklpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x15, 0x0a], "vunpckhpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x51, 0x0a], "vsqrtpd ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x51, 0xca], "vsqrtpd zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x54, 0x0a], "vandpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x55, 0x0a], "vandnpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x56, 0x0a], "vorpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x57, 0x0a], "vxorpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x58, 0x0a], "vaddpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x58, 0xca], "vaddpd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x59, 0x0a], "vmulpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x59, 0xca], "vmulpd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5c, 0x0a], "vsubpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5c, 0xca], "vsubpd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5d, 0x0a], "vminpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5e, 0x0a], "vdivpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5e, 0xca], "vdivpd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5f, 0x0a], "vmaxpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xd4, 0x0a], "vpaddq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xdb, 0x0a], "vpandq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xdf, 0x0a], "vpandnq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xeb, 0x0a], "vporq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xef, 0x0a], "vpxorq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xf4, 0x0a], "vpmuludq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xfb, 0x0a], "vpsubq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x3d, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x10, 0x0a], "vmovupd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x10, 0x4a, 0x01], "vmovupd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x10, 0xca], "vmovupd zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x11, 0x0a], "vmovupd zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x11, 0x4a, 0x01], "vmovupd zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x11, 0xca], "vmovupd zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x14, 0x0a], "vunpcklpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x14, 0x4a, 0x01], "vunpcklpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x14, 0xca], "vunpcklpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x15, 0x0a], "vunpckhpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x15, 0x4a, 0x01], "vunpckhpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x15, 0xca], "vunpckhpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x28, 0x0a], "vmovapd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x28, 0x4a, 0x01], "vmovapd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x28, 0xca], "vmovapd zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x29, 0x0a], "vmovapd zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x29, 0x4a, 0x01], "vmovapd zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x29, 0xca], "vmovapd zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x2b, 0x0a], "vmovntpd zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x2b, 0x4a, 0x01], "vmovntpd zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x51, 0x0a], "vsqrtpd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x51, 0x4a, 0x01], "vsqrtpd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x51, 0xca], "vsqrtpd zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x54, 0x0a], "vandpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x54, 0x4a, 0x01], "vandpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x54, 0xca], "vandpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x55, 0x0a], "vandnpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x55, 0x4a, 0x01], "vandnpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x55, 0xca], "vandnpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x56, 0x0a], "vorpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x56, 0x4a, 0x01], "vorpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x56, 0xca], "vorpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x57, 0x0a], "vxorpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x57, 0x4a, 0x01], "vxorpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x57, 0xca], "vxorpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x58, 0x0a], "vaddpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x58, 0x4a, 0x01], "vaddpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x58, 0xca], "vaddpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x59, 0x0a], "vmulpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x59, 0x4a, 0x01], "vmulpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x59, 0xca], "vmulpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5a, 0x0a], "vcvtpd2ps ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5a, 0xca], "vcvtpd2ps ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5c, 0x0a], "vsubpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5c, 0x4a, 0x01], "vsubpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5c, 0xca], "vsubpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5d, 0x0a], "vminpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5d, 0x4a, 0x01], "vminpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5d, 0xca], "vminpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5e, 0x0a], "vdivpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5e, 0x4a, 0x01], "vdivpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5e, 0xca], "vdivpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5f, 0x0a], "vmaxpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5f, 0x4a, 0x01], "vmaxpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x5f, 0xca], "vmaxpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x60, 0x0a], "vpunpcklbw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x60, 0x4a, 0x01], "vpunpcklbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x60, 0xca], "vpunpcklbw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x61, 0x0a], "vpunpcklwd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x61, 0x4a, 0x01], "vpunpcklwd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x61, 0xca], "vpunpcklwd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x63, 0x0a], "vpacksswb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x63, 0x4a, 0x01], "vpacksswb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x63, 0xca], "vpacksswb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x64, 0x0a], "vpcmpgtb k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x64, 0x4a, 0x01], "vpcmpgtb k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x64, 0xca], "vpcmpgtb k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x65, 0x0a], "vpcmpgtw k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x65, 0x4a, 0x01], "vpcmpgtw k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x65, 0xca], "vpcmpgtw k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x67, 0x0a], "vpackuswb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x67, 0x4a, 0x01], "vpackuswb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x67, 0xca], "vpackuswb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x68, 0x0a], "vpunpckhbw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x68, 0x4a, 0x01], "vpunpckhbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x68, 0xca], "vpunpckhbw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x69, 0x0a], "vpunpckhwd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x69, 0x4a, 0x01], "vpunpckhwd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x69, 0xca], "vpunpckhwd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6c, 0x0a], "vpunpcklqdq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6c, 0xca], "vpunpcklqdq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6d, 0x0a], "vpunpckhqdq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6d, 0xca], "vpunpckhqdq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6f, 0x0a], "vmovdqa64 zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6f, 0x4a, 0x01], "vmovdqa64 zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x6f, 0xca], "vmovdqa64 zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x72, 0x0a, 0xcc], "vprolq zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x72, 0xca, 0xcc], "vprolq zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x74, 0x0a], "vpcmpeqb k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x74, 0x4a, 0x01], "vpcmpeqb k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x74, 0xca], "vpcmpeqb k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x75, 0x0a], "vpcmpeqw k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x75, 0x4a, 0x01], "vpcmpeqw k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x75, 0xca], "vpcmpeqw k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x78, 0x0a], "vcvttpd2uqq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x78, 0xca], "vcvttpd2uqq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x79, 0x0a], "vcvtpd2uqq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x79, 0xca], "vcvtpd2uqq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7a, 0x0a], "vcvttpd2qq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7a, 0xca], "vcvttpd2qq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7b, 0x0a], "vcvtpd2qq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7b, 0xca], "vcvtpd2qq zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7f, 0x0a], "vmovdqa64 zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7f, 0x4a, 0x01], "vmovdqa64 zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0x7f, 0xca], "vmovdqa64 zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xc2, 0x0a, 0xcc], "vcmppd k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xc2, 0xca, 0xcc], "vcmppd k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xc6, 0x0a, 0xcc], "vshufpd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xc6, 0xca, 0xcc], "vshufpd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd1, 0x0a], "vpsrlw zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd1, 0x4a, 0x01], "vpsrlw zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd1, 0xca], "vpsrlw zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd3, 0x0a], "vpsrlq zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd3, 0x4a, 0x01], "vpsrlq zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd3, 0xca], "vpsrlq zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd4, 0x0a], "vpaddq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd4, 0x4a, 0x01], "vpaddq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd4, 0xca], "vpaddq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd5, 0x0a], "vpmullw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd5, 0x4a, 0x01], "vpmullw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd5, 0xca], "vpmullw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd8, 0x0a], "vpsubusb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd8, 0x4a, 0x01], "vpsubusb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd8, 0xca], "vpsubusb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd9, 0x0a], "vpsubusw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd9, 0x4a, 0x01], "vpsubusw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xd9, 0xca], "vpsubusw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xda, 0x0a], "vpminub zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xda, 0x4a, 0x01], "vpminub zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xda, 0xca], "vpminub zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdb, 0x0a], "vpandq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdb, 0x4a, 0x01], "vpandq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdb, 0xca], "vpandq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdc, 0x0a], "vpaddusb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdc, 0x4a, 0x01], "vpaddusb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdc, 0xca], "vpaddusb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdd, 0x0a], "vpaddusw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdd, 0x4a, 0x01], "vpaddusw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdd, 0xca], "vpaddusw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xde, 0x0a], "vpmaxub zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xde, 0x4a, 0x01], "vpmaxub zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xde, 0xca], "vpmaxub zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdf, 0x0a], "vpandnq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdf, 0x4a, 0x01], "vpandnq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xdf, 0xca], "vpandnq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe0, 0x0a], "vpavgb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe0, 0x4a, 0x01], "vpavgb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe0, 0xca], "vpavgb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe1, 0x0a], "vpsraw zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe1, 0x4a, 0x01], "vpsraw zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe1, 0xca], "vpsraw zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe2, 0x0a], "vpsraq zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe2, 0x4a, 0x01], "vpsraq zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe2, 0xca], "vpsraq zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe3, 0x0a], "vpavgw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe3, 0x4a, 0x01], "vpavgw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe3, 0xca], "vpavgw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe4, 0x0a], "vpmulhuw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe4, 0x4a, 0x01], "vpmulhuw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe4, 0xca], "vpmulhuw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe5, 0x0a], "vpmulhw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe5, 0x4a, 0x01], "vpmulhw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe5, 0xca], "vpmulhw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe6, 0x0a], "vcvttpd2dq ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe6, 0xca], "vcvttpd2dq ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe8, 0x0a], "vpsubsb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe8, 0x4a, 0x01], "vpsubsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe8, 0xca], "vpsubsb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe9, 0x0a], "vpsubsw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe9, 0x4a, 0x01], "vpsubsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xe9, 0xca], "vpsubsw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xea, 0x0a], "vpminsw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xea, 0x4a, 0x01], "vpminsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xea, 0xca], "vpminsw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xeb, 0x0a], "vporq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xeb, 0x4a, 0x01], "vporq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xeb, 0xca], "vporq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xec, 0x0a], "vpaddsb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xec, 0x4a, 0x01], "vpaddsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xec, 0xca], "vpaddsb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xed, 0x0a], "vpaddsw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xed, 0x4a, 0x01], "vpaddsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xed, 0xca], "vpaddsw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xee, 0x0a], "vpmaxsw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xee, 0x4a, 0x01], "vpmaxsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xee, 0xca], "vpmaxsw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xef, 0x0a], "vpxorq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xef, 0x4a, 0x01], "vpxorq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xef, 0xca], "vpxorq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf1, 0x0a], "vpsllw zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf1, 0x4a, 0x01], "vpsllw zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf1, 0xca], "vpsllw zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf3, 0x0a], "vpsllq zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf3, 0x4a, 0x01], "vpsllq zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf3, 0xca], "vpsllq zmm1, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf4, 0x0a], "vpmuludq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf4, 0x4a, 0x01], "vpmuludq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf4, 0xca], "vpmuludq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf5, 0x0a], "vpmaddwd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf5, 0x4a, 0x01], "vpmaddwd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf5, 0xca], "vpmaddwd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf6, 0x0a], "vpsadbw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf6, 0x4a, 0x01], "vpsadbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf6, 0xca], "vpsadbw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf8, 0x0a], "vpsubb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf8, 0x4a, 0x01], "vpsubb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf8, 0xca], "vpsubb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf9, 0x0a], "vpsubw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf9, 0x4a, 0x01], "vpsubw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xf9, 0xca], "vpsubw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfb, 0x0a], "vpsubq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfb, 0x4a, 0x01], "vpsubq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfb, 0xca], "vpsubq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfc, 0x0a], "vpaddb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfc, 0x4a, 0x01], "vpaddb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfc, 0xca], "vpaddb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfd, 0x0a], "vpaddw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfd, 0x4a, 0x01], "vpaddw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x48, 0xfd, 0xca], "vpaddw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x10, 0x0a], "vmovupd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x10, 0x4a, 0x01], "vmovupd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x10, 0xca], "vmovupd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x11, 0x0a], "vmovupd zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x11, 0x4a, 0x01], "vmovupd zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x11, 0xca], "vmovupd zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x14, 0x0a], "vunpcklpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x14, 0xca], "vunpcklpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x15, 0x0a], "vunpckhpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x15, 0xca], "vunpckhpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x28, 0x0a], "vmovapd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x28, 0x4a, 0x01], "vmovapd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x28, 0xca], "vmovapd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x29, 0x0a], "vmovapd zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x29, 0x4a, 0x01], "vmovapd zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x29, 0xca], "vmovapd zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x51, 0x0a], "vsqrtpd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x51, 0xca], "vsqrtpd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x54, 0x0a], "vandpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x54, 0xca], "vandpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x55, 0x0a], "vandnpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x55, 0xca], "vandnpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x56, 0x0a], "vorpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x56, 0xca], "vorpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x57, 0x0a], "vxorpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x57, 0xca], "vxorpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x58, 0x0a], "vaddpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x58, 0xca], "vaddpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x59, 0x0a], "vmulpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x59, 0xca], "vmulpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5c, 0x0a], "vsubpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5c, 0xca], "vsubpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5d, 0x0a], "vminpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5d, 0xca], "vminpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5e, 0x0a], "vdivpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5e, 0xca], "vdivpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5f, 0x0a], "vmaxpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x5f, 0xca], "vmaxpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x60, 0x0a], "vpunpcklbw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x60, 0x4a, 0x01], "vpunpcklbw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x60, 0xca], "vpunpcklbw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x61, 0x0a], "vpunpcklwd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x61, 0x4a, 0x01], "vpunpcklwd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x61, 0xca], "vpunpcklwd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x63, 0x0a], "vpacksswb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x63, 0x4a, 0x01], "vpacksswb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x63, 0xca], "vpacksswb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x64, 0x0a], "vpcmpgtb k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x64, 0x4a, 0x01], "vpcmpgtb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x64, 0xca], "vpcmpgtb k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x65, 0x0a], "vpcmpgtw k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x65, 0x4a, 0x01], "vpcmpgtw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x65, 0xca], "vpcmpgtw k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x67, 0x0a], "vpackuswb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x67, 0x4a, 0x01], "vpackuswb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x67, 0xca], "vpackuswb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x68, 0x0a], "vpunpckhbw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x68, 0x4a, 0x01], "vpunpckhbw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x68, 0xca], "vpunpckhbw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x69, 0x0a], "vpunpckhwd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x69, 0x4a, 0x01], "vpunpckhwd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x69, 0xca], "vpunpckhwd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6c, 0xca], "vpunpcklqdq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6d, 0xca], "vpunpckhqdq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6f, 0x0a], "vmovdqa64 zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqa64 zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x6f, 0xca], "vmovdqa64 zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x72, 0xca, 0xcc], "vprolq zmm0{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x74, 0x0a], "vpcmpeqb k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x74, 0x4a, 0x01], "vpcmpeqb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x74, 0xca], "vpcmpeqb k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x75, 0x0a], "vpcmpeqw k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x75, 0x4a, 0x01], "vpcmpeqw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x75, 0xca], "vpcmpeqw k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7f, 0x0a], "vmovdqa64 zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqa64 zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0x7f, 0xca], "vmovdqa64 zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xc6, 0xca, 0xcc], "vshufpd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd1, 0x0a], "vpsrlw zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd1, 0x4a, 0x01], "vpsrlw zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd1, 0xca], "vpsrlw zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd3, 0x0a], "vpsrlq zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd3, 0x4a, 0x01], "vpsrlq zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd3, 0xca], "vpsrlq zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd4, 0x0a], "vpaddq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd4, 0xca], "vpaddq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd5, 0x0a], "vpmullw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd5, 0x4a, 0x01], "vpmullw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd5, 0xca], "vpmullw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd8, 0x0a], "vpsubusb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd8, 0x4a, 0x01], "vpsubusb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd8, 0xca], "vpsubusb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd9, 0x0a], "vpsubusw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd9, 0x4a, 0x01], "vpsubusw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xd9, 0xca], "vpsubusw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xda, 0x0a], "vpminub zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xda, 0x4a, 0x01], "vpminub zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xda, 0xca], "vpminub zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdb, 0x0a], "vpandq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdb, 0xca], "vpandq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdc, 0x0a], "vpaddusb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdc, 0x4a, 0x01], "vpaddusb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdc, 0xca], "vpaddusb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdd, 0x0a], "vpaddusw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdd, 0x4a, 0x01], "vpaddusw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdd, 0xca], "vpaddusw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xde, 0x0a], "vpmaxub zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xde, 0x4a, 0x01], "vpmaxub zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xde, 0xca], "vpmaxub zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdf, 0x0a], "vpandnq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xdf, 0xca], "vpandnq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe0, 0x0a], "vpavgb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe0, 0x4a, 0x01], "vpavgb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe0, 0xca], "vpavgb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe1, 0x0a], "vpsraw zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe1, 0x4a, 0x01], "vpsraw zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe1, 0xca], "vpsraw zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe2, 0x0a], "vpsraq zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe2, 0x4a, 0x01], "vpsraq zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe2, 0xca], "vpsraq zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe3, 0x0a], "vpavgw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe3, 0x4a, 0x01], "vpavgw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe3, 0xca], "vpavgw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe4, 0x0a], "vpmulhuw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe4, 0x4a, 0x01], "vpmulhuw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe4, 0xca], "vpmulhuw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe5, 0x0a], "vpmulhw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe5, 0x4a, 0x01], "vpmulhw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe5, 0xca], "vpmulhw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe8, 0x0a], "vpsubsb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe8, 0x4a, 0x01], "vpsubsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe8, 0xca], "vpsubsb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe9, 0x0a], "vpsubsw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe9, 0x4a, 0x01], "vpsubsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xe9, 0xca], "vpsubsw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xea, 0x0a], "vpminsw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xea, 0x4a, 0x01], "vpminsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xea, 0xca], "vpminsw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xeb, 0x0a], "vporq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xeb, 0xca], "vporq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xec, 0x0a], "vpaddsb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xec, 0x4a, 0x01], "vpaddsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xec, 0xca], "vpaddsb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xed, 0x0a], "vpaddsw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xed, 0x4a, 0x01], "vpaddsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xed, 0xca], "vpaddsw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xee, 0x0a], "vpmaxsw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xee, 0x4a, 0x01], "vpmaxsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xee, 0xca], "vpmaxsw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xef, 0x0a], "vpxorq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xef, 0xca], "vpxorq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf1, 0x0a], "vpsllw zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf1, 0x4a, 0x01], "vpsllw zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf1, 0xca], "vpsllw zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf3, 0x0a], "vpsllq zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf3, 0x4a, 0x01], "vpsllq zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf3, 0xca], "vpsllq zmm1{k5}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf4, 0x0a], "vpmuludq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf4, 0xca], "vpmuludq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf5, 0x0a], "vpmaddwd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf5, 0x4a, 0x01], "vpmaddwd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf5, 0xca], "vpmaddwd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf8, 0x0a], "vpsubb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf8, 0x4a, 0x01], "vpsubb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf8, 0xca], "vpsubb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf9, 0x0a], "vpsubw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf9, 0x4a, 0x01], "vpsubw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xf9, 0xca], "vpsubw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfb, 0x0a], "vpsubq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfb, 0xca], "vpsubq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfc, 0x0a], "vpaddb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfc, 0x4a, 0x01], "vpaddb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfc, 0xca], "vpaddb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfd, 0x0a], "vpaddw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfd, 0x4a, 0x01], "vpaddw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x4d, 0xfd, 0xca], "vpaddw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x14, 0x0a], "vunpcklpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x14, 0x4a, 0x01], "vunpcklpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x15, 0x0a], "vunpckhpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x15, 0x4a, 0x01], "vunpckhpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x51, 0x0a], "vsqrtpd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x51, 0x4a, 0x01], "vsqrtpd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x51, 0xca], "vsqrtpd zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x54, 0x0a], "vandpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x54, 0x4a, 0x01], "vandpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x55, 0x0a], "vandnpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x55, 0x4a, 0x01], "vandnpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x56, 0x0a], "vorpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x56, 0x4a, 0x01], "vorpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x57, 0x0a], "vxorpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x57, 0x4a, 0x01], "vxorpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x58, 0x0a], "vaddpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x58, 0x4a, 0x01], "vaddpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x58, 0xca], "vaddpd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x59, 0x0a], "vmulpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x59, 0x4a, 0x01], "vmulpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x59, 0xca], "vmulpd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5a, 0x0a], "vcvtpd2ps ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5a, 0xca], "vcvtpd2ps ymm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5c, 0x0a], "vsubpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5c, 0x4a, 0x01], "vsubpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5c, 0xca], "vsubpd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5d, 0x0a], "vminpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5d, 0x4a, 0x01], "vminpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5e, 0x0a], "vdivpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5e, 0x4a, 0x01], "vdivpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5e, 0xca], "vdivpd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5f, 0x0a], "vmaxpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x5f, 0x4a, 0x01], "vmaxpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x6c, 0x0a], "vpunpcklqdq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x6d, 0x0a], "vpunpckhqdq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x72, 0x0a, 0xcc], "vprolq zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x78, 0x0a], "vcvttpd2uqq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x79, 0x0a], "vcvtpd2uqq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x79, 0xca], "vcvtpd2uqq zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x7a, 0x0a], "vcvttpd2qq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x7b, 0x0a], "vcvtpd2qq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0x7b, 0xca], "vcvtpd2qq zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xc2, 0x0a, 0xcc], "vcmppd k1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xc6, 0x0a, 0xcc], "vshufpd zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xd4, 0x0a], "vpaddq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xd4, 0x4a, 0x01], "vpaddq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xdb, 0x0a], "vpandq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xdb, 0x4a, 0x01], "vpandq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xdf, 0x0a], "vpandnq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xdf, 0x4a, 0x01], "vpandnq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xe6, 0x0a], "vcvttpd2dq ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xeb, 0x0a], "vporq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xeb, 0x4a, 0x01], "vporq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xef, 0x0a], "vpxorq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xef, 0x4a, 0x01], "vpxorq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xf4, 0x0a], "vpmuludq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xf4, 0x4a, 0x01], "vpmuludq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xfb, 0x0a], "vpsubq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x58, 0xfb, 0x4a, 0x01], "vpsubq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x14, 0x0a], "vunpcklpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x15, 0x0a], "vunpckhpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x51, 0x0a], "vsqrtpd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x51, 0xca], "vsqrtpd zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x54, 0x0a], "vandpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x55, 0x0a], "vandnpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x56, 0x0a], "vorpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x57, 0x0a], "vxorpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x58, 0x0a], "vaddpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x58, 0xca], "vaddpd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x59, 0x0a], "vmulpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x59, 0xca], "vmulpd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5c, 0x0a], "vsubpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5c, 0xca], "vsubpd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5d, 0x0a], "vminpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5e, 0x0a], "vdivpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5e, 0xca], "vdivpd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5f, 0x0a], "vmaxpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xd4, 0x0a], "vpaddq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xdb, 0x0a], "vpandq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xdf, 0x0a], "vpandnq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xeb, 0x0a], "vporq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xef, 0x0a], "vpxorq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xf4, 0x0a], "vpmuludq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xfb, 0x0a], "vpsubq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x5d, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x2e, 0xca], "vucomisd xmm1{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x2f, 0xca], "vcomisd xmm1{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x51, 0xca], "vsqrtpd zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x58, 0xca], "vaddpd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x59, 0xca], "vmulpd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x5a, 0xca], "vcvtpd2ps ymm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x5c, 0xca], "vsubpd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x5d, 0xca], "vminpd zmm1{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x5e, 0xca], "vdivpd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x5f, 0xca], "vmaxpd zmm1{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x78, 0xca], "vcvttpd2uqq zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x79, 0xca], "vcvtpd2uqq zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x7a, 0xca], "vcvttpd2qq zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0x7b, 0xca], "vcvtpd2qq zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0xc2, 0xca, 0xcc], "vcmppd k1{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x78, 0xe6, 0xca], "vcvttpd2dq ymm1{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x51, 0xca], "vsqrtpd zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x58, 0xca], "vaddpd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x59, 0xca], "vmulpd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x5c, 0xca], "vsubpd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x5d, 0xca], "vminpd zmm1{k5}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x5e, 0xca], "vdivpd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x5f, 0xca], "vmaxpd zmm1{k5}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x7d, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x10, 0x0a], "vmovupd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x10, 0x4a, 0x01], "vmovupd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x10, 0xca], "vmovupd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x11, 0xca], "vmovupd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x14, 0x0a], "vunpcklpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x14, 0xca], "vunpcklpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x15, 0x0a], "vunpckhpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x15, 0xca], "vunpckhpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x28, 0x0a], "vmovapd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x28, 0x4a, 0x01], "vmovapd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x28, 0xca], "vmovapd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x29, 0xca], "vmovapd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x51, 0x0a], "vsqrtpd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x51, 0xca], "vsqrtpd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x54, 0x0a], "vandpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x54, 0xca], "vandpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x55, 0x0a], "vandnpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x55, 0xca], "vandnpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x56, 0x0a], "vorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x56, 0xca], "vorpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x57, 0x0a], "vxorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x57, 0xca], "vxorpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x58, 0x0a], "vaddpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x58, 0xca], "vaddpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x59, 0x0a], "vmulpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x59, 0xca], "vmulpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5c, 0x0a], "vsubpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5c, 0xca], "vsubpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5d, 0x0a], "vminpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5d, 0xca], "vminpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5e, 0x0a], "vdivpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5e, 0xca], "vdivpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5f, 0x0a], "vmaxpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x5f, 0xca], "vmaxpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x60, 0x0a], "vpunpcklbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x60, 0x4a, 0x01], "vpunpcklbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x60, 0xca], "vpunpcklbw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x61, 0x0a], "vpunpcklwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x61, 0x4a, 0x01], "vpunpcklwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x61, 0xca], "vpunpcklwd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x63, 0x0a], "vpacksswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x63, 0x4a, 0x01], "vpacksswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x63, 0xca], "vpacksswb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x67, 0x0a], "vpackuswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x67, 0x4a, 0x01], "vpackuswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x67, 0xca], "vpackuswb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x68, 0x0a], "vpunpckhbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x68, 0x4a, 0x01], "vpunpckhbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x68, 0xca], "vpunpckhbw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x69, 0x0a], "vpunpckhwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x69, 0x4a, 0x01], "vpunpckhwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x69, 0xca], "vpunpckhwd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6c, 0xca], "vpunpcklqdq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6d, 0xca], "vpunpckhqdq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6f, 0x0a], "vmovdqa64 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqa64 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x6f, 0xca], "vmovdqa64 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x72, 0xca, 0xcc], "vprolq xmm0{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x78, 0xca], "vcvttpd2uqq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x79, 0xca], "vcvtpd2uqq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7a, 0xca], "vcvttpd2qq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7b, 0xca], "vcvtpd2qq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0x7f, 0xca], "vmovdqa64 xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xc6, 0xca, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd1, 0x0a], "vpsrlw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd1, 0x4a, 0x01], "vpsrlw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd1, 0xca], "vpsrlw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd3, 0x0a], "vpsrlq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd3, 0x4a, 0x01], "vpsrlq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd3, 0xca], "vpsrlq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd4, 0x0a], "vpaddq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd4, 0xca], "vpaddq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd5, 0x0a], "vpmullw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd5, 0x4a, 0x01], "vpmullw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd5, 0xca], "vpmullw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd8, 0x0a], "vpsubusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd8, 0x4a, 0x01], "vpsubusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd8, 0xca], "vpsubusb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd9, 0x0a], "vpsubusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd9, 0x4a, 0x01], "vpsubusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xd9, 0xca], "vpsubusw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xda, 0x0a], "vpminub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xda, 0x4a, 0x01], "vpminub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xda, 0xca], "vpminub xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdb, 0x0a], "vpandq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdb, 0xca], "vpandq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdc, 0x0a], "vpaddusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdc, 0x4a, 0x01], "vpaddusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdc, 0xca], "vpaddusb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdd, 0x0a], "vpaddusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdd, 0x4a, 0x01], "vpaddusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdd, 0xca], "vpaddusw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xde, 0x0a], "vpmaxub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xde, 0x4a, 0x01], "vpmaxub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xde, 0xca], "vpmaxub xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdf, 0x0a], "vpandnq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xdf, 0xca], "vpandnq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe0, 0x0a], "vpavgb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe0, 0x4a, 0x01], "vpavgb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe0, 0xca], "vpavgb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe1, 0x0a], "vpsraw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe1, 0x4a, 0x01], "vpsraw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe1, 0xca], "vpsraw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe2, 0x0a], "vpsraq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe2, 0x4a, 0x01], "vpsraq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe2, 0xca], "vpsraq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe3, 0x0a], "vpavgw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe3, 0x4a, 0x01], "vpavgw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe3, 0xca], "vpavgw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe4, 0x0a], "vpmulhuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe4, 0x4a, 0x01], "vpmulhuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe4, 0xca], "vpmulhuw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe5, 0x0a], "vpmulhw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe5, 0x4a, 0x01], "vpmulhw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe5, 0xca], "vpmulhw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe8, 0x0a], "vpsubsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe8, 0x4a, 0x01], "vpsubsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe8, 0xca], "vpsubsb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe9, 0x0a], "vpsubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe9, 0x4a, 0x01], "vpsubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xe9, 0xca], "vpsubsw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xea, 0x0a], "vpminsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xea, 0x4a, 0x01], "vpminsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xea, 0xca], "vpminsw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xeb, 0x0a], "vporq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xeb, 0xca], "vporq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xec, 0x0a], "vpaddsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xec, 0x4a, 0x01], "vpaddsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xec, 0xca], "vpaddsb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xed, 0x0a], "vpaddsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xed, 0x4a, 0x01], "vpaddsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xed, 0xca], "vpaddsw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xee, 0x0a], "vpmaxsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xee, 0x4a, 0x01], "vpmaxsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xee, 0xca], "vpmaxsw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xef, 0x0a], "vpxorq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xef, 0xca], "vpxorq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf1, 0x0a], "vpsllw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf1, 0x4a, 0x01], "vpsllw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf1, 0xca], "vpsllw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf3, 0x0a], "vpsllq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf3, 0x4a, 0x01], "vpsllq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf3, 0xca], "vpsllq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf4, 0x0a], "vpmuludq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf4, 0xca], "vpmuludq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf5, 0x0a], "vpmaddwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf5, 0x4a, 0x01], "vpmaddwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf5, 0xca], "vpmaddwd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf8, 0x0a], "vpsubb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf8, 0x4a, 0x01], "vpsubb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf8, 0xca], "vpsubb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf9, 0x0a], "vpsubw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf9, 0x4a, 0x01], "vpsubw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xf9, 0xca], "vpsubw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfb, 0x0a], "vpsubq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfb, 0xca], "vpsubq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfc, 0x0a], "vpaddb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfc, 0x4a, 0x01], "vpaddb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfc, 0xca], "vpaddb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfd, 0x0a], "vpaddw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfd, 0x4a, 0x01], "vpaddw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0x8d, 0xfd, 0xca], "vpaddw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x14, 0x0a], "vunpcklpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x15, 0x0a], "vunpckhpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x51, 0x0a], "vsqrtpd xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x54, 0x0a], "vandpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x55, 0x0a], "vandnpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x56, 0x0a], "vorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x57, 0x0a], "vxorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x58, 0x0a], "vaddpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x58, 0xca], "vaddpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x59, 0x0a], "vmulpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x59, 0xca], "vmulpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5c, 0x0a], "vsubpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5d, 0x0a], "vminpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5e, 0x0a], "vdivpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5f, 0x0a], "vmaxpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xd4, 0x0a], "vpaddq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xdb, 0x0a], "vpandq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xdf, 0x0a], "vpandnq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xeb, 0x0a], "vporq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xef, 0x0a], "vpxorq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xf4, 0x0a], "vpmuludq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xfb, 0x0a], "vpsubq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0x9d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x10, 0x0a], "vmovupd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x10, 0x4a, 0x01], "vmovupd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x10, 0xca], "vmovupd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x11, 0xca], "vmovupd ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x14, 0x0a], "vunpcklpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x14, 0xca], "vunpcklpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x15, 0x0a], "vunpckhpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x15, 0xca], "vunpckhpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x28, 0x0a], "vmovapd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x28, 0x4a, 0x01], "vmovapd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x28, 0xca], "vmovapd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x29, 0xca], "vmovapd ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x51, 0x0a], "vsqrtpd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x51, 0xca], "vsqrtpd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x54, 0x0a], "vandpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x54, 0xca], "vandpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x55, 0x0a], "vandnpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x55, 0xca], "vandnpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x56, 0x0a], "vorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x56, 0xca], "vorpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x57, 0x0a], "vxorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x57, 0xca], "vxorpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x58, 0x0a], "vaddpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x58, 0xca], "vaddpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x59, 0x0a], "vmulpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x59, 0xca], "vmulpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5c, 0x0a], "vsubpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5c, 0xca], "vsubpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5d, 0x0a], "vminpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5d, 0xca], "vminpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5e, 0x0a], "vdivpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5e, 0xca], "vdivpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5f, 0x0a], "vmaxpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x5f, 0xca], "vmaxpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x60, 0x0a], "vpunpcklbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x60, 0x4a, 0x01], "vpunpcklbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x60, 0xca], "vpunpcklbw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x61, 0x0a], "vpunpcklwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x61, 0x4a, 0x01], "vpunpcklwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x61, 0xca], "vpunpcklwd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x63, 0x0a], "vpacksswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x63, 0x4a, 0x01], "vpacksswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x63, 0xca], "vpacksswb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x67, 0x0a], "vpackuswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x67, 0x4a, 0x01], "vpackuswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x67, 0xca], "vpackuswb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x68, 0x0a], "vpunpckhbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x68, 0x4a, 0x01], "vpunpckhbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x68, 0xca], "vpunpckhbw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x69, 0x0a], "vpunpckhwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x69, 0x4a, 0x01], "vpunpckhwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x69, 0xca], "vpunpckhwd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6c, 0xca], "vpunpcklqdq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6d, 0xca], "vpunpckhqdq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6f, 0x0a], "vmovdqa64 ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6f, 0x4a, 0x01], "vmovdqa64 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x6f, 0xca], "vmovdqa64 ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x72, 0xca, 0xcc], "vprolq ymm0{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x78, 0xca], "vcvttpd2uqq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x79, 0xca], "vcvtpd2uqq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7a, 0xca], "vcvttpd2qq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7b, 0xca], "vcvtpd2qq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0x7f, 0xca], "vmovdqa64 ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xc6, 0xca, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd1, 0x0a], "vpsrlw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd1, 0x4a, 0x01], "vpsrlw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd1, 0xca], "vpsrlw ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd3, 0x0a], "vpsrlq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd3, 0x4a, 0x01], "vpsrlq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd3, 0xca], "vpsrlq ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd4, 0x0a], "vpaddq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd4, 0xca], "vpaddq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd5, 0x0a], "vpmullw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd5, 0x4a, 0x01], "vpmullw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd5, 0xca], "vpmullw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd8, 0x0a], "vpsubusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd8, 0x4a, 0x01], "vpsubusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd8, 0xca], "vpsubusb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd9, 0x0a], "vpsubusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd9, 0x4a, 0x01], "vpsubusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xd9, 0xca], "vpsubusw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xda, 0x0a], "vpminub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xda, 0x4a, 0x01], "vpminub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xda, 0xca], "vpminub ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdb, 0x0a], "vpandq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdb, 0xca], "vpandq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdc, 0x0a], "vpaddusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdc, 0x4a, 0x01], "vpaddusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdc, 0xca], "vpaddusb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdd, 0x0a], "vpaddusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdd, 0x4a, 0x01], "vpaddusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdd, 0xca], "vpaddusw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xde, 0x0a], "vpmaxub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xde, 0x4a, 0x01], "vpmaxub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xde, 0xca], "vpmaxub ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdf, 0x0a], "vpandnq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xdf, 0xca], "vpandnq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe0, 0x0a], "vpavgb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe0, 0x4a, 0x01], "vpavgb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe0, 0xca], "vpavgb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe1, 0x0a], "vpsraw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe1, 0x4a, 0x01], "vpsraw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe1, 0xca], "vpsraw ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe2, 0x0a], "vpsraq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe2, 0x4a, 0x01], "vpsraq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe2, 0xca], "vpsraq ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe3, 0x0a], "vpavgw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe3, 0x4a, 0x01], "vpavgw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe3, 0xca], "vpavgw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe4, 0x0a], "vpmulhuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe4, 0x4a, 0x01], "vpmulhuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe4, 0xca], "vpmulhuw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe5, 0x0a], "vpmulhw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe5, 0x4a, 0x01], "vpmulhw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe5, 0xca], "vpmulhw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe8, 0x0a], "vpsubsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe8, 0x4a, 0x01], "vpsubsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe8, 0xca], "vpsubsb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe9, 0x0a], "vpsubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe9, 0x4a, 0x01], "vpsubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xe9, 0xca], "vpsubsw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xea, 0x0a], "vpminsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xea, 0x4a, 0x01], "vpminsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xea, 0xca], "vpminsw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xeb, 0x0a], "vporq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xeb, 0xca], "vporq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xec, 0x0a], "vpaddsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xec, 0x4a, 0x01], "vpaddsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xec, 0xca], "vpaddsb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xed, 0x0a], "vpaddsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xed, 0x4a, 0x01], "vpaddsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xed, 0xca], "vpaddsw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xee, 0x0a], "vpmaxsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xee, 0x4a, 0x01], "vpmaxsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xee, 0xca], "vpmaxsw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xef, 0x0a], "vpxorq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xef, 0xca], "vpxorq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf1, 0x0a], "vpsllw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf1, 0x4a, 0x01], "vpsllw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf1, 0xca], "vpsllw ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf3, 0x0a], "vpsllq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf3, 0x4a, 0x01], "vpsllq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf3, 0xca], "vpsllq ymm1{k5}{z}, ymm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf4, 0x0a], "vpmuludq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf4, 0xca], "vpmuludq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf5, 0x0a], "vpmaddwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf5, 0x4a, 0x01], "vpmaddwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf5, 0xca], "vpmaddwd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf8, 0x0a], "vpsubb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf8, 0x4a, 0x01], "vpsubb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf8, 0xca], "vpsubb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf9, 0x0a], "vpsubw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf9, 0x4a, 0x01], "vpsubw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xf9, 0xca], "vpsubw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfb, 0x0a], "vpsubq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfb, 0xca], "vpsubq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfc, 0x0a], "vpaddb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfc, 0x4a, 0x01], "vpaddb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfc, 0xca], "vpaddb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfd, 0x0a], "vpaddw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfd, 0x4a, 0x01], "vpaddw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xad, 0xfd, 0xca], "vpaddw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x14, 0x0a], "vunpcklpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x15, 0x0a], "vunpckhpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x51, 0x0a], "vsqrtpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x54, 0x0a], "vandpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x55, 0x0a], "vandnpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x56, 0x0a], "vorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x57, 0x0a], "vxorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x58, 0x0a], "vaddpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x58, 0xca], "vaddpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x59, 0x0a], "vmulpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x59, 0xca], "vmulpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5c, 0x0a], "vsubpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5d, 0x0a], "vminpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5e, 0x0a], "vdivpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5f, 0x0a], "vmaxpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xd4, 0x0a], "vpaddq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xdb, 0x0a], "vpandq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xdf, 0x0a], "vpandnq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xeb, 0x0a], "vporq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xef, 0x0a], "vpxorq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xf4, 0x0a], "vpmuludq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xfb, 0x0a], "vpsubq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xbd, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x10, 0x0a], "vmovupd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x10, 0x4a, 0x01], "vmovupd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x10, 0xca], "vmovupd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x11, 0xca], "vmovupd zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x14, 0x0a], "vunpcklpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x14, 0xca], "vunpcklpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x15, 0x0a], "vunpckhpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x15, 0xca], "vunpckhpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x28, 0x0a], "vmovapd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x28, 0x4a, 0x01], "vmovapd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x28, 0xca], "vmovapd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x29, 0xca], "vmovapd zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x51, 0x0a], "vsqrtpd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x54, 0x0a], "vandpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x54, 0xca], "vandpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x55, 0x0a], "vandnpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x55, 0xca], "vandnpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x56, 0x0a], "vorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x56, 0xca], "vorpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x57, 0x0a], "vxorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x57, 0xca], "vxorpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x58, 0x0a], "vaddpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x58, 0xca], "vaddpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x59, 0x0a], "vmulpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x59, 0xca], "vmulpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5c, 0x0a], "vsubpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5d, 0x0a], "vminpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5d, 0xca], "vminpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5e, 0x0a], "vdivpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5f, 0x0a], "vmaxpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x5f, 0xca], "vmaxpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x60, 0x0a], "vpunpcklbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x60, 0x4a, 0x01], "vpunpcklbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x60, 0xca], "vpunpcklbw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x61, 0x0a], "vpunpcklwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x61, 0x4a, 0x01], "vpunpcklwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x61, 0xca], "vpunpcklwd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x63, 0x0a], "vpacksswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x63, 0x4a, 0x01], "vpacksswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x63, 0xca], "vpacksswb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x67, 0x0a], "vpackuswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x67, 0x4a, 0x01], "vpackuswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x67, 0xca], "vpackuswb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x68, 0x0a], "vpunpckhbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x68, 0x4a, 0x01], "vpunpckhbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x68, 0xca], "vpunpckhbw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x69, 0x0a], "vpunpckhwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x69, 0x4a, 0x01], "vpunpckhwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x69, 0xca], "vpunpckhwd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6c, 0xca], "vpunpcklqdq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6d, 0xca], "vpunpckhqdq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6f, 0x0a], "vmovdqa64 zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqa64 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x6f, 0xca], "vmovdqa64 zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x72, 0xca, 0xcc], "vprolq zmm0{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0x7f, 0xca], "vmovdqa64 zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xc6, 0xca, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd1, 0x0a], "vpsrlw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd1, 0x4a, 0x01], "vpsrlw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd1, 0xca], "vpsrlw zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd3, 0x0a], "vpsrlq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd3, 0x4a, 0x01], "vpsrlq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd3, 0xca], "vpsrlq zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd4, 0x0a], "vpaddq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd4, 0xca], "vpaddq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd5, 0x0a], "vpmullw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd5, 0x4a, 0x01], "vpmullw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd5, 0xca], "vpmullw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd8, 0x0a], "vpsubusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd8, 0x4a, 0x01], "vpsubusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd8, 0xca], "vpsubusb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd9, 0x0a], "vpsubusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd9, 0x4a, 0x01], "vpsubusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xd9, 0xca], "vpsubusw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xda, 0x0a], "vpminub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xda, 0x4a, 0x01], "vpminub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xda, 0xca], "vpminub zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdb, 0x0a], "vpandq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdb, 0xca], "vpandq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdc, 0x0a], "vpaddusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdc, 0x4a, 0x01], "vpaddusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdc, 0xca], "vpaddusb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdd, 0x0a], "vpaddusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdd, 0x4a, 0x01], "vpaddusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdd, 0xca], "vpaddusw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xde, 0x0a], "vpmaxub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xde, 0x4a, 0x01], "vpmaxub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xde, 0xca], "vpmaxub zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdf, 0x0a], "vpandnq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xdf, 0xca], "vpandnq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe0, 0x0a], "vpavgb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe0, 0x4a, 0x01], "vpavgb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe0, 0xca], "vpavgb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe1, 0x0a], "vpsraw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe1, 0x4a, 0x01], "vpsraw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe1, 0xca], "vpsraw zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe2, 0x0a], "vpsraq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe2, 0x4a, 0x01], "vpsraq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe2, 0xca], "vpsraq zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe3, 0x0a], "vpavgw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe3, 0x4a, 0x01], "vpavgw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe3, 0xca], "vpavgw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe4, 0x0a], "vpmulhuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe4, 0x4a, 0x01], "vpmulhuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe4, 0xca], "vpmulhuw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe5, 0x0a], "vpmulhw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe5, 0x4a, 0x01], "vpmulhw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe5, 0xca], "vpmulhw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe8, 0x0a], "vpsubsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe8, 0x4a, 0x01], "vpsubsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe8, 0xca], "vpsubsb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe9, 0x0a], "vpsubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe9, 0x4a, 0x01], "vpsubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xe9, 0xca], "vpsubsw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xea, 0x0a], "vpminsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xea, 0x4a, 0x01], "vpminsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xea, 0xca], "vpminsw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xeb, 0x0a], "vporq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xeb, 0xca], "vporq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xec, 0x0a], "vpaddsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xec, 0x4a, 0x01], "vpaddsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xec, 0xca], "vpaddsb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xed, 0x0a], "vpaddsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xed, 0x4a, 0x01], "vpaddsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xed, 0xca], "vpaddsw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xee, 0x0a], "vpmaxsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xee, 0x4a, 0x01], "vpmaxsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xee, 0xca], "vpmaxsw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xef, 0x0a], "vpxorq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xef, 0xca], "vpxorq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf1, 0x0a], "vpsllw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf1, 0x4a, 0x01], "vpsllw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf1, 0xca], "vpsllw zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf3, 0x0a], "vpsllq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf3, 0x4a, 0x01], "vpsllq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf3, 0xca], "vpsllq zmm1{k5}{z}, zmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf4, 0x0a], "vpmuludq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf4, 0xca], "vpmuludq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf5, 0x0a], "vpmaddwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf5, 0x4a, 0x01], "vpmaddwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf5, 0xca], "vpmaddwd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf8, 0x0a], "vpsubb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf8, 0x4a, 0x01], "vpsubb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf8, 0xca], "vpsubb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf9, 0x0a], "vpsubw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf9, 0x4a, 0x01], "vpsubw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xf9, 0xca], "vpsubw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfb, 0x0a], "vpsubq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfb, 0xca], "vpsubq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfc, 0x0a], "vpaddb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfc, 0x4a, 0x01], "vpaddb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfc, 0xca], "vpaddb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfd, 0x0a], "vpaddw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfd, 0x4a, 0x01], "vpaddw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfd, 0xcd, 0xfd, 0xca], "vpaddw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x14, 0x0a], "vunpcklpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x15, 0x0a], "vunpckhpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x51, 0x0a], "vsqrtpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x54, 0x0a], "vandpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x55, 0x0a], "vandnpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x56, 0x0a], "vorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x57, 0x0a], "vxorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x58, 0x0a], "vaddpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x58, 0xca], "vaddpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x59, 0x0a], "vmulpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x59, 0xca], "vmulpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5c, 0x0a], "vsubpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5d, 0x0a], "vminpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5e, 0x0a], "vdivpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5f, 0x0a], "vmaxpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xd4, 0x0a], "vpaddq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xdb, 0x0a], "vpandq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xdf, 0x0a], "vpandnq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xeb, 0x0a], "vporq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xef, 0x0a], "vpxorq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xf4, 0x0a], "vpmuludq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xfb, 0x0a], "vpsubq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xdd, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x58, 0xca], "vaddpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x59, 0xca], "vmulpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x5d, 0xca], "vminpd zmm1{k5}{z}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x5f, 0xca], "vmaxpd zmm1{k5}{z}{sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfd, 0xfd, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x6f, 0x0a], "vmovdqu64 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu64 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x6f, 0xca], "vmovdqu64 xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x70, 0x0a, 0xcc], "vpshufhw xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x70, 0xca, 0xcc], "vpshufhw xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7a, 0x0a], "vcvtuqq2pd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7a, 0xca], "vcvtuqq2pd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7e, 0x0a], "vmovq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7e, 0x4a, 0x01], "vmovq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7e, 0xca], "vmovq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7f, 0x0a], "vmovdqu64 xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu64 xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0x7f, 0xca], "vmovdqu64 xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0xe6, 0x0a], "vcvtqq2pd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x08, 0xe6, 0xca], "vcvtqq2pd xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x6f, 0x0a], "vmovdqu64 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu64 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x6f, 0xca], "vmovdqu64 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x70, 0x0a, 0xcc], "vpshufhw xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x70, 0xca, 0xcc], "vpshufhw xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x7a, 0xca], "vcvtuqq2pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x7f, 0x0a], "vmovdqu64 xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu64 xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0x7f, 0xca], "vmovdqu64 xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x0d, 0xe6, 0xca], "vcvtqq2pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x2a, 0xca], "vcvtsi2ss xmm1{rn-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x2d, 0xca], "vcvtss2si ecx{rn-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x79, 0xca], "vcvtss2usi ecx{rn-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x7a, 0x0a], "vcvtuqq2pd xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x7a, 0xca], "vcvtuqq2pd zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0x7b, 0xca], "vcvtusi2ss xmm1{rn-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0xe6, 0x0a], "vcvtqq2pd xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x18, 0xe6, 0xca], "vcvtqq2pd zmm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x1d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x1d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x1d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x1d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x1d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x1d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2a, 0x0a], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2a, 0x4a, 0x01], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2c, 0x0a], "vcvttss2si ecx, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2c, 0x4a, 0x01], "vcvttss2si ecx, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2c, 0xca], "vcvttss2si ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2d, 0x0a], "vcvtss2si ecx, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2d, 0x4a, 0x01], "vcvtss2si ecx, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x2d, 0xca], "vcvtss2si ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x6f, 0x0a], "vmovdqu64 ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu64 ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x6f, 0xca], "vmovdqu64 ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x70, 0x0a, 0xcc], "vpshufhw ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x70, 0xca, 0xcc], "vpshufhw ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x78, 0x0a], "vcvttss2usi ecx, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x78, 0x4a, 0x01], "vcvttss2usi ecx, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x78, 0xca], "vcvttss2usi ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x79, 0x0a], "vcvtss2usi ecx, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x79, 0x4a, 0x01], "vcvtss2usi ecx, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x79, 0xca], "vcvtss2usi ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7a, 0x0a], "vcvtuqq2pd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7a, 0xca], "vcvtuqq2pd ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7b, 0x0a], "vcvtusi2ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7b, 0x4a, 0x01], "vcvtusi2ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7b, 0xca], "vcvtusi2ss xmm1, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7f, 0x0a], "vmovdqu64 ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu64 ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0x7f, 0xca], "vmovdqu64 ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0xe6, 0x0a], "vcvtqq2pd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x28, 0xe6, 0xca], "vcvtqq2pd ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x6f, 0x0a], "vmovdqu64 ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu64 ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x6f, 0xca], "vmovdqu64 ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x70, 0x0a, 0xcc], "vpshufhw ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x70, 0xca, 0xcc], "vpshufhw ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x7a, 0xca], "vcvtuqq2pd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x7f, 0x0a], "vmovdqu64 ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu64 ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0x7f, 0xca], "vmovdqu64 ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x2d, 0xe6, 0xca], "vcvtqq2pd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x2a, 0xca], "vcvtsi2ss xmm1{rd-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x2d, 0xca], "vcvtss2si ecx{rd-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x79, 0xca], "vcvtss2usi ecx{rd-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x7a, 0x0a], "vcvtuqq2pd ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x7a, 0xca], "vcvtuqq2pd zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0x7b, 0xca], "vcvtusi2ss xmm1{rd-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0xe6, 0x0a], "vcvtqq2pd ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x38, 0xe6, 0xca], "vcvtqq2pd zmm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x3d, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x3d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x3d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x3d, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x3d, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x3d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x6f, 0x0a], "vmovdqu64 zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu64 zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x6f, 0xca], "vmovdqu64 zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x70, 0x0a, 0xcc], "vpshufhw zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x70, 0xca, 0xcc], "vpshufhw zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x7a, 0x0a], "vcvtuqq2pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x7a, 0xca], "vcvtuqq2pd zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x7f, 0x0a], "vmovdqu64 zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu64 zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0x7f, 0xca], "vmovdqu64 zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0xe6, 0x0a], "vcvtqq2pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x48, 0xe6, 0xca], "vcvtqq2pd zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x6f, 0x0a], "vmovdqu64 zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu64 zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x6f, 0xca], "vmovdqu64 zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x70, 0x0a, 0xcc], "vpshufhw zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x70, 0xca, 0xcc], "vpshufhw zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x7f, 0x0a], "vmovdqu64 zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu64 zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0x7f, 0xca], "vmovdqu64 zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x4d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x2a, 0xca], "vcvtsi2ss xmm1{ru-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x2d, 0xca], "vcvtss2si ecx{ru-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x79, 0xca], "vcvtss2usi ecx{ru-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x7a, 0x0a], "vcvtuqq2pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x7a, 0xca], "vcvtuqq2pd zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0x7b, 0xca], "vcvtusi2ss xmm1{ru-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0xe6, 0x0a], "vcvtqq2pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x58, 0xe6, 0xca], "vcvtqq2pd zmm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x5d, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x5d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x5d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x5d, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x5d, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x5d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x2a, 0xca], "vcvtsi2ss xmm1{rz-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x2c, 0xca], "vcvttss2si ecx{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x2d, 0xca], "vcvtss2si ecx{rz-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x78, 0xca], "vcvttss2usi ecx{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x79, 0xca], "vcvtss2usi ecx{rz-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x7a, 0xca], "vcvtuqq2pd zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0x7b, 0xca], "vcvtusi2ss xmm1{rz-sae}, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xfe, 0x78, 0xe6, 0xca], "vcvtqq2pd zmm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x7d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x7d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x6f, 0x0a], "vmovdqu64 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu64 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x6f, 0xca], "vmovdqu64 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x70, 0x0a, 0xcc], "vpshufhw xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x70, 0xca, 0xcc], "vpshufhw xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x7a, 0xca], "vcvtuqq2pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0x7f, 0xca], "vmovdqu64 xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xfe, 0x8d, 0xe6, 0xca], "vcvtqq2pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x9d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x9d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x9d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0x9d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x9d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xfe, 0x9d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x6f, 0x0a], "vmovdqu64 ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu64 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x6f, 0xca], "vmovdqu64 ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x70, 0x0a, 0xcc], "vpshufhw ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x70, 0xca, 0xcc], "vpshufhw ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x7a, 0xca], "vcvtuqq2pd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0x7f, 0xca], "vmovdqu64 ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xad, 0xe6, 0xca], "vcvtqq2pd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xbd, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xbd, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xbd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xbd, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xbd, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xbd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x6f, 0x0a], "vmovdqu64 zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu64 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x6f, 0xca], "vmovdqu64 zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x70, 0x0a, 0xcc], "vpshufhw zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x70, 0xca, 0xcc], "vpshufhw zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0x7f, 0xca], "vmovdqu64 zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xfe, 0xcd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xdd, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xdd, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xdd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xdd, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xdd, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xfe, 0xdd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xfd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xfe, 0xfd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x12, 0x0a], "vmovddup xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x12, 0x4a, 0x01], "vmovddup xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x12, 0xca], "vmovddup xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x6f, 0x0a], "vmovdqu16 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu16 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x6f, 0xca], "vmovdqu16 xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x70, 0x0a, 0xcc], "vpshuflw xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x70, 0xca, 0xcc], "vpshuflw xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x7a, 0x0a], "vcvtuqq2ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x7a, 0xca], "vcvtuqq2ps xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x7f, 0x0a], "vmovdqu16 xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu16 xmmword [bp + si * 1 + 0x10], xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0x7f, 0xca], "vmovdqu16 xmm2, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0xe6, 0x0a], "vcvtpd2dq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x08, 0xe6, 0xca], "vcvtpd2dq xmm1, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x12, 0x0a], "vmovddup xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x12, 0x4a, 0x01], "vmovddup xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x12, 0xca], "vmovddup xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x6f, 0x0a], "vmovdqu16 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu16 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x6f, 0xca], "vmovdqu16 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x70, 0x0a, 0xcc], "vpshuflw xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x70, 0xca, 0xcc], "vpshuflw xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x7f, 0x0a], "vmovdqu16 xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu16 xmmword [bp + si * 1 + 0x10]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0x7f, 0xca], "vmovdqu16 xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x0d, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x2d, 0xca], "vcvtsd2si ecx{rn-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x51, 0xca], "vsqrtsd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x58, 0xca], "vaddsd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x59, 0xca], "vmulsd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x5a, 0xca], "vcvtsd2ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x5c, 0xca], "vsubsd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x5e, 0xca], "vdivsd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x79, 0xca], "vcvtsd2usi ecx{rn-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x7a, 0x0a], "vcvtuqq2ps xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0x7a, 0xca], "vcvtuqq2ps ymm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0xe6, 0x0a], "vcvtpd2dq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x18, 0xe6, 0xca], "vcvtpd2dq ymm1{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x51, 0xca], "vsqrtsd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x58, 0xca], "vaddsd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x59, 0xca], "vmulsd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x5c, 0xca], "vsubsd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x5e, 0xca], "vdivsd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x1d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x10, 0x0a], "vmovsd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x10, 0x4a, 0x01], "vmovsd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x10, 0xca], "vmovsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x11, 0x0a], "vmovsd qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x11, 0x4a, 0x01], "vmovsd qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x11, 0xca], "vmovsd xmm2, xmm0, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x12, 0x0a], "vmovddup ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x12, 0x4a, 0x01], "vmovddup ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x12, 0xca], "vmovddup ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2a, 0x0a], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2a, 0x4a, 0x01], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2c, 0x4a, 0x01], "vcvttsd2si ecx, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2c, 0xca], "vcvttsd2si ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2d, 0x4a, 0x01], "vcvtsd2si ecx, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x2d, 0xca], "vcvtsd2si ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x51, 0x0a], "vsqrtsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x51, 0x4a, 0x01], "vsqrtsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x51, 0xca], "vsqrtsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x58, 0x0a], "vaddsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x58, 0x4a, 0x01], "vaddsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x58, 0xca], "vaddsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x59, 0x0a], "vmulsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x59, 0x4a, 0x01], "vmulsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x59, 0xca], "vmulsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5a, 0x0a], "vcvtsd2ss xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5a, 0x4a, 0x01], "vcvtsd2ss xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5a, 0xca], "vcvtsd2ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5c, 0x0a], "vsubsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5c, 0x4a, 0x01], "vsubsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5c, 0xca], "vsubsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5d, 0x0a], "vminsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5d, 0x4a, 0x01], "vminsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5d, 0xca], "vminsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5e, 0x0a], "vdivsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5e, 0x4a, 0x01], "vdivsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5e, 0xca], "vdivsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5f, 0x0a], "vmaxsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5f, 0x4a, 0x01], "vmaxsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x5f, 0xca], "vmaxsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x6f, 0x0a], "vmovdqu16 ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu16 ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x6f, 0xca], "vmovdqu16 ymm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x70, 0x0a, 0xcc], "vpshuflw ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x70, 0xca, 0xcc], "vpshuflw ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x78, 0x0a], "vcvttsd2usi ecx, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x78, 0x4a, 0x01], "vcvttsd2usi ecx, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x78, 0xca], "vcvttsd2usi ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x79, 0x0a], "vcvtsd2usi ecx, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x79, 0x4a, 0x01], "vcvtsd2usi ecx, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x79, 0xca], "vcvtsd2usi ecx, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7a, 0x0a], "vcvtuqq2ps xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7a, 0xca], "vcvtuqq2ps xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7b, 0x0a], "vcvtusi2sd xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7b, 0x4a, 0x01], "vcvtusi2sd xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7f, 0x0a], "vmovdqu16 ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu16 ymmword [bp + si * 1 + 0x20], ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0x7f, 0xca], "vmovdqu16 ymm2, ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0xc2, 0x0a, 0xcc], "vcmpsd k1, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmpsd k1, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0xc2, 0xca, 0xcc], "vcmpsd k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0xe6, 0x0a], "vcvtpd2dq xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x28, 0xe6, 0xca], "vcvtpd2dq xmm1, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x10, 0x0a], "vmovsd xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x10, 0x4a, 0x01], "vmovsd xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x10, 0xca], "vmovsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x11, 0x0a], "vmovsd qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x11, 0x4a, 0x01], "vmovsd qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x11, 0xca], "vmovsd xmm2{k5}, xmm0, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x12, 0x0a], "vmovddup ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x12, 0x4a, 0x01], "vmovddup ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x12, 0xca], "vmovddup ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x51, 0x0a], "vsqrtsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x51, 0x4a, 0x01], "vsqrtsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x51, 0xca], "vsqrtsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x58, 0x0a], "vaddsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x58, 0x4a, 0x01], "vaddsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x58, 0xca], "vaddsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x59, 0x0a], "vmulsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x59, 0x4a, 0x01], "vmulsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x59, 0xca], "vmulsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5a, 0x0a], "vcvtsd2ss xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5a, 0x4a, 0x01], "vcvtsd2ss xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5c, 0x0a], "vsubsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5c, 0x4a, 0x01], "vsubsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5c, 0xca], "vsubsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5d, 0x0a], "vminsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5d, 0x4a, 0x01], "vminsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5d, 0xca], "vminsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5e, 0x0a], "vdivsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5e, 0x4a, 0x01], "vdivsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5e, 0xca], "vdivsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5f, 0x0a], "vmaxsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5f, 0x4a, 0x01], "vmaxsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x5f, 0xca], "vmaxsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x6f, 0x0a], "vmovdqu16 ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu16 ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x6f, 0xca], "vmovdqu16 ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x70, 0x0a, 0xcc], "vpshuflw ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x70, 0xca, 0xcc], "vpshuflw ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x7f, 0x0a], "vmovdqu16 ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu16 ymmword [bp + si * 1 + 0x20]{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0x7f, 0xca], "vmovdqu16 ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0xc2, 0x0a, 0xcc], "vcmpsd k1{k5}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpsd k1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0xc2, 0xca, 0xcc], "vcmpsd k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0x2d, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x2d, 0xca], "vcvtsd2si ecx{rd-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x51, 0xca], "vsqrtsd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x58, 0xca], "vaddsd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x59, 0xca], "vmulsd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x5a, 0xca], "vcvtsd2ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x5c, 0xca], "vsubsd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x5e, 0xca], "vdivsd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x79, 0xca], "vcvtsd2usi ecx{rd-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x7a, 0x0a], "vcvtuqq2ps xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0x7a, 0xca], "vcvtuqq2ps ymm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0xe6, 0x0a], "vcvtpd2dq xmm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x38, 0xe6, 0xca], "vcvtpd2dq ymm1{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x51, 0xca], "vsqrtsd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x58, 0xca], "vaddsd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x59, 0xca], "vmulsd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x5c, 0xca], "vsubsd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x5e, 0xca], "vdivsd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0x3d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x12, 0x0a], "vmovddup zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x12, 0x4a, 0x01], "vmovddup zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x12, 0xca], "vmovddup zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x6f, 0x0a], "vmovdqu16 zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu16 zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x6f, 0xca], "vmovdqu16 zmm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x70, 0x0a, 0xcc], "vpshuflw zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x70, 0xca, 0xcc], "vpshuflw zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x7a, 0x0a], "vcvtuqq2ps ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x7a, 0xca], "vcvtuqq2ps ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x7f, 0x0a], "vmovdqu16 zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu16 zmmword [bp + si * 1 + 0x40], zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0x7f, 0xca], "vmovdqu16 zmm2, zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0xe6, 0x0a], "vcvtpd2dq ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x48, 0xe6, 0xca], "vcvtpd2dq ymm1, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x12, 0x0a], "vmovddup zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x12, 0x4a, 0x01], "vmovddup zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x12, 0xca], "vmovddup zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x6f, 0x0a], "vmovdqu16 zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu16 zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x6f, 0xca], "vmovdqu16 zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x70, 0x0a, 0xcc], "vpshuflw zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x70, 0xca, 0xcc], "vpshuflw zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x7f, 0x0a], "vmovdqu16 zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu16 zmmword [bp + si * 1 + 0x40]{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0x7f, 0xca], "vmovdqu16 zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0x4d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x2d, 0xca], "vcvtsd2si ecx{ru-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x51, 0xca], "vsqrtsd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x58, 0xca], "vaddsd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x59, 0xca], "vmulsd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x5a, 0xca], "vcvtsd2ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x5c, 0xca], "vsubsd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x5e, 0xca], "vdivsd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x79, 0xca], "vcvtsd2usi ecx{ru-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x7a, 0x0a], "vcvtuqq2ps ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0x7a, 0xca], "vcvtuqq2ps ymm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0xe6, 0x0a], "vcvtpd2dq ymm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x58, 0xe6, 0xca], "vcvtpd2dq ymm1{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x51, 0xca], "vsqrtsd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x58, 0xca], "vaddsd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x59, 0xca], "vmulsd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x5c, 0xca], "vsubsd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x5e, 0xca], "vdivsd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0x5d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x2c, 0xca], "vcvttsd2si ecx{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x2d, 0xca], "vcvtsd2si ecx{rz-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x51, 0xca], "vsqrtsd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x58, 0xca], "vaddsd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x59, 0xca], "vmulsd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x5a, 0xca], "vcvtsd2ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x5c, 0xca], "vsubsd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x5d, 0xca], "vminsd xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x5e, 0xca], "vdivsd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x5f, 0xca], "vmaxsd xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x78, 0xca], "vcvttsd2usi ecx{sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x79, 0xca], "vcvtsd2usi ecx{rz-sae}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x7a, 0xca], "vcvtuqq2ps ymm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0x7b, 0xca], "vcvtusi2sd xmm1, xmm0, edx");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0xc2, 0xca, 0xcc], "vcmpsd k1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x78, 0xe6, 0xca], "vcvtpd2dq ymm1{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x51, 0xca], "vsqrtsd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x58, 0xca], "vaddsd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x59, 0xca], "vmulsd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x5c, 0xca], "vsubsd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x5d, 0xca], "vminsd xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x5e, 0xca], "vdivsd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x5f, 0xca], "vmaxsd xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0xc2, 0xca, 0xcc], "vcmpsd k1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x7d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x12, 0x0a], "vmovddup xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x12, 0x4a, 0x01], "vmovddup xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x12, 0xca], "vmovddup xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x6f, 0x0a], "vmovdqu16 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu16 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x6f, 0xca], "vmovdqu16 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x70, 0x0a, 0xcc], "vpshuflw xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x70, 0xca, 0xcc], "vpshuflw xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0x7f, 0xca], "vmovdqu16 xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf1, 0xff, 0x8d, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x58, 0xca], "vaddsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x59, 0xca], "vmulsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf1, 0xff, 0x9d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{rn-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x10, 0x0a], "vmovsd xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x10, 0x4a, 0x01], "vmovsd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x10, 0xca], "vmovsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x11, 0xca], "vmovsd xmm2{k5}{z}, xmm0, xmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x12, 0x0a], "vmovddup ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x12, 0x4a, 0x01], "vmovddup ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x12, 0xca], "vmovddup ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x51, 0x0a], "vsqrtsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x51, 0x4a, 0x01], "vsqrtsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x58, 0x0a], "vaddsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x58, 0x4a, 0x01], "vaddsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x58, 0xca], "vaddsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x59, 0x0a], "vmulsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x59, 0x4a, 0x01], "vmulsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x59, 0xca], "vmulsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5a, 0x0a], "vcvtsd2ss xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5a, 0x4a, 0x01], "vcvtsd2ss xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5c, 0x0a], "vsubsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5c, 0x4a, 0x01], "vsubsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5c, 0xca], "vsubsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5d, 0x0a], "vminsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5d, 0x4a, 0x01], "vminsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5d, 0xca], "vminsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5e, 0x0a], "vdivsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5e, 0x4a, 0x01], "vdivsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5e, 0xca], "vdivsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5f, 0x0a], "vmaxsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5f, 0x4a, 0x01], "vmaxsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x5f, 0xca], "vmaxsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x6f, 0x0a], "vmovdqu16 ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu16 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x6f, 0xca], "vmovdqu16 ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x70, 0x0a, 0xcc], "vpshuflw ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x70, 0xca, 0xcc], "vpshuflw ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0x7f, 0xca], "vmovdqu16 ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf1, 0xff, 0xad, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x58, 0xca], "vaddsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x59, 0xca], "vmulsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf1, 0xff, 0xbd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{rd-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x12, 0x0a], "vmovddup zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x12, 0x4a, 0x01], "vmovddup zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x12, 0xca], "vmovddup zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x6f, 0x0a], "vmovdqu16 zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu16 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x6f, 0xca], "vmovdqu16 zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x70, 0x0a, 0xcc], "vpshuflw zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x70, 0xca, 0xcc], "vpshuflw zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0x7f, 0xca], "vmovdqu16 zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf1, 0xff, 0xcd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x58, 0xca], "vaddsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x59, 0xca], "vmulsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf1, 0xff, 0xdd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{ru-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x58, 0xca], "vaddsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x59, 0xca], "vmulsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x5d, 0xca], "vminsd xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x5f, 0xca], "vmaxsd xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf1, 0xff, 0xfd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{rz-sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x0c, 0x0a], "vpermilps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x0c, 0x4a, 0x01], "vpermilps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x0c, 0xca], "vpermilps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x13, 0x0a], "vcvtph2ps xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x13, 0x4a, 0x01], "vcvtph2ps xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x13, 0xca], "vcvtph2ps xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x14, 0x0a], "vprorvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x14, 0x4a, 0x01], "vprorvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x14, 0xca], "vprorvd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x15, 0x0a], "vprolvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x15, 0x4a, 0x01], "vprolvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x15, 0xca], "vprolvd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x18, 0x0a], "vbroadcastss xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x18, 0x4a, 0x01], "vbroadcastss xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x18, 0xca], "vbroadcastss xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x1e, 0x0a], "vpabsd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x1e, 0x4a, 0x01], "vpabsd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x1e, 0xca], "vpabsd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x25, 0x0a], "vpmovsxdq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x25, 0x4a, 0x01], "vpmovsxdq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x25, 0xca], "vpmovsxdq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x26, 0x0a], "vptestmb k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x26, 0x4a, 0x01], "vptestmb k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x26, 0xca], "vptestmb k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x27, 0x0a], "vptestmd k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x27, 0x4a, 0x01], "vptestmd k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x27, 0xca], "vptestmd k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x0a], "vmovntdqa xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x4a, 0x01], "vmovntdqa xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2b, 0x0a], "vpackusdw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2b, 0x4a, 0x01], "vpackusdw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2b, 0xca], "vpackusdw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2c, 0x0a], "vscalefps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2c, 0x4a, 0x01], "vscalefps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x2c, 0xca], "vscalefps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x35, 0x0a], "vpmovzxdq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x35, 0x4a, 0x01], "vpmovzxdq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x35, 0xca], "vpmovzxdq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x39, 0x0a], "vpminsd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x39, 0x4a, 0x01], "vpminsd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x39, 0xca], "vpminsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3b, 0x0a], "vpminud xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3b, 0x4a, 0x01], "vpminud xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3b, 0xca], "vpminud xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3d, 0x0a], "vpmaxsd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3d, 0xca], "vpmaxsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3f, 0x0a], "vpmaxud xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3f, 0x4a, 0x01], "vpmaxud xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x3f, 0xca], "vpmaxud xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x40, 0x0a], "vpmulld xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x40, 0x4a, 0x01], "vpmulld xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x40, 0xca], "vpmulld xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x42, 0x0a], "vgetexpps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x42, 0x4a, 0x01], "vgetexpps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x42, 0xca], "vgetexpps xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x44, 0x0a], "vplzcntd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x44, 0x4a, 0x01], "vplzcntd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x44, 0xca], "vplzcntd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x45, 0x0a], "vpsrlvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x45, 0x4a, 0x01], "vpsrlvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x45, 0xca], "vpsrlvd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x46, 0x0a], "vpsravd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x46, 0x4a, 0x01], "vpsravd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x46, 0xca], "vpsravd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x47, 0x0a], "vpsllvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x47, 0x4a, 0x01], "vpsllvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x47, 0xca], "vpsllvd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x4c, 0x0a], "vrcp14ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x4c, 0xca], "vrcp14ps xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x4e, 0x0a], "vrsqrt14ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x4e, 0xca], "vrsqrt14ps xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x50, 0x0a], "vpdpbusd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x50, 0x4a, 0x01], "vpdpbusd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x50, 0xca], "vpdpbusd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x51, 0x0a], "vpdpbusds xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x51, 0x4a, 0x01], "vpdpbusds xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x51, 0xca], "vpdpbusds xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x52, 0x0a], "vpdpwssd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x52, 0x4a, 0x01], "vpdpwssd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x52, 0xca], "vpdpwssd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x53, 0x0a], "vpdpwssds xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x53, 0x4a, 0x01], "vpdpwssds xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x53, 0xca], "vpdpwssds xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x54, 0x0a], "vpopcntb xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x54, 0x4a, 0x01], "vpopcntb xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x54, 0xca], "vpopcntb xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x55, 0x0a], "vpopcntd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x55, 0x4a, 0x01], "vpopcntd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x55, 0xca], "vpopcntd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x58, 0x0a], "vpbroadcastd xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x58, 0x4a, 0x01], "vpbroadcastd xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x58, 0xca], "vpbroadcastd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x59, 0x0a], "vbroadcasti32x2 xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x59, 0x4a, 0x01], "vbroadcasti32x2 xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x59, 0xca], "vbroadcasti32x2 xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x62, 0x0a], "vpexpandb xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x62, 0x4a, 0x01], "vpexpandb xmm1, xmmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x62, 0xca], "vpexpandb xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x63, 0x0a], "vpcompressb xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x63, 0x4a, 0x01], "vpcompressb xmmword [bp + si * 1 + 0x1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x63, 0xca], "vpcompressb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x64, 0x0a], "vpblendmd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x64, 0x4a, 0x01], "vpblendmd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x64, 0xca], "vpblendmd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x65, 0x0a], "vblendmps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x65, 0x4a, 0x01], "vblendmps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x65, 0xca], "vblendmps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x66, 0x0a], "vpblendmb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x66, 0x4a, 0x01], "vpblendmb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x66, 0xca], "vpblendmb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x71, 0x0a], "vpshldvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x71, 0x4a, 0x01], "vpshldvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x71, 0xca], "vpshldvd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x73, 0x0a], "vpshrdvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x73, 0x4a, 0x01], "vpshrdvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x73, 0xca], "vpshrdvd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x75, 0x0a], "vpermi2b xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x75, 0x4a, 0x01], "vpermi2b xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x75, 0xca], "vpermi2b xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x76, 0x0a], "vpermi2d xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x76, 0x4a, 0x01], "vpermi2d xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x76, 0xca], "vpermi2d xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x77, 0x0a], "vpermi2ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x77, 0x4a, 0x01], "vpermi2ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x77, 0xca], "vpermi2ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x78, 0x0a], "vpbroadcastb xmm1, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x78, 0x4a, 0x01], "vpbroadcastb xmm1, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x78, 0xca], "vpbroadcastb xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x79, 0x0a], "vpbroadcastw xmm1, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x79, 0x4a, 0x01], "vpbroadcastw xmm1, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x79, 0xca], "vpbroadcastw xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7a, 0xca], "vpbroadcastb xmm1, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7b, 0xca], "vpbroadcastw xmm1, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7d, 0x0a], "vpermt2b xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7d, 0x4a, 0x01], "vpermt2b xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7d, 0xca], "vpermt2b xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7e, 0x0a], "vpermt2d xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7e, 0x4a, 0x01], "vpermt2d xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7e, 0xca], "vpermt2d xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7f, 0x0a], "vpermt2ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x7f, 0xca], "vpermt2ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x88, 0x0a], "vexpandps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x88, 0x4a, 0x01], "vexpandps xmm1, xmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x88, 0xca], "vexpandps xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x89, 0x0a], "vpexpandd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x89, 0x4a, 0x01], "vpexpandd xmm1, xmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x89, 0xca], "vpexpandd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8a, 0x0a], "vcompressps xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8a, 0x4a, 0x01], "vcompressps xmmword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8a, 0xca], "vcompressps xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8b, 0x0a], "vpcompressd xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8b, 0x4a, 0x01], "vpcompressd xmmword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8b, 0xca], "vpcompressd xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8d, 0x0a], "vpermb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8d, 0x4a, 0x01], "vpermb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8d, 0xca], "vpermb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8f, 0x0a], "vpshufbitqmb k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x8f, 0xca], "vpshufbitqmb k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x96, 0x0a], "vfmaddsub132ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x96, 0xca], "vfmaddsub132ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x97, 0x0a], "vfmsubadd132ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x97, 0xca], "vfmsubadd132ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x98, 0x0a], "vfmadd132ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x98, 0xca], "vfmadd132ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9a, 0x0a], "vfmsub132ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9a, 0xca], "vfmsub132ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9c, 0x0a], "vfnmadd132ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9c, 0xca], "vfnmadd132ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9e, 0x0a], "vfnmsub132ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0x9e, 0xca], "vfnmsub132ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa6, 0x0a], "vfmaddsub213ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa6, 0xca], "vfmaddsub213ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa7, 0x0a], "vfmsubadd213ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa7, 0xca], "vfmsubadd213ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa8, 0x0a], "vfmadd213ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xa8, 0xca], "vfmadd213ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xaa, 0x0a], "vfmsub213ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xaa, 0xca], "vfmsub213ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xac, 0x0a], "vfnmadd213ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xac, 0xca], "vfnmadd213ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xae, 0x0a], "vfnmsub213ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xae, 0xca], "vfnmsub213ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb6, 0x0a], "vfmaddsub231ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb6, 0xca], "vfmaddsub231ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb7, 0x0a], "vfmsubadd231ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb7, 0xca], "vfmsubadd231ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb8, 0x0a], "vfmadd231ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xb8, 0xca], "vfmadd231ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xba, 0x0a], "vfmsub231ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xba, 0xca], "vfmsub231ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xbc, 0x0a], "vfnmadd231ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xbc, 0xca], "vfnmadd231ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xbe, 0x0a], "vfnmsub231ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xbe, 0xca], "vfnmsub231ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xc4, 0x0a], "vpconflictd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xc4, 0x4a, 0x01], "vpconflictd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xc4, 0xca], "vpconflictd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xcf, 0x0a], "vgf2p8mulb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xcf, 0x4a, 0x01], "vgf2p8mulb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x08, 0xcf, 0xca], "vgf2p8mulb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x0c, 0x0a], "vpermilps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x0c, 0xca], "vpermilps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x13, 0x0a], "vcvtph2ps xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x13, 0x4a, 0x01], "vcvtph2ps xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x13, 0xca], "vcvtph2ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x14, 0x0a], "vprorvd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x14, 0xca], "vprorvd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x15, 0x0a], "vprolvd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x15, 0xca], "vprolvd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x18, 0x0a], "vbroadcastss xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x18, 0x4a, 0x01], "vbroadcastss xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x18, 0xca], "vbroadcastss xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x1e, 0x0a], "vpabsd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x1e, 0xca], "vpabsd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x25, 0x0a], "vpmovsxdq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x25, 0x4a, 0x01], "vpmovsxdq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x25, 0xca], "vpmovsxdq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x26, 0x0a], "vptestmb k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x26, 0x4a, 0x01], "vptestmb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x26, 0xca], "vptestmb k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x27, 0x0a], "vptestmd k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x27, 0xca], "vptestmd k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x2b, 0x0a], "vpackusdw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x2b, 0xca], "vpackusdw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x2c, 0x0a], "vscalefps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x2c, 0xca], "vscalefps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x35, 0x0a], "vpmovzxdq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x35, 0x4a, 0x01], "vpmovzxdq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x35, 0xca], "vpmovzxdq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x39, 0x0a], "vpminsd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x39, 0xca], "vpminsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3b, 0x0a], "vpminud xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3b, 0xca], "vpminud xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3d, 0xca], "vpmaxsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3f, 0x0a], "vpmaxud xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x3f, 0xca], "vpmaxud xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x40, 0x0a], "vpmulld xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x40, 0xca], "vpmulld xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x42, 0x0a], "vgetexpps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x42, 0xca], "vgetexpps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x44, 0x0a], "vplzcntd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x44, 0xca], "vplzcntd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x45, 0x0a], "vpsrlvd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x45, 0xca], "vpsrlvd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x46, 0x0a], "vpsravd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x46, 0xca], "vpsravd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x47, 0x0a], "vpsllvd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x47, 0xca], "vpsllvd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x4c, 0xca], "vrcp14ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x4e, 0xca], "vrsqrt14ps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x50, 0x0a], "vpdpbusd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x50, 0xca], "vpdpbusd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x51, 0x0a], "vpdpbusds xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x51, 0xca], "vpdpbusds xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x52, 0x0a], "vpdpwssd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x52, 0xca], "vpdpwssd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x53, 0x0a], "vpdpwssds xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x53, 0xca], "vpdpwssds xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x54, 0x0a], "vpopcntb xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x54, 0x4a, 0x01], "vpopcntb xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x54, 0xca], "vpopcntb xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x55, 0x0a], "vpopcntd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x55, 0xca], "vpopcntd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x58, 0x0a], "vpbroadcastd xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x58, 0x4a, 0x01], "vpbroadcastd xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x58, 0xca], "vpbroadcastd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x59, 0x0a], "vbroadcasti32x2 xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x59, 0xca], "vbroadcasti32x2 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x62, 0x0a], "vpexpandb xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x62, 0x4a, 0x01], "vpexpandb xmm1{k5}, xmmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x62, 0xca], "vpexpandb xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x63, 0x0a], "vpcompressb xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x63, 0x4a, 0x01], "vpcompressb xmmword [bp + si * 1 + 0x1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x63, 0xca], "vpcompressb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x64, 0x0a], "vpblendmd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x64, 0xca], "vpblendmd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x65, 0x0a], "vblendmps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x65, 0xca], "vblendmps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x66, 0x0a], "vpblendmb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x66, 0x4a, 0x01], "vpblendmb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x66, 0xca], "vpblendmb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x71, 0x0a], "vpshldvd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x71, 0xca], "vpshldvd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x73, 0x0a], "vpshrdvd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x73, 0xca], "vpshrdvd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x75, 0x0a], "vpermi2b xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x75, 0x4a, 0x01], "vpermi2b xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x75, 0xca], "vpermi2b xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x76, 0x0a], "vpermi2d xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x76, 0xca], "vpermi2d xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x77, 0x0a], "vpermi2ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x77, 0xca], "vpermi2ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x78, 0x0a], "vpbroadcastb xmm1{k5}, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x78, 0x4a, 0x01], "vpbroadcastb xmm1{k5}, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x78, 0xca], "vpbroadcastb xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x79, 0x0a], "vpbroadcastw xmm1{k5}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x79, 0x4a, 0x01], "vpbroadcastw xmm1{k5}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x79, 0xca], "vpbroadcastw xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7a, 0xca], "vpbroadcastb xmm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7b, 0xca], "vpbroadcastw xmm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7d, 0x0a], "vpermt2b xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7d, 0x4a, 0x01], "vpermt2b xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7d, 0xca], "vpermt2b xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7e, 0x0a], "vpermt2d xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7e, 0xca], "vpermt2d xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x7f, 0xca], "vpermt2ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x88, 0x0a], "vexpandps xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x88, 0x4a, 0x01], "vexpandps xmm1{k5}, xmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x88, 0xca], "vexpandps xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x89, 0x0a], "vpexpandd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x89, 0x4a, 0x01], "vpexpandd xmm1{k5}, xmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x89, 0xca], "vpexpandd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8a, 0x0a], "vcompressps xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8a, 0x4a, 0x01], "vcompressps xmmword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8a, 0xca], "vcompressps xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8b, 0x0a], "vpcompressd xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8b, 0x4a, 0x01], "vpcompressd xmmword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8b, 0xca], "vpcompressd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8d, 0x0a], "vpermb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8d, 0x4a, 0x01], "vpermb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8d, 0xca], "vpermb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8f, 0x0a], "vpshufbitqmb k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x8f, 0xca], "vpshufbitqmb k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x96, 0xca], "vfmaddsub132ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x97, 0xca], "vfmsubadd132ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x98, 0xca], "vfmadd132ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9a, 0xca], "vfmsub132ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9c, 0xca], "vfnmadd132ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0x9e, 0xca], "vfnmsub132ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa6, 0xca], "vfmaddsub213ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa7, 0xca], "vfmsubadd213ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xa8, 0xca], "vfmadd213ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xaa, 0xca], "vfmsub213ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xac, 0xca], "vfnmadd213ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xae, 0xca], "vfnmsub213ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb6, 0xca], "vfmaddsub231ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb7, 0xca], "vfmsubadd231ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xb8, 0xca], "vfmadd231ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xba, 0xca], "vfmsub231ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xbc, 0xca], "vfnmadd231ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xbe, 0xca], "vfnmsub231ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xc4, 0x0a], "vpconflictd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xc4, 0xca], "vpconflictd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xcf, 0x0a], "vgf2p8mulb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xcf, 0x4a, 0x01], "vgf2p8mulb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x0d, 0xcf, 0xca], "vgf2p8mulb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x0c, 0x0a], "vpermilps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x0c, 0x4a, 0x01], "vpermilps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x14, 0x0a], "vprorvd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x14, 0x4a, 0x01], "vprorvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x15, 0x0a], "vprolvd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x15, 0x4a, 0x01], "vprolvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x1e, 0x0a], "vpabsd xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x1e, 0x4a, 0x01], "vpabsd xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x27, 0x0a], "vptestmd k1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x27, 0x4a, 0x01], "vptestmd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x2b, 0x0a], "vpackusdw xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x2b, 0x4a, 0x01], "vpackusdw xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x2c, 0x0a], "vscalefps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x2c, 0x4a, 0x01], "vscalefps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x2c, 0xca], "vscalefps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x2d, 0xca], "vscalefss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x39, 0x0a], "vpminsd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x39, 0x4a, 0x01], "vpminsd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x3b, 0x0a], "vpminud xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x3b, 0x4a, 0x01], "vpminud xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x3d, 0x0a], "vpmaxsd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x3f, 0x0a], "vpmaxud xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x3f, 0x4a, 0x01], "vpmaxud xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x40, 0x0a], "vpmulld xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x40, 0x4a, 0x01], "vpmulld xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x42, 0x0a], "vgetexpps xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x42, 0x4a, 0x01], "vgetexpps xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x44, 0x0a], "vplzcntd xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x44, 0x4a, 0x01], "vplzcntd xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x45, 0x0a], "vpsrlvd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x45, 0x4a, 0x01], "vpsrlvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x46, 0x0a], "vpsravd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x46, 0x4a, 0x01], "vpsravd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x47, 0x0a], "vpsllvd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x47, 0x4a, 0x01], "vpsllvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x4c, 0x0a], "vrcp14ps xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x4e, 0x0a], "vrsqrt14ps xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x50, 0x0a], "vpdpbusd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x50, 0x4a, 0x01], "vpdpbusd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x51, 0x0a], "vpdpbusds xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x51, 0x4a, 0x01], "vpdpbusds xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x52, 0x0a], "vpdpwssd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x52, 0x4a, 0x01], "vpdpwssd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x53, 0x0a], "vpdpwssds xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x53, 0x4a, 0x01], "vpdpwssds xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x55, 0x0a], "vpopcntd xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x55, 0x4a, 0x01], "vpopcntd xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x64, 0x0a], "vpblendmd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x64, 0x4a, 0x01], "vpblendmd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x65, 0x0a], "vblendmps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x65, 0x4a, 0x01], "vblendmps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x71, 0x0a], "vpshldvd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x71, 0x4a, 0x01], "vpshldvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x73, 0x0a], "vpshrdvd xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x73, 0x4a, 0x01], "vpshrdvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x76, 0x0a], "vpermi2d xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x76, 0x4a, 0x01], "vpermi2d xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x77, 0x0a], "vpermi2ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x77, 0x4a, 0x01], "vpermi2ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x7e, 0x0a], "vpermt2d xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x7e, 0x4a, 0x01], "vpermt2d xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x7f, 0x0a], "vpermt2ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x96, 0x0a], "vfmaddsub132ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x96, 0xca], "vfmaddsub132ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x97, 0x0a], "vfmsubadd132ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x97, 0xca], "vfmsubadd132ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x98, 0x0a], "vfmadd132ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x98, 0xca], "vfmadd132ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x99, 0xca], "vfmadd132ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9a, 0x0a], "vfmsub132ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9a, 0xca], "vfmsub132ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9b, 0xca], "vfmsub132ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9c, 0x0a], "vfnmadd132ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9c, 0xca], "vfnmadd132ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9d, 0xca], "vfnmadd132ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9e, 0x0a], "vfnmsub132ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9e, 0xca], "vfnmsub132ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0x9f, 0xca], "vfnmsub132ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa6, 0x0a], "vfmaddsub213ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa6, 0xca], "vfmaddsub213ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa7, 0x0a], "vfmsubadd213ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa7, 0xca], "vfmsubadd213ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa8, 0x0a], "vfmadd213ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa8, 0xca], "vfmadd213ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xa9, 0xca], "vfmadd213ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xaa, 0x0a], "vfmsub213ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xaa, 0xca], "vfmsub213ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xab, 0xca], "vfmsub213ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xac, 0x0a], "vfnmadd213ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xac, 0xca], "vfnmadd213ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xad, 0xca], "vfnmadd213ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xae, 0x0a], "vfnmsub213ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xae, 0xca], "vfnmsub213ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xaf, 0xca], "vfnmsub213ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb6, 0x0a], "vfmaddsub231ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb6, 0xca], "vfmaddsub231ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb7, 0x0a], "vfmsubadd231ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb7, 0xca], "vfmsubadd231ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb8, 0x0a], "vfmadd231ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb8, 0xca], "vfmadd231ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xb9, 0xca], "vfmadd231ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xba, 0x0a], "vfmsub231ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xba, 0xca], "vfmsub231ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbb, 0xca], "vfmsub231ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbc, 0x0a], "vfnmadd231ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbc, 0xca], "vfnmadd231ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbd, 0xca], "vfnmadd231ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbe, 0x0a], "vfnmsub231ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbe, 0xca], "vfnmsub231ps zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xbf, 0xca], "vfnmsub231ss xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xc4, 0x0a], "vpconflictd xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x18, 0xc4, 0x4a, 0x01], "vpconflictd xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x0c, 0x0a], "vpermilps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x14, 0x0a], "vprorvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x15, 0x0a], "vprolvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x1e, 0x0a], "vpabsd xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x27, 0x0a], "vptestmd k1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x2b, 0x0a], "vpackusdw xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x2c, 0x0a], "vscalefps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x2c, 0xca], "vscalefps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x2d, 0xca], "vscalefss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x39, 0x0a], "vpminsd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x3b, 0x0a], "vpminud xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x3f, 0x0a], "vpmaxud xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x40, 0x0a], "vpmulld xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x42, 0x0a], "vgetexpps xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x44, 0x0a], "vplzcntd xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x45, 0x0a], "vpsrlvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x46, 0x0a], "vpsravd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x47, 0x0a], "vpsllvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x50, 0x0a], "vpdpbusd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x51, 0x0a], "vpdpbusds xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x52, 0x0a], "vpdpwssd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x53, 0x0a], "vpdpwssds xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x55, 0x0a], "vpopcntd xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x64, 0x0a], "vpblendmd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x65, 0x0a], "vblendmps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x71, 0x0a], "vpshldvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x73, 0x0a], "vpshrdvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x76, 0x0a], "vpermi2d xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x77, 0x0a], "vpermi2ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x7e, 0x0a], "vpermt2d xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xc4, 0x0a], "vpconflictd xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x1d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x0c, 0x0a], "vpermilps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x0c, 0x4a, 0x01], "vpermilps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x0c, 0xca], "vpermilps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x13, 0x0a], "vcvtph2ps ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x13, 0x4a, 0x01], "vcvtph2ps ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x13, 0xca], "vcvtph2ps ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x14, 0x0a], "vprorvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x14, 0x4a, 0x01], "vprorvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x14, 0xca], "vprorvd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x15, 0x0a], "vprolvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x15, 0x4a, 0x01], "vprolvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x15, 0xca], "vprolvd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x16, 0x0a], "vpermps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x16, 0x4a, 0x01], "vpermps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x16, 0xca], "vpermps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x18, 0x0a], "vbroadcastss ymm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x18, 0x4a, 0x01], "vbroadcastss ymm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x18, 0xca], "vbroadcastss ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x19, 0x0a], "vbroadcastf32x2 ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x19, 0x4a, 0x01], "vbroadcastf32x2 ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x19, 0xca], "vbroadcastf32x2 ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x1a, 0x0a], "vbroadcastf32x4 ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x1e, 0x0a], "vpabsd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x1e, 0x4a, 0x01], "vpabsd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x1e, 0xca], "vpabsd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x25, 0x0a], "vpmovsxdq ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x25, 0x4a, 0x01], "vpmovsxdq ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x25, 0xca], "vpmovsxdq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x26, 0x0a], "vptestmb k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x26, 0x4a, 0x01], "vptestmb k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x26, 0xca], "vptestmb k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x27, 0x0a], "vptestmd k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x27, 0x4a, 0x01], "vptestmd k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x27, 0xca], "vptestmd k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2a, 0x0a], "vmovntdqa ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2a, 0x4a, 0x01], "vmovntdqa ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2b, 0x0a], "vpackusdw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2b, 0x4a, 0x01], "vpackusdw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2b, 0xca], "vpackusdw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2c, 0x0a], "vscalefps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2c, 0x4a, 0x01], "vscalefps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2c, 0xca], "vscalefps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2d, 0x0a], "vscalefss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2d, 0x4a, 0x01], "vscalefss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x2d, 0xca], "vscalefss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x35, 0x0a], "vpmovzxdq ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x35, 0x4a, 0x01], "vpmovzxdq ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x35, 0xca], "vpmovzxdq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x36, 0x0a], "vpermd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x36, 0x4a, 0x01], "vpermd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x36, 0xca], "vpermd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x39, 0x0a], "vpminsd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x39, 0x4a, 0x01], "vpminsd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x39, 0xca], "vpminsd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3b, 0x0a], "vpminud ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3b, 0x4a, 0x01], "vpminud ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3b, 0xca], "vpminud ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3d, 0x0a], "vpmaxsd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3d, 0xca], "vpmaxsd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3f, 0x0a], "vpmaxud ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3f, 0x4a, 0x01], "vpmaxud ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x3f, 0xca], "vpmaxud ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x40, 0x0a], "vpmulld ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x40, 0x4a, 0x01], "vpmulld ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x40, 0xca], "vpmulld ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x42, 0x0a], "vgetexpps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x42, 0x4a, 0x01], "vgetexpps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x42, 0xca], "vgetexpps ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x43, 0x0a], "vgetexpss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x43, 0x4a, 0x01], "vgetexpss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x43, 0xca], "vgetexpss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x44, 0x0a], "vplzcntd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x44, 0x4a, 0x01], "vplzcntd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x44, 0xca], "vplzcntd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x45, 0x0a], "vpsrlvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x45, 0x4a, 0x01], "vpsrlvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x45, 0xca], "vpsrlvd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x46, 0x0a], "vpsravd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x46, 0x4a, 0x01], "vpsravd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x46, 0xca], "vpsravd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x47, 0x0a], "vpsllvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x47, 0x4a, 0x01], "vpsllvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x47, 0xca], "vpsllvd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4c, 0x0a], "vrcp14ps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4c, 0xca], "vrcp14ps ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4d, 0x0a], "vrcp14ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4d, 0x4a, 0x01], "vrcp14ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4d, 0xca], "vrcp14ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4e, 0x0a], "vrsqrt14ps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4e, 0xca], "vrsqrt14ps ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4f, 0x0a], "vrsqrt14ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4f, 0x4a, 0x01], "vrsqrt14ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x4f, 0xca], "vrsqrt14ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x50, 0x0a], "vpdpbusd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x50, 0x4a, 0x01], "vpdpbusd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x50, 0xca], "vpdpbusd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x51, 0x0a], "vpdpbusds ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x51, 0x4a, 0x01], "vpdpbusds ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x51, 0xca], "vpdpbusds ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x52, 0x0a], "vpdpwssd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x52, 0x4a, 0x01], "vpdpwssd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x52, 0xca], "vpdpwssd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x53, 0x0a], "vpdpwssds ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x53, 0x4a, 0x01], "vpdpwssds ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x53, 0xca], "vpdpwssds ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x54, 0x0a], "vpopcntb ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x54, 0x4a, 0x01], "vpopcntb ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x54, 0xca], "vpopcntb ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x55, 0x0a], "vpopcntd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x55, 0x4a, 0x01], "vpopcntd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x55, 0xca], "vpopcntd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x58, 0x0a], "vpbroadcastd ymm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x58, 0x4a, 0x01], "vpbroadcastd ymm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x58, 0xca], "vpbroadcastd ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x59, 0x0a], "vbroadcasti32x2 ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x59, 0x4a, 0x01], "vbroadcasti32x2 ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x59, 0xca], "vbroadcasti32x2 ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x5a, 0x0a], "vbroadcasti32x4 ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x62, 0x0a], "vpexpandb ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x62, 0x4a, 0x01], "vpexpandb ymm1, ymmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x62, 0xca], "vpexpandb ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x63, 0x0a], "vpcompressb ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x63, 0x4a, 0x01], "vpcompressb ymmword [bp + si * 1 + 0x1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x63, 0xca], "vpcompressb ymm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x64, 0x0a], "vpblendmd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x64, 0x4a, 0x01], "vpblendmd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x64, 0xca], "vpblendmd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x65, 0x0a], "vblendmps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x65, 0x4a, 0x01], "vblendmps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x65, 0xca], "vblendmps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x66, 0x0a], "vpblendmb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x66, 0x4a, 0x01], "vpblendmb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x66, 0xca], "vpblendmb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x71, 0x0a], "vpshldvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x71, 0x4a, 0x01], "vpshldvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x71, 0xca], "vpshldvd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x73, 0x0a], "vpshrdvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x73, 0x4a, 0x01], "vpshrdvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x73, 0xca], "vpshrdvd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x75, 0x0a], "vpermi2b ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x75, 0x4a, 0x01], "vpermi2b ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x75, 0xca], "vpermi2b ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x76, 0x0a], "vpermi2d ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x76, 0x4a, 0x01], "vpermi2d ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x76, 0xca], "vpermi2d ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x77, 0x0a], "vpermi2ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x77, 0x4a, 0x01], "vpermi2ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x77, 0xca], "vpermi2ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x78, 0x0a], "vpbroadcastb ymm1, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x78, 0x4a, 0x01], "vpbroadcastb ymm1, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x78, 0xca], "vpbroadcastb ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x79, 0x0a], "vpbroadcastw ymm1, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x79, 0x4a, 0x01], "vpbroadcastw ymm1, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x79, 0xca], "vpbroadcastw ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7a, 0xca], "vpbroadcastb ymm1, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7b, 0xca], "vpbroadcastw ymm1, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7d, 0x0a], "vpermt2b ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7d, 0x4a, 0x01], "vpermt2b ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7d, 0xca], "vpermt2b ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7e, 0x0a], "vpermt2d ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7e, 0x4a, 0x01], "vpermt2d ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7e, 0xca], "vpermt2d ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7f, 0x0a], "vpermt2ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x7f, 0xca], "vpermt2ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x88, 0x0a], "vexpandps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x88, 0x4a, 0x01], "vexpandps ymm1, ymmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x88, 0xca], "vexpandps ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x89, 0x0a], "vpexpandd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x89, 0x4a, 0x01], "vpexpandd ymm1, ymmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x89, 0xca], "vpexpandd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8a, 0x0a], "vcompressps ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8a, 0x4a, 0x01], "vcompressps ymmword [bp + si * 1 + 0x4], ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8a, 0xca], "vcompressps ymm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8b, 0x0a], "vpcompressd ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8b, 0x4a, 0x01], "vpcompressd ymmword [bp + si * 1 + 0x4], ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8b, 0xca], "vpcompressd ymm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8d, 0x0a], "vpermb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8d, 0x4a, 0x01], "vpermb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8d, 0xca], "vpermb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8f, 0x0a], "vpshufbitqmb k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x8f, 0xca], "vpshufbitqmb k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x96, 0x0a], "vfmaddsub132ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x96, 0xca], "vfmaddsub132ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x97, 0x0a], "vfmsubadd132ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x97, 0xca], "vfmsubadd132ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x98, 0x0a], "vfmadd132ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x98, 0xca], "vfmadd132ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x99, 0x0a], "vfmadd132ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x99, 0x4a, 0x01], "vfmadd132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x99, 0xca], "vfmadd132ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9a, 0x0a], "vfmsub132ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9a, 0xca], "vfmsub132ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9b, 0x0a], "vfmsub132ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9b, 0x4a, 0x01], "vfmsub132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9b, 0xca], "vfmsub132ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9c, 0x0a], "vfnmadd132ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9c, 0xca], "vfnmadd132ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9d, 0x0a], "vfnmadd132ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9d, 0x4a, 0x01], "vfnmadd132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9d, 0xca], "vfnmadd132ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9e, 0x0a], "vfnmsub132ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9e, 0xca], "vfnmsub132ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9f, 0x0a], "vfnmsub132ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9f, 0x4a, 0x01], "vfnmsub132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0x9f, 0xca], "vfnmsub132ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa6, 0x0a], "vfmaddsub213ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa6, 0xca], "vfmaddsub213ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa7, 0x0a], "vfmsubadd213ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa7, 0xca], "vfmsubadd213ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa8, 0x0a], "vfmadd213ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa8, 0xca], "vfmadd213ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa9, 0x0a], "vfmadd213ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa9, 0x4a, 0x01], "vfmadd213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xa9, 0xca], "vfmadd213ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xaa, 0x0a], "vfmsub213ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xaa, 0xca], "vfmsub213ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xab, 0x0a], "vfmsub213ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xab, 0x4a, 0x01], "vfmsub213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xab, 0xca], "vfmsub213ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xac, 0x0a], "vfnmadd213ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xac, 0xca], "vfnmadd213ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xad, 0x0a], "vfnmadd213ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xad, 0x4a, 0x01], "vfnmadd213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xad, 0xca], "vfnmadd213ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xae, 0x0a], "vfnmsub213ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xae, 0xca], "vfnmsub213ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xaf, 0x0a], "vfnmsub213ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xaf, 0x4a, 0x01], "vfnmsub213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xaf, 0xca], "vfnmsub213ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb6, 0x0a], "vfmaddsub231ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb6, 0xca], "vfmaddsub231ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb7, 0x0a], "vfmsubadd231ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb7, 0xca], "vfmsubadd231ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb8, 0x0a], "vfmadd231ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb8, 0xca], "vfmadd231ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb9, 0x0a], "vfmadd231ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb9, 0x4a, 0x01], "vfmadd231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xb9, 0xca], "vfmadd231ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xba, 0x0a], "vfmsub231ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xba, 0xca], "vfmsub231ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbb, 0x0a], "vfmsub231ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbb, 0x4a, 0x01], "vfmsub231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbb, 0xca], "vfmsub231ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbc, 0x0a], "vfnmadd231ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbc, 0xca], "vfnmadd231ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbd, 0x0a], "vfnmadd231ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbd, 0x4a, 0x01], "vfnmadd231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbd, 0xca], "vfnmadd231ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbe, 0x0a], "vfnmsub231ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbe, 0xca], "vfnmsub231ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbf, 0x0a], "vfnmsub231ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbf, 0x4a, 0x01], "vfnmsub231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xbf, 0xca], "vfnmsub231ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xc4, 0x0a], "vpconflictd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xc4, 0x4a, 0x01], "vpconflictd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xc4, 0xca], "vpconflictd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcb, 0x0a], "vrcp28ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcb, 0x4a, 0x01], "vrcp28ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcb, 0xca], "vrcp28ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcd, 0x0a], "vrsqrt28ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcd, 0x4a, 0x01], "vrsqrt28ss xmm1, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcd, 0xca], "vrsqrt28ss xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcf, 0x0a], "vgf2p8mulb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcf, 0x4a, 0x01], "vgf2p8mulb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x28, 0xcf, 0xca], "vgf2p8mulb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x0c, 0x0a], "vpermilps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x0c, 0xca], "vpermilps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x13, 0x0a], "vcvtph2ps ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x13, 0x4a, 0x01], "vcvtph2ps ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x13, 0xca], "vcvtph2ps ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x14, 0x0a], "vprorvd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x14, 0xca], "vprorvd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x15, 0x0a], "vprolvd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x15, 0xca], "vprolvd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x16, 0x0a], "vpermps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x16, 0xca], "vpermps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x18, 0x0a], "vbroadcastss ymm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x18, 0x4a, 0x01], "vbroadcastss ymm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x18, 0xca], "vbroadcastss ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x19, 0x0a], "vbroadcastf32x2 ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x19, 0x4a, 0x01], "vbroadcastf32x2 ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x19, 0xca], "vbroadcastf32x2 ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x1a, 0x0a], "vbroadcastf32x4 ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x1e, 0x0a], "vpabsd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x1e, 0xca], "vpabsd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x25, 0x0a], "vpmovsxdq ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x25, 0x4a, 0x01], "vpmovsxdq ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x25, 0xca], "vpmovsxdq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x26, 0x0a], "vptestmb k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x26, 0x4a, 0x01], "vptestmb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x26, 0xca], "vptestmb k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x27, 0x0a], "vptestmd k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x27, 0xca], "vptestmd k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2b, 0x0a], "vpackusdw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2b, 0xca], "vpackusdw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2c, 0x0a], "vscalefps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2c, 0xca], "vscalefps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2d, 0x0a], "vscalefss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2d, 0x4a, 0x01], "vscalefss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x2d, 0xca], "vscalefss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x35, 0x0a], "vpmovzxdq ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x35, 0x4a, 0x01], "vpmovzxdq ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x35, 0xca], "vpmovzxdq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x36, 0x0a], "vpermd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x36, 0xca], "vpermd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x39, 0x0a], "vpminsd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x39, 0xca], "vpminsd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3b, 0x0a], "vpminud ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3b, 0xca], "vpminud ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3d, 0x0a], "vpmaxsd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3d, 0xca], "vpmaxsd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3f, 0x0a], "vpmaxud ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x3f, 0xca], "vpmaxud ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x40, 0x0a], "vpmulld ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x40, 0xca], "vpmulld ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x42, 0x0a], "vgetexpps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x42, 0xca], "vgetexpps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x43, 0x0a], "vgetexpss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x43, 0x4a, 0x01], "vgetexpss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x43, 0xca], "vgetexpss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x44, 0x0a], "vplzcntd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x44, 0xca], "vplzcntd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x45, 0x0a], "vpsrlvd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x45, 0xca], "vpsrlvd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x46, 0x0a], "vpsravd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x46, 0xca], "vpsravd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x47, 0x0a], "vpsllvd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x47, 0xca], "vpsllvd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4c, 0x0a], "vrcp14ps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4c, 0xca], "vrcp14ps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4d, 0x0a], "vrcp14ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4d, 0x4a, 0x01], "vrcp14ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4d, 0xca], "vrcp14ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4e, 0xca], "vrsqrt14ps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4f, 0x0a], "vrsqrt14ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4f, 0x4a, 0x01], "vrsqrt14ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x4f, 0xca], "vrsqrt14ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x50, 0x0a], "vpdpbusd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x50, 0xca], "vpdpbusd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x51, 0x0a], "vpdpbusds ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x51, 0xca], "vpdpbusds ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x52, 0x0a], "vpdpwssd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x52, 0xca], "vpdpwssd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x53, 0x0a], "vpdpwssds ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x53, 0xca], "vpdpwssds ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x54, 0x0a], "vpopcntb ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x54, 0x4a, 0x01], "vpopcntb ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x54, 0xca], "vpopcntb ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x55, 0x0a], "vpopcntd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x55, 0xca], "vpopcntd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x58, 0x0a], "vpbroadcastd ymm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x58, 0x4a, 0x01], "vpbroadcastd ymm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x58, 0xca], "vpbroadcastd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x59, 0x0a], "vbroadcasti32x2 ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x59, 0xca], "vbroadcasti32x2 ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x5a, 0x0a], "vbroadcasti32x4 ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x62, 0x0a], "vpexpandb ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x62, 0x4a, 0x01], "vpexpandb ymm1{k5}, ymmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x62, 0xca], "vpexpandb ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x63, 0x0a], "vpcompressb ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x63, 0x4a, 0x01], "vpcompressb ymmword [bp + si * 1 + 0x1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x63, 0xca], "vpcompressb ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x64, 0x0a], "vpblendmd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x64, 0xca], "vpblendmd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x65, 0x0a], "vblendmps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x65, 0xca], "vblendmps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x66, 0x0a], "vpblendmb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x66, 0x4a, 0x01], "vpblendmb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x66, 0xca], "vpblendmb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x71, 0x0a], "vpshldvd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x71, 0xca], "vpshldvd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x73, 0x0a], "vpshrdvd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x73, 0xca], "vpshrdvd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x75, 0x0a], "vpermi2b ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x75, 0x4a, 0x01], "vpermi2b ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x75, 0xca], "vpermi2b ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x76, 0x0a], "vpermi2d ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x76, 0xca], "vpermi2d ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x77, 0x0a], "vpermi2ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x77, 0xca], "vpermi2ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x78, 0x0a], "vpbroadcastb ymm1{k5}, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x78, 0x4a, 0x01], "vpbroadcastb ymm1{k5}, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x78, 0xca], "vpbroadcastb ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x79, 0x0a], "vpbroadcastw ymm1{k5}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x79, 0x4a, 0x01], "vpbroadcastw ymm1{k5}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x79, 0xca], "vpbroadcastw ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7a, 0xca], "vpbroadcastb ymm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7b, 0xca], "vpbroadcastw ymm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7d, 0x0a], "vpermt2b ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7d, 0x4a, 0x01], "vpermt2b ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7d, 0xca], "vpermt2b ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7e, 0x0a], "vpermt2d ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7e, 0xca], "vpermt2d ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7f, 0x0a], "vpermt2ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x7f, 0xca], "vpermt2ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x88, 0x0a], "vexpandps ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x88, 0x4a, 0x01], "vexpandps ymm1{k5}, ymmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x88, 0xca], "vexpandps ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x89, 0x0a], "vpexpandd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x89, 0x4a, 0x01], "vpexpandd ymm1{k5}, ymmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x89, 0xca], "vpexpandd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8a, 0x0a], "vcompressps ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8a, 0x4a, 0x01], "vcompressps ymmword [bp + si * 1 + 0x4]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8a, 0xca], "vcompressps ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8b, 0x0a], "vpcompressd ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8b, 0x4a, 0x01], "vpcompressd ymmword [bp + si * 1 + 0x4]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8b, 0xca], "vpcompressd ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8d, 0x0a], "vpermb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8d, 0x4a, 0x01], "vpermb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8d, 0xca], "vpermb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8f, 0x0a], "vpshufbitqmb k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x8f, 0xca], "vpshufbitqmb k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x96, 0xca], "vfmaddsub132ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x97, 0xca], "vfmsubadd132ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x98, 0x0a], "vfmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x98, 0xca], "vfmadd132ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x99, 0x0a], "vfmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x99, 0x4a, 0x01], "vfmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x99, 0xca], "vfmadd132ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9a, 0xca], "vfmsub132ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9b, 0x0a], "vfmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9b, 0x4a, 0x01], "vfmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9c, 0xca], "vfnmadd132ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9d, 0x0a], "vfnmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9d, 0x4a, 0x01], "vfnmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9e, 0xca], "vfnmsub132ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9f, 0x0a], "vfnmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9f, 0x4a, 0x01], "vfnmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa6, 0xca], "vfmaddsub213ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa7, 0xca], "vfmsubadd213ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa8, 0xca], "vfmadd213ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa9, 0x0a], "vfmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa9, 0x4a, 0x01], "vfmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xaa, 0xca], "vfmsub213ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xab, 0x0a], "vfmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xab, 0x4a, 0x01], "vfmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xab, 0xca], "vfmsub213ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xac, 0xca], "vfnmadd213ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xad, 0x0a], "vfnmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xad, 0x4a, 0x01], "vfnmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xae, 0xca], "vfnmsub213ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xaf, 0x0a], "vfnmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xaf, 0x4a, 0x01], "vfnmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb6, 0xca], "vfmaddsub231ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb7, 0xca], "vfmsubadd231ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb8, 0xca], "vfmadd231ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb9, 0x0a], "vfmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb9, 0x4a, 0x01], "vfmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xba, 0x0a], "vfmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xba, 0xca], "vfmsub231ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbb, 0x0a], "vfmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbb, 0x4a, 0x01], "vfmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbc, 0xca], "vfnmadd231ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbd, 0x0a], "vfnmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbd, 0x4a, 0x01], "vfnmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbe, 0xca], "vfnmsub231ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbf, 0x0a], "vfnmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbf, 0x4a, 0x01], "vfnmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xc4, 0x0a], "vpconflictd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xc4, 0xca], "vpconflictd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcb, 0x0a], "vrcp28ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcb, 0x4a, 0x01], "vrcp28ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcb, 0xca], "vrcp28ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcd, 0x0a], "vrsqrt28ss xmm1{k5}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcd, 0x4a, 0x01], "vrsqrt28ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcf, 0x0a], "vgf2p8mulb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcf, 0x4a, 0x01], "vgf2p8mulb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x2d, 0xcf, 0xca], "vgf2p8mulb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x0c, 0x0a], "vpermilps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x0c, 0x4a, 0x01], "vpermilps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x14, 0x0a], "vprorvd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x14, 0x4a, 0x01], "vprorvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x15, 0x0a], "vprolvd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x15, 0x4a, 0x01], "vprolvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x16, 0x0a], "vpermps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x16, 0x4a, 0x01], "vpermps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x1e, 0x0a], "vpabsd ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x1e, 0x4a, 0x01], "vpabsd ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x27, 0x0a], "vptestmd k1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x27, 0x4a, 0x01], "vptestmd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x2b, 0x0a], "vpackusdw ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x2b, 0x4a, 0x01], "vpackusdw ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x2c, 0x0a], "vscalefps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x2c, 0x4a, 0x01], "vscalefps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x2c, 0xca], "vscalefps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x2d, 0xca], "vscalefss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x36, 0x0a], "vpermd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x36, 0x4a, 0x01], "vpermd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x39, 0x0a], "vpminsd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x39, 0x4a, 0x01], "vpminsd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x3b, 0x0a], "vpminud ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x3b, 0x4a, 0x01], "vpminud ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x3d, 0x0a], "vpmaxsd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x3f, 0x0a], "vpmaxud ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x3f, 0x4a, 0x01], "vpmaxud ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x40, 0x0a], "vpmulld ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x40, 0x4a, 0x01], "vpmulld ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x42, 0x0a], "vgetexpps ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x42, 0x4a, 0x01], "vgetexpps ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x44, 0x0a], "vplzcntd ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x44, 0x4a, 0x01], "vplzcntd ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x45, 0x0a], "vpsrlvd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x45, 0x4a, 0x01], "vpsrlvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x46, 0x0a], "vpsravd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x46, 0x4a, 0x01], "vpsravd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x47, 0x0a], "vpsllvd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x47, 0x4a, 0x01], "vpsllvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x4c, 0x0a], "vrcp14ps ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x4e, 0x0a], "vrsqrt14ps ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x50, 0x0a], "vpdpbusd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x50, 0x4a, 0x01], "vpdpbusd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x51, 0x0a], "vpdpbusds ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x51, 0x4a, 0x01], "vpdpbusds ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x52, 0x0a], "vpdpwssd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x52, 0x4a, 0x01], "vpdpwssd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x53, 0x0a], "vpdpwssds ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x53, 0x4a, 0x01], "vpdpwssds ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x55, 0x0a], "vpopcntd ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x55, 0x4a, 0x01], "vpopcntd ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x64, 0x0a], "vpblendmd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x64, 0x4a, 0x01], "vpblendmd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x65, 0x0a], "vblendmps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x65, 0x4a, 0x01], "vblendmps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x71, 0x0a], "vpshldvd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x71, 0x4a, 0x01], "vpshldvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x73, 0x0a], "vpshrdvd ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x73, 0x4a, 0x01], "vpshrdvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x76, 0x0a], "vpermi2d ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x76, 0x4a, 0x01], "vpermi2d ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x77, 0x0a], "vpermi2ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x77, 0x4a, 0x01], "vpermi2ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x7e, 0x0a], "vpermt2d ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x7e, 0x4a, 0x01], "vpermt2d ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x7f, 0x0a], "vpermt2ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x96, 0x0a], "vfmaddsub132ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x96, 0xca], "vfmaddsub132ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x97, 0x0a], "vfmsubadd132ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x97, 0xca], "vfmsubadd132ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x98, 0x0a], "vfmadd132ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x98, 0xca], "vfmadd132ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x99, 0xca], "vfmadd132ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9a, 0x0a], "vfmsub132ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9a, 0xca], "vfmsub132ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9b, 0xca], "vfmsub132ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9c, 0x0a], "vfnmadd132ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9c, 0xca], "vfnmadd132ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9d, 0xca], "vfnmadd132ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9e, 0x0a], "vfnmsub132ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9e, 0xca], "vfnmsub132ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0x9f, 0xca], "vfnmsub132ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa6, 0x0a], "vfmaddsub213ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa6, 0xca], "vfmaddsub213ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa7, 0x0a], "vfmsubadd213ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa7, 0xca], "vfmsubadd213ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa8, 0x0a], "vfmadd213ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa8, 0xca], "vfmadd213ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xa9, 0xca], "vfmadd213ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xaa, 0x0a], "vfmsub213ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xaa, 0xca], "vfmsub213ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xab, 0xca], "vfmsub213ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xac, 0x0a], "vfnmadd213ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xac, 0xca], "vfnmadd213ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xad, 0xca], "vfnmadd213ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xae, 0x0a], "vfnmsub213ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xae, 0xca], "vfnmsub213ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xaf, 0xca], "vfnmsub213ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb6, 0x0a], "vfmaddsub231ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb6, 0xca], "vfmaddsub231ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb7, 0x0a], "vfmsubadd231ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb7, 0xca], "vfmsubadd231ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb8, 0x0a], "vfmadd231ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb8, 0xca], "vfmadd231ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xb9, 0xca], "vfmadd231ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xba, 0x0a], "vfmsub231ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xba, 0xca], "vfmsub231ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbb, 0xca], "vfmsub231ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbc, 0x0a], "vfnmadd231ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbc, 0xca], "vfnmadd231ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbd, 0xca], "vfnmadd231ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbe, 0x0a], "vfnmsub231ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbe, 0xca], "vfnmsub231ps zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xbf, 0xca], "vfnmsub231ss xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xc4, 0x0a], "vpconflictd ymm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x38, 0xc4, 0x4a, 0x01], "vpconflictd ymm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x0c, 0x0a], "vpermilps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x14, 0x0a], "vprorvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x15, 0x0a], "vprolvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x16, 0x0a], "vpermps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x1e, 0x0a], "vpabsd ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x27, 0x0a], "vptestmd k1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x2b, 0x0a], "vpackusdw ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x2c, 0x0a], "vscalefps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x2c, 0xca], "vscalefps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x2d, 0xca], "vscalefss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x36, 0x0a], "vpermd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x39, 0x0a], "vpminsd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x3b, 0x0a], "vpminud ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x3d, 0x0a], "vpmaxsd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x3f, 0x0a], "vpmaxud ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x40, 0x0a], "vpmulld ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x42, 0x0a], "vgetexpps ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x44, 0x0a], "vplzcntd ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x45, 0x0a], "vpsrlvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x46, 0x0a], "vpsravd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x47, 0x0a], "vpsllvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x4c, 0x0a], "vrcp14ps ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x50, 0x0a], "vpdpbusd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x51, 0x0a], "vpdpbusds ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x52, 0x0a], "vpdpwssd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x53, 0x0a], "vpdpwssds ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x55, 0x0a], "vpopcntd ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x64, 0x0a], "vpblendmd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x65, 0x0a], "vblendmps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x71, 0x0a], "vpshldvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x73, 0x0a], "vpshrdvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x76, 0x0a], "vpermi2d ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x77, 0x0a], "vpermi2ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x7e, 0x0a], "vpermt2d ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x7f, 0x0a], "vpermt2ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x98, 0x0a], "vfmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xba, 0x0a], "vfmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xc4, 0x0a], "vpconflictd ymm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x3d, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x0c, 0x0a], "vpermilps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x0c, 0x4a, 0x01], "vpermilps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x0c, 0xca], "vpermilps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x13, 0x0a], "vcvtph2ps zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x13, 0x4a, 0x01], "vcvtph2ps zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x13, 0xca], "vcvtph2ps zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x14, 0x0a], "vprorvd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x14, 0x4a, 0x01], "vprorvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x14, 0xca], "vprorvd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x15, 0x0a], "vprolvd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x15, 0x4a, 0x01], "vprolvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x15, 0xca], "vprolvd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x16, 0x0a], "vpermps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x16, 0x4a, 0x01], "vpermps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x16, 0xca], "vpermps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x18, 0x0a], "vbroadcastss zmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x18, 0x4a, 0x01], "vbroadcastss zmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x18, 0xca], "vbroadcastss zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x19, 0x0a], "vbroadcastf32x2 zmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x19, 0x4a, 0x01], "vbroadcastf32x2 zmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x19, 0xca], "vbroadcastf32x2 zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1a, 0x0a], "vbroadcastf32x4 zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1b, 0x0a], "vbroadcastf32x8 zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1b, 0x4a, 0x01], "vbroadcastf32x8 zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1e, 0x0a], "vpabsd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1e, 0x4a, 0x01], "vpabsd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x1e, 0xca], "vpabsd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x25, 0x0a], "vpmovsxdq zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x25, 0x4a, 0x01], "vpmovsxdq zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x25, 0xca], "vpmovsxdq zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x26, 0x0a], "vptestmb k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x26, 0x4a, 0x01], "vptestmb k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x26, 0xca], "vptestmb k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x27, 0x0a], "vptestmd k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x27, 0x4a, 0x01], "vptestmd k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x27, 0xca], "vptestmd k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x0a], "vmovntdqa zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x4a, 0x01], "vmovntdqa zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2b, 0x0a], "vpackusdw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2b, 0x4a, 0x01], "vpackusdw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2b, 0xca], "vpackusdw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2c, 0x0a], "vscalefps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2c, 0x4a, 0x01], "vscalefps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x2c, 0xca], "vscalefps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x35, 0x0a], "vpmovzxdq zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x35, 0x4a, 0x01], "vpmovzxdq zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x35, 0xca], "vpmovzxdq zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x36, 0x0a], "vpermd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x36, 0x4a, 0x01], "vpermd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x36, 0xca], "vpermd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x39, 0x0a], "vpminsd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x39, 0x4a, 0x01], "vpminsd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x39, 0xca], "vpminsd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3b, 0x0a], "vpminud zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3b, 0x4a, 0x01], "vpminud zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3b, 0xca], "vpminud zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3d, 0x0a], "vpmaxsd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3d, 0xca], "vpmaxsd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3f, 0x0a], "vpmaxud zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3f, 0x4a, 0x01], "vpmaxud zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x3f, 0xca], "vpmaxud zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x40, 0x0a], "vpmulld zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x40, 0x4a, 0x01], "vpmulld zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x40, 0xca], "vpmulld zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x42, 0x0a], "vgetexpps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x42, 0x4a, 0x01], "vgetexpps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x42, 0xca], "vgetexpps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x44, 0x0a], "vplzcntd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x44, 0x4a, 0x01], "vplzcntd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x44, 0xca], "vplzcntd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x45, 0x0a], "vpsrlvd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x45, 0x4a, 0x01], "vpsrlvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x45, 0xca], "vpsrlvd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x46, 0x0a], "vpsravd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x46, 0x4a, 0x01], "vpsravd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x46, 0xca], "vpsravd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x47, 0x0a], "vpsllvd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x47, 0x4a, 0x01], "vpsllvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x47, 0xca], "vpsllvd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x4c, 0x0a], "vrcp14ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x4c, 0xca], "vrcp14ps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x4e, 0x0a], "vrsqrt14ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x4e, 0xca], "vrsqrt14ps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x50, 0x0a], "vpdpbusd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x50, 0x4a, 0x01], "vpdpbusd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x50, 0xca], "vpdpbusd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x51, 0x0a], "vpdpbusds zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x51, 0x4a, 0x01], "vpdpbusds zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x51, 0xca], "vpdpbusds zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x52, 0x0a], "vpdpwssd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x52, 0x4a, 0x01], "vpdpwssd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x52, 0xca], "vpdpwssd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x53, 0x0a], "vpdpwssds zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x53, 0x4a, 0x01], "vpdpwssds zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x53, 0xca], "vpdpwssds zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x54, 0x0a], "vpopcntb zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x54, 0x4a, 0x01], "vpopcntb zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x54, 0xca], "vpopcntb zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x55, 0x0a], "vpopcntd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x55, 0x4a, 0x01], "vpopcntd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x55, 0xca], "vpopcntd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x58, 0x0a], "vpbroadcastd zmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x58, 0x4a, 0x01], "vpbroadcastd zmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x58, 0xca], "vpbroadcastd zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x59, 0x0a], "vbroadcasti32x2 zmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x59, 0x4a, 0x01], "vbroadcasti32x2 zmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x59, 0xca], "vbroadcasti32x2 zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x5a, 0x0a], "vbroadcasti32x4 zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x5b, 0x0a], "vbroadcasti32x8 zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x5b, 0x4a, 0x01], "vbroadcasti32x8 zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x62, 0x0a], "vpexpandb zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x62, 0x4a, 0x01], "vpexpandb zmm1, zmmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x62, 0xca], "vpexpandb zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x63, 0x0a], "vpcompressb zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x63, 0x4a, 0x01], "vpcompressb zmmword [bp + si * 1 + 0x1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x63, 0xca], "vpcompressb zmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x64, 0x0a], "vpblendmd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x64, 0x4a, 0x01], "vpblendmd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x64, 0xca], "vpblendmd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x65, 0x0a], "vblendmps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x65, 0x4a, 0x01], "vblendmps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x65, 0xca], "vblendmps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x66, 0x0a], "vpblendmb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x66, 0x4a, 0x01], "vpblendmb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x66, 0xca], "vpblendmb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x71, 0x0a], "vpshldvd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x71, 0x4a, 0x01], "vpshldvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x71, 0xca], "vpshldvd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x73, 0x0a], "vpshrdvd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x73, 0x4a, 0x01], "vpshrdvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x73, 0xca], "vpshrdvd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x75, 0x0a], "vpermi2b zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x75, 0x4a, 0x01], "vpermi2b zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x75, 0xca], "vpermi2b zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x76, 0x0a], "vpermi2d zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x76, 0x4a, 0x01], "vpermi2d zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x76, 0xca], "vpermi2d zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x77, 0x0a], "vpermi2ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x77, 0x4a, 0x01], "vpermi2ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x77, 0xca], "vpermi2ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x78, 0x0a], "vpbroadcastb zmm1, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x78, 0x4a, 0x01], "vpbroadcastb zmm1, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x78, 0xca], "vpbroadcastb zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x79, 0x0a], "vpbroadcastw zmm1, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x79, 0x4a, 0x01], "vpbroadcastw zmm1, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x79, 0xca], "vpbroadcastw zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7a, 0xca], "vpbroadcastb zmm1, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7b, 0xca], "vpbroadcastw zmm1, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7d, 0x0a], "vpermt2b zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7d, 0x4a, 0x01], "vpermt2b zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7d, 0xca], "vpermt2b zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7e, 0x0a], "vpermt2d zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7e, 0x4a, 0x01], "vpermt2d zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7e, 0xca], "vpermt2d zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7f, 0x0a], "vpermt2ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x7f, 0xca], "vpermt2ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x88, 0x0a], "vexpandps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x88, 0x4a, 0x01], "vexpandps zmm1, zmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x88, 0xca], "vexpandps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x89, 0x0a], "vpexpandd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x89, 0x4a, 0x01], "vpexpandd zmm1, zmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x89, 0xca], "vpexpandd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8a, 0x0a], "vcompressps zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8a, 0x4a, 0x01], "vcompressps zmmword [bp + si * 1 + 0x4], zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8a, 0xca], "vcompressps zmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8b, 0x0a], "vpcompressd zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8b, 0x4a, 0x01], "vpcompressd zmmword [bp + si * 1 + 0x4], zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8b, 0xca], "vpcompressd zmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8d, 0x0a], "vpermb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8d, 0x4a, 0x01], "vpermb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8d, 0xca], "vpermb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8f, 0x0a], "vpshufbitqmb k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x8f, 0xca], "vpshufbitqmb k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x96, 0x0a], "vfmaddsub132ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x96, 0xca], "vfmaddsub132ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x97, 0x0a], "vfmsubadd132ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x97, 0xca], "vfmsubadd132ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x98, 0x0a], "vfmadd132ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x98, 0xca], "vfmadd132ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9a, 0x0a], "vfmsub132ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9a, 0xca], "vfmsub132ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9c, 0x0a], "vfnmadd132ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9c, 0xca], "vfnmadd132ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9e, 0x0a], "vfnmsub132ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0x9e, 0xca], "vfnmsub132ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa6, 0x0a], "vfmaddsub213ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa6, 0xca], "vfmaddsub213ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa7, 0x0a], "vfmsubadd213ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa7, 0xca], "vfmsubadd213ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa8, 0x0a], "vfmadd213ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xa8, 0xca], "vfmadd213ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xaa, 0x0a], "vfmsub213ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xaa, 0xca], "vfmsub213ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xac, 0x0a], "vfnmadd213ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xac, 0xca], "vfnmadd213ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xae, 0x0a], "vfnmsub213ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xae, 0xca], "vfnmsub213ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb6, 0x0a], "vfmaddsub231ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb6, 0xca], "vfmaddsub231ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb7, 0x0a], "vfmsubadd231ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb7, 0xca], "vfmsubadd231ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb8, 0x0a], "vfmadd231ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xb8, 0xca], "vfmadd231ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xba, 0x0a], "vfmsub231ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xba, 0xca], "vfmsub231ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xbc, 0x0a], "vfnmadd231ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xbc, 0xca], "vfnmadd231ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xbe, 0x0a], "vfnmsub231ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xbe, 0xca], "vfnmsub231ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xc4, 0x0a], "vpconflictd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xc4, 0x4a, 0x01], "vpconflictd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xc4, 0xca], "vpconflictd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xc8, 0x0a], "vexp2ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xc8, 0x4a, 0x01], "vexp2ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xc8, 0xca], "vexp2ps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xca, 0x0a], "vrcp28ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xca, 0x4a, 0x01], "vrcp28ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xca, 0xca], "vrcp28ps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xcc, 0x0a], "vrsqrt28ps zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xcc, 0xca], "vrsqrt28ps zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xcf, 0x0a], "vgf2p8mulb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xcf, 0x4a, 0x01], "vgf2p8mulb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x48, 0xcf, 0xca], "vgf2p8mulb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x0c, 0x0a], "vpermilps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x0c, 0xca], "vpermilps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x13, 0x0a], "vcvtph2ps zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x13, 0x4a, 0x01], "vcvtph2ps zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x13, 0xca], "vcvtph2ps zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x14, 0x0a], "vprorvd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x14, 0xca], "vprorvd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x15, 0x0a], "vprolvd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x15, 0xca], "vprolvd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x16, 0x0a], "vpermps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x16, 0xca], "vpermps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x18, 0x0a], "vbroadcastss zmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x18, 0x4a, 0x01], "vbroadcastss zmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x18, 0xca], "vbroadcastss zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x19, 0x0a], "vbroadcastf32x2 zmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x19, 0x4a, 0x01], "vbroadcastf32x2 zmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x19, 0xca], "vbroadcastf32x2 zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1a, 0x0a], "vbroadcastf32x4 zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1b, 0x0a], "vbroadcastf32x8 zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1b, 0x4a, 0x01], "vbroadcastf32x8 zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1e, 0x0a], "vpabsd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x1e, 0xca], "vpabsd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x25, 0x0a], "vpmovsxdq zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x25, 0x4a, 0x01], "vpmovsxdq zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x25, 0xca], "vpmovsxdq zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x26, 0x0a], "vptestmb k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x26, 0x4a, 0x01], "vptestmb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x26, 0xca], "vptestmb k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x27, 0x0a], "vptestmd k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x27, 0xca], "vptestmd k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x2b, 0x0a], "vpackusdw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x2b, 0xca], "vpackusdw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x2c, 0x0a], "vscalefps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x2c, 0xca], "vscalefps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x35, 0x0a], "vpmovzxdq zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x35, 0x4a, 0x01], "vpmovzxdq zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x35, 0xca], "vpmovzxdq zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x36, 0x0a], "vpermd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x36, 0xca], "vpermd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x39, 0x0a], "vpminsd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x39, 0xca], "vpminsd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3b, 0x0a], "vpminud zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3b, 0xca], "vpminud zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3d, 0x0a], "vpmaxsd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3d, 0xca], "vpmaxsd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3f, 0x0a], "vpmaxud zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x3f, 0xca], "vpmaxud zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x40, 0x0a], "vpmulld zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x40, 0xca], "vpmulld zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x42, 0x0a], "vgetexpps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x42, 0xca], "vgetexpps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x44, 0x0a], "vplzcntd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x44, 0xca], "vplzcntd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x45, 0x0a], "vpsrlvd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x45, 0xca], "vpsrlvd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x46, 0x0a], "vpsravd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x46, 0xca], "vpsravd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x47, 0x0a], "vpsllvd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x47, 0xca], "vpsllvd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x4c, 0x0a], "vrcp14ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x4c, 0xca], "vrcp14ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x4e, 0xca], "vrsqrt14ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x50, 0x0a], "vpdpbusd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x50, 0xca], "vpdpbusd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x51, 0x0a], "vpdpbusds zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x51, 0xca], "vpdpbusds zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x52, 0x0a], "vpdpwssd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x52, 0xca], "vpdpwssd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x53, 0x0a], "vpdpwssds zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x53, 0xca], "vpdpwssds zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x54, 0x0a], "vpopcntb zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x54, 0x4a, 0x01], "vpopcntb zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x54, 0xca], "vpopcntb zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x55, 0x0a], "vpopcntd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x55, 0xca], "vpopcntd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x58, 0x0a], "vpbroadcastd zmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x58, 0x4a, 0x01], "vpbroadcastd zmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x58, 0xca], "vpbroadcastd zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x59, 0x0a], "vbroadcasti32x2 zmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 zmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x59, 0xca], "vbroadcasti32x2 zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x5a, 0x0a], "vbroadcasti32x4 zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x5b, 0x0a], "vbroadcasti32x8 zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x5b, 0x4a, 0x01], "vbroadcasti32x8 zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x62, 0x0a], "vpexpandb zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x62, 0x4a, 0x01], "vpexpandb zmm1{k5}, zmmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x62, 0xca], "vpexpandb zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x63, 0x0a], "vpcompressb zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x63, 0x4a, 0x01], "vpcompressb zmmword [bp + si * 1 + 0x1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x63, 0xca], "vpcompressb zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x64, 0x0a], "vpblendmd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x64, 0xca], "vpblendmd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x65, 0x0a], "vblendmps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x65, 0xca], "vblendmps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x66, 0x0a], "vpblendmb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x66, 0x4a, 0x01], "vpblendmb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x66, 0xca], "vpblendmb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x71, 0x0a], "vpshldvd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x71, 0xca], "vpshldvd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x73, 0x0a], "vpshrdvd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x73, 0xca], "vpshrdvd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x75, 0x0a], "vpermi2b zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x75, 0x4a, 0x01], "vpermi2b zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x75, 0xca], "vpermi2b zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x76, 0x0a], "vpermi2d zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x76, 0xca], "vpermi2d zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x77, 0x0a], "vpermi2ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x77, 0xca], "vpermi2ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x78, 0x0a], "vpbroadcastb zmm1{k5}, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x78, 0x4a, 0x01], "vpbroadcastb zmm1{k5}, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x78, 0xca], "vpbroadcastb zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x79, 0x0a], "vpbroadcastw zmm1{k5}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x79, 0x4a, 0x01], "vpbroadcastw zmm1{k5}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x79, 0xca], "vpbroadcastw zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7a, 0xca], "vpbroadcastb zmm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7b, 0xca], "vpbroadcastw zmm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7d, 0x0a], "vpermt2b zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7d, 0x4a, 0x01], "vpermt2b zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7d, 0xca], "vpermt2b zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7e, 0x0a], "vpermt2d zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7e, 0xca], "vpermt2d zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7f, 0x0a], "vpermt2ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x7f, 0xca], "vpermt2ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x88, 0x0a], "vexpandps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x88, 0x4a, 0x01], "vexpandps zmm1{k5}, zmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x88, 0xca], "vexpandps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x89, 0x0a], "vpexpandd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x89, 0x4a, 0x01], "vpexpandd zmm1{k5}, zmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x89, 0xca], "vpexpandd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8a, 0x0a], "vcompressps zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8a, 0x4a, 0x01], "vcompressps zmmword [bp + si * 1 + 0x4]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8a, 0xca], "vcompressps zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8b, 0x0a], "vpcompressd zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8b, 0x4a, 0x01], "vpcompressd zmmword [bp + si * 1 + 0x4]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8b, 0xca], "vpcompressd zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8d, 0x0a], "vpermb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8d, 0x4a, 0x01], "vpermb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8d, 0xca], "vpermb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8f, 0x0a], "vpshufbitqmb k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x8f, 0xca], "vpshufbitqmb k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x98, 0x0a], "vfmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x98, 0xca], "vfmadd132ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xba, 0x0a], "vfmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xba, 0xca], "vfmsub231ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xc4, 0x0a], "vpconflictd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xc4, 0xca], "vpconflictd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xc8, 0x0a], "vexp2ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xc8, 0xca], "vexp2ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xca, 0x0a], "vrcp28ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xca, 0xca], "vrcp28ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xcf, 0x0a], "vgf2p8mulb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xcf, 0x4a, 0x01], "vgf2p8mulb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x4d, 0xcf, 0xca], "vgf2p8mulb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x0c, 0x0a], "vpermilps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x0c, 0x4a, 0x01], "vpermilps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x14, 0x0a], "vprorvd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x14, 0x4a, 0x01], "vprorvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x15, 0x0a], "vprolvd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x15, 0x4a, 0x01], "vprolvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x16, 0x0a], "vpermps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x16, 0x4a, 0x01], "vpermps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x1e, 0x0a], "vpabsd zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x1e, 0x4a, 0x01], "vpabsd zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x27, 0x0a], "vptestmd k1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x27, 0x4a, 0x01], "vptestmd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x2b, 0x0a], "vpackusdw zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x2b, 0x4a, 0x01], "vpackusdw zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x2c, 0x0a], "vscalefps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x2c, 0x4a, 0x01], "vscalefps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x2c, 0xca], "vscalefps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x2d, 0xca], "vscalefss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x36, 0x0a], "vpermd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x36, 0x4a, 0x01], "vpermd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x39, 0x0a], "vpminsd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x39, 0x4a, 0x01], "vpminsd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x3b, 0x0a], "vpminud zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x3b, 0x4a, 0x01], "vpminud zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x3d, 0x0a], "vpmaxsd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x3f, 0x0a], "vpmaxud zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x3f, 0x4a, 0x01], "vpmaxud zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x40, 0x0a], "vpmulld zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x40, 0x4a, 0x01], "vpmulld zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x42, 0x0a], "vgetexpps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x42, 0x4a, 0x01], "vgetexpps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x44, 0x0a], "vplzcntd zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x44, 0x4a, 0x01], "vplzcntd zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x45, 0x0a], "vpsrlvd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x45, 0x4a, 0x01], "vpsrlvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x46, 0x0a], "vpsravd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x46, 0x4a, 0x01], "vpsravd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x47, 0x0a], "vpsllvd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x47, 0x4a, 0x01], "vpsllvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x4c, 0x0a], "vrcp14ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x4e, 0x0a], "vrsqrt14ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x50, 0x0a], "vpdpbusd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x50, 0x4a, 0x01], "vpdpbusd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x51, 0x0a], "vpdpbusds zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x51, 0x4a, 0x01], "vpdpbusds zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x52, 0x0a], "vpdpwssd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x52, 0x4a, 0x01], "vpdpwssd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x53, 0x0a], "vpdpwssds zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x53, 0x4a, 0x01], "vpdpwssds zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x55, 0x0a], "vpopcntd zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x55, 0x4a, 0x01], "vpopcntd zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x64, 0x0a], "vpblendmd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x64, 0x4a, 0x01], "vpblendmd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x65, 0x0a], "vblendmps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x65, 0x4a, 0x01], "vblendmps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x71, 0x0a], "vpshldvd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x71, 0x4a, 0x01], "vpshldvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x73, 0x0a], "vpshrdvd zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x73, 0x4a, 0x01], "vpshrdvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x76, 0x0a], "vpermi2d zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x76, 0x4a, 0x01], "vpermi2d zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x77, 0x0a], "vpermi2ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x77, 0x4a, 0x01], "vpermi2ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x7e, 0x0a], "vpermt2d zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x7e, 0x4a, 0x01], "vpermt2d zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x7f, 0x0a], "vpermt2ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x96, 0x0a], "vfmaddsub132ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x96, 0xca], "vfmaddsub132ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x97, 0x0a], "vfmsubadd132ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x97, 0xca], "vfmsubadd132ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x98, 0x0a], "vfmadd132ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x98, 0xca], "vfmadd132ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x99, 0xca], "vfmadd132ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9a, 0x0a], "vfmsub132ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9a, 0xca], "vfmsub132ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9b, 0xca], "vfmsub132ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9c, 0x0a], "vfnmadd132ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9c, 0xca], "vfnmadd132ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9d, 0xca], "vfnmadd132ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9e, 0x0a], "vfnmsub132ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9e, 0xca], "vfnmsub132ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0x9f, 0xca], "vfnmsub132ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa6, 0x0a], "vfmaddsub213ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa6, 0xca], "vfmaddsub213ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa7, 0x0a], "vfmsubadd213ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa7, 0xca], "vfmsubadd213ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa8, 0x0a], "vfmadd213ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa8, 0xca], "vfmadd213ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xa9, 0xca], "vfmadd213ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xaa, 0x0a], "vfmsub213ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xaa, 0xca], "vfmsub213ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xab, 0xca], "vfmsub213ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xac, 0x0a], "vfnmadd213ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xac, 0xca], "vfnmadd213ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xad, 0xca], "vfnmadd213ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xae, 0x0a], "vfnmsub213ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xae, 0xca], "vfnmsub213ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xaf, 0xca], "vfnmsub213ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb6, 0x0a], "vfmaddsub231ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb6, 0xca], "vfmaddsub231ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb7, 0x0a], "vfmsubadd231ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb7, 0xca], "vfmsubadd231ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb8, 0x0a], "vfmadd231ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb8, 0xca], "vfmadd231ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xb9, 0xca], "vfmadd231ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xba, 0x0a], "vfmsub231ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xba, 0xca], "vfmsub231ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbb, 0xca], "vfmsub231ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbc, 0x0a], "vfnmadd231ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbc, 0xca], "vfnmadd231ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbd, 0xca], "vfnmadd231ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbe, 0x0a], "vfnmsub231ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbe, 0xca], "vfnmsub231ps zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xbf, 0xca], "vfnmsub231ss xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xc4, 0x0a], "vpconflictd zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xc4, 0x4a, 0x01], "vpconflictd zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xc8, 0x0a], "vexp2ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xc8, 0x4a, 0x01], "vexp2ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xca, 0x0a], "vrcp28ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xca, 0x4a, 0x01], "vrcp28ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xcc, 0x0a], "vrsqrt28ps zmm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x58, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x0c, 0x0a], "vpermilps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x14, 0x0a], "vprorvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x15, 0x0a], "vprolvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x16, 0x0a], "vpermps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x1e, 0x0a], "vpabsd zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x27, 0x0a], "vptestmd k1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x2b, 0x0a], "vpackusdw zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x2c, 0x0a], "vscalefps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x2c, 0xca], "vscalefps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x2d, 0xca], "vscalefss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x36, 0x0a], "vpermd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x39, 0x0a], "vpminsd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x3b, 0x0a], "vpminud zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x3d, 0x0a], "vpmaxsd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x3f, 0x0a], "vpmaxud zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x40, 0x0a], "vpmulld zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x42, 0x0a], "vgetexpps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x44, 0x0a], "vplzcntd zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x45, 0x0a], "vpsrlvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x46, 0x0a], "vpsravd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x47, 0x0a], "vpsllvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x4c, 0x0a], "vrcp14ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x50, 0x0a], "vpdpbusd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x51, 0x0a], "vpdpbusds zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x52, 0x0a], "vpdpwssd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x53, 0x0a], "vpdpwssds zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x55, 0x0a], "vpopcntd zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x64, 0x0a], "vpblendmd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x65, 0x0a], "vblendmps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x71, 0x0a], "vpshldvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x73, 0x0a], "vpshrdvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x76, 0x0a], "vpermi2d zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x77, 0x0a], "vpermi2ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x7e, 0x0a], "vpermt2d zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x7f, 0x0a], "vpermt2ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x98, 0x0a], "vfmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xba, 0x0a], "vfmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xc4, 0x0a], "vpconflictd zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xc8, 0x0a], "vexp2ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xca, 0x0a], "vrcp28ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x5d, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x13, 0xca], "vcvtph2ps zmm1{sae}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x2c, 0xca], "vscalefps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x2d, 0xca], "vscalefss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x42, 0xca], "vgetexpps zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x43, 0xca], "vgetexpss xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x96, 0xca], "vfmaddsub132ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x97, 0xca], "vfmsubadd132ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x98, 0xca], "vfmadd132ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x99, 0xca], "vfmadd132ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x9a, 0xca], "vfmsub132ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x9b, 0xca], "vfmsub132ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x9c, 0xca], "vfnmadd132ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x9d, 0xca], "vfnmadd132ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x9e, 0xca], "vfnmsub132ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0x9f, 0xca], "vfnmsub132ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xa6, 0xca], "vfmaddsub213ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xa7, 0xca], "vfmsubadd213ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xa8, 0xca], "vfmadd213ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xa9, 0xca], "vfmadd213ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xaa, 0xca], "vfmsub213ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xab, 0xca], "vfmsub213ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xac, 0xca], "vfnmadd213ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xad, 0xca], "vfnmadd213ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xae, 0xca], "vfnmsub213ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xaf, 0xca], "vfnmsub213ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xb6, 0xca], "vfmaddsub231ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xb7, 0xca], "vfmsubadd231ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xb8, 0xca], "vfmadd231ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xb9, 0xca], "vfmadd231ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xba, 0xca], "vfmsub231ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xbb, 0xca], "vfmsub231ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xbc, 0xca], "vfnmadd231ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xbd, 0xca], "vfnmadd231ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xbe, 0xca], "vfnmsub231ps zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xbf, 0xca], "vfnmsub231ss xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xc8, 0xca], "vexp2ps zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xca, 0xca], "vrcp28ps zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xcb, 0xca], "vrcp28ss xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xcc, 0xca], "vrsqrt28ps zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x78, 0xcd, 0xca], "vrsqrt28ss xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x13, 0xca], "vcvtph2ps zmm1{k5}{sae}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x2c, 0xca], "vscalefps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x2d, 0xca], "vscalefss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x42, 0xca], "vgetexpps zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x43, 0xca], "vgetexpss xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xc8, 0xca], "vexp2ps zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xca, 0xca], "vrcp28ps zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xcb, 0xca], "vrcp28ss xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x7d, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x0c, 0x0a], "vpermilps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x0c, 0xca], "vpermilps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x13, 0x0a], "vcvtph2ps xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x13, 0x4a, 0x01], "vcvtph2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x13, 0xca], "vcvtph2ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x14, 0x0a], "vprorvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x14, 0xca], "vprorvd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x15, 0x0a], "vprolvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x15, 0xca], "vprolvd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x18, 0x0a], "vbroadcastss xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x18, 0x4a, 0x01], "vbroadcastss xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x18, 0xca], "vbroadcastss xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x1e, 0x0a], "vpabsd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x1e, 0xca], "vpabsd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x25, 0x0a], "vpmovsxdq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x25, 0x4a, 0x01], "vpmovsxdq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x25, 0xca], "vpmovsxdq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x2b, 0x0a], "vpackusdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x2b, 0xca], "vpackusdw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x2c, 0x0a], "vscalefps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x2c, 0xca], "vscalefps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x35, 0x0a], "vpmovzxdq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x35, 0x4a, 0x01], "vpmovzxdq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x35, 0xca], "vpmovzxdq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x39, 0x0a], "vpminsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x39, 0xca], "vpminsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3b, 0x0a], "vpminud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3b, 0xca], "vpminud xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3d, 0xca], "vpmaxsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3f, 0x0a], "vpmaxud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x3f, 0xca], "vpmaxud xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x40, 0x0a], "vpmulld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x40, 0xca], "vpmulld xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x42, 0x0a], "vgetexpps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x42, 0xca], "vgetexpps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x44, 0x0a], "vplzcntd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x44, 0xca], "vplzcntd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x45, 0x0a], "vpsrlvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x45, 0xca], "vpsrlvd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x46, 0x0a], "vpsravd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x46, 0xca], "vpsravd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x47, 0x0a], "vpsllvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x47, 0xca], "vpsllvd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x4c, 0xca], "vrcp14ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x4e, 0xca], "vrsqrt14ps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x50, 0x0a], "vpdpbusd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x50, 0xca], "vpdpbusd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x51, 0x0a], "vpdpbusds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x51, 0xca], "vpdpbusds xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x52, 0x0a], "vpdpwssd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x52, 0xca], "vpdpwssd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x53, 0x0a], "vpdpwssds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x53, 0xca], "vpdpwssds xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x54, 0x0a], "vpopcntb xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x54, 0x4a, 0x01], "vpopcntb xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x54, 0xca], "vpopcntb xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x55, 0x0a], "vpopcntd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x55, 0xca], "vpopcntd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x58, 0x0a], "vpbroadcastd xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x58, 0x4a, 0x01], "vpbroadcastd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x58, 0xca], "vpbroadcastd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x59, 0x0a], "vbroadcasti32x2 xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x59, 0xca], "vbroadcasti32x2 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x62, 0x0a], "vpexpandb xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x62, 0x4a, 0x01], "vpexpandb xmm1{k5}{z}, xmmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x62, 0xca], "vpexpandb xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x63, 0xca], "vpcompressb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x64, 0x0a], "vpblendmd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x64, 0xca], "vpblendmd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x65, 0x0a], "vblendmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x65, 0xca], "vblendmps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x66, 0x0a], "vpblendmb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x66, 0x4a, 0x01], "vpblendmb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x66, 0xca], "vpblendmb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x71, 0x0a], "vpshldvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x71, 0xca], "vpshldvd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x73, 0x0a], "vpshrdvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x73, 0xca], "vpshrdvd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x75, 0x0a], "vpermi2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x75, 0x4a, 0x01], "vpermi2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x75, 0xca], "vpermi2b xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x76, 0x0a], "vpermi2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x76, 0xca], "vpermi2d xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x77, 0x0a], "vpermi2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x77, 0xca], "vpermi2ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x78, 0x0a], "vpbroadcastb xmm1{k5}{z}, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x78, 0x4a, 0x01], "vpbroadcastb xmm1{k5}{z}, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x78, 0xca], "vpbroadcastb xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x79, 0x0a], "vpbroadcastw xmm1{k5}{z}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x79, 0x4a, 0x01], "vpbroadcastw xmm1{k5}{z}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x79, 0xca], "vpbroadcastw xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7a, 0xca], "vpbroadcastb xmm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7b, 0xca], "vpbroadcastw xmm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7d, 0x0a], "vpermt2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7d, 0x4a, 0x01], "vpermt2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7d, 0xca], "vpermt2b xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7e, 0x0a], "vpermt2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7e, 0xca], "vpermt2d xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x7f, 0xca], "vpermt2ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x88, 0x0a], "vexpandps xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x88, 0x4a, 0x01], "vexpandps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x88, 0xca], "vexpandps xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x89, 0x0a], "vpexpandd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x89, 0x4a, 0x01], "vpexpandd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x89, 0xca], "vpexpandd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x8a, 0xca], "vcompressps xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x8b, 0xca], "vpcompressd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x8d, 0x0a], "vpermb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x8d, 0x4a, 0x01], "vpermb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x8d, 0xca], "vpermb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x96, 0xca], "vfmaddsub132ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x97, 0xca], "vfmsubadd132ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x98, 0xca], "vfmadd132ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9a, 0xca], "vfmsub132ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9c, 0xca], "vfnmadd132ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0x9e, 0xca], "vfnmsub132ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa6, 0xca], "vfmaddsub213ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa7, 0xca], "vfmsubadd213ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xa8, 0xca], "vfmadd213ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xaa, 0xca], "vfmsub213ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xac, 0xca], "vfnmadd213ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xae, 0xca], "vfnmsub213ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb6, 0xca], "vfmaddsub231ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb7, 0xca], "vfmsubadd231ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xb8, 0xca], "vfmadd231ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xba, 0xca], "vfmsub231ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xbc, 0xca], "vfnmadd231ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xbe, 0xca], "vfnmsub231ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xc4, 0x0a], "vpconflictd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xc4, 0xca], "vpconflictd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xcf, 0x0a], "vgf2p8mulb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xcf, 0x4a, 0x01], "vgf2p8mulb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0x8d, 0xcf, 0xca], "vgf2p8mulb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x0c, 0x0a], "vpermilps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x14, 0x0a], "vprorvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x15, 0x0a], "vprolvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x1e, 0x0a], "vpabsd xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x2b, 0x0a], "vpackusdw xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x2c, 0x0a], "vscalefps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x39, 0x0a], "vpminsd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x3b, 0x0a], "vpminud xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x3f, 0x0a], "vpmaxud xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x40, 0x0a], "vpmulld xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x42, 0x0a], "vgetexpps xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x44, 0x0a], "vplzcntd xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x45, 0x0a], "vpsrlvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x46, 0x0a], "vpsravd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x47, 0x0a], "vpsllvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x50, 0x0a], "vpdpbusd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x51, 0x0a], "vpdpbusds xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x52, 0x0a], "vpdpwssd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x53, 0x0a], "vpdpwssds xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x55, 0x0a], "vpopcntd xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x64, 0x0a], "vpblendmd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x65, 0x0a], "vblendmps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x71, 0x0a], "vpshldvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x73, 0x0a], "vpshrdvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x76, 0x0a], "vpermi2d xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x77, 0x0a], "vpermi2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x7e, 0x0a], "vpermt2d xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xc4, 0x0a], "vpconflictd xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0x9d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x0c, 0x0a], "vpermilps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x0c, 0xca], "vpermilps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x13, 0x0a], "vcvtph2ps ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x13, 0x4a, 0x01], "vcvtph2ps ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x13, 0xca], "vcvtph2ps ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x14, 0x0a], "vprorvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x14, 0xca], "vprorvd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x15, 0x0a], "vprolvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x15, 0xca], "vprolvd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x16, 0x0a], "vpermps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x16, 0xca], "vpermps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x18, 0x0a], "vbroadcastss ymm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x18, 0x4a, 0x01], "vbroadcastss ymm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x18, 0xca], "vbroadcastss ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x19, 0x0a], "vbroadcastf32x2 ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x19, 0x4a, 0x01], "vbroadcastf32x2 ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x19, 0xca], "vbroadcastf32x2 ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x1a, 0x0a], "vbroadcastf32x4 ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x1e, 0x0a], "vpabsd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x1e, 0xca], "vpabsd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x25, 0x0a], "vpmovsxdq ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x25, 0x4a, 0x01], "vpmovsxdq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x25, 0xca], "vpmovsxdq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2b, 0x0a], "vpackusdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2b, 0xca], "vpackusdw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2c, 0x0a], "vscalefps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2c, 0xca], "vscalefps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2d, 0x0a], "vscalefss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2d, 0x4a, 0x01], "vscalefss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x2d, 0xca], "vscalefss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x35, 0x0a], "vpmovzxdq ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x35, 0x4a, 0x01], "vpmovzxdq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x35, 0xca], "vpmovzxdq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x36, 0x0a], "vpermd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x36, 0xca], "vpermd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x39, 0x0a], "vpminsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x39, 0xca], "vpminsd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3b, 0x0a], "vpminud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3b, 0xca], "vpminud ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3d, 0x0a], "vpmaxsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3d, 0xca], "vpmaxsd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3f, 0x0a], "vpmaxud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x3f, 0xca], "vpmaxud ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x40, 0x0a], "vpmulld ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x40, 0xca], "vpmulld ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x42, 0x0a], "vgetexpps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x42, 0xca], "vgetexpps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x43, 0x0a], "vgetexpss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x43, 0x4a, 0x01], "vgetexpss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x43, 0xca], "vgetexpss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x44, 0x0a], "vplzcntd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x44, 0xca], "vplzcntd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x45, 0x0a], "vpsrlvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x45, 0xca], "vpsrlvd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x46, 0x0a], "vpsravd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x46, 0xca], "vpsravd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x47, 0x0a], "vpsllvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x47, 0xca], "vpsllvd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4c, 0x0a], "vrcp14ps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4c, 0xca], "vrcp14ps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4d, 0x0a], "vrcp14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4d, 0x4a, 0x01], "vrcp14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4d, 0xca], "vrcp14ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4e, 0xca], "vrsqrt14ps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4f, 0x0a], "vrsqrt14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4f, 0x4a, 0x01], "vrsqrt14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x4f, 0xca], "vrsqrt14ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x50, 0x0a], "vpdpbusd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x50, 0xca], "vpdpbusd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x51, 0x0a], "vpdpbusds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x51, 0xca], "vpdpbusds ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x52, 0x0a], "vpdpwssd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x52, 0xca], "vpdpwssd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x53, 0x0a], "vpdpwssds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x53, 0xca], "vpdpwssds ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x54, 0x0a], "vpopcntb ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x54, 0x4a, 0x01], "vpopcntb ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x54, 0xca], "vpopcntb ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x55, 0x0a], "vpopcntd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x55, 0xca], "vpopcntd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x58, 0x0a], "vpbroadcastd ymm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x58, 0x4a, 0x01], "vpbroadcastd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x58, 0xca], "vpbroadcastd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x59, 0x0a], "vbroadcasti32x2 ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x59, 0x4a, 0x01], "vbroadcasti32x2 ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x59, 0xca], "vbroadcasti32x2 ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x5a, 0x0a], "vbroadcasti32x4 ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x62, 0x0a], "vpexpandb ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x62, 0x4a, 0x01], "vpexpandb ymm1{k5}{z}, ymmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x62, 0xca], "vpexpandb ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x63, 0xca], "vpcompressb ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x64, 0x0a], "vpblendmd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x64, 0xca], "vpblendmd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x65, 0x0a], "vblendmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x65, 0xca], "vblendmps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x66, 0x0a], "vpblendmb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x66, 0x4a, 0x01], "vpblendmb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x66, 0xca], "vpblendmb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x71, 0x0a], "vpshldvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x71, 0xca], "vpshldvd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x73, 0x0a], "vpshrdvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x73, 0xca], "vpshrdvd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x75, 0x0a], "vpermi2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x75, 0x4a, 0x01], "vpermi2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x75, 0xca], "vpermi2b ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x76, 0x0a], "vpermi2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x76, 0xca], "vpermi2d ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x77, 0x0a], "vpermi2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x77, 0xca], "vpermi2ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x78, 0x0a], "vpbroadcastb ymm1{k5}{z}, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x78, 0x4a, 0x01], "vpbroadcastb ymm1{k5}{z}, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x78, 0xca], "vpbroadcastb ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x79, 0x0a], "vpbroadcastw ymm1{k5}{z}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x79, 0x4a, 0x01], "vpbroadcastw ymm1{k5}{z}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x79, 0xca], "vpbroadcastw ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7a, 0xca], "vpbroadcastb ymm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7b, 0xca], "vpbroadcastw ymm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7d, 0x0a], "vpermt2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7d, 0x4a, 0x01], "vpermt2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7d, 0xca], "vpermt2b ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7e, 0x0a], "vpermt2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7e, 0xca], "vpermt2d ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7f, 0x0a], "vpermt2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x7f, 0xca], "vpermt2ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x88, 0x0a], "vexpandps ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x88, 0x4a, 0x01], "vexpandps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x88, 0xca], "vexpandps ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x89, 0x0a], "vpexpandd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x89, 0x4a, 0x01], "vpexpandd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x89, 0xca], "vpexpandd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x8a, 0xca], "vcompressps ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x8b, 0xca], "vpcompressd ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x8d, 0x0a], "vpermb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x8d, 0x4a, 0x01], "vpermb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x8d, 0xca], "vpermb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x96, 0xca], "vfmaddsub132ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x97, 0xca], "vfmsubadd132ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x98, 0x0a], "vfmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x98, 0xca], "vfmadd132ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x99, 0x0a], "vfmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x99, 0x4a, 0x01], "vfmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9a, 0xca], "vfmsub132ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9b, 0x0a], "vfmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9b, 0x4a, 0x01], "vfmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9c, 0xca], "vfnmadd132ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9d, 0x0a], "vfnmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9d, 0x4a, 0x01], "vfnmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9e, 0xca], "vfnmsub132ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9f, 0x0a], "vfnmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9f, 0x4a, 0x01], "vfnmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa6, 0xca], "vfmaddsub213ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa7, 0xca], "vfmsubadd213ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa8, 0xca], "vfmadd213ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa9, 0x0a], "vfmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa9, 0x4a, 0x01], "vfmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xaa, 0xca], "vfmsub213ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xab, 0x0a], "vfmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xab, 0x4a, 0x01], "vfmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xac, 0xca], "vfnmadd213ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xad, 0x0a], "vfnmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xad, 0x4a, 0x01], "vfnmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xae, 0xca], "vfnmsub213ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xaf, 0x0a], "vfnmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xaf, 0x4a, 0x01], "vfnmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb6, 0xca], "vfmaddsub231ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb7, 0xca], "vfmsubadd231ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb8, 0xca], "vfmadd231ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb9, 0x0a], "vfmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb9, 0x4a, 0x01], "vfmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xba, 0x0a], "vfmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xba, 0xca], "vfmsub231ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbb, 0x0a], "vfmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbb, 0x4a, 0x01], "vfmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbc, 0xca], "vfnmadd231ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbd, 0x0a], "vfnmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbd, 0x4a, 0x01], "vfnmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbe, 0xca], "vfnmsub231ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbf, 0x0a], "vfnmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbf, 0x4a, 0x01], "vfnmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xc4, 0x0a], "vpconflictd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xc4, 0xca], "vpconflictd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcb, 0x0a], "vrcp28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcb, 0x4a, 0x01], "vrcp28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcb, 0xca], "vrcp28ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcd, 0x0a], "vrsqrt28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcd, 0x4a, 0x01], "vrsqrt28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcf, 0x0a], "vgf2p8mulb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcf, 0x4a, 0x01], "vgf2p8mulb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xad, 0xcf, 0xca], "vgf2p8mulb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x0c, 0x0a], "vpermilps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x14, 0x0a], "vprorvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x15, 0x0a], "vprolvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x16, 0x0a], "vpermps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x1e, 0x0a], "vpabsd ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x2b, 0x0a], "vpackusdw ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x2c, 0x0a], "vscalefps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x36, 0x0a], "vpermd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x39, 0x0a], "vpminsd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x3b, 0x0a], "vpminud ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x3d, 0x0a], "vpmaxsd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x3f, 0x0a], "vpmaxud ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x40, 0x0a], "vpmulld ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x42, 0x0a], "vgetexpps ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x44, 0x0a], "vplzcntd ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x45, 0x0a], "vpsrlvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x46, 0x0a], "vpsravd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x47, 0x0a], "vpsllvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x4c, 0x0a], "vrcp14ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x50, 0x0a], "vpdpbusd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x51, 0x0a], "vpdpbusds ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x52, 0x0a], "vpdpwssd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x53, 0x0a], "vpdpwssds ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x55, 0x0a], "vpopcntd ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x64, 0x0a], "vpblendmd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x65, 0x0a], "vblendmps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x71, 0x0a], "vpshldvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x73, 0x0a], "vpshrdvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x76, 0x0a], "vpermi2d ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x77, 0x0a], "vpermi2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x7e, 0x0a], "vpermt2d ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x7f, 0x0a], "vpermt2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x98, 0x0a], "vfmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xba, 0x0a], "vfmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xc4, 0x0a], "vpconflictd ymm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xbd, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x0c, 0x0a], "vpermilps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x0c, 0xca], "vpermilps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x13, 0x0a], "vcvtph2ps zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x13, 0x4a, 0x01], "vcvtph2ps zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x13, 0xca], "vcvtph2ps zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x14, 0x0a], "vprorvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x14, 0xca], "vprorvd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x15, 0x0a], "vprolvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x15, 0xca], "vprolvd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x16, 0x0a], "vpermps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x16, 0xca], "vpermps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x18, 0x0a], "vbroadcastss zmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x18, 0x4a, 0x01], "vbroadcastss zmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x18, 0xca], "vbroadcastss zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x19, 0x0a], "vbroadcastf32x2 zmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x19, 0x4a, 0x01], "vbroadcastf32x2 zmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x19, 0xca], "vbroadcastf32x2 zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1a, 0x0a], "vbroadcastf32x4 zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1b, 0x0a], "vbroadcastf32x8 zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1b, 0x4a, 0x01], "vbroadcastf32x8 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1e, 0x0a], "vpabsd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x1e, 0xca], "vpabsd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x25, 0x0a], "vpmovsxdq zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x25, 0x4a, 0x01], "vpmovsxdq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x25, 0xca], "vpmovsxdq zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x2b, 0x0a], "vpackusdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x2b, 0xca], "vpackusdw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x2c, 0x0a], "vscalefps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x35, 0x0a], "vpmovzxdq zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x35, 0x4a, 0x01], "vpmovzxdq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x35, 0xca], "vpmovzxdq zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x36, 0x0a], "vpermd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x36, 0xca], "vpermd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x39, 0x0a], "vpminsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x39, 0xca], "vpminsd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3b, 0x0a], "vpminud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3b, 0xca], "vpminud zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3d, 0x0a], "vpmaxsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3d, 0xca], "vpmaxsd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3f, 0x0a], "vpmaxud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x3f, 0xca], "vpmaxud zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x40, 0x0a], "vpmulld zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x40, 0xca], "vpmulld zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x42, 0x0a], "vgetexpps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x42, 0xca], "vgetexpps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x44, 0x0a], "vplzcntd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x44, 0xca], "vplzcntd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x45, 0x0a], "vpsrlvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x45, 0xca], "vpsrlvd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x46, 0x0a], "vpsravd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x46, 0xca], "vpsravd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x47, 0x0a], "vpsllvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x47, 0xca], "vpsllvd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x4c, 0x0a], "vrcp14ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x4c, 0xca], "vrcp14ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x4e, 0xca], "vrsqrt14ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x50, 0x0a], "vpdpbusd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x50, 0xca], "vpdpbusd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x51, 0x0a], "vpdpbusds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x51, 0xca], "vpdpbusds zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x52, 0x0a], "vpdpwssd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x52, 0xca], "vpdpwssd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x53, 0x0a], "vpdpwssds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x53, 0xca], "vpdpwssds zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x54, 0x0a], "vpopcntb zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x54, 0x4a, 0x01], "vpopcntb zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x54, 0xca], "vpopcntb zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x55, 0x0a], "vpopcntd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x55, 0xca], "vpopcntd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x58, 0x0a], "vpbroadcastd zmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x58, 0x4a, 0x01], "vpbroadcastd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x58, 0xca], "vpbroadcastd zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x59, 0x0a], "vbroadcasti32x2 zmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x59, 0x4a, 0x01], "vbroadcasti32x2 zmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x59, 0xca], "vbroadcasti32x2 zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x5a, 0x0a], "vbroadcasti32x4 zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x5b, 0x0a], "vbroadcasti32x8 zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x5b, 0x4a, 0x01], "vbroadcasti32x8 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x62, 0x0a], "vpexpandb zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x62, 0x4a, 0x01], "vpexpandb zmm1{k5}{z}, zmmword [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x62, 0xca], "vpexpandb zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x63, 0xca], "vpcompressb zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x64, 0x0a], "vpblendmd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x64, 0xca], "vpblendmd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x65, 0x0a], "vblendmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x65, 0xca], "vblendmps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x66, 0x0a], "vpblendmb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x66, 0x4a, 0x01], "vpblendmb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x66, 0xca], "vpblendmb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x71, 0x0a], "vpshldvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x71, 0xca], "vpshldvd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x73, 0x0a], "vpshrdvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x73, 0xca], "vpshrdvd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x75, 0x0a], "vpermi2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x75, 0x4a, 0x01], "vpermi2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x75, 0xca], "vpermi2b zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x76, 0x0a], "vpermi2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x76, 0xca], "vpermi2d zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x77, 0x0a], "vpermi2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x77, 0xca], "vpermi2ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x78, 0x0a], "vpbroadcastb zmm1{k5}{z}, byte [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x78, 0x4a, 0x01], "vpbroadcastb zmm1{k5}{z}, byte [bp + si * 1 + 0x1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x78, 0xca], "vpbroadcastb zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x79, 0x0a], "vpbroadcastw zmm1{k5}{z}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x79, 0x4a, 0x01], "vpbroadcastw zmm1{k5}{z}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x79, 0xca], "vpbroadcastw zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7a, 0xca], "vpbroadcastb zmm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7b, 0xca], "vpbroadcastw zmm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7d, 0x0a], "vpermt2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7d, 0x4a, 0x01], "vpermt2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7d, 0xca], "vpermt2b zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7e, 0x0a], "vpermt2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7e, 0xca], "vpermt2d zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7f, 0x0a], "vpermt2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x7f, 0xca], "vpermt2ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x88, 0x0a], "vexpandps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x88, 0x4a, 0x01], "vexpandps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x88, 0xca], "vexpandps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x89, 0x0a], "vpexpandd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x89, 0x4a, 0x01], "vpexpandd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x89, 0xca], "vpexpandd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x8a, 0xca], "vcompressps zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x8b, 0xca], "vpcompressd zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x8d, 0x0a], "vpermb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x8d, 0x4a, 0x01], "vpermb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x8d, 0xca], "vpermb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x98, 0x0a], "vfmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xba, 0x0a], "vfmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xc4, 0x0a], "vpconflictd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xc4, 0xca], "vpconflictd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xc8, 0x0a], "vexp2ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xc8, 0xca], "vexp2ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xca, 0x0a], "vrcp28ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xca, 0xca], "vrcp28ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xcf, 0x0a], "vgf2p8mulb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xcf, 0x4a, 0x01], "vgf2p8mulb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7d, 0xcd, 0xcf, 0xca], "vgf2p8mulb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x0c, 0x0a], "vpermilps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x14, 0x0a], "vprorvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x15, 0x0a], "vprolvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x16, 0x0a], "vpermps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x1e, 0x0a], "vpabsd zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x2b, 0x0a], "vpackusdw zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x2c, 0x0a], "vscalefps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x36, 0x0a], "vpermd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x39, 0x0a], "vpminsd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x3b, 0x0a], "vpminud zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x3d, 0x0a], "vpmaxsd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x3f, 0x0a], "vpmaxud zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x40, 0x0a], "vpmulld zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x42, 0x0a], "vgetexpps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x44, 0x0a], "vplzcntd zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x45, 0x0a], "vpsrlvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x46, 0x0a], "vpsravd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x47, 0x0a], "vpsllvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x4c, 0x0a], "vrcp14ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x50, 0x0a], "vpdpbusd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x51, 0x0a], "vpdpbusds zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x52, 0x0a], "vpdpwssd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x53, 0x0a], "vpdpwssds zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x55, 0x0a], "vpopcntd zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x64, 0x0a], "vpblendmd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x65, 0x0a], "vblendmps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x71, 0x0a], "vpshldvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x73, 0x0a], "vpshrdvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x76, 0x0a], "vpermi2d zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x77, 0x0a], "vpermi2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x7e, 0x0a], "vpermt2d zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x7f, 0x0a], "vpermt2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x98, 0x0a], "vfmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xba, 0x0a], "vfmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xc4, 0x0a], "vpconflictd zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xc8, 0x0a], "vexp2ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xca, 0x0a], "vrcp28ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xdd, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x13, 0xca], "vcvtph2ps zmm1{k5}{z}{sae}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x42, 0xca], "vgetexpps zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x43, 0xca], "vgetexpss xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xc8, 0xca], "vexp2ps zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xca, 0xca], "vrcp28ps zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xcb, 0xca], "vrcp28ss xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7d, 0xfd, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x10, 0x0a], "vpmovuswb qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x10, 0x4a, 0x01], "vpmovuswb qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x10, 0xca], "vpmovuswb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x11, 0x0a], "vpmovusdb dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x11, 0x4a, 0x01], "vpmovusdb dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x11, 0xca], "vpmovusdb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x12, 0x0a], "vpmovusqb word [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x12, 0x4a, 0x01], "vpmovusqb word [bp + si * 1 + 0x2], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x12, 0xca], "vpmovusqb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x13, 0x0a], "vpmovusdw qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x13, 0x4a, 0x01], "vpmovusdw qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x13, 0xca], "vpmovusdw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x14, 0x0a], "vpmovusqw dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x14, 0x4a, 0x01], "vpmovusqw dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x14, 0xca], "vpmovusqw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x15, 0x0a], "vpmovusqd qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x15, 0x4a, 0x01], "vpmovusqd qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x15, 0xca], "vpmovusqd xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x20, 0x0a], "vpmovswb qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x20, 0x4a, 0x01], "vpmovswb qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x20, 0xca], "vpmovswb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x21, 0x0a], "vpmovsdb dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x21, 0x4a, 0x01], "vpmovsdb dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x21, 0xca], "vpmovsdb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x22, 0x0a], "vpmovsqb word [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x22, 0x4a, 0x01], "vpmovsqb word [bp + si * 1 + 0x2], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x22, 0xca], "vpmovsqb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x23, 0x0a], "vpmovsdw qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x23, 0x4a, 0x01], "vpmovsdw qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x23, 0xca], "vpmovsdw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x24, 0x0a], "vpmovsqw dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x24, 0x4a, 0x01], "vpmovsqw dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x24, 0xca], "vpmovsqw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x25, 0x0a], "vpmovsqd qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x25, 0x4a, 0x01], "vpmovsqd qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x25, 0xca], "vpmovsqd xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x26, 0x0a], "vptestnmb k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x26, 0x4a, 0x01], "vptestnmb k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x26, 0xca], "vptestnmb k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x27, 0x0a], "vptestnmd k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x27, 0x4a, 0x01], "vptestnmd k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x27, 0xca], "vptestnmd k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x28, 0xca], "vpmovm2b xmm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x29, 0xca], "vpmovb2m k1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x30, 0x0a], "vpmovwb qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x30, 0x4a, 0x01], "vpmovwb qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x30, 0xca], "vpmovwb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x31, 0x0a], "vpmovdb dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x31, 0x4a, 0x01], "vpmovdb dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x31, 0xca], "vpmovdb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x32, 0x0a], "vpmovqb word [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x32, 0x4a, 0x01], "vpmovqb word [bp + si * 1 + 0x2], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x32, 0xca], "vpmovqb xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x33, 0x0a], "vpmovdw qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x33, 0x4a, 0x01], "vpmovdw qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x33, 0xca], "vpmovdw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x34, 0x0a], "vpmovqw dword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x34, 0x4a, 0x01], "vpmovqw dword [bp + si * 1 + 0x4], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x34, 0xca], "vpmovqw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x35, 0x0a], "vpmovqd qword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x35, 0x4a, 0x01], "vpmovqd qword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x35, 0xca], "vpmovqd xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x38, 0xca], "vpmovm2d xmm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x39, 0xca], "vpmovd2m k1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x3a, 0xca], "vpbroadcastmw2d xmm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x52, 0x0a], "vdpbf16ps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x52, 0xca], "vdpbf16ps xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x72, 0x0a], "vcvtneps2bf16 xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x72, 0xca], "vcvtneps2bf16 xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x10, 0x0a], "vpmovuswb qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x10, 0x4a, 0x01], "vpmovuswb qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x10, 0xca], "vpmovuswb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x11, 0x0a], "vpmovusdb dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x11, 0x4a, 0x01], "vpmovusdb dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x11, 0xca], "vpmovusdb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x12, 0x0a], "vpmovusqb word [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x12, 0x4a, 0x01], "vpmovusqb word [bp + si * 1 + 0x2]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x12, 0xca], "vpmovusqb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x13, 0x0a], "vpmovusdw qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x13, 0x4a, 0x01], "vpmovusdw qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x13, 0xca], "vpmovusdw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x14, 0x0a], "vpmovusqw dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x14, 0x4a, 0x01], "vpmovusqw dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x14, 0xca], "vpmovusqw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x15, 0x0a], "vpmovusqd qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x15, 0x4a, 0x01], "vpmovusqd qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x15, 0xca], "vpmovusqd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x20, 0x0a], "vpmovswb qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x20, 0x4a, 0x01], "vpmovswb qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x20, 0xca], "vpmovswb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x21, 0x0a], "vpmovsdb dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x21, 0x4a, 0x01], "vpmovsdb dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x21, 0xca], "vpmovsdb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x22, 0x0a], "vpmovsqb word [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x22, 0x4a, 0x01], "vpmovsqb word [bp + si * 1 + 0x2]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x22, 0xca], "vpmovsqb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x23, 0x0a], "vpmovsdw qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x23, 0x4a, 0x01], "vpmovsdw qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x23, 0xca], "vpmovsdw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x24, 0x0a], "vpmovsqw dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x24, 0x4a, 0x01], "vpmovsqw dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x24, 0xca], "vpmovsqw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x25, 0x0a], "vpmovsqd qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x25, 0x4a, 0x01], "vpmovsqd qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x25, 0xca], "vpmovsqd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x26, 0x0a], "vptestnmb k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x26, 0x4a, 0x01], "vptestnmb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x26, 0xca], "vptestnmb k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x27, 0x0a], "vptestnmd k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x27, 0xca], "vptestnmd k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x30, 0x0a], "vpmovwb qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x30, 0x4a, 0x01], "vpmovwb qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x30, 0xca], "vpmovwb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x31, 0x0a], "vpmovdb dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x31, 0x4a, 0x01], "vpmovdb dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x31, 0xca], "vpmovdb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x32, 0x0a], "vpmovqb word [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x32, 0x4a, 0x01], "vpmovqb word [bp + si * 1 + 0x2]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x32, 0xca], "vpmovqb xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x33, 0x0a], "vpmovdw qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x33, 0x4a, 0x01], "vpmovdw qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x33, 0xca], "vpmovdw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x34, 0x0a], "vpmovqw dword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x34, 0x4a, 0x01], "vpmovqw dword [bp + si * 1 + 0x4]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x34, 0xca], "vpmovqw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x35, 0x0a], "vpmovqd qword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x35, 0x4a, 0x01], "vpmovqd qword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x35, 0xca], "vpmovqd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x52, 0xca], "vdpbf16ps xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x0d, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x18, 0x27, 0x0a], "vptestnmd k1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x18, 0x27, 0x4a, 0x01], "vptestnmd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x18, 0x52, 0x0a], "vdpbf16ps xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x18, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x18, 0x72, 0x0a], "vcvtneps2bf16 xmm1, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x18, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x1d, 0x27, 0x0a], "vptestnmd k1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x1d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x1d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x1d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x1d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x1d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x10, 0x0a], "vpmovuswb xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x10, 0x4a, 0x01], "vpmovuswb xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x10, 0xca], "vpmovuswb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x11, 0x0a], "vpmovusdb qword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x11, 0x4a, 0x01], "vpmovusdb qword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x11, 0xca], "vpmovusdb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x12, 0x0a], "vpmovusqb dword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x12, 0x4a, 0x01], "vpmovusqb dword [bp + si * 1 + 0x4], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x12, 0xca], "vpmovusqb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x13, 0x0a], "vpmovusdw xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x13, 0x4a, 0x01], "vpmovusdw xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x13, 0xca], "vpmovusdw xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x14, 0x0a], "vpmovusqw qword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x14, 0x4a, 0x01], "vpmovusqw qword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x14, 0xca], "vpmovusqw xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x15, 0x0a], "vpmovusqd xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x15, 0x4a, 0x01], "vpmovusqd xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x15, 0xca], "vpmovusqd xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x20, 0x0a], "vpmovswb xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x20, 0x4a, 0x01], "vpmovswb xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x20, 0xca], "vpmovswb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x21, 0x0a], "vpmovsdb qword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x21, 0x4a, 0x01], "vpmovsdb qword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x21, 0xca], "vpmovsdb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x22, 0x0a], "vpmovsqb dword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x22, 0x4a, 0x01], "vpmovsqb dword [bp + si * 1 + 0x4], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x22, 0xca], "vpmovsqb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x23, 0x0a], "vpmovsdw xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x23, 0x4a, 0x01], "vpmovsdw xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x23, 0xca], "vpmovsdw xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x24, 0x0a], "vpmovsqw qword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x24, 0x4a, 0x01], "vpmovsqw qword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x24, 0xca], "vpmovsqw xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x25, 0x0a], "vpmovsqd xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x25, 0x4a, 0x01], "vpmovsqd xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x25, 0xca], "vpmovsqd xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x26, 0x0a], "vptestnmb k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x26, 0x4a, 0x01], "vptestnmb k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x26, 0xca], "vptestnmb k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x27, 0x0a], "vptestnmd k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x27, 0x4a, 0x01], "vptestnmd k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x27, 0xca], "vptestnmd k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x28, 0xca], "vpmovm2b ymm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x29, 0xca], "vpmovb2m k1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x30, 0x0a], "vpmovwb xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x30, 0x4a, 0x01], "vpmovwb xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x30, 0xca], "vpmovwb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x31, 0x0a], "vpmovdb qword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x31, 0x4a, 0x01], "vpmovdb qword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x31, 0xca], "vpmovdb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x32, 0x0a], "vpmovqb dword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x32, 0x4a, 0x01], "vpmovqb dword [bp + si * 1 + 0x4], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x32, 0xca], "vpmovqb xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x33, 0x0a], "vpmovdw xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x33, 0x4a, 0x01], "vpmovdw xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x33, 0xca], "vpmovdw xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x34, 0x0a], "vpmovqw qword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x34, 0x4a, 0x01], "vpmovqw qword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x34, 0xca], "vpmovqw xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x35, 0x0a], "vpmovqd xmmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x35, 0x4a, 0x01], "vpmovqd xmmword [bp + si * 1 + 0x10], ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x35, 0xca], "vpmovqd xmm2, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x38, 0xca], "vpmovm2d ymm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x39, 0xca], "vpmovd2m k1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x3a, 0xca], "vpbroadcastmw2d ymm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x52, 0x0a], "vdpbf16ps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x52, 0xca], "vdpbf16ps ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x72, 0x0a], "vcvtneps2bf16 xmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x72, 0xca], "vcvtneps2bf16 xmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x10, 0x0a], "vpmovuswb xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x10, 0x4a, 0x01], "vpmovuswb xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x10, 0xca], "vpmovuswb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x11, 0x0a], "vpmovusdb qword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x11, 0x4a, 0x01], "vpmovusdb qword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x11, 0xca], "vpmovusdb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x12, 0x0a], "vpmovusqb dword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x12, 0x4a, 0x01], "vpmovusqb dword [bp + si * 1 + 0x4]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x12, 0xca], "vpmovusqb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x13, 0x0a], "vpmovusdw xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x13, 0x4a, 0x01], "vpmovusdw xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x13, 0xca], "vpmovusdw xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x14, 0x0a], "vpmovusqw qword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x14, 0x4a, 0x01], "vpmovusqw qword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x14, 0xca], "vpmovusqw xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x15, 0x0a], "vpmovusqd xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x15, 0x4a, 0x01], "vpmovusqd xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x15, 0xca], "vpmovusqd xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x20, 0x0a], "vpmovswb xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x20, 0x4a, 0x01], "vpmovswb xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x20, 0xca], "vpmovswb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x21, 0x0a], "vpmovsdb qword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x21, 0x4a, 0x01], "vpmovsdb qword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x21, 0xca], "vpmovsdb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x22, 0x0a], "vpmovsqb dword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x22, 0x4a, 0x01], "vpmovsqb dword [bp + si * 1 + 0x4]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x22, 0xca], "vpmovsqb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x23, 0x0a], "vpmovsdw xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x23, 0x4a, 0x01], "vpmovsdw xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x23, 0xca], "vpmovsdw xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x24, 0x0a], "vpmovsqw qword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x24, 0x4a, 0x01], "vpmovsqw qword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x24, 0xca], "vpmovsqw xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x25, 0x0a], "vpmovsqd xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x25, 0x4a, 0x01], "vpmovsqd xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x25, 0xca], "vpmovsqd xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x26, 0x0a], "vptestnmb k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x26, 0x4a, 0x01], "vptestnmb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x26, 0xca], "vptestnmb k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x27, 0x0a], "vptestnmd k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x27, 0xca], "vptestnmd k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x30, 0x0a], "vpmovwb xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x30, 0x4a, 0x01], "vpmovwb xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x30, 0xca], "vpmovwb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x31, 0x0a], "vpmovdb qword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x31, 0x4a, 0x01], "vpmovdb qword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x31, 0xca], "vpmovdb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x32, 0x0a], "vpmovqb dword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x32, 0x4a, 0x01], "vpmovqb dword [bp + si * 1 + 0x4]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x32, 0xca], "vpmovqb xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x33, 0x0a], "vpmovdw xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x33, 0x4a, 0x01], "vpmovdw xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x33, 0xca], "vpmovdw xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x34, 0x0a], "vpmovqw qword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x34, 0x4a, 0x01], "vpmovqw qword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x34, 0xca], "vpmovqw xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x35, 0x0a], "vpmovqd xmmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x35, 0x4a, 0x01], "vpmovqd xmmword [bp + si * 1 + 0x10]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x35, 0xca], "vpmovqd xmm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x52, 0x0a], "vdpbf16ps ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x52, 0xca], "vdpbf16ps ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x2d, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x38, 0x27, 0x0a], "vptestnmd k1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x38, 0x27, 0x4a, 0x01], "vptestnmd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x38, 0x52, 0x0a], "vdpbf16ps ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x38, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x38, 0x72, 0x0a], "vcvtneps2bf16 xmm1, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x38, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x3d, 0x27, 0x0a], "vptestnmd k1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x3d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x3d, 0x52, 0x0a], "vdpbf16ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x3d, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x3d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x3d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x10, 0x0a], "vpmovuswb ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x10, 0x4a, 0x01], "vpmovuswb ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x10, 0xca], "vpmovuswb ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x11, 0x0a], "vpmovusdb xmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x11, 0x4a, 0x01], "vpmovusdb xmmword [bp + si * 1 + 0x10], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x11, 0xca], "vpmovusdb xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x12, 0x0a], "vpmovusqb qword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x12, 0x4a, 0x01], "vpmovusqb qword [bp + si * 1 + 0x8], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x12, 0xca], "vpmovusqb xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x13, 0x0a], "vpmovusdw ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x13, 0x4a, 0x01], "vpmovusdw ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x13, 0xca], "vpmovusdw ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x14, 0x0a], "vpmovusqw xmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x14, 0x4a, 0x01], "vpmovusqw xmmword [bp + si * 1 + 0x10], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x14, 0xca], "vpmovusqw xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x15, 0x0a], "vpmovusqd ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x15, 0x4a, 0x01], "vpmovusqd ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x15, 0xca], "vpmovusqd ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x20, 0x0a], "vpmovswb ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x20, 0x4a, 0x01], "vpmovswb ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x20, 0xca], "vpmovswb ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x21, 0x0a], "vpmovsdb xmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x21, 0x4a, 0x01], "vpmovsdb xmmword [bp + si * 1 + 0x10], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x21, 0xca], "vpmovsdb xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x22, 0x0a], "vpmovsqb qword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x22, 0x4a, 0x01], "vpmovsqb qword [bp + si * 1 + 0x8], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x22, 0xca], "vpmovsqb xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x23, 0x0a], "vpmovsdw ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x23, 0x4a, 0x01], "vpmovsdw ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x23, 0xca], "vpmovsdw ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x24, 0x0a], "vpmovsqw xmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x24, 0x4a, 0x01], "vpmovsqw xmmword [bp + si * 1 + 0x10], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x24, 0xca], "vpmovsqw xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x25, 0x0a], "vpmovsqd ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x25, 0x4a, 0x01], "vpmovsqd ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x25, 0xca], "vpmovsqd ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x26, 0x0a], "vptestnmb k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x26, 0x4a, 0x01], "vptestnmb k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x26, 0xca], "vptestnmb k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x27, 0x0a], "vptestnmd k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x27, 0x4a, 0x01], "vptestnmd k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x27, 0xca], "vptestnmd k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x28, 0xca], "vpmovm2b zmm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x29, 0xca], "vpmovb2m k1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x30, 0x0a], "vpmovwb ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x30, 0x4a, 0x01], "vpmovwb ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x30, 0xca], "vpmovwb ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x31, 0x0a], "vpmovdb xmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x31, 0x4a, 0x01], "vpmovdb xmmword [bp + si * 1 + 0x10], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x31, 0xca], "vpmovdb xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x32, 0x0a], "vpmovqb qword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x32, 0x4a, 0x01], "vpmovqb qword [bp + si * 1 + 0x8], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x32, 0xca], "vpmovqb xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x33, 0x0a], "vpmovdw ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x33, 0x4a, 0x01], "vpmovdw ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x33, 0xca], "vpmovdw ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x34, 0x0a], "vpmovqw xmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x34, 0x4a, 0x01], "vpmovqw xmmword [bp + si * 1 + 0x10], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x34, 0xca], "vpmovqw xmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x35, 0x0a], "vpmovqd ymmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x35, 0x4a, 0x01], "vpmovqd ymmword [bp + si * 1 + 0x20], zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x35, 0xca], "vpmovqd ymm2, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x38, 0xca], "vpmovm2d zmm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x39, 0xca], "vpmovd2m k1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x3a, 0xca], "vpbroadcastmw2d zmm1, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x52, 0x0a], "vdpbf16ps zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x52, 0xca], "vdpbf16ps zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x72, 0x0a], "vcvtneps2bf16 ymm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x48, 0x72, 0xca], "vcvtneps2bf16 ymm1, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x10, 0x0a], "vpmovuswb ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x10, 0x4a, 0x01], "vpmovuswb ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x10, 0xca], "vpmovuswb ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x11, 0x0a], "vpmovusdb xmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x11, 0x4a, 0x01], "vpmovusdb xmmword [bp + si * 1 + 0x10]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x11, 0xca], "vpmovusdb xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x12, 0x0a], "vpmovusqb qword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x12, 0x4a, 0x01], "vpmovusqb qword [bp + si * 1 + 0x8]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x12, 0xca], "vpmovusqb xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x13, 0x0a], "vpmovusdw ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x13, 0x4a, 0x01], "vpmovusdw ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x13, 0xca], "vpmovusdw ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x14, 0x0a], "vpmovusqw xmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x14, 0x4a, 0x01], "vpmovusqw xmmword [bp + si * 1 + 0x10]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x14, 0xca], "vpmovusqw xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x15, 0x0a], "vpmovusqd ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x15, 0x4a, 0x01], "vpmovusqd ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x15, 0xca], "vpmovusqd ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x20, 0x0a], "vpmovswb ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x20, 0x4a, 0x01], "vpmovswb ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x20, 0xca], "vpmovswb ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x21, 0x0a], "vpmovsdb xmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x21, 0x4a, 0x01], "vpmovsdb xmmword [bp + si * 1 + 0x10]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x21, 0xca], "vpmovsdb xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x22, 0x0a], "vpmovsqb qword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x22, 0x4a, 0x01], "vpmovsqb qword [bp + si * 1 + 0x8]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x22, 0xca], "vpmovsqb xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x23, 0x0a], "vpmovsdw ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x23, 0x4a, 0x01], "vpmovsdw ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x23, 0xca], "vpmovsdw ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x24, 0x0a], "vpmovsqw xmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x24, 0x4a, 0x01], "vpmovsqw xmmword [bp + si * 1 + 0x10]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x24, 0xca], "vpmovsqw xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x25, 0x0a], "vpmovsqd ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x25, 0x4a, 0x01], "vpmovsqd ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x25, 0xca], "vpmovsqd ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x26, 0x0a], "vptestnmb k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x26, 0x4a, 0x01], "vptestnmb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x26, 0xca], "vptestnmb k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x27, 0x0a], "vptestnmd k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x27, 0xca], "vptestnmd k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x30, 0x0a], "vpmovwb ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x30, 0x4a, 0x01], "vpmovwb ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x30, 0xca], "vpmovwb ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x31, 0x0a], "vpmovdb xmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x31, 0x4a, 0x01], "vpmovdb xmmword [bp + si * 1 + 0x10]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x31, 0xca], "vpmovdb xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x32, 0x0a], "vpmovqb qword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x32, 0x4a, 0x01], "vpmovqb qword [bp + si * 1 + 0x8]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x32, 0xca], "vpmovqb xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x33, 0x0a], "vpmovdw ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x33, 0x4a, 0x01], "vpmovdw ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x33, 0xca], "vpmovdw ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x34, 0x0a], "vpmovqw xmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x34, 0x4a, 0x01], "vpmovqw xmmword [bp + si * 1 + 0x10]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x34, 0xca], "vpmovqw xmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x35, 0x0a], "vpmovqd ymmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x35, 0x4a, 0x01], "vpmovqd ymmword [bp + si * 1 + 0x20]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x35, 0xca], "vpmovqd ymm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x52, 0x0a], "vdpbf16ps zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x52, 0xca], "vdpbf16ps zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x4d, 0x72, 0xca], "vcvtneps2bf16 ymm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x58, 0x27, 0x0a], "vptestnmd k1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x58, 0x27, 0x4a, 0x01], "vptestnmd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x58, 0x52, 0x0a], "vdpbf16ps zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x58, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x58, 0x72, 0x0a], "vcvtneps2bf16 ymm1, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x58, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x5d, 0x27, 0x0a], "vptestnmd k1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x5d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x5d, 0x52, 0x0a], "vdpbf16ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x5d, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x5d, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x5d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x10, 0xca], "vpmovuswb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x11, 0xca], "vpmovusdb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x12, 0xca], "vpmovusqb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x13, 0xca], "vpmovusdw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x14, 0xca], "vpmovusqw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x15, 0xca], "vpmovusqd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x20, 0xca], "vpmovswb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x21, 0xca], "vpmovsdb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x22, 0xca], "vpmovsqb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x23, 0xca], "vpmovsdw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x24, 0xca], "vpmovsqw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x25, 0xca], "vpmovsqd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x30, 0xca], "vpmovwb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x31, 0xca], "vpmovdb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x32, 0xca], "vpmovqb xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x33, 0xca], "vpmovdw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x34, 0xca], "vpmovqw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x35, 0xca], "vpmovqd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x52, 0xca], "vdpbf16ps xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x8d, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x9d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x9d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x9d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0x9d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x10, 0xca], "vpmovuswb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x11, 0xca], "vpmovusdb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x12, 0xca], "vpmovusqb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x13, 0xca], "vpmovusdw xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x14, 0xca], "vpmovusqw xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x15, 0xca], "vpmovusqd xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x20, 0xca], "vpmovswb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x21, 0xca], "vpmovsdb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x22, 0xca], "vpmovsqb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x23, 0xca], "vpmovsdw xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x24, 0xca], "vpmovsqw xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x25, 0xca], "vpmovsqd xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x30, 0xca], "vpmovwb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x31, 0xca], "vpmovdb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x32, 0xca], "vpmovqb xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x33, 0xca], "vpmovdw xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x34, 0xca], "vpmovqw xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x35, 0xca], "vpmovqd xmm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x52, 0x0a], "vdpbf16ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x52, 0xca], "vdpbf16ps ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xad, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0xbd, 0x52, 0x0a], "vdpbf16ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xbd, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xbd, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xbd, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x10, 0xca], "vpmovuswb ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x11, 0xca], "vpmovusdb xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x12, 0xca], "vpmovusqb xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x13, 0xca], "vpmovusdw ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x14, 0xca], "vpmovusqw xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x15, 0xca], "vpmovusqd ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x20, 0xca], "vpmovswb ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x21, 0xca], "vpmovsdb xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x22, 0xca], "vpmovsqb xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x23, 0xca], "vpmovsdw ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x24, 0xca], "vpmovsqw xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x25, 0xca], "vpmovsqd ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x30, 0xca], "vpmovwb ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x31, 0xca], "vpmovdb xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x32, 0xca], "vpmovqb xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x33, 0xca], "vpmovdw ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x34, 0xca], "vpmovqw xmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x35, 0xca], "vpmovqd ymm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x52, 0x0a], "vdpbf16ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x52, 0xca], "vdpbf16ps zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7e, 0xcd, 0x72, 0xca], "vcvtneps2bf16 ymm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0x7e, 0xdd, 0x52, 0x0a], "vdpbf16ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xdd, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xdd, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}{z}, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7e, 0xdd, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0x0a], "vp2intersectd k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0x4a, 0x01], "vp2intersectd k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0xca], "vp2intersectd k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x72, 0xca], "vcvtne2ps2bf16 xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x0d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x0d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x0d, 0x72, 0xca], "vcvtne2ps2bf16 xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x18, 0x68, 0x0a], "vp2intersectd k1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x18, 0x68, 0x4a, 0x01], "vp2intersectd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x18, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x18, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x1d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x1d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x68, 0x0a], "vp2intersectd k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x68, 0x4a, 0x01], "vp2intersectd k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x68, 0xca], "vp2intersectd k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x72, 0xca], "vcvtne2ps2bf16 ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x9b, 0x0a], "v4fmaddss xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0x9b, 0x4a, 0x01], "v4fmaddss xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0xab, 0x0a], "v4fnmaddss xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x28, 0xab, 0x4a, 0x01], "v4fnmaddss xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0x72, 0xca], "vcvtne2ps2bf16 ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0x9b, 0x0a], "v4fmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0x9b, 0x4a, 0x01], "v4fmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0xab, 0x0a], "v4fnmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x2d, 0xab, 0x4a, 0x01], "v4fnmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x38, 0x68, 0x0a], "vp2intersectd k1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x38, 0x68, 0x4a, 0x01], "vp2intersectd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x38, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x38, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x3d, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x3d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x52, 0x0a], "vp4dpwssd zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x52, 0x4a, 0x01], "vp4dpwssd zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x53, 0x0a], "vp4dpwssds zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x53, 0x4a, 0x01], "vp4dpwssds zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x68, 0x0a], "vp2intersectd k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x68, 0x4a, 0x01], "vp2intersectd k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x68, 0xca], "vp2intersectd k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x72, 0xca], "vcvtne2ps2bf16 zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x9a, 0x0a], "v4fmaddps zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0x9a, 0x4a, 0x01], "v4fmaddps zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0xaa, 0x0a], "v4fnmaddps zmm1, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x48, 0xaa, 0x4a, 0x01], "v4fnmaddps zmm1, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x52, 0x0a], "vp4dpwssd zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x52, 0x4a, 0x01], "vp4dpwssd zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x53, 0x0a], "vp4dpwssds zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x53, 0x4a, 0x01], "vp4dpwssds zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x72, 0xca], "vcvtne2ps2bf16 zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x9a, 0x0a], "v4fmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0x9a, 0x4a, 0x01], "v4fmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0xaa, 0x0a], "v4fnmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x4d, 0xaa, 0x4a, 0x01], "v4fnmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x58, 0x68, 0x0a], "vp2intersectd k1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x58, 0x68, 0x4a, 0x01], "vp2intersectd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x58, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x58, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x5d, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x5d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x8d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x8d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0x8d, 0x72, 0xca], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0x9d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0x9d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0x72, 0xca], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0x9b, 0x0a], "v4fmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0x9b, 0x4a, 0x01], "v4fmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0xab, 0x0a], "v4fnmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xad, 0xab, 0x4a, 0x01], "v4fnmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xbd, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0xbd, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x52, 0x0a], "vp4dpwssd zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x52, 0x4a, 0x01], "vp4dpwssd zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x53, 0x0a], "vp4dpwssds zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x53, 0x4a, 0x01], "vp4dpwssds zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x72, 0xca], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x9a, 0x0a], "v4fmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0x9a, 0x4a, 0x01], "v4fmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0xaa, 0x0a], "v4fnmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xcd, 0xaa, 0x4a, 0x01], "v4fnmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0x7f, 0xdd, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}");
-    test_display(&[0x62, 0xf2, 0x7f, 0xdd, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x00, 0x0a], "vpshufb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x00, 0x4a, 0x01], "vpshufb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x00, 0xca], "vpshufb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x04, 0x0a], "vpmaddubsw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x04, 0x4a, 0x01], "vpmaddubsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x04, 0xca], "vpmaddubsw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x0b, 0x0a], "vpmulhrsw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x0b, 0x4a, 0x01], "vpmulhrsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x0b, 0xca], "vpmulhrsw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x0d, 0x0a], "vpermilpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x0d, 0x4a, 0x01], "vpermilpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x0d, 0xca], "vpermilpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x10, 0x0a], "vpsrlvw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x10, 0x4a, 0x01], "vpsrlvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x10, 0xca], "vpsrlvw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x11, 0x0a], "vpsravw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x11, 0x4a, 0x01], "vpsravw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x11, 0xca], "vpsravw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x12, 0x0a], "vpsllvw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x12, 0x4a, 0x01], "vpsllvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x12, 0xca], "vpsllvw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x14, 0x0a], "vprorvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x14, 0x4a, 0x01], "vprorvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x14, 0xca], "vprorvq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x15, 0x0a], "vprolvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x15, 0x4a, 0x01], "vprolvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x15, 0xca], "vprolvq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1c, 0x0a], "vpabsb xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1c, 0x4a, 0x01], "vpabsb xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1c, 0xca], "vpabsb xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1d, 0x0a], "vpabsw xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1d, 0x4a, 0x01], "vpabsw xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1d, 0xca], "vpabsw xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1f, 0x0a], "vpabsq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1f, 0x4a, 0x01], "vpabsq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x1f, 0xca], "vpabsq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x20, 0x0a], "vpmovsxbw xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x20, 0x4a, 0x01], "vpmovsxbw xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x20, 0xca], "vpmovsxbw xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x21, 0x0a], "vpmovsxbd xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x21, 0x4a, 0x01], "vpmovsxbd xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x21, 0xca], "vpmovsxbd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x22, 0x0a], "vpmovsxbq xmm1, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x22, 0x4a, 0x01], "vpmovsxbq xmm1, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x22, 0xca], "vpmovsxbq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x23, 0x0a], "vpmovsxwd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x23, 0x4a, 0x01], "vpmovsxwd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x23, 0xca], "vpmovsxwd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x24, 0x0a], "vpmovsxwq xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x24, 0x4a, 0x01], "vpmovsxwq xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x24, 0xca], "vpmovsxwq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x26, 0x0a], "vptestmw k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x26, 0x4a, 0x01], "vptestmw k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x26, 0xca], "vptestmw k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x27, 0x0a], "vptestmq k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x27, 0x4a, 0x01], "vptestmq k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x27, 0xca], "vptestmq k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x28, 0x0a], "vpmuldq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x28, 0x4a, 0x01], "vpmuldq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x28, 0xca], "vpmuldq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x29, 0x0a], "vpcmpeqq k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x29, 0x4a, 0x01], "vpcmpeqq k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x29, 0xca], "vpcmpeqq k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x2c, 0x0a], "vscalefpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x2c, 0x4a, 0x01], "vscalefpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x2c, 0xca], "vscalefpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x30, 0x0a], "vpmovzxbw xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x30, 0x4a, 0x01], "vpmovzxbw xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x30, 0xca], "vpmovzxbw xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x31, 0x0a], "vpmovzxbd xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x31, 0x4a, 0x01], "vpmovzxbd xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x31, 0xca], "vpmovzxbd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x32, 0x0a], "vpmovzxbq xmm1, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x32, 0x4a, 0x01], "vpmovzxbq xmm1, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x32, 0xca], "vpmovzxbq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x33, 0x0a], "vpmovzxwd xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x33, 0x4a, 0x01], "vpmovzxwd xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x33, 0xca], "vpmovzxwd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x34, 0x0a], "vpmovzxwq xmm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x34, 0x4a, 0x01], "vpmovzxwq xmm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x34, 0xca], "vpmovzxwq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x37, 0x0a], "vpcmpgtq k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x37, 0x4a, 0x01], "vpcmpgtq k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x37, 0xca], "vpcmpgtq k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x38, 0x0a], "vpminsb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x38, 0x4a, 0x01], "vpminsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x38, 0xca], "vpminsb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x39, 0x0a], "vpminsq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x39, 0x4a, 0x01], "vpminsq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x39, 0xca], "vpminsq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3a, 0x0a], "vpminuw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3a, 0x4a, 0x01], "vpminuw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3a, 0xca], "vpminuw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3b, 0x0a], "vpminuq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3b, 0x4a, 0x01], "vpminuq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3b, 0xca], "vpminuq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3c, 0x0a], "vpmaxsb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3c, 0x4a, 0x01], "vpmaxsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3c, 0xca], "vpmaxsb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3d, 0x0a], "vpmaxsq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3d, 0xca], "vpmaxsq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3e, 0x0a], "vpmaxuw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3e, 0x4a, 0x01], "vpmaxuw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3e, 0xca], "vpmaxuw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3f, 0x0a], "vpmaxuq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x3f, 0xca], "vpmaxuq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x40, 0x0a], "vpmullq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x40, 0x4a, 0x01], "vpmullq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x40, 0xca], "vpmullq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x42, 0x0a], "vgetexppd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x42, 0x4a, 0x01], "vgetexppd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x42, 0xca], "vgetexppd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x44, 0x0a], "vplzcntq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x44, 0x4a, 0x01], "vplzcntq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x44, 0xca], "vplzcntq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x45, 0x0a], "vpsrlvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x45, 0x4a, 0x01], "vpsrlvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x45, 0xca], "vpsrlvq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x46, 0x0a], "vpsravq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x46, 0x4a, 0x01], "vpsravq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x46, 0xca], "vpsravq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x47, 0x0a], "vpsllvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x47, 0x4a, 0x01], "vpsllvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x47, 0xca], "vpsllvq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x4c, 0x0a], "vrcp14pd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x4c, 0xca], "vrcp14pd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x4e, 0x0a], "vrsqrt14pd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x4e, 0xca], "vrsqrt14pd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x54, 0x0a], "vpopcntw xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x54, 0x4a, 0x01], "vpopcntw xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x54, 0xca], "vpopcntw xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x55, 0x0a], "vpopcntq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x55, 0x4a, 0x01], "vpopcntq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x55, 0xca], "vpopcntq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x59, 0x0a], "vpbroadcastq xmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x59, 0x4a, 0x01], "vpbroadcastq xmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x59, 0xca], "vpbroadcastq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x62, 0x0a], "vpexpandw xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x62, 0x4a, 0x01], "vpexpandw xmm1, xmmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x62, 0xca], "vpexpandw xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x63, 0x0a], "vpcompressw xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x63, 0x4a, 0x01], "vpcompressw xmmword [bp + si * 1 + 0x2], xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x63, 0xca], "vpcompressw xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x64, 0x0a], "vpblendmq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x64, 0x4a, 0x01], "vpblendmq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x64, 0xca], "vpblendmq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x65, 0x0a], "vblendmpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x65, 0x4a, 0x01], "vblendmpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x65, 0xca], "vblendmpd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x66, 0x0a], "vpblendmw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x66, 0x4a, 0x01], "vpblendmw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x66, 0xca], "vpblendmw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x70, 0x0a], "vpshldvw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x70, 0x4a, 0x01], "vpshldvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x70, 0xca], "vpshldvw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x71, 0x0a], "vpshldvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x71, 0x4a, 0x01], "vpshldvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x71, 0xca], "vpshldvq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x72, 0x0a], "vpshrdvw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x72, 0x4a, 0x01], "vpshrdvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x72, 0xca], "vpshrdvw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x73, 0x0a], "vpshrdvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x73, 0x4a, 0x01], "vpshrdvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x73, 0xca], "vpshrdvq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x75, 0x0a], "vpermi2w xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x75, 0x4a, 0x01], "vpermi2w xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x75, 0xca], "vpermi2w xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x76, 0x0a], "vpermi2q xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x76, 0x4a, 0x01], "vpermi2q xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x76, 0xca], "vpermi2q xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x77, 0x0a], "vpermi2pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x77, 0x4a, 0x01], "vpermi2pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x77, 0xca], "vpermi2pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7c, 0xca], "vpbroadcastd xmm1, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7d, 0x0a], "vpermt2w xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7d, 0x4a, 0x01], "vpermt2w xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7d, 0xca], "vpermt2w xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7e, 0x0a], "vpermt2q xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7e, 0x4a, 0x01], "vpermt2q xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7e, 0xca], "vpermt2q xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7f, 0x0a], "vpermt2pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x7f, 0xca], "vpermt2pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x83, 0x0a], "vpmultishiftqb xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x83, 0xca], "vpmultishiftqb xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x88, 0x0a], "vexpandpd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x88, 0x4a, 0x01], "vexpandpd xmm1, xmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x88, 0xca], "vexpandpd xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x89, 0x0a], "vpexpandq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x89, 0x4a, 0x01], "vpexpandq xmm1, xmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x89, 0xca], "vpexpandq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8a, 0x0a], "vcompresspd xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8a, 0x4a, 0x01], "vcompresspd xmmword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8a, 0xca], "vcompresspd xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8b, 0x0a], "vpcompressq xmmword [bp + si * 1], xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8b, 0x4a, 0x01], "vpcompressq xmmword [bp + si * 1 + 0x8], xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8b, 0xca], "vpcompressq xmm2, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8d, 0x0a], "vpermw xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8d, 0x4a, 0x01], "vpermw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x8d, 0xca], "vpermw xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x96, 0x0a], "vfmaddsub132pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x96, 0xca], "vfmaddsub132pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x97, 0x0a], "vfmsubadd132pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x97, 0xca], "vfmsubadd132pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x98, 0x0a], "vfmadd132pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x98, 0xca], "vfmadd132pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9a, 0x0a], "vfmsub132pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9a, 0xca], "vfmsub132pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9c, 0x0a], "vfnmadd132pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9c, 0xca], "vfnmadd132pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9e, 0x0a], "vfnmsub132pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0x9e, 0xca], "vfnmsub132pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa6, 0x0a], "vfmaddsub213pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa6, 0xca], "vfmaddsub213pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa7, 0x0a], "vfmsubadd213pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa7, 0xca], "vfmsubadd213pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa8, 0x0a], "vfmadd213pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xa8, 0xca], "vfmadd213pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xaa, 0x0a], "vfmsub213pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xaa, 0xca], "vfmsub213pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xac, 0x0a], "vfnmadd213pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xac, 0xca], "vfnmadd213pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xae, 0x0a], "vfnmsub213pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xae, 0xca], "vfnmsub213pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb4, 0x0a], "vpmadd52luq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb4, 0xca], "vpmadd52luq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb5, 0x0a], "vpmadd52huq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb5, 0xca], "vpmadd52huq xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb6, 0x0a], "vfmaddsub231pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb6, 0xca], "vfmaddsub231pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb7, 0x0a], "vfmsubadd231pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb7, 0xca], "vfmsubadd231pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb8, 0x0a], "vfmadd231pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xb8, 0xca], "vfmadd231pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xba, 0x0a], "vfmsub231pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xba, 0xca], "vfmsub231pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xbc, 0x0a], "vfnmadd231pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xbc, 0xca], "vfnmadd231pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xbe, 0x0a], "vfnmsub231pd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xbe, 0xca], "vfnmsub231pd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xc4, 0x0a], "vpconflictq xmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xc4, 0x4a, 0x01], "vpconflictq xmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xc4, 0xca], "vpconflictq xmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdc, 0x0a], "vaesenc xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdc, 0x4a, 0x01], "vaesenc xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdc, 0xca], "vaesenc xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdd, 0x0a], "vaesenclast xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdd, 0x4a, 0x01], "vaesenclast xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdd, 0xca], "vaesenclast xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xde, 0x0a], "vaesdec xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xde, 0x4a, 0x01], "vaesdec xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xde, 0xca], "vaesdec xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdf, 0x0a], "vaesdeclast xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdf, 0x4a, 0x01], "vaesdeclast xmm1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x08, 0xdf, 0xca], "vaesdeclast xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x00, 0x0a], "vpshufb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x00, 0x4a, 0x01], "vpshufb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x00, 0xca], "vpshufb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x04, 0x0a], "vpmaddubsw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x04, 0x4a, 0x01], "vpmaddubsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x04, 0xca], "vpmaddubsw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x0b, 0x0a], "vpmulhrsw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x0b, 0x4a, 0x01], "vpmulhrsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x0b, 0xca], "vpmulhrsw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x0d, 0x0a], "vpermilpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x0d, 0xca], "vpermilpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x10, 0x0a], "vpsrlvw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x10, 0x4a, 0x01], "vpsrlvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x10, 0xca], "vpsrlvw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x11, 0x0a], "vpsravw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x11, 0x4a, 0x01], "vpsravw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x11, 0xca], "vpsravw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x12, 0x0a], "vpsllvw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x12, 0x4a, 0x01], "vpsllvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x12, 0xca], "vpsllvw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x14, 0x0a], "vprorvq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x14, 0xca], "vprorvq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x15, 0x0a], "vprolvq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x15, 0xca], "vprolvq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1c, 0x0a], "vpabsb xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1c, 0x4a, 0x01], "vpabsb xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1c, 0xca], "vpabsb xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1d, 0x0a], "vpabsw xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1d, 0x4a, 0x01], "vpabsw xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1d, 0xca], "vpabsw xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1f, 0x0a], "vpabsq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x1f, 0xca], "vpabsq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x20, 0x0a], "vpmovsxbw xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x20, 0x4a, 0x01], "vpmovsxbw xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x20, 0xca], "vpmovsxbw xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x21, 0x0a], "vpmovsxbd xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x21, 0x4a, 0x01], "vpmovsxbd xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x21, 0xca], "vpmovsxbd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x22, 0x0a], "vpmovsxbq xmm1{k5}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x22, 0x4a, 0x01], "vpmovsxbq xmm1{k5}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x22, 0xca], "vpmovsxbq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x23, 0x0a], "vpmovsxwd xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x23, 0x4a, 0x01], "vpmovsxwd xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x23, 0xca], "vpmovsxwd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x24, 0x0a], "vpmovsxwq xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x24, 0x4a, 0x01], "vpmovsxwq xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x24, 0xca], "vpmovsxwq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x26, 0x0a], "vptestmw k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x26, 0x4a, 0x01], "vptestmw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x26, 0xca], "vptestmw k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x27, 0x0a], "vptestmq k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x27, 0xca], "vptestmq k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x28, 0x0a], "vpmuldq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x28, 0xca], "vpmuldq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x29, 0x0a], "vpcmpeqq k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x29, 0xca], "vpcmpeqq k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x2c, 0x0a], "vscalefpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x2c, 0xca], "vscalefpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x30, 0x0a], "vpmovzxbw xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x30, 0x4a, 0x01], "vpmovzxbw xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x30, 0xca], "vpmovzxbw xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x31, 0x0a], "vpmovzxbd xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x31, 0x4a, 0x01], "vpmovzxbd xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x31, 0xca], "vpmovzxbd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x32, 0x0a], "vpmovzxbq xmm1{k5}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x32, 0x4a, 0x01], "vpmovzxbq xmm1{k5}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x32, 0xca], "vpmovzxbq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x33, 0x0a], "vpmovzxwd xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x33, 0x4a, 0x01], "vpmovzxwd xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x33, 0xca], "vpmovzxwd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x34, 0x0a], "vpmovzxwq xmm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x34, 0x4a, 0x01], "vpmovzxwq xmm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x34, 0xca], "vpmovzxwq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x37, 0x0a], "vpcmpgtq k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x37, 0xca], "vpcmpgtq k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x38, 0x0a], "vpminsb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x38, 0x4a, 0x01], "vpminsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x38, 0xca], "vpminsb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x39, 0x0a], "vpminsq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x39, 0xca], "vpminsq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3a, 0x0a], "vpminuw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3a, 0x4a, 0x01], "vpminuw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3a, 0xca], "vpminuw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3b, 0x0a], "vpminuq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3b, 0xca], "vpminuq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3c, 0x0a], "vpmaxsb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3c, 0x4a, 0x01], "vpmaxsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3c, 0xca], "vpmaxsb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3d, 0xca], "vpmaxsq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3e, 0x0a], "vpmaxuw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3e, 0x4a, 0x01], "vpmaxuw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3e, 0xca], "vpmaxuw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x3f, 0xca], "vpmaxuq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x40, 0x0a], "vpmullq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x40, 0xca], "vpmullq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x42, 0x0a], "vgetexppd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x42, 0xca], "vgetexppd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x44, 0x0a], "vplzcntq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x44, 0xca], "vplzcntq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x45, 0x0a], "vpsrlvq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x45, 0xca], "vpsrlvq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x46, 0x0a], "vpsravq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x46, 0xca], "vpsravq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x47, 0x0a], "vpsllvq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x47, 0xca], "vpsllvq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x4c, 0xca], "vrcp14pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x4e, 0xca], "vrsqrt14pd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x54, 0x0a], "vpopcntw xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x54, 0x4a, 0x01], "vpopcntw xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x54, 0xca], "vpopcntw xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x55, 0x0a], "vpopcntq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x55, 0xca], "vpopcntq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x59, 0x0a], "vpbroadcastq xmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x59, 0x4a, 0x01], "vpbroadcastq xmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x59, 0xca], "vpbroadcastq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x62, 0x0a], "vpexpandw xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x62, 0x4a, 0x01], "vpexpandw xmm1{k5}, xmmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x62, 0xca], "vpexpandw xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x63, 0x0a], "vpcompressw xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x63, 0x4a, 0x01], "vpcompressw xmmword [bp + si * 1 + 0x2]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x63, 0xca], "vpcompressw xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x64, 0x0a], "vpblendmq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x64, 0xca], "vpblendmq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x65, 0x0a], "vblendmpd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x65, 0xca], "vblendmpd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x66, 0x0a], "vpblendmw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x66, 0x4a, 0x01], "vpblendmw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x66, 0xca], "vpblendmw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x70, 0x0a], "vpshldvw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x70, 0x4a, 0x01], "vpshldvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x70, 0xca], "vpshldvw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x71, 0x0a], "vpshldvq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x71, 0xca], "vpshldvq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x72, 0x0a], "vpshrdvw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x72, 0x4a, 0x01], "vpshrdvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x72, 0xca], "vpshrdvw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x73, 0x0a], "vpshrdvq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x73, 0xca], "vpshrdvq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x75, 0x0a], "vpermi2w xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x75, 0x4a, 0x01], "vpermi2w xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x75, 0xca], "vpermi2w xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x76, 0x0a], "vpermi2q xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x76, 0xca], "vpermi2q xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x77, 0x0a], "vpermi2pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x77, 0xca], "vpermi2pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7c, 0xca], "vpbroadcastd xmm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7d, 0x0a], "vpermt2w xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7d, 0x4a, 0x01], "vpermt2w xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7d, 0xca], "vpermt2w xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7e, 0x0a], "vpermt2q xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7e, 0xca], "vpermt2q xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x7f, 0xca], "vpermt2pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x83, 0xca], "vpmultishiftqb xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x88, 0x0a], "vexpandpd xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x88, 0x4a, 0x01], "vexpandpd xmm1{k5}, xmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x88, 0xca], "vexpandpd xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x89, 0x0a], "vpexpandq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x89, 0x4a, 0x01], "vpexpandq xmm1{k5}, xmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x89, 0xca], "vpexpandq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8a, 0x0a], "vcompresspd xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8a, 0x4a, 0x01], "vcompresspd xmmword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8a, 0xca], "vcompresspd xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8b, 0x0a], "vpcompressq xmmword [bp + si * 1]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8b, 0x4a, 0x01], "vpcompressq xmmword [bp + si * 1 + 0x8]{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8b, 0xca], "vpcompressq xmm2{k5}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8d, 0x0a], "vpermw xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8d, 0x4a, 0x01], "vpermw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x8d, 0xca], "vpermw xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x96, 0xca], "vfmaddsub132pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x97, 0xca], "vfmsubadd132pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x98, 0xca], "vfmadd132pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9a, 0xca], "vfmsub132pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9c, 0xca], "vfnmadd132pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0x9e, 0xca], "vfnmsub132pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa6, 0xca], "vfmaddsub213pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa7, 0xca], "vfmsubadd213pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xa8, 0xca], "vfmadd213pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xaa, 0xca], "vfmsub213pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xac, 0xca], "vfnmadd213pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xae, 0xca], "vfnmsub213pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb4, 0xca], "vpmadd52luq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb5, 0xca], "vpmadd52huq xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb6, 0xca], "vfmaddsub231pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb7, 0xca], "vfmsubadd231pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xb8, 0xca], "vfmadd231pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xba, 0xca], "vfmsub231pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xbc, 0xca], "vfnmadd231pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xbe, 0xca], "vfnmsub231pd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xc4, 0x0a], "vpconflictq xmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0d, 0xc4, 0xca], "vpconflictq xmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x0d, 0x0a], "vpermilpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x0d, 0x4a, 0x01], "vpermilpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x14, 0x0a], "vprorvq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x14, 0x4a, 0x01], "vprorvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x15, 0x0a], "vprolvq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x15, 0x4a, 0x01], "vprolvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x1f, 0x0a], "vpabsq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x1f, 0x4a, 0x01], "vpabsq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x27, 0x0a], "vptestmq k1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x27, 0x4a, 0x01], "vptestmq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x28, 0x0a], "vpmuldq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x28, 0x4a, 0x01], "vpmuldq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x29, 0x0a], "vpcmpeqq k1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x29, 0x4a, 0x01], "vpcmpeqq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x2c, 0x0a], "vscalefpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x2c, 0x4a, 0x01], "vscalefpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x2c, 0xca], "vscalefpd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x2d, 0xca], "vscalefsd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x37, 0x0a], "vpcmpgtq k1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x37, 0x4a, 0x01], "vpcmpgtq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x39, 0x0a], "vpminsq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x39, 0x4a, 0x01], "vpminsq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x3b, 0x0a], "vpminuq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x3b, 0x4a, 0x01], "vpminuq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x3d, 0x0a], "vpmaxsq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x3f, 0x0a], "vpmaxuq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x40, 0x0a], "vpmullq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x40, 0x4a, 0x01], "vpmullq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x42, 0x0a], "vgetexppd xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x42, 0x4a, 0x01], "vgetexppd xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x44, 0x0a], "vplzcntq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x44, 0x4a, 0x01], "vplzcntq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x45, 0x0a], "vpsrlvq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x45, 0x4a, 0x01], "vpsrlvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x46, 0x0a], "vpsravq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x46, 0x4a, 0x01], "vpsravq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x47, 0x0a], "vpsllvq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x47, 0x4a, 0x01], "vpsllvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x4c, 0x0a], "vrcp14pd xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x4e, 0x0a], "vrsqrt14pd xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x55, 0x0a], "vpopcntq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x55, 0x4a, 0x01], "vpopcntq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x64, 0x0a], "vpblendmq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x64, 0x4a, 0x01], "vpblendmq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x65, 0x0a], "vblendmpd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x65, 0x4a, 0x01], "vblendmpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x71, 0x0a], "vpshldvq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x71, 0x4a, 0x01], "vpshldvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x73, 0x0a], "vpshrdvq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x73, 0x4a, 0x01], "vpshrdvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x76, 0x0a], "vpermi2q xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x76, 0x4a, 0x01], "vpermi2q xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x77, 0x0a], "vpermi2pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x77, 0x4a, 0x01], "vpermi2pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x7e, 0x0a], "vpermt2q xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x7e, 0x4a, 0x01], "vpermt2q xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x7f, 0x0a], "vpermt2pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x83, 0x0a], "vpmultishiftqb xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x96, 0x0a], "vfmaddsub132pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x96, 0xca], "vfmaddsub132pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x97, 0x0a], "vfmsubadd132pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x97, 0xca], "vfmsubadd132pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x98, 0x0a], "vfmadd132pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x98, 0xca], "vfmadd132pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x99, 0xca], "vfmadd132sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9a, 0x0a], "vfmsub132pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9a, 0xca], "vfmsub132pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9b, 0xca], "vfmsub132sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9c, 0x0a], "vfnmadd132pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9c, 0xca], "vfnmadd132pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9d, 0xca], "vfnmadd132sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9e, 0x0a], "vfnmsub132pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9e, 0xca], "vfnmsub132pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0x9f, 0xca], "vfnmsub132sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa6, 0x0a], "vfmaddsub213pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa6, 0xca], "vfmaddsub213pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa7, 0x0a], "vfmsubadd213pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa7, 0xca], "vfmsubadd213pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa8, 0x0a], "vfmadd213pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa8, 0xca], "vfmadd213pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xa9, 0xca], "vfmadd213sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xaa, 0x0a], "vfmsub213pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xaa, 0xca], "vfmsub213pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xab, 0xca], "vfmsub213sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xac, 0x0a], "vfnmadd213pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xac, 0xca], "vfnmadd213pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xad, 0xca], "vfnmadd213sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xae, 0x0a], "vfnmsub213pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xae, 0xca], "vfnmsub213pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xaf, 0xca], "vfnmsub213sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb4, 0x0a], "vpmadd52luq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb5, 0x0a], "vpmadd52huq xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb6, 0x0a], "vfmaddsub231pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb6, 0xca], "vfmaddsub231pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb7, 0x0a], "vfmsubadd231pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb7, 0xca], "vfmsubadd231pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb8, 0x0a], "vfmadd231pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb8, 0xca], "vfmadd231pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xb9, 0xca], "vfmadd231sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xba, 0x0a], "vfmsub231pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xba, 0xca], "vfmsub231pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbb, 0xca], "vfmsub231sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbc, 0x0a], "vfnmadd231pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbc, 0xca], "vfnmadd231pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbd, 0xca], "vfnmadd231sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbe, 0x0a], "vfnmsub231pd xmm1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbe, 0xca], "vfnmsub231pd zmm1{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xbf, 0xca], "vfnmsub231sd xmm1{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xc4, 0x0a], "vpconflictq xmm1, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x18, 0xc4, 0x4a, 0x01], "vpconflictq xmm1, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x0d, 0x0a], "vpermilpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x14, 0x0a], "vprorvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x15, 0x0a], "vprolvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x1f, 0x0a], "vpabsq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x27, 0x0a], "vptestmq k1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x28, 0x0a], "vpmuldq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x29, 0x0a], "vpcmpeqq k1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x2c, 0x0a], "vscalefpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x2c, 0xca], "vscalefpd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x2d, 0xca], "vscalefsd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x37, 0x0a], "vpcmpgtq k1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x39, 0x0a], "vpminsq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x3b, 0x0a], "vpminuq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x40, 0x0a], "vpmullq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x42, 0x0a], "vgetexppd xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x44, 0x0a], "vplzcntq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x45, 0x0a], "vpsrlvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x46, 0x0a], "vpsravq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x47, 0x0a], "vpsllvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x55, 0x0a], "vpopcntq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x64, 0x0a], "vpblendmq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x65, 0x0a], "vblendmpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x71, 0x0a], "vpshldvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x73, 0x0a], "vpshrdvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x76, 0x0a], "vpermi2q xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x77, 0x0a], "vpermi2pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x7e, 0x0a], "vpermt2q xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xc4, 0x0a], "vpconflictq xmm1{k5}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x1d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x00, 0x0a], "vpshufb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x00, 0x4a, 0x01], "vpshufb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x00, 0xca], "vpshufb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x04, 0x0a], "vpmaddubsw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x04, 0x4a, 0x01], "vpmaddubsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x04, 0xca], "vpmaddubsw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x0b, 0x0a], "vpmulhrsw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x0b, 0x4a, 0x01], "vpmulhrsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x0b, 0xca], "vpmulhrsw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x0d, 0x0a], "vpermilpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x0d, 0x4a, 0x01], "vpermilpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x0d, 0xca], "vpermilpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x10, 0x0a], "vpsrlvw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x10, 0x4a, 0x01], "vpsrlvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x10, 0xca], "vpsrlvw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x11, 0x0a], "vpsravw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x11, 0x4a, 0x01], "vpsravw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x11, 0xca], "vpsravw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x12, 0x0a], "vpsllvw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x12, 0x4a, 0x01], "vpsllvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x12, 0xca], "vpsllvw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x14, 0x0a], "vprorvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x14, 0x4a, 0x01], "vprorvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x14, 0xca], "vprorvq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x15, 0x0a], "vprolvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x15, 0x4a, 0x01], "vprolvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x15, 0xca], "vprolvq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x16, 0x0a], "vpermpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x16, 0x4a, 0x01], "vpermpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x16, 0xca], "vpermpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x19, 0x0a], "vbroadcastsd ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x19, 0x4a, 0x01], "vbroadcastsd ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x19, 0xca], "vbroadcastsd ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1a, 0x0a], "vbroadcastf64x2 ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1c, 0x0a], "vpabsb ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1c, 0x4a, 0x01], "vpabsb ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1c, 0xca], "vpabsb ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1d, 0x0a], "vpabsw ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1d, 0x4a, 0x01], "vpabsw ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1d, 0xca], "vpabsw ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1f, 0x0a], "vpabsq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1f, 0x4a, 0x01], "vpabsq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x1f, 0xca], "vpabsq ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x20, 0x0a], "vpmovsxbw ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x20, 0x4a, 0x01], "vpmovsxbw ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x20, 0xca], "vpmovsxbw ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x21, 0x0a], "vpmovsxbd ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x21, 0x4a, 0x01], "vpmovsxbd ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x21, 0xca], "vpmovsxbd ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x22, 0x0a], "vpmovsxbq ymm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x22, 0x4a, 0x01], "vpmovsxbq ymm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x22, 0xca], "vpmovsxbq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x23, 0x0a], "vpmovsxwd ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x23, 0x4a, 0x01], "vpmovsxwd ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x23, 0xca], "vpmovsxwd ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x24, 0x0a], "vpmovsxwq ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x24, 0x4a, 0x01], "vpmovsxwq ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x24, 0xca], "vpmovsxwq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x26, 0x0a], "vptestmw k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x26, 0x4a, 0x01], "vptestmw k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x26, 0xca], "vptestmw k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x27, 0x0a], "vptestmq k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x27, 0x4a, 0x01], "vptestmq k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x27, 0xca], "vptestmq k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x28, 0x0a], "vpmuldq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x28, 0x4a, 0x01], "vpmuldq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x28, 0xca], "vpmuldq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x29, 0x0a], "vpcmpeqq k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x29, 0x4a, 0x01], "vpcmpeqq k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x29, 0xca], "vpcmpeqq k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x2c, 0x0a], "vscalefpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x2c, 0x4a, 0x01], "vscalefpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x2c, 0xca], "vscalefpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x2d, 0x0a], "vscalefsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x2d, 0x4a, 0x01], "vscalefsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x2d, 0xca], "vscalefsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x30, 0x0a], "vpmovzxbw ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x30, 0x4a, 0x01], "vpmovzxbw ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x30, 0xca], "vpmovzxbw ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x31, 0x0a], "vpmovzxbd ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x31, 0x4a, 0x01], "vpmovzxbd ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x31, 0xca], "vpmovzxbd ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x32, 0x0a], "vpmovzxbq ymm1, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x32, 0x4a, 0x01], "vpmovzxbq ymm1, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x32, 0xca], "vpmovzxbq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x33, 0x0a], "vpmovzxwd ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x33, 0x4a, 0x01], "vpmovzxwd ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x33, 0xca], "vpmovzxwd ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x34, 0x0a], "vpmovzxwq ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x34, 0x4a, 0x01], "vpmovzxwq ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x34, 0xca], "vpmovzxwq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x36, 0x0a], "vpermq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x36, 0x4a, 0x01], "vpermq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x36, 0xca], "vpermq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x37, 0x0a], "vpcmpgtq k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x37, 0x4a, 0x01], "vpcmpgtq k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x37, 0xca], "vpcmpgtq k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x38, 0x0a], "vpminsb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x38, 0x4a, 0x01], "vpminsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x38, 0xca], "vpminsb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x39, 0x0a], "vpminsq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x39, 0x4a, 0x01], "vpminsq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x39, 0xca], "vpminsq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3a, 0x0a], "vpminuw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3a, 0x4a, 0x01], "vpminuw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3a, 0xca], "vpminuw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3b, 0x0a], "vpminuq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3b, 0x4a, 0x01], "vpminuq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3b, 0xca], "vpminuq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3c, 0x0a], "vpmaxsb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3c, 0x4a, 0x01], "vpmaxsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3c, 0xca], "vpmaxsb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3d, 0x0a], "vpmaxsq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3d, 0xca], "vpmaxsq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3e, 0x0a], "vpmaxuw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3e, 0x4a, 0x01], "vpmaxuw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3e, 0xca], "vpmaxuw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3f, 0x0a], "vpmaxuq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x3f, 0xca], "vpmaxuq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x40, 0x0a], "vpmullq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x40, 0x4a, 0x01], "vpmullq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x40, 0xca], "vpmullq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x42, 0x0a], "vgetexppd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x42, 0x4a, 0x01], "vgetexppd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x42, 0xca], "vgetexppd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x43, 0x0a], "vgetexpsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x43, 0x4a, 0x01], "vgetexpsd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x43, 0xca], "vgetexpsd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x44, 0x0a], "vplzcntq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x44, 0x4a, 0x01], "vplzcntq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x44, 0xca], "vplzcntq ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x45, 0x0a], "vpsrlvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x45, 0x4a, 0x01], "vpsrlvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x45, 0xca], "vpsrlvq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x46, 0x0a], "vpsravq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x46, 0x4a, 0x01], "vpsravq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x46, 0xca], "vpsravq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x47, 0x0a], "vpsllvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x47, 0x4a, 0x01], "vpsllvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x47, 0xca], "vpsllvq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4c, 0x0a], "vrcp14pd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4c, 0xca], "vrcp14pd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4d, 0x0a], "vrcp14sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4d, 0x4a, 0x01], "vrcp14sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4d, 0xca], "vrcp14sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4e, 0x0a], "vrsqrt14pd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4e, 0xca], "vrsqrt14pd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4f, 0x0a], "vrsqrt14sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4f, 0x4a, 0x01], "vrsqrt14sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x4f, 0xca], "vrsqrt14sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x54, 0x0a], "vpopcntw ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x54, 0x4a, 0x01], "vpopcntw ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x54, 0xca], "vpopcntw ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x55, 0x0a], "vpopcntq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x55, 0x4a, 0x01], "vpopcntq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x55, 0xca], "vpopcntq ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x59, 0x0a], "vpbroadcastq ymm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x59, 0x4a, 0x01], "vpbroadcastq ymm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x59, 0xca], "vpbroadcastq ymm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x5a, 0x0a], "vbroadcasti64x2 ymm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 ymm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x62, 0x0a], "vpexpandw ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x62, 0x4a, 0x01], "vpexpandw ymm1, ymmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x62, 0xca], "vpexpandw ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x63, 0x0a], "vpcompressw ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x63, 0x4a, 0x01], "vpcompressw ymmword [bp + si * 1 + 0x2], ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x63, 0xca], "vpcompressw ymm2, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x64, 0x0a], "vpblendmq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x64, 0x4a, 0x01], "vpblendmq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x64, 0xca], "vpblendmq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x65, 0x0a], "vblendmpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x65, 0x4a, 0x01], "vblendmpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x65, 0xca], "vblendmpd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x66, 0x0a], "vpblendmw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x66, 0x4a, 0x01], "vpblendmw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x66, 0xca], "vpblendmw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x70, 0x0a], "vpshldvw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x70, 0x4a, 0x01], "vpshldvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x70, 0xca], "vpshldvw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x71, 0x0a], "vpshldvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x71, 0x4a, 0x01], "vpshldvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x71, 0xca], "vpshldvq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x72, 0x0a], "vpshrdvw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x72, 0x4a, 0x01], "vpshrdvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x72, 0xca], "vpshrdvw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x73, 0x0a], "vpshrdvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x73, 0x4a, 0x01], "vpshrdvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x73, 0xca], "vpshrdvq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x75, 0x0a], "vpermi2w ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x75, 0x4a, 0x01], "vpermi2w ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x75, 0xca], "vpermi2w ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x76, 0x0a], "vpermi2q ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x76, 0x4a, 0x01], "vpermi2q ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x76, 0xca], "vpermi2q ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x77, 0x0a], "vpermi2pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x77, 0x4a, 0x01], "vpermi2pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x77, 0xca], "vpermi2pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7c, 0xca], "vpbroadcastd ymm1, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7d, 0x0a], "vpermt2w ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7d, 0x4a, 0x01], "vpermt2w ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7d, 0xca], "vpermt2w ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7e, 0x0a], "vpermt2q ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7e, 0x4a, 0x01], "vpermt2q ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7e, 0xca], "vpermt2q ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7f, 0x0a], "vpermt2pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x7f, 0xca], "vpermt2pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x83, 0x0a], "vpmultishiftqb ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x83, 0xca], "vpmultishiftqb ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x88, 0x0a], "vexpandpd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x88, 0x4a, 0x01], "vexpandpd ymm1, ymmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x88, 0xca], "vexpandpd ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x89, 0x0a], "vpexpandq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x89, 0x4a, 0x01], "vpexpandq ymm1, ymmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x89, 0xca], "vpexpandq ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8a, 0x0a], "vcompresspd ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8a, 0x4a, 0x01], "vcompresspd ymmword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8a, 0xca], "vcompresspd ymm2, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8b, 0x0a], "vpcompressq ymmword [bp + si * 1], ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8b, 0x4a, 0x01], "vpcompressq ymmword [bp + si * 1 + 0x8], ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8b, 0xca], "vpcompressq ymm2, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8d, 0x0a], "vpermw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8d, 0x4a, 0x01], "vpermw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x8d, 0xca], "vpermw ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x96, 0x0a], "vfmaddsub132pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x96, 0xca], "vfmaddsub132pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x97, 0x0a], "vfmsubadd132pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x97, 0xca], "vfmsubadd132pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x98, 0x0a], "vfmadd132pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x98, 0xca], "vfmadd132pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x99, 0x0a], "vfmadd132sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x99, 0x4a, 0x01], "vfmadd132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x99, 0xca], "vfmadd132sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9a, 0x0a], "vfmsub132pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9a, 0xca], "vfmsub132pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9b, 0x0a], "vfmsub132sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9b, 0x4a, 0x01], "vfmsub132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9b, 0xca], "vfmsub132sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9c, 0x0a], "vfnmadd132pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9c, 0xca], "vfnmadd132pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9d, 0x0a], "vfnmadd132sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9d, 0x4a, 0x01], "vfnmadd132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9d, 0xca], "vfnmadd132sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9e, 0x0a], "vfnmsub132pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9e, 0xca], "vfnmsub132pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9f, 0x0a], "vfnmsub132sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9f, 0x4a, 0x01], "vfnmsub132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0x9f, 0xca], "vfnmsub132sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa6, 0x0a], "vfmaddsub213pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa6, 0xca], "vfmaddsub213pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa7, 0x0a], "vfmsubadd213pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa7, 0xca], "vfmsubadd213pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa8, 0x0a], "vfmadd213pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa8, 0xca], "vfmadd213pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa9, 0x0a], "vfmadd213sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa9, 0x4a, 0x01], "vfmadd213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xa9, 0xca], "vfmadd213sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xaa, 0x0a], "vfmsub213pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xaa, 0xca], "vfmsub213pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xab, 0x0a], "vfmsub213sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xab, 0x4a, 0x01], "vfmsub213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xab, 0xca], "vfmsub213sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xac, 0x0a], "vfnmadd213pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xac, 0xca], "vfnmadd213pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xad, 0x0a], "vfnmadd213sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xad, 0x4a, 0x01], "vfnmadd213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xad, 0xca], "vfnmadd213sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xae, 0x0a], "vfnmsub213pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xae, 0xca], "vfnmsub213pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xaf, 0x0a], "vfnmsub213sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xaf, 0x4a, 0x01], "vfnmsub213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xaf, 0xca], "vfnmsub213sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb4, 0x0a], "vpmadd52luq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb4, 0xca], "vpmadd52luq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb5, 0x0a], "vpmadd52huq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb5, 0xca], "vpmadd52huq ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb6, 0x0a], "vfmaddsub231pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb6, 0xca], "vfmaddsub231pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb7, 0x0a], "vfmsubadd231pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb7, 0xca], "vfmsubadd231pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb8, 0x0a], "vfmadd231pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb8, 0xca], "vfmadd231pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb9, 0x0a], "vfmadd231sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb9, 0x4a, 0x01], "vfmadd231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xb9, 0xca], "vfmadd231sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xba, 0x0a], "vfmsub231pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xba, 0xca], "vfmsub231pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbb, 0x0a], "vfmsub231sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbb, 0x4a, 0x01], "vfmsub231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbb, 0xca], "vfmsub231sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbc, 0x0a], "vfnmadd231pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbc, 0xca], "vfnmadd231pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbd, 0x0a], "vfnmadd231sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbd, 0x4a, 0x01], "vfnmadd231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbd, 0xca], "vfnmadd231sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbe, 0x0a], "vfnmsub231pd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbe, 0xca], "vfnmsub231pd ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbf, 0x0a], "vfnmsub231sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbf, 0x4a, 0x01], "vfnmsub231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xbf, 0xca], "vfnmsub231sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xc4, 0x0a], "vpconflictq ymm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xc4, 0x4a, 0x01], "vpconflictq ymm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xc4, 0xca], "vpconflictq ymm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xcb, 0x0a], "vrcp28sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xcb, 0x4a, 0x01], "vrcp28sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xcb, 0xca], "vrcp28sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xcd, 0x0a], "vrsqrt28sd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xcd, 0x4a, 0x01], "vrsqrt28sd xmm1, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xcd, 0xca], "vrsqrt28sd xmm1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdc, 0x0a], "vaesenc ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdc, 0x4a, 0x01], "vaesenc ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdc, 0xca], "vaesenc ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdd, 0x0a], "vaesenclast ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdd, 0x4a, 0x01], "vaesenclast ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdd, 0xca], "vaesenclast ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xde, 0x0a], "vaesdec ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xde, 0x4a, 0x01], "vaesdec ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xde, 0xca], "vaesdec ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdf, 0x0a], "vaesdeclast ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdf, 0x4a, 0x01], "vaesdeclast ymm1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x28, 0xdf, 0xca], "vaesdeclast ymm1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x00, 0x0a], "vpshufb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x00, 0x4a, 0x01], "vpshufb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x00, 0xca], "vpshufb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x04, 0x0a], "vpmaddubsw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x04, 0x4a, 0x01], "vpmaddubsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x04, 0xca], "vpmaddubsw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x0b, 0x0a], "vpmulhrsw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x0b, 0x4a, 0x01], "vpmulhrsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x0b, 0xca], "vpmulhrsw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x0d, 0x0a], "vpermilpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x0d, 0xca], "vpermilpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x10, 0x0a], "vpsrlvw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x10, 0x4a, 0x01], "vpsrlvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x10, 0xca], "vpsrlvw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x11, 0x0a], "vpsravw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x11, 0x4a, 0x01], "vpsravw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x11, 0xca], "vpsravw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x12, 0x0a], "vpsllvw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x12, 0x4a, 0x01], "vpsllvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x12, 0xca], "vpsllvw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x14, 0x0a], "vprorvq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x14, 0xca], "vprorvq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x15, 0x0a], "vprolvq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x15, 0xca], "vprolvq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x16, 0x0a], "vpermpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x16, 0xca], "vpermpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x19, 0x0a], "vbroadcastsd ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x19, 0x4a, 0x01], "vbroadcastsd ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x19, 0xca], "vbroadcastsd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1a, 0x0a], "vbroadcastf64x2 ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1c, 0x0a], "vpabsb ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1c, 0x4a, 0x01], "vpabsb ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1c, 0xca], "vpabsb ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1d, 0x0a], "vpabsw ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1d, 0x4a, 0x01], "vpabsw ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1d, 0xca], "vpabsw ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1f, 0x0a], "vpabsq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x1f, 0xca], "vpabsq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x20, 0x0a], "vpmovsxbw ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x20, 0x4a, 0x01], "vpmovsxbw ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x20, 0xca], "vpmovsxbw ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x21, 0x0a], "vpmovsxbd ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x21, 0x4a, 0x01], "vpmovsxbd ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x21, 0xca], "vpmovsxbd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x22, 0x0a], "vpmovsxbq ymm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x22, 0x4a, 0x01], "vpmovsxbq ymm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x22, 0xca], "vpmovsxbq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x23, 0x0a], "vpmovsxwd ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x23, 0x4a, 0x01], "vpmovsxwd ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x23, 0xca], "vpmovsxwd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x24, 0x0a], "vpmovsxwq ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x24, 0x4a, 0x01], "vpmovsxwq ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x24, 0xca], "vpmovsxwq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x26, 0x0a], "vptestmw k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x26, 0x4a, 0x01], "vptestmw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x26, 0xca], "vptestmw k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x27, 0x0a], "vptestmq k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x27, 0xca], "vptestmq k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x28, 0x0a], "vpmuldq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x28, 0xca], "vpmuldq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x29, 0x0a], "vpcmpeqq k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x29, 0xca], "vpcmpeqq k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x2c, 0x0a], "vscalefpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x2c, 0xca], "vscalefpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x2d, 0x0a], "vscalefsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x2d, 0x4a, 0x01], "vscalefsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x2d, 0xca], "vscalefsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x30, 0x0a], "vpmovzxbw ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x30, 0x4a, 0x01], "vpmovzxbw ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x30, 0xca], "vpmovzxbw ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x31, 0x0a], "vpmovzxbd ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x31, 0x4a, 0x01], "vpmovzxbd ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x31, 0xca], "vpmovzxbd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x32, 0x0a], "vpmovzxbq ymm1{k5}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x32, 0x4a, 0x01], "vpmovzxbq ymm1{k5}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x32, 0xca], "vpmovzxbq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x33, 0x0a], "vpmovzxwd ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x33, 0x4a, 0x01], "vpmovzxwd ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x33, 0xca], "vpmovzxwd ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x34, 0x0a], "vpmovzxwq ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x34, 0x4a, 0x01], "vpmovzxwq ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x34, 0xca], "vpmovzxwq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x36, 0x0a], "vpermq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x36, 0xca], "vpermq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x37, 0x0a], "vpcmpgtq k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x37, 0xca], "vpcmpgtq k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x38, 0x0a], "vpminsb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x38, 0x4a, 0x01], "vpminsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x38, 0xca], "vpminsb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x39, 0x0a], "vpminsq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x39, 0xca], "vpminsq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3a, 0x0a], "vpminuw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3a, 0x4a, 0x01], "vpminuw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3a, 0xca], "vpminuw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3b, 0x0a], "vpminuq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3b, 0xca], "vpminuq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3c, 0x0a], "vpmaxsb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3c, 0x4a, 0x01], "vpmaxsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3c, 0xca], "vpmaxsb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3d, 0x0a], "vpmaxsq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3d, 0xca], "vpmaxsq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3e, 0x0a], "vpmaxuw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3e, 0x4a, 0x01], "vpmaxuw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3e, 0xca], "vpmaxuw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3f, 0x0a], "vpmaxuq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x3f, 0xca], "vpmaxuq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x40, 0x0a], "vpmullq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x40, 0xca], "vpmullq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x42, 0x0a], "vgetexppd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x42, 0xca], "vgetexppd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x43, 0x0a], "vgetexpsd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x43, 0x4a, 0x01], "vgetexpsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x43, 0xca], "vgetexpsd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x44, 0x0a], "vplzcntq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x44, 0xca], "vplzcntq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x45, 0x0a], "vpsrlvq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x45, 0xca], "vpsrlvq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x46, 0x0a], "vpsravq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x46, 0xca], "vpsravq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x47, 0x0a], "vpsllvq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x47, 0xca], "vpsllvq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4c, 0x0a], "vrcp14pd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4c, 0xca], "vrcp14pd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4d, 0x0a], "vrcp14sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4d, 0x4a, 0x01], "vrcp14sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4d, 0xca], "vrcp14sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4e, 0xca], "vrsqrt14pd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4f, 0x0a], "vrsqrt14sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4f, 0x4a, 0x01], "vrsqrt14sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x4f, 0xca], "vrsqrt14sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x54, 0x0a], "vpopcntw ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x54, 0x4a, 0x01], "vpopcntw ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x54, 0xca], "vpopcntw ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x55, 0x0a], "vpopcntq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x55, 0xca], "vpopcntq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x59, 0x0a], "vpbroadcastq ymm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x59, 0x4a, 0x01], "vpbroadcastq ymm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x59, 0xca], "vpbroadcastq ymm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x5a, 0x0a], "vbroadcasti64x2 ymm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 ymm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x62, 0x0a], "vpexpandw ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x62, 0x4a, 0x01], "vpexpandw ymm1{k5}, ymmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x62, 0xca], "vpexpandw ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x63, 0x0a], "vpcompressw ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x63, 0x4a, 0x01], "vpcompressw ymmword [bp + si * 1 + 0x2]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x63, 0xca], "vpcompressw ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x64, 0x0a], "vpblendmq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x64, 0xca], "vpblendmq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x65, 0x0a], "vblendmpd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x65, 0xca], "vblendmpd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x66, 0x0a], "vpblendmw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x66, 0x4a, 0x01], "vpblendmw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x66, 0xca], "vpblendmw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x70, 0x0a], "vpshldvw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x70, 0x4a, 0x01], "vpshldvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x70, 0xca], "vpshldvw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x71, 0x0a], "vpshldvq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x71, 0xca], "vpshldvq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x72, 0x0a], "vpshrdvw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x72, 0x4a, 0x01], "vpshrdvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x72, 0xca], "vpshrdvw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x73, 0x0a], "vpshrdvq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x73, 0xca], "vpshrdvq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x75, 0x0a], "vpermi2w ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x75, 0x4a, 0x01], "vpermi2w ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x75, 0xca], "vpermi2w ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x76, 0x0a], "vpermi2q ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x76, 0xca], "vpermi2q ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x77, 0x0a], "vpermi2pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x77, 0xca], "vpermi2pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7c, 0xca], "vpbroadcastd ymm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7d, 0x0a], "vpermt2w ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7d, 0x4a, 0x01], "vpermt2w ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7d, 0xca], "vpermt2w ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7e, 0x0a], "vpermt2q ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7e, 0xca], "vpermt2q ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7f, 0x0a], "vpermt2pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x7f, 0xca], "vpermt2pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x83, 0xca], "vpmultishiftqb ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x88, 0x0a], "vexpandpd ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x88, 0x4a, 0x01], "vexpandpd ymm1{k5}, ymmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x88, 0xca], "vexpandpd ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x89, 0x0a], "vpexpandq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x89, 0x4a, 0x01], "vpexpandq ymm1{k5}, ymmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x89, 0xca], "vpexpandq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8a, 0x0a], "vcompresspd ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8a, 0x4a, 0x01], "vcompresspd ymmword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8a, 0xca], "vcompresspd ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8b, 0x0a], "vpcompressq ymmword [bp + si * 1]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8b, 0x4a, 0x01], "vpcompressq ymmword [bp + si * 1 + 0x8]{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8b, 0xca], "vpcompressq ymm2{k5}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8d, 0x0a], "vpermw ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8d, 0x4a, 0x01], "vpermw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x8d, 0xca], "vpermw ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x96, 0xca], "vfmaddsub132pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x97, 0xca], "vfmsubadd132pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x98, 0x0a], "vfmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x98, 0xca], "vfmadd132pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x99, 0x0a], "vfmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x99, 0x4a, 0x01], "vfmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x99, 0xca], "vfmadd132sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9a, 0xca], "vfmsub132pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9b, 0x0a], "vfmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9b, 0x4a, 0x01], "vfmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9c, 0xca], "vfnmadd132pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9d, 0x0a], "vfnmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9d, 0x4a, 0x01], "vfnmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9e, 0xca], "vfnmsub132pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9f, 0x0a], "vfnmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9f, 0x4a, 0x01], "vfnmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa6, 0xca], "vfmaddsub213pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa7, 0xca], "vfmsubadd213pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa8, 0xca], "vfmadd213pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa9, 0x0a], "vfmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa9, 0x4a, 0x01], "vfmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xaa, 0xca], "vfmsub213pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xab, 0x0a], "vfmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xab, 0x4a, 0x01], "vfmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xab, 0xca], "vfmsub213sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xac, 0xca], "vfnmadd213pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xad, 0x0a], "vfnmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xad, 0x4a, 0x01], "vfnmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xae, 0xca], "vfnmsub213pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xaf, 0x0a], "vfnmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xaf, 0x4a, 0x01], "vfnmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb4, 0xca], "vpmadd52luq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb5, 0xca], "vpmadd52huq ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb6, 0xca], "vfmaddsub231pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb7, 0xca], "vfmsubadd231pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb8, 0xca], "vfmadd231pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb9, 0x0a], "vfmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb9, 0x4a, 0x01], "vfmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xba, 0x0a], "vfmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xba, 0xca], "vfmsub231pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbb, 0x0a], "vfmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbb, 0x4a, 0x01], "vfmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbc, 0xca], "vfnmadd231pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbd, 0x0a], "vfnmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbd, 0x4a, 0x01], "vfnmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbe, 0xca], "vfnmsub231pd ymm1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbf, 0x0a], "vfnmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbf, 0x4a, 0x01], "vfnmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xc4, 0x0a], "vpconflictq ymm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xc4, 0xca], "vpconflictq ymm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xcb, 0x0a], "vrcp28sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xcb, 0x4a, 0x01], "vrcp28sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xcb, 0xca], "vrcp28sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xcd, 0x0a], "vrsqrt28sd xmm1{k5}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xcd, 0x4a, 0x01], "vrsqrt28sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x2d, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x0d, 0x0a], "vpermilpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x0d, 0x4a, 0x01], "vpermilpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x14, 0x0a], "vprorvq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x14, 0x4a, 0x01], "vprorvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x15, 0x0a], "vprolvq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x15, 0x4a, 0x01], "vprolvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x16, 0x0a], "vpermpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x16, 0x4a, 0x01], "vpermpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x1f, 0x0a], "vpabsq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x1f, 0x4a, 0x01], "vpabsq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x27, 0x0a], "vptestmq k1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x27, 0x4a, 0x01], "vptestmq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x28, 0x0a], "vpmuldq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x28, 0x4a, 0x01], "vpmuldq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x29, 0x0a], "vpcmpeqq k1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x29, 0x4a, 0x01], "vpcmpeqq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x2c, 0x0a], "vscalefpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x2c, 0x4a, 0x01], "vscalefpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x2c, 0xca], "vscalefpd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x2d, 0xca], "vscalefsd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x36, 0x0a], "vpermq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x36, 0x4a, 0x01], "vpermq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x37, 0x0a], "vpcmpgtq k1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x37, 0x4a, 0x01], "vpcmpgtq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x39, 0x0a], "vpminsq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x39, 0x4a, 0x01], "vpminsq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x3b, 0x0a], "vpminuq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x3b, 0x4a, 0x01], "vpminuq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x3d, 0x0a], "vpmaxsq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x3f, 0x0a], "vpmaxuq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x40, 0x0a], "vpmullq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x40, 0x4a, 0x01], "vpmullq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x42, 0x0a], "vgetexppd ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x42, 0x4a, 0x01], "vgetexppd ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x44, 0x0a], "vplzcntq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x44, 0x4a, 0x01], "vplzcntq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x45, 0x0a], "vpsrlvq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x45, 0x4a, 0x01], "vpsrlvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x46, 0x0a], "vpsravq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x46, 0x4a, 0x01], "vpsravq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x47, 0x0a], "vpsllvq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x47, 0x4a, 0x01], "vpsllvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x4c, 0x0a], "vrcp14pd ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x4e, 0x0a], "vrsqrt14pd ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x55, 0x0a], "vpopcntq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x55, 0x4a, 0x01], "vpopcntq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x64, 0x0a], "vpblendmq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x64, 0x4a, 0x01], "vpblendmq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x65, 0x0a], "vblendmpd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x65, 0x4a, 0x01], "vblendmpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x71, 0x0a], "vpshldvq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x71, 0x4a, 0x01], "vpshldvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x73, 0x0a], "vpshrdvq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x73, 0x4a, 0x01], "vpshrdvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x76, 0x0a], "vpermi2q ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x76, 0x4a, 0x01], "vpermi2q ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x77, 0x0a], "vpermi2pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x77, 0x4a, 0x01], "vpermi2pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x7e, 0x0a], "vpermt2q ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x7e, 0x4a, 0x01], "vpermt2q ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x7f, 0x0a], "vpermt2pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x83, 0x0a], "vpmultishiftqb ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x96, 0x0a], "vfmaddsub132pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x96, 0xca], "vfmaddsub132pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x97, 0x0a], "vfmsubadd132pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x97, 0xca], "vfmsubadd132pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x98, 0x0a], "vfmadd132pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x98, 0xca], "vfmadd132pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x99, 0xca], "vfmadd132sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9a, 0x0a], "vfmsub132pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9a, 0xca], "vfmsub132pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9b, 0xca], "vfmsub132sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9c, 0x0a], "vfnmadd132pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9c, 0xca], "vfnmadd132pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9d, 0xca], "vfnmadd132sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9e, 0x0a], "vfnmsub132pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9e, 0xca], "vfnmsub132pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0x9f, 0xca], "vfnmsub132sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa6, 0x0a], "vfmaddsub213pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa6, 0xca], "vfmaddsub213pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa7, 0x0a], "vfmsubadd213pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa7, 0xca], "vfmsubadd213pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa8, 0x0a], "vfmadd213pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa8, 0xca], "vfmadd213pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xa9, 0xca], "vfmadd213sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xaa, 0x0a], "vfmsub213pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xaa, 0xca], "vfmsub213pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xab, 0xca], "vfmsub213sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xac, 0x0a], "vfnmadd213pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xac, 0xca], "vfnmadd213pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xad, 0xca], "vfnmadd213sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xae, 0x0a], "vfnmsub213pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xae, 0xca], "vfnmsub213pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xaf, 0xca], "vfnmsub213sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb4, 0x0a], "vpmadd52luq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb5, 0x0a], "vpmadd52huq ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb6, 0x0a], "vfmaddsub231pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb6, 0xca], "vfmaddsub231pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb7, 0x0a], "vfmsubadd231pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb7, 0xca], "vfmsubadd231pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb8, 0x0a], "vfmadd231pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb8, 0xca], "vfmadd231pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xb9, 0xca], "vfmadd231sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xba, 0x0a], "vfmsub231pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xba, 0xca], "vfmsub231pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbb, 0xca], "vfmsub231sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbc, 0x0a], "vfnmadd231pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbc, 0xca], "vfnmadd231pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbd, 0xca], "vfnmadd231sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbe, 0x0a], "vfnmsub231pd ymm1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbe, 0xca], "vfnmsub231pd zmm1{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xbf, 0xca], "vfnmsub231sd xmm1{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xc4, 0x0a], "vpconflictq ymm1, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x38, 0xc4, 0x4a, 0x01], "vpconflictq ymm1, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x0d, 0x0a], "vpermilpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x14, 0x0a], "vprorvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x15, 0x0a], "vprolvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x16, 0x0a], "vpermpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x1f, 0x0a], "vpabsq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x27, 0x0a], "vptestmq k1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x28, 0x0a], "vpmuldq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x29, 0x0a], "vpcmpeqq k1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x2c, 0x0a], "vscalefpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x2c, 0xca], "vscalefpd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x2d, 0xca], "vscalefsd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x36, 0x0a], "vpermq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x37, 0x0a], "vpcmpgtq k1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x39, 0x0a], "vpminsq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x3b, 0x0a], "vpminuq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x3d, 0x0a], "vpmaxsq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x3f, 0x0a], "vpmaxuq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x40, 0x0a], "vpmullq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x42, 0x0a], "vgetexppd ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x44, 0x0a], "vplzcntq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x45, 0x0a], "vpsrlvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x46, 0x0a], "vpsravq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x47, 0x0a], "vpsllvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x4c, 0x0a], "vrcp14pd ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x55, 0x0a], "vpopcntq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x64, 0x0a], "vpblendmq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x65, 0x0a], "vblendmpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x71, 0x0a], "vpshldvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x73, 0x0a], "vpshrdvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x76, 0x0a], "vpermi2q ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x77, 0x0a], "vpermi2pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x7e, 0x0a], "vpermt2q ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x7f, 0x0a], "vpermt2pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x98, 0x0a], "vfmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xba, 0x0a], "vfmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xc4, 0x0a], "vpconflictq ymm1{k5}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x3d, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x00, 0x0a], "vpshufb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x00, 0x4a, 0x01], "vpshufb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x00, 0xca], "vpshufb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x04, 0x0a], "vpmaddubsw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x04, 0x4a, 0x01], "vpmaddubsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x04, 0xca], "vpmaddubsw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x0b, 0x0a], "vpmulhrsw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x0b, 0x4a, 0x01], "vpmulhrsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x0b, 0xca], "vpmulhrsw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x0d, 0x0a], "vpermilpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x0d, 0x4a, 0x01], "vpermilpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x0d, 0xca], "vpermilpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x10, 0x0a], "vpsrlvw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x10, 0x4a, 0x01], "vpsrlvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x10, 0xca], "vpsrlvw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x11, 0x0a], "vpsravw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x11, 0x4a, 0x01], "vpsravw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x11, 0xca], "vpsravw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x12, 0x0a], "vpsllvw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x12, 0x4a, 0x01], "vpsllvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x12, 0xca], "vpsllvw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x14, 0x0a], "vprorvq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x14, 0x4a, 0x01], "vprorvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x14, 0xca], "vprorvq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x15, 0x0a], "vprolvq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x15, 0x4a, 0x01], "vprolvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x15, 0xca], "vprolvq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x16, 0x0a], "vpermpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x16, 0x4a, 0x01], "vpermpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x16, 0xca], "vpermpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x19, 0x0a], "vbroadcastsd zmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x19, 0x4a, 0x01], "vbroadcastsd zmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x19, 0xca], "vbroadcastsd zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1a, 0x0a], "vbroadcastf64x2 zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1b, 0x0a], "vbroadcastf64x4 zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1b, 0x4a, 0x01], "vbroadcastf64x4 zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1c, 0x0a], "vpabsb zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1c, 0x4a, 0x01], "vpabsb zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1c, 0xca], "vpabsb zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1d, 0x0a], "vpabsw zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1d, 0x4a, 0x01], "vpabsw zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1d, 0xca], "vpabsw zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1f, 0x0a], "vpabsq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1f, 0x4a, 0x01], "vpabsq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x1f, 0xca], "vpabsq zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x20, 0x0a], "vpmovsxbw zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x20, 0x4a, 0x01], "vpmovsxbw zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x20, 0xca], "vpmovsxbw zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x21, 0x0a], "vpmovsxbd zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x21, 0x4a, 0x01], "vpmovsxbd zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x21, 0xca], "vpmovsxbd zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x22, 0x0a], "vpmovsxbq zmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x22, 0x4a, 0x01], "vpmovsxbq zmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x22, 0xca], "vpmovsxbq zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x23, 0x0a], "vpmovsxwd zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x23, 0x4a, 0x01], "vpmovsxwd zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x23, 0xca], "vpmovsxwd zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x24, 0x0a], "vpmovsxwq zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x24, 0x4a, 0x01], "vpmovsxwq zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x24, 0xca], "vpmovsxwq zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x26, 0x0a], "vptestmw k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x26, 0x4a, 0x01], "vptestmw k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x26, 0xca], "vptestmw k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x27, 0x0a], "vptestmq k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x27, 0x4a, 0x01], "vptestmq k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x27, 0xca], "vptestmq k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x28, 0x0a], "vpmuldq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x28, 0x4a, 0x01], "vpmuldq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x28, 0xca], "vpmuldq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x29, 0x0a], "vpcmpeqq k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x29, 0x4a, 0x01], "vpcmpeqq k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x29, 0xca], "vpcmpeqq k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x2c, 0x0a], "vscalefpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x2c, 0x4a, 0x01], "vscalefpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x2c, 0xca], "vscalefpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x30, 0x0a], "vpmovzxbw zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x30, 0x4a, 0x01], "vpmovzxbw zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x30, 0xca], "vpmovzxbw zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x31, 0x0a], "vpmovzxbd zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x31, 0x4a, 0x01], "vpmovzxbd zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x31, 0xca], "vpmovzxbd zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x32, 0x0a], "vpmovzxbq zmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x32, 0x4a, 0x01], "vpmovzxbq zmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x32, 0xca], "vpmovzxbq zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x33, 0x0a], "vpmovzxwd zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x33, 0x4a, 0x01], "vpmovzxwd zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x33, 0xca], "vpmovzxwd zmm1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x34, 0x0a], "vpmovzxwq zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x34, 0x4a, 0x01], "vpmovzxwq zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x34, 0xca], "vpmovzxwq zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x36, 0x0a], "vpermq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x36, 0x4a, 0x01], "vpermq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x36, 0xca], "vpermq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x37, 0x0a], "vpcmpgtq k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x37, 0x4a, 0x01], "vpcmpgtq k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x37, 0xca], "vpcmpgtq k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x38, 0x0a], "vpminsb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x38, 0x4a, 0x01], "vpminsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x38, 0xca], "vpminsb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x39, 0x0a], "vpminsq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x39, 0x4a, 0x01], "vpminsq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x39, 0xca], "vpminsq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3a, 0x0a], "vpminuw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3a, 0x4a, 0x01], "vpminuw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3a, 0xca], "vpminuw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3b, 0x0a], "vpminuq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3b, 0x4a, 0x01], "vpminuq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3b, 0xca], "vpminuq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3c, 0x0a], "vpmaxsb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3c, 0x4a, 0x01], "vpmaxsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3c, 0xca], "vpmaxsb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3d, 0x0a], "vpmaxsq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3d, 0xca], "vpmaxsq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3e, 0x0a], "vpmaxuw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3e, 0x4a, 0x01], "vpmaxuw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3e, 0xca], "vpmaxuw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3f, 0x0a], "vpmaxuq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x3f, 0xca], "vpmaxuq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x40, 0x0a], "vpmullq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x40, 0x4a, 0x01], "vpmullq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x40, 0xca], "vpmullq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x42, 0x0a], "vgetexppd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x42, 0x4a, 0x01], "vgetexppd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x42, 0xca], "vgetexppd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x44, 0x0a], "vplzcntq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x44, 0x4a, 0x01], "vplzcntq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x44, 0xca], "vplzcntq zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x45, 0x0a], "vpsrlvq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x45, 0x4a, 0x01], "vpsrlvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x45, 0xca], "vpsrlvq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x46, 0x0a], "vpsravq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x46, 0x4a, 0x01], "vpsravq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x46, 0xca], "vpsravq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x47, 0x0a], "vpsllvq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x47, 0x4a, 0x01], "vpsllvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x47, 0xca], "vpsllvq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x4c, 0x0a], "vrcp14pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x4c, 0xca], "vrcp14pd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x4e, 0x0a], "vrsqrt14pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x4e, 0xca], "vrsqrt14pd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x54, 0x0a], "vpopcntw zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x54, 0x4a, 0x01], "vpopcntw zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x54, 0xca], "vpopcntw zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x55, 0x0a], "vpopcntq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x55, 0x4a, 0x01], "vpopcntq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x55, 0xca], "vpopcntq zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x59, 0x0a], "vpbroadcastq zmm1, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x59, 0x4a, 0x01], "vpbroadcastq zmm1, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x59, 0xca], "vpbroadcastq zmm1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x5a, 0x0a], "vbroadcasti64x2 zmm1, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 zmm1, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x5b, 0x0a], "vbroadcasti64x4 zmm1, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x5b, 0x4a, 0x01], "vbroadcasti64x4 zmm1, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x62, 0x0a], "vpexpandw zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x62, 0x4a, 0x01], "vpexpandw zmm1, zmmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x62, 0xca], "vpexpandw zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x63, 0x0a], "vpcompressw zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x63, 0x4a, 0x01], "vpcompressw zmmword [bp + si * 1 + 0x2], zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x63, 0xca], "vpcompressw zmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x64, 0x0a], "vpblendmq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x64, 0x4a, 0x01], "vpblendmq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x64, 0xca], "vpblendmq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x65, 0x0a], "vblendmpd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x65, 0x4a, 0x01], "vblendmpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x65, 0xca], "vblendmpd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x66, 0x0a], "vpblendmw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x66, 0x4a, 0x01], "vpblendmw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x66, 0xca], "vpblendmw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x70, 0x0a], "vpshldvw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x70, 0x4a, 0x01], "vpshldvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x70, 0xca], "vpshldvw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x71, 0x0a], "vpshldvq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x71, 0x4a, 0x01], "vpshldvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x71, 0xca], "vpshldvq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x72, 0x0a], "vpshrdvw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x72, 0x4a, 0x01], "vpshrdvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x72, 0xca], "vpshrdvw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x73, 0x0a], "vpshrdvq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x73, 0x4a, 0x01], "vpshrdvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x73, 0xca], "vpshrdvq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x75, 0x0a], "vpermi2w zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x75, 0x4a, 0x01], "vpermi2w zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x75, 0xca], "vpermi2w zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x76, 0x0a], "vpermi2q zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x76, 0x4a, 0x01], "vpermi2q zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x76, 0xca], "vpermi2q zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x77, 0x0a], "vpermi2pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x77, 0x4a, 0x01], "vpermi2pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x77, 0xca], "vpermi2pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7c, 0xca], "vpbroadcastd zmm1, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7d, 0x0a], "vpermt2w zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7d, 0x4a, 0x01], "vpermt2w zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7d, 0xca], "vpermt2w zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7e, 0x0a], "vpermt2q zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7e, 0x4a, 0x01], "vpermt2q zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7e, 0xca], "vpermt2q zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7f, 0x0a], "vpermt2pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x7f, 0xca], "vpermt2pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x83, 0x0a], "vpmultishiftqb zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x83, 0xca], "vpmultishiftqb zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x88, 0x0a], "vexpandpd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x88, 0x4a, 0x01], "vexpandpd zmm1, zmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x88, 0xca], "vexpandpd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x89, 0x0a], "vpexpandq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x89, 0x4a, 0x01], "vpexpandq zmm1, zmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x89, 0xca], "vpexpandq zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8a, 0x0a], "vcompresspd zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8a, 0x4a, 0x01], "vcompresspd zmmword [bp + si * 1 + 0x8], zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8a, 0xca], "vcompresspd zmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8b, 0x0a], "vpcompressq zmmword [bp + si * 1], zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8b, 0x4a, 0x01], "vpcompressq zmmword [bp + si * 1 + 0x8], zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8b, 0xca], "vpcompressq zmm2, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8d, 0x0a], "vpermw zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8d, 0x4a, 0x01], "vpermw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x8d, 0xca], "vpermw zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x96, 0x0a], "vfmaddsub132pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x96, 0xca], "vfmaddsub132pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x97, 0x0a], "vfmsubadd132pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x97, 0xca], "vfmsubadd132pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x98, 0x0a], "vfmadd132pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x98, 0xca], "vfmadd132pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9a, 0x0a], "vfmsub132pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9a, 0xca], "vfmsub132pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9c, 0x0a], "vfnmadd132pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9c, 0xca], "vfnmadd132pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9e, 0x0a], "vfnmsub132pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0x9e, 0xca], "vfnmsub132pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa6, 0x0a], "vfmaddsub213pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa6, 0xca], "vfmaddsub213pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa7, 0x0a], "vfmsubadd213pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa7, 0xca], "vfmsubadd213pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa8, 0x0a], "vfmadd213pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xa8, 0xca], "vfmadd213pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xaa, 0x0a], "vfmsub213pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xaa, 0xca], "vfmsub213pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xac, 0x0a], "vfnmadd213pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xac, 0xca], "vfnmadd213pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xae, 0x0a], "vfnmsub213pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xae, 0xca], "vfnmsub213pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb4, 0x0a], "vpmadd52luq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb4, 0xca], "vpmadd52luq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb5, 0x0a], "vpmadd52huq zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb5, 0xca], "vpmadd52huq zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb6, 0x0a], "vfmaddsub231pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb6, 0xca], "vfmaddsub231pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb7, 0x0a], "vfmsubadd231pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb7, 0xca], "vfmsubadd231pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb8, 0x0a], "vfmadd231pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xb8, 0xca], "vfmadd231pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xba, 0x0a], "vfmsub231pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xba, 0xca], "vfmsub231pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xbc, 0x0a], "vfnmadd231pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xbc, 0xca], "vfnmadd231pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xbe, 0x0a], "vfnmsub231pd zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xbe, 0xca], "vfnmsub231pd zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xc4, 0x0a], "vpconflictq zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xc4, 0x4a, 0x01], "vpconflictq zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xc4, 0xca], "vpconflictq zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xc8, 0x0a], "vexp2pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xc8, 0x4a, 0x01], "vexp2pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xc8, 0xca], "vexp2pd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xca, 0x0a], "vrcp28pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xca, 0x4a, 0x01], "vrcp28pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xca, 0xca], "vrcp28pd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xcc, 0x0a], "vrsqrt28pd zmm1, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xcc, 0xca], "vrsqrt28pd zmm1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdc, 0x0a], "vaesenc zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdc, 0x4a, 0x01], "vaesenc zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdc, 0xca], "vaesenc zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdd, 0x0a], "vaesenclast zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdd, 0x4a, 0x01], "vaesenclast zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdd, 0xca], "vaesenclast zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xde, 0x0a], "vaesdec zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xde, 0x4a, 0x01], "vaesdec zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xde, 0xca], "vaesdec zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdf, 0x0a], "vaesdeclast zmm1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdf, 0x4a, 0x01], "vaesdeclast zmm1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x48, 0xdf, 0xca], "vaesdeclast zmm1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x00, 0x0a], "vpshufb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x00, 0x4a, 0x01], "vpshufb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x00, 0xca], "vpshufb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x04, 0x0a], "vpmaddubsw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x04, 0x4a, 0x01], "vpmaddubsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x04, 0xca], "vpmaddubsw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x0b, 0x0a], "vpmulhrsw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x0b, 0x4a, 0x01], "vpmulhrsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x0b, 0xca], "vpmulhrsw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x0d, 0x0a], "vpermilpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x0d, 0xca], "vpermilpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x10, 0x0a], "vpsrlvw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x10, 0x4a, 0x01], "vpsrlvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x10, 0xca], "vpsrlvw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x11, 0x0a], "vpsravw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x11, 0x4a, 0x01], "vpsravw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x11, 0xca], "vpsravw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x12, 0x0a], "vpsllvw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x12, 0x4a, 0x01], "vpsllvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x12, 0xca], "vpsllvw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x14, 0x0a], "vprorvq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x14, 0xca], "vprorvq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x15, 0x0a], "vprolvq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x15, 0xca], "vprolvq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x16, 0x0a], "vpermpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x16, 0xca], "vpermpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x19, 0x0a], "vbroadcastsd zmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x19, 0x4a, 0x01], "vbroadcastsd zmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x19, 0xca], "vbroadcastsd zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1a, 0x0a], "vbroadcastf64x2 zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1b, 0x0a], "vbroadcastf64x4 zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1b, 0x4a, 0x01], "vbroadcastf64x4 zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1c, 0x0a], "vpabsb zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1c, 0x4a, 0x01], "vpabsb zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1c, 0xca], "vpabsb zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1d, 0x0a], "vpabsw zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1d, 0x4a, 0x01], "vpabsw zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1d, 0xca], "vpabsw zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1f, 0x0a], "vpabsq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x1f, 0xca], "vpabsq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x20, 0x0a], "vpmovsxbw zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x20, 0x4a, 0x01], "vpmovsxbw zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x20, 0xca], "vpmovsxbw zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x21, 0x0a], "vpmovsxbd zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x21, 0x4a, 0x01], "vpmovsxbd zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x21, 0xca], "vpmovsxbd zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x22, 0x0a], "vpmovsxbq zmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x22, 0x4a, 0x01], "vpmovsxbq zmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x22, 0xca], "vpmovsxbq zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x23, 0x0a], "vpmovsxwd zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x23, 0x4a, 0x01], "vpmovsxwd zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x23, 0xca], "vpmovsxwd zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x24, 0x0a], "vpmovsxwq zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x24, 0x4a, 0x01], "vpmovsxwq zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x24, 0xca], "vpmovsxwq zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x26, 0x0a], "vptestmw k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x26, 0x4a, 0x01], "vptestmw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x26, 0xca], "vptestmw k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x27, 0x0a], "vptestmq k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x27, 0xca], "vptestmq k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x28, 0x0a], "vpmuldq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x28, 0xca], "vpmuldq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x29, 0x0a], "vpcmpeqq k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x29, 0xca], "vpcmpeqq k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x2c, 0x0a], "vscalefpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x2c, 0xca], "vscalefpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x30, 0x0a], "vpmovzxbw zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x30, 0x4a, 0x01], "vpmovzxbw zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x30, 0xca], "vpmovzxbw zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x31, 0x0a], "vpmovzxbd zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x31, 0x4a, 0x01], "vpmovzxbd zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x31, 0xca], "vpmovzxbd zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x32, 0x0a], "vpmovzxbq zmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x32, 0x4a, 0x01], "vpmovzxbq zmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x32, 0xca], "vpmovzxbq zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x33, 0x0a], "vpmovzxwd zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x33, 0x4a, 0x01], "vpmovzxwd zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x33, 0xca], "vpmovzxwd zmm1{k5}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x34, 0x0a], "vpmovzxwq zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x34, 0x4a, 0x01], "vpmovzxwq zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x34, 0xca], "vpmovzxwq zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x36, 0x0a], "vpermq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x36, 0xca], "vpermq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x37, 0x0a], "vpcmpgtq k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x37, 0xca], "vpcmpgtq k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x38, 0x0a], "vpminsb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x38, 0x4a, 0x01], "vpminsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x38, 0xca], "vpminsb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x39, 0x0a], "vpminsq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x39, 0xca], "vpminsq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3a, 0x0a], "vpminuw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3a, 0x4a, 0x01], "vpminuw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3a, 0xca], "vpminuw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3b, 0x0a], "vpminuq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3b, 0xca], "vpminuq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3c, 0x0a], "vpmaxsb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3c, 0x4a, 0x01], "vpmaxsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3c, 0xca], "vpmaxsb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3d, 0x0a], "vpmaxsq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3d, 0xca], "vpmaxsq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3e, 0x0a], "vpmaxuw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3e, 0x4a, 0x01], "vpmaxuw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3e, 0xca], "vpmaxuw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3f, 0x0a], "vpmaxuq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x3f, 0xca], "vpmaxuq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x40, 0x0a], "vpmullq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x40, 0xca], "vpmullq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x42, 0x0a], "vgetexppd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x42, 0xca], "vgetexppd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x44, 0x0a], "vplzcntq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x44, 0xca], "vplzcntq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x45, 0x0a], "vpsrlvq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x45, 0xca], "vpsrlvq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x46, 0x0a], "vpsravq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x46, 0xca], "vpsravq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x47, 0x0a], "vpsllvq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x47, 0xca], "vpsllvq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x4c, 0x0a], "vrcp14pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x4c, 0xca], "vrcp14pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x4e, 0xca], "vrsqrt14pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x54, 0x0a], "vpopcntw zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x54, 0x4a, 0x01], "vpopcntw zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x54, 0xca], "vpopcntw zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x55, 0x0a], "vpopcntq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x55, 0xca], "vpopcntq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x59, 0x0a], "vpbroadcastq zmm1{k5}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x59, 0x4a, 0x01], "vpbroadcastq zmm1{k5}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x59, 0xca], "vpbroadcastq zmm1{k5}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x5a, 0x0a], "vbroadcasti64x2 zmm1{k5}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 zmm1{k5}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x5b, 0x0a], "vbroadcasti64x4 zmm1{k5}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x5b, 0x4a, 0x01], "vbroadcasti64x4 zmm1{k5}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x62, 0x0a], "vpexpandw zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x62, 0x4a, 0x01], "vpexpandw zmm1{k5}, zmmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x62, 0xca], "vpexpandw zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x63, 0x0a], "vpcompressw zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x63, 0x4a, 0x01], "vpcompressw zmmword [bp + si * 1 + 0x2]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x63, 0xca], "vpcompressw zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x64, 0x0a], "vpblendmq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x64, 0xca], "vpblendmq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x65, 0x0a], "vblendmpd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x65, 0xca], "vblendmpd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x66, 0x0a], "vpblendmw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x66, 0x4a, 0x01], "vpblendmw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x66, 0xca], "vpblendmw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x70, 0x0a], "vpshldvw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x70, 0x4a, 0x01], "vpshldvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x70, 0xca], "vpshldvw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x71, 0x0a], "vpshldvq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x71, 0xca], "vpshldvq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x72, 0x0a], "vpshrdvw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x72, 0x4a, 0x01], "vpshrdvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x72, 0xca], "vpshrdvw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x73, 0x0a], "vpshrdvq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x73, 0xca], "vpshrdvq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x75, 0x0a], "vpermi2w zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x75, 0x4a, 0x01], "vpermi2w zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x75, 0xca], "vpermi2w zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x76, 0x0a], "vpermi2q zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x76, 0xca], "vpermi2q zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x77, 0x0a], "vpermi2pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x77, 0xca], "vpermi2pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7c, 0xca], "vpbroadcastd zmm1{k5}, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7d, 0x0a], "vpermt2w zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7d, 0x4a, 0x01], "vpermt2w zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7d, 0xca], "vpermt2w zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7e, 0x0a], "vpermt2q zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7e, 0xca], "vpermt2q zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7f, 0x0a], "vpermt2pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x7f, 0xca], "vpermt2pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x83, 0xca], "vpmultishiftqb zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x88, 0x0a], "vexpandpd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x88, 0x4a, 0x01], "vexpandpd zmm1{k5}, zmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x88, 0xca], "vexpandpd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x89, 0x0a], "vpexpandq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x89, 0x4a, 0x01], "vpexpandq zmm1{k5}, zmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x89, 0xca], "vpexpandq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8a, 0x0a], "vcompresspd zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8a, 0x4a, 0x01], "vcompresspd zmmword [bp + si * 1 + 0x8]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8a, 0xca], "vcompresspd zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8b, 0x0a], "vpcompressq zmmword [bp + si * 1]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8b, 0x4a, 0x01], "vpcompressq zmmword [bp + si * 1 + 0x8]{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8b, 0xca], "vpcompressq zmm2{k5}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8d, 0x0a], "vpermw zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8d, 0x4a, 0x01], "vpermw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x8d, 0xca], "vpermw zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x98, 0x0a], "vfmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x98, 0xca], "vfmadd132pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb4, 0xca], "vpmadd52luq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb5, 0xca], "vpmadd52huq zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xba, 0x0a], "vfmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xba, 0xca], "vfmsub231pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xc4, 0x0a], "vpconflictq zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xc4, 0xca], "vpconflictq zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xc8, 0x0a], "vexp2pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xc8, 0xca], "vexp2pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xca, 0x0a], "vrcp28pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xca, 0xca], "vrcp28pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x4d, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x0d, 0x0a], "vpermilpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x0d, 0x4a, 0x01], "vpermilpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x14, 0x0a], "vprorvq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x14, 0x4a, 0x01], "vprorvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x15, 0x0a], "vprolvq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x15, 0x4a, 0x01], "vprolvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x16, 0x0a], "vpermpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x16, 0x4a, 0x01], "vpermpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x1f, 0x0a], "vpabsq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x1f, 0x4a, 0x01], "vpabsq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x27, 0x0a], "vptestmq k1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x27, 0x4a, 0x01], "vptestmq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x28, 0x0a], "vpmuldq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x28, 0x4a, 0x01], "vpmuldq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x29, 0x0a], "vpcmpeqq k1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x29, 0x4a, 0x01], "vpcmpeqq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x2c, 0x0a], "vscalefpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x2c, 0x4a, 0x01], "vscalefpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x2c, 0xca], "vscalefpd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x2d, 0xca], "vscalefsd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x36, 0x0a], "vpermq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x36, 0x4a, 0x01], "vpermq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x37, 0x0a], "vpcmpgtq k1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x37, 0x4a, 0x01], "vpcmpgtq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x39, 0x0a], "vpminsq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x39, 0x4a, 0x01], "vpminsq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x3b, 0x0a], "vpminuq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x3b, 0x4a, 0x01], "vpminuq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x3d, 0x0a], "vpmaxsq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x3f, 0x0a], "vpmaxuq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x40, 0x0a], "vpmullq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x40, 0x4a, 0x01], "vpmullq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x42, 0x0a], "vgetexppd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x42, 0x4a, 0x01], "vgetexppd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x44, 0x0a], "vplzcntq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x44, 0x4a, 0x01], "vplzcntq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x45, 0x0a], "vpsrlvq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x45, 0x4a, 0x01], "vpsrlvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x46, 0x0a], "vpsravq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x46, 0x4a, 0x01], "vpsravq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x47, 0x0a], "vpsllvq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x47, 0x4a, 0x01], "vpsllvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x4c, 0x0a], "vrcp14pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x4e, 0x0a], "vrsqrt14pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x55, 0x0a], "vpopcntq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x55, 0x4a, 0x01], "vpopcntq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x64, 0x0a], "vpblendmq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x64, 0x4a, 0x01], "vpblendmq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x65, 0x0a], "vblendmpd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x65, 0x4a, 0x01], "vblendmpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x71, 0x0a], "vpshldvq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x71, 0x4a, 0x01], "vpshldvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x73, 0x0a], "vpshrdvq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x73, 0x4a, 0x01], "vpshrdvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x76, 0x0a], "vpermi2q zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x76, 0x4a, 0x01], "vpermi2q zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x77, 0x0a], "vpermi2pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x77, 0x4a, 0x01], "vpermi2pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x7e, 0x0a], "vpermt2q zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x7e, 0x4a, 0x01], "vpermt2q zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x7f, 0x0a], "vpermt2pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x83, 0x0a], "vpmultishiftqb zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x96, 0x0a], "vfmaddsub132pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x96, 0xca], "vfmaddsub132pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x97, 0x0a], "vfmsubadd132pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x97, 0xca], "vfmsubadd132pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x98, 0x0a], "vfmadd132pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x98, 0xca], "vfmadd132pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x99, 0xca], "vfmadd132sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9a, 0x0a], "vfmsub132pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9a, 0xca], "vfmsub132pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9b, 0xca], "vfmsub132sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9c, 0x0a], "vfnmadd132pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9c, 0xca], "vfnmadd132pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9d, 0xca], "vfnmadd132sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9e, 0x0a], "vfnmsub132pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9e, 0xca], "vfnmsub132pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0x9f, 0xca], "vfnmsub132sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa6, 0x0a], "vfmaddsub213pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa6, 0xca], "vfmaddsub213pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa7, 0x0a], "vfmsubadd213pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa7, 0xca], "vfmsubadd213pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa8, 0x0a], "vfmadd213pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa8, 0xca], "vfmadd213pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xa9, 0xca], "vfmadd213sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xaa, 0x0a], "vfmsub213pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xaa, 0xca], "vfmsub213pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xab, 0xca], "vfmsub213sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xac, 0x0a], "vfnmadd213pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xac, 0xca], "vfnmadd213pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xad, 0xca], "vfnmadd213sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xae, 0x0a], "vfnmsub213pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xae, 0xca], "vfnmsub213pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xaf, 0xca], "vfnmsub213sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb4, 0x0a], "vpmadd52luq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb5, 0x0a], "vpmadd52huq zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb6, 0x0a], "vfmaddsub231pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb6, 0xca], "vfmaddsub231pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb7, 0x0a], "vfmsubadd231pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb7, 0xca], "vfmsubadd231pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb8, 0x0a], "vfmadd231pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb8, 0xca], "vfmadd231pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xb9, 0xca], "vfmadd231sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xba, 0x0a], "vfmsub231pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xba, 0xca], "vfmsub231pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbb, 0xca], "vfmsub231sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbc, 0x0a], "vfnmadd231pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbc, 0xca], "vfnmadd231pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbd, 0xca], "vfnmadd231sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbe, 0x0a], "vfnmsub231pd zmm1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbe, 0xca], "vfnmsub231pd zmm1{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xbf, 0xca], "vfnmsub231sd xmm1{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xc4, 0x0a], "vpconflictq zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xc4, 0x4a, 0x01], "vpconflictq zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xc8, 0x0a], "vexp2pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xc8, 0x4a, 0x01], "vexp2pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xca, 0x0a], "vrcp28pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xca, 0x4a, 0x01], "vrcp28pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xcc, 0x0a], "vrsqrt28pd zmm1, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x58, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x0d, 0x0a], "vpermilpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x14, 0x0a], "vprorvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x15, 0x0a], "vprolvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x16, 0x0a], "vpermpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x1f, 0x0a], "vpabsq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x27, 0x0a], "vptestmq k1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x28, 0x0a], "vpmuldq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x29, 0x0a], "vpcmpeqq k1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x2c, 0x0a], "vscalefpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x2c, 0xca], "vscalefpd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x2d, 0xca], "vscalefsd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x36, 0x0a], "vpermq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x37, 0x0a], "vpcmpgtq k1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x39, 0x0a], "vpminsq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x3b, 0x0a], "vpminuq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x3d, 0x0a], "vpmaxsq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x3f, 0x0a], "vpmaxuq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x40, 0x0a], "vpmullq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x42, 0x0a], "vgetexppd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x44, 0x0a], "vplzcntq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x45, 0x0a], "vpsrlvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x46, 0x0a], "vpsravq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x47, 0x0a], "vpsllvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x4c, 0x0a], "vrcp14pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x55, 0x0a], "vpopcntq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x64, 0x0a], "vpblendmq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x65, 0x0a], "vblendmpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x71, 0x0a], "vpshldvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x73, 0x0a], "vpshrdvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x76, 0x0a], "vpermi2q zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x77, 0x0a], "vpermi2pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x7e, 0x0a], "vpermt2q zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x7f, 0x0a], "vpermt2pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x98, 0x0a], "vfmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xba, 0x0a], "vfmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xc4, 0x0a], "vpconflictq zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xc8, 0x0a], "vexp2pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xca, 0x0a], "vrcp28pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x5d, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x2c, 0xca], "vscalefpd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x2d, 0xca], "vscalefsd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x42, 0xca], "vgetexppd zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x43, 0xca], "vgetexpsd xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x96, 0xca], "vfmaddsub132pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x97, 0xca], "vfmsubadd132pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x98, 0xca], "vfmadd132pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x99, 0xca], "vfmadd132sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x9a, 0xca], "vfmsub132pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x9b, 0xca], "vfmsub132sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x9c, 0xca], "vfnmadd132pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x9d, 0xca], "vfnmadd132sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x9e, 0xca], "vfnmsub132pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0x9f, 0xca], "vfnmsub132sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xa6, 0xca], "vfmaddsub213pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xa7, 0xca], "vfmsubadd213pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xa8, 0xca], "vfmadd213pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xa9, 0xca], "vfmadd213sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xaa, 0xca], "vfmsub213pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xab, 0xca], "vfmsub213sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xac, 0xca], "vfnmadd213pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xad, 0xca], "vfnmadd213sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xae, 0xca], "vfnmsub213pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xaf, 0xca], "vfnmsub213sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xb6, 0xca], "vfmaddsub231pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xb7, 0xca], "vfmsubadd231pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xb8, 0xca], "vfmadd231pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xb9, 0xca], "vfmadd231sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xba, 0xca], "vfmsub231pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xbb, 0xca], "vfmsub231sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xbc, 0xca], "vfnmadd231pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xbd, 0xca], "vfnmadd231sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xbe, 0xca], "vfnmsub231pd zmm1{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xbf, 0xca], "vfnmsub231sd xmm1{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xc8, 0xca], "vexp2pd zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xca, 0xca], "vrcp28pd zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xcb, 0xca], "vrcp28sd xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xcc, 0xca], "vrsqrt28pd zmm1{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x78, 0xcd, 0xca], "vrsqrt28sd xmm1{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x2c, 0xca], "vscalefpd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x2d, 0xca], "vscalefsd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x42, 0xca], "vgetexppd zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x43, 0xca], "vgetexpsd xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xc8, 0xca], "vexp2pd zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xca, 0xca], "vrcp28pd zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xcb, 0xca], "vrcp28sd xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x7d, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x00, 0x0a], "vpshufb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x00, 0x4a, 0x01], "vpshufb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x00, 0xca], "vpshufb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x04, 0x0a], "vpmaddubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x04, 0x4a, 0x01], "vpmaddubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x04, 0xca], "vpmaddubsw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x0b, 0x0a], "vpmulhrsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x0b, 0x4a, 0x01], "vpmulhrsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x0b, 0xca], "vpmulhrsw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x0d, 0x0a], "vpermilpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x0d, 0xca], "vpermilpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x10, 0x0a], "vpsrlvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x10, 0x4a, 0x01], "vpsrlvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x10, 0xca], "vpsrlvw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x11, 0x0a], "vpsravw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x11, 0x4a, 0x01], "vpsravw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x11, 0xca], "vpsravw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x12, 0x0a], "vpsllvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x12, 0x4a, 0x01], "vpsllvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x12, 0xca], "vpsllvw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x14, 0x0a], "vprorvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x14, 0xca], "vprorvq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x15, 0x0a], "vprolvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x15, 0xca], "vprolvq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1c, 0x0a], "vpabsb xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1c, 0x4a, 0x01], "vpabsb xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1c, 0xca], "vpabsb xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1d, 0x0a], "vpabsw xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1d, 0x4a, 0x01], "vpabsw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1d, 0xca], "vpabsw xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1f, 0x0a], "vpabsq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x1f, 0xca], "vpabsq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x20, 0x0a], "vpmovsxbw xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x20, 0x4a, 0x01], "vpmovsxbw xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x20, 0xca], "vpmovsxbw xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x21, 0x0a], "vpmovsxbd xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x21, 0x4a, 0x01], "vpmovsxbd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x21, 0xca], "vpmovsxbd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x22, 0x0a], "vpmovsxbq xmm1{k5}{z}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x22, 0x4a, 0x01], "vpmovsxbq xmm1{k5}{z}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x22, 0xca], "vpmovsxbq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x23, 0x0a], "vpmovsxwd xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x23, 0x4a, 0x01], "vpmovsxwd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x23, 0xca], "vpmovsxwd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x24, 0x0a], "vpmovsxwq xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x24, 0x4a, 0x01], "vpmovsxwq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x24, 0xca], "vpmovsxwq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x28, 0x0a], "vpmuldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x28, 0xca], "vpmuldq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x2c, 0x0a], "vscalefpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x2c, 0xca], "vscalefpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x30, 0x0a], "vpmovzxbw xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x30, 0x4a, 0x01], "vpmovzxbw xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x30, 0xca], "vpmovzxbw xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x31, 0x0a], "vpmovzxbd xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x31, 0x4a, 0x01], "vpmovzxbd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x31, 0xca], "vpmovzxbd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x32, 0x0a], "vpmovzxbq xmm1{k5}{z}, word [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x32, 0x4a, 0x01], "vpmovzxbq xmm1{k5}{z}, word [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x32, 0xca], "vpmovzxbq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x33, 0x0a], "vpmovzxwd xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x33, 0x4a, 0x01], "vpmovzxwd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x33, 0xca], "vpmovzxwd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x34, 0x0a], "vpmovzxwq xmm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x34, 0x4a, 0x01], "vpmovzxwq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x34, 0xca], "vpmovzxwq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x38, 0x0a], "vpminsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x38, 0x4a, 0x01], "vpminsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x38, 0xca], "vpminsb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x39, 0x0a], "vpminsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x39, 0xca], "vpminsq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3a, 0x0a], "vpminuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3a, 0x4a, 0x01], "vpminuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3a, 0xca], "vpminuw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3b, 0x0a], "vpminuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3b, 0xca], "vpminuq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3c, 0x0a], "vpmaxsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3c, 0x4a, 0x01], "vpmaxsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3c, 0xca], "vpmaxsb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3d, 0xca], "vpmaxsq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3e, 0x0a], "vpmaxuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3e, 0x4a, 0x01], "vpmaxuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3e, 0xca], "vpmaxuw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x3f, 0xca], "vpmaxuq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x40, 0x0a], "vpmullq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x40, 0xca], "vpmullq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x42, 0x0a], "vgetexppd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x42, 0xca], "vgetexppd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x44, 0x0a], "vplzcntq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x44, 0xca], "vplzcntq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x45, 0x0a], "vpsrlvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x45, 0xca], "vpsrlvq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x46, 0x0a], "vpsravq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x46, 0xca], "vpsravq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x47, 0x0a], "vpsllvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x47, 0xca], "vpsllvq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x4c, 0xca], "vrcp14pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x4e, 0xca], "vrsqrt14pd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x54, 0x0a], "vpopcntw xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x54, 0x4a, 0x01], "vpopcntw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x54, 0xca], "vpopcntw xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x55, 0x0a], "vpopcntq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x55, 0xca], "vpopcntq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x59, 0x0a], "vpbroadcastq xmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x59, 0x4a, 0x01], "vpbroadcastq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x59, 0xca], "vpbroadcastq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x62, 0x0a], "vpexpandw xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x62, 0x4a, 0x01], "vpexpandw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x62, 0xca], "vpexpandw xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x63, 0xca], "vpcompressw xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x64, 0x0a], "vpblendmq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x64, 0xca], "vpblendmq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x65, 0x0a], "vblendmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x65, 0xca], "vblendmpd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x66, 0x0a], "vpblendmw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x66, 0x4a, 0x01], "vpblendmw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x66, 0xca], "vpblendmw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x70, 0x0a], "vpshldvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x70, 0x4a, 0x01], "vpshldvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x70, 0xca], "vpshldvw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x71, 0x0a], "vpshldvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x71, 0xca], "vpshldvq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x72, 0x0a], "vpshrdvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x72, 0x4a, 0x01], "vpshrdvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x72, 0xca], "vpshrdvw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x73, 0x0a], "vpshrdvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x73, 0xca], "vpshrdvq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x75, 0x0a], "vpermi2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x75, 0x4a, 0x01], "vpermi2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x75, 0xca], "vpermi2w xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x76, 0x0a], "vpermi2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x76, 0xca], "vpermi2q xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x77, 0x0a], "vpermi2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x77, 0xca], "vpermi2pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7c, 0xca], "vpbroadcastd xmm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7d, 0x0a], "vpermt2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7d, 0x4a, 0x01], "vpermt2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7d, 0xca], "vpermt2w xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7e, 0x0a], "vpermt2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7e, 0xca], "vpermt2q xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x7f, 0xca], "vpermt2pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x83, 0xca], "vpmultishiftqb xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x88, 0x0a], "vexpandpd xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x88, 0x4a, 0x01], "vexpandpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x88, 0xca], "vexpandpd xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x89, 0x0a], "vpexpandq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x89, 0x4a, 0x01], "vpexpandq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x89, 0xca], "vpexpandq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x8a, 0xca], "vcompresspd xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x8b, 0xca], "vpcompressq xmm2{k5}{z}, xmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x8d, 0x0a], "vpermw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x8d, 0x4a, 0x01], "vpermw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x8d, 0xca], "vpermw xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x96, 0xca], "vfmaddsub132pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x97, 0xca], "vfmsubadd132pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x98, 0xca], "vfmadd132pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9a, 0xca], "vfmsub132pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9c, 0xca], "vfnmadd132pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0x9e, 0xca], "vfnmsub132pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa6, 0xca], "vfmaddsub213pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa7, 0xca], "vfmsubadd213pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xa8, 0xca], "vfmadd213pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xaa, 0xca], "vfmsub213pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xac, 0xca], "vfnmadd213pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xae, 0xca], "vfnmsub213pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb4, 0xca], "vpmadd52luq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb5, 0xca], "vpmadd52huq xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb6, 0xca], "vfmaddsub231pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb7, 0xca], "vfmsubadd231pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xb8, 0xca], "vfmadd231pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xba, 0xca], "vfmsub231pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xbc, 0xca], "vfnmadd231pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xbe, 0xca], "vfnmsub231pd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xc4, 0x0a], "vpconflictq xmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x8d, 0xc4, 0xca], "vpconflictq xmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x0d, 0x0a], "vpermilpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x14, 0x0a], "vprorvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x15, 0x0a], "vprolvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x1f, 0x0a], "vpabsq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x28, 0x0a], "vpmuldq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x2c, 0x0a], "vscalefpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x39, 0x0a], "vpminsq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x3b, 0x0a], "vpminuq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x40, 0x0a], "vpmullq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x42, 0x0a], "vgetexppd xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x44, 0x0a], "vplzcntq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x45, 0x0a], "vpsrlvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x46, 0x0a], "vpsravq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x47, 0x0a], "vpsllvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x55, 0x0a], "vpopcntq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x64, 0x0a], "vpblendmq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x65, 0x0a], "vblendmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x71, 0x0a], "vpshldvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x73, 0x0a], "vpshrdvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x76, 0x0a], "vpermi2q xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x77, 0x0a], "vpermi2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x7e, 0x0a], "vpermt2q xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xc4, 0x0a], "vpconflictq xmm1{k5}{z}, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0x9d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x00, 0x0a], "vpshufb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x00, 0x4a, 0x01], "vpshufb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x00, 0xca], "vpshufb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x04, 0x0a], "vpmaddubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x04, 0x4a, 0x01], "vpmaddubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x04, 0xca], "vpmaddubsw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x0b, 0x0a], "vpmulhrsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x0b, 0x4a, 0x01], "vpmulhrsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x0b, 0xca], "vpmulhrsw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x0d, 0x0a], "vpermilpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x0d, 0xca], "vpermilpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x10, 0x0a], "vpsrlvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x10, 0x4a, 0x01], "vpsrlvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x10, 0xca], "vpsrlvw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x11, 0x0a], "vpsravw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x11, 0x4a, 0x01], "vpsravw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x11, 0xca], "vpsravw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x12, 0x0a], "vpsllvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x12, 0x4a, 0x01], "vpsllvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x12, 0xca], "vpsllvw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x14, 0x0a], "vprorvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x14, 0xca], "vprorvq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x15, 0x0a], "vprolvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x15, 0xca], "vprolvq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x16, 0x0a], "vpermpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x16, 0xca], "vpermpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x19, 0x0a], "vbroadcastsd ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x19, 0x4a, 0x01], "vbroadcastsd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x19, 0xca], "vbroadcastsd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1a, 0x0a], "vbroadcastf64x2 ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1c, 0x0a], "vpabsb ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1c, 0x4a, 0x01], "vpabsb ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1c, 0xca], "vpabsb ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1d, 0x0a], "vpabsw ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1d, 0x4a, 0x01], "vpabsw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1d, 0xca], "vpabsw ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1f, 0x0a], "vpabsq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x1f, 0xca], "vpabsq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x20, 0x0a], "vpmovsxbw ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x20, 0x4a, 0x01], "vpmovsxbw ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x20, 0xca], "vpmovsxbw ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x21, 0x0a], "vpmovsxbd ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x21, 0x4a, 0x01], "vpmovsxbd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x21, 0xca], "vpmovsxbd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x22, 0x0a], "vpmovsxbq ymm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x22, 0x4a, 0x01], "vpmovsxbq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x22, 0xca], "vpmovsxbq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x23, 0x0a], "vpmovsxwd ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x23, 0x4a, 0x01], "vpmovsxwd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x23, 0xca], "vpmovsxwd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x24, 0x0a], "vpmovsxwq ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x24, 0x4a, 0x01], "vpmovsxwq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x24, 0xca], "vpmovsxwq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x28, 0x0a], "vpmuldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x28, 0xca], "vpmuldq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x2c, 0x0a], "vscalefpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x2c, 0xca], "vscalefpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x2d, 0x0a], "vscalefsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x2d, 0x4a, 0x01], "vscalefsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x30, 0x0a], "vpmovzxbw ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x30, 0x4a, 0x01], "vpmovzxbw ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x30, 0xca], "vpmovzxbw ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x31, 0x0a], "vpmovzxbd ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x31, 0x4a, 0x01], "vpmovzxbd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x31, 0xca], "vpmovzxbd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x32, 0x0a], "vpmovzxbq ymm1{k5}{z}, dword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x32, 0x4a, 0x01], "vpmovzxbq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x32, 0xca], "vpmovzxbq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x33, 0x0a], "vpmovzxwd ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x33, 0x4a, 0x01], "vpmovzxwd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x33, 0xca], "vpmovzxwd ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x34, 0x0a], "vpmovzxwq ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x34, 0x4a, 0x01], "vpmovzxwq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x34, 0xca], "vpmovzxwq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x36, 0x0a], "vpermq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x36, 0xca], "vpermq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x38, 0x0a], "vpminsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x38, 0x4a, 0x01], "vpminsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x38, 0xca], "vpminsb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x39, 0x0a], "vpminsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x39, 0xca], "vpminsq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3a, 0x0a], "vpminuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3a, 0x4a, 0x01], "vpminuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3a, 0xca], "vpminuw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3b, 0x0a], "vpminuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3b, 0xca], "vpminuq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3c, 0x0a], "vpmaxsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3c, 0x4a, 0x01], "vpmaxsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3c, 0xca], "vpmaxsb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3d, 0x0a], "vpmaxsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3d, 0xca], "vpmaxsq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3e, 0x0a], "vpmaxuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3e, 0x4a, 0x01], "vpmaxuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3e, 0xca], "vpmaxuw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3f, 0x0a], "vpmaxuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x3f, 0xca], "vpmaxuq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x40, 0x0a], "vpmullq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x40, 0xca], "vpmullq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x42, 0x0a], "vgetexppd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x42, 0xca], "vgetexppd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x43, 0x0a], "vgetexpsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x43, 0x4a, 0x01], "vgetexpsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x43, 0xca], "vgetexpsd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x44, 0x0a], "vplzcntq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x44, 0xca], "vplzcntq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x45, 0x0a], "vpsrlvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x45, 0xca], "vpsrlvq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x46, 0x0a], "vpsravq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x46, 0xca], "vpsravq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x47, 0x0a], "vpsllvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x47, 0xca], "vpsllvq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4c, 0x0a], "vrcp14pd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4c, 0xca], "vrcp14pd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4d, 0x0a], "vrcp14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4d, 0x4a, 0x01], "vrcp14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4d, 0xca], "vrcp14sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4e, 0xca], "vrsqrt14pd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4f, 0x0a], "vrsqrt14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4f, 0x4a, 0x01], "vrsqrt14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x4f, 0xca], "vrsqrt14sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x54, 0x0a], "vpopcntw ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x54, 0x4a, 0x01], "vpopcntw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x54, 0xca], "vpopcntw ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x55, 0x0a], "vpopcntq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x55, 0xca], "vpopcntq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x59, 0x0a], "vpbroadcastq ymm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x59, 0x4a, 0x01], "vpbroadcastq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x59, 0xca], "vpbroadcastq ymm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x5a, 0x0a], "vbroadcasti64x2 ymm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x62, 0x0a], "vpexpandw ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x62, 0x4a, 0x01], "vpexpandw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x62, 0xca], "vpexpandw ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x63, 0xca], "vpcompressw ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x64, 0x0a], "vpblendmq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x64, 0xca], "vpblendmq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x65, 0x0a], "vblendmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x65, 0xca], "vblendmpd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x66, 0x0a], "vpblendmw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x66, 0x4a, 0x01], "vpblendmw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x66, 0xca], "vpblendmw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x70, 0x0a], "vpshldvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x70, 0x4a, 0x01], "vpshldvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x70, 0xca], "vpshldvw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x71, 0x0a], "vpshldvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x71, 0xca], "vpshldvq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x72, 0x0a], "vpshrdvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x72, 0x4a, 0x01], "vpshrdvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x72, 0xca], "vpshrdvw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x73, 0x0a], "vpshrdvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x73, 0xca], "vpshrdvq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x75, 0x0a], "vpermi2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x75, 0x4a, 0x01], "vpermi2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x75, 0xca], "vpermi2w ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x76, 0x0a], "vpermi2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x76, 0xca], "vpermi2q ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x77, 0x0a], "vpermi2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x77, 0xca], "vpermi2pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7c, 0xca], "vpbroadcastd ymm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7d, 0x0a], "vpermt2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7d, 0x4a, 0x01], "vpermt2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7d, 0xca], "vpermt2w ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7e, 0x0a], "vpermt2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7e, 0xca], "vpermt2q ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7f, 0x0a], "vpermt2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x7f, 0xca], "vpermt2pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x83, 0xca], "vpmultishiftqb ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x88, 0x0a], "vexpandpd ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x88, 0x4a, 0x01], "vexpandpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x88, 0xca], "vexpandpd ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x89, 0x0a], "vpexpandq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x89, 0x4a, 0x01], "vpexpandq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x89, 0xca], "vpexpandq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x8a, 0xca], "vcompresspd ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x8b, 0xca], "vpcompressq ymm2{k5}{z}, ymm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x8d, 0x0a], "vpermw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x8d, 0x4a, 0x01], "vpermw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x8d, 0xca], "vpermw ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x96, 0xca], "vfmaddsub132pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x97, 0xca], "vfmsubadd132pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x98, 0x0a], "vfmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x98, 0xca], "vfmadd132pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x99, 0x0a], "vfmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x99, 0x4a, 0x01], "vfmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9a, 0xca], "vfmsub132pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9b, 0x0a], "vfmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9b, 0x4a, 0x01], "vfmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9c, 0xca], "vfnmadd132pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9d, 0x0a], "vfnmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9d, 0x4a, 0x01], "vfnmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9e, 0xca], "vfnmsub132pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9f, 0x0a], "vfnmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9f, 0x4a, 0x01], "vfnmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa6, 0xca], "vfmaddsub213pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa7, 0xca], "vfmsubadd213pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa8, 0xca], "vfmadd213pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa9, 0x0a], "vfmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa9, 0x4a, 0x01], "vfmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xaa, 0xca], "vfmsub213pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xab, 0x0a], "vfmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xab, 0x4a, 0x01], "vfmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xac, 0xca], "vfnmadd213pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xad, 0x0a], "vfnmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xad, 0x4a, 0x01], "vfnmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xae, 0xca], "vfnmsub213pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xaf, 0x0a], "vfnmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xaf, 0x4a, 0x01], "vfnmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb4, 0xca], "vpmadd52luq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb5, 0xca], "vpmadd52huq ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb6, 0xca], "vfmaddsub231pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb7, 0xca], "vfmsubadd231pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb8, 0xca], "vfmadd231pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb9, 0x0a], "vfmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb9, 0x4a, 0x01], "vfmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xba, 0x0a], "vfmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xba, 0xca], "vfmsub231pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbb, 0x0a], "vfmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbb, 0x4a, 0x01], "vfmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbc, 0xca], "vfnmadd231pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbd, 0x0a], "vfnmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbd, 0x4a, 0x01], "vfnmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbe, 0xca], "vfnmsub231pd ymm1{k5}{z}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbf, 0x0a], "vfnmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbf, 0x4a, 0x01], "vfnmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xc4, 0x0a], "vpconflictq ymm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xc4, 0xca], "vpconflictq ymm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xcb, 0x0a], "vrcp28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xcb, 0x4a, 0x01], "vrcp28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xcb, 0xca], "vrcp28sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xcd, 0x0a], "vrsqrt28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xcd, 0x4a, 0x01], "vrsqrt28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xad, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}{z}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x0d, 0x0a], "vpermilpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x14, 0x0a], "vprorvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x15, 0x0a], "vprolvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x16, 0x0a], "vpermpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x1f, 0x0a], "vpabsq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x28, 0x0a], "vpmuldq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x2c, 0x0a], "vscalefpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x36, 0x0a], "vpermq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x39, 0x0a], "vpminsq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x3b, 0x0a], "vpminuq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x3d, 0x0a], "vpmaxsq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x3f, 0x0a], "vpmaxuq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x40, 0x0a], "vpmullq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x42, 0x0a], "vgetexppd ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x44, 0x0a], "vplzcntq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x45, 0x0a], "vpsrlvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x46, 0x0a], "vpsravq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x47, 0x0a], "vpsllvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x4c, 0x0a], "vrcp14pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x55, 0x0a], "vpopcntq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x64, 0x0a], "vpblendmq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x65, 0x0a], "vblendmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x71, 0x0a], "vpshldvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x73, 0x0a], "vpshrdvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x76, 0x0a], "vpermi2q ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x77, 0x0a], "vpermi2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x7e, 0x0a], "vpermt2q ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x7f, 0x0a], "vpermt2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x98, 0x0a], "vfmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xba, 0x0a], "vfmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xc4, 0x0a], "vpconflictq ymm1{k5}{z}, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xbd, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x00, 0x0a], "vpshufb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x00, 0x4a, 0x01], "vpshufb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x00, 0xca], "vpshufb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x04, 0x0a], "vpmaddubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x04, 0x4a, 0x01], "vpmaddubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x04, 0xca], "vpmaddubsw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x0b, 0x0a], "vpmulhrsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x0b, 0x4a, 0x01], "vpmulhrsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x0b, 0xca], "vpmulhrsw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x0d, 0x0a], "vpermilpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x0d, 0xca], "vpermilpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x10, 0x0a], "vpsrlvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x10, 0x4a, 0x01], "vpsrlvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x10, 0xca], "vpsrlvw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x11, 0x0a], "vpsravw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x11, 0x4a, 0x01], "vpsravw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x11, 0xca], "vpsravw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x12, 0x0a], "vpsllvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x12, 0x4a, 0x01], "vpsllvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x12, 0xca], "vpsllvw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x14, 0x0a], "vprorvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x14, 0xca], "vprorvq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x15, 0x0a], "vprolvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x15, 0xca], "vprolvq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x16, 0x0a], "vpermpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x16, 0xca], "vpermpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x19, 0x0a], "vbroadcastsd zmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x19, 0x4a, 0x01], "vbroadcastsd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x19, 0xca], "vbroadcastsd zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1a, 0x0a], "vbroadcastf64x2 zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1b, 0x0a], "vbroadcastf64x4 zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1b, 0x4a, 0x01], "vbroadcastf64x4 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1c, 0x0a], "vpabsb zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1c, 0x4a, 0x01], "vpabsb zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1c, 0xca], "vpabsb zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1d, 0x0a], "vpabsw zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1d, 0x4a, 0x01], "vpabsw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1d, 0xca], "vpabsw zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1f, 0x0a], "vpabsq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x1f, 0xca], "vpabsq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x20, 0x0a], "vpmovsxbw zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x20, 0x4a, 0x01], "vpmovsxbw zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x20, 0xca], "vpmovsxbw zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x21, 0x0a], "vpmovsxbd zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x21, 0x4a, 0x01], "vpmovsxbd zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x21, 0xca], "vpmovsxbd zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x22, 0x0a], "vpmovsxbq zmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x22, 0x4a, 0x01], "vpmovsxbq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x22, 0xca], "vpmovsxbq zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x23, 0x0a], "vpmovsxwd zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x23, 0x4a, 0x01], "vpmovsxwd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x23, 0xca], "vpmovsxwd zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x24, 0x0a], "vpmovsxwq zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x24, 0x4a, 0x01], "vpmovsxwq zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x24, 0xca], "vpmovsxwq zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x28, 0x0a], "vpmuldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x28, 0xca], "vpmuldq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x2c, 0x0a], "vscalefpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x30, 0x0a], "vpmovzxbw zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x30, 0x4a, 0x01], "vpmovzxbw zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x30, 0xca], "vpmovzxbw zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x31, 0x0a], "vpmovzxbd zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x31, 0x4a, 0x01], "vpmovzxbd zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x31, 0xca], "vpmovzxbd zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x32, 0x0a], "vpmovzxbq zmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x32, 0x4a, 0x01], "vpmovzxbq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x32, 0xca], "vpmovzxbq zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x33, 0x0a], "vpmovzxwd zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x33, 0x4a, 0x01], "vpmovzxwd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x33, 0xca], "vpmovzxwd zmm1{k5}{z}, ymm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x34, 0x0a], "vpmovzxwq zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x34, 0x4a, 0x01], "vpmovzxwq zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x34, 0xca], "vpmovzxwq zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x36, 0x0a], "vpermq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x36, 0xca], "vpermq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x38, 0x0a], "vpminsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x38, 0x4a, 0x01], "vpminsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x38, 0xca], "vpminsb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x39, 0x0a], "vpminsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x39, 0xca], "vpminsq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3a, 0x0a], "vpminuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3a, 0x4a, 0x01], "vpminuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3a, 0xca], "vpminuw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3b, 0x0a], "vpminuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3b, 0xca], "vpminuq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3c, 0x0a], "vpmaxsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3c, 0x4a, 0x01], "vpmaxsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3c, 0xca], "vpmaxsb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3d, 0x0a], "vpmaxsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3d, 0xca], "vpmaxsq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3e, 0x0a], "vpmaxuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3e, 0x4a, 0x01], "vpmaxuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3e, 0xca], "vpmaxuw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3f, 0x0a], "vpmaxuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x3f, 0xca], "vpmaxuq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x40, 0x0a], "vpmullq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x40, 0xca], "vpmullq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x42, 0x0a], "vgetexppd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x42, 0xca], "vgetexppd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x44, 0x0a], "vplzcntq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x44, 0xca], "vplzcntq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x45, 0x0a], "vpsrlvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x45, 0xca], "vpsrlvq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x46, 0x0a], "vpsravq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x46, 0xca], "vpsravq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x47, 0x0a], "vpsllvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x47, 0xca], "vpsllvq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x4c, 0x0a], "vrcp14pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x4c, 0xca], "vrcp14pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x4e, 0xca], "vrsqrt14pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x54, 0x0a], "vpopcntw zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x54, 0x4a, 0x01], "vpopcntw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x54, 0xca], "vpopcntw zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x55, 0x0a], "vpopcntq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x55, 0xca], "vpopcntq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x59, 0x0a], "vpbroadcastq zmm1{k5}{z}, qword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x59, 0x4a, 0x01], "vpbroadcastq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x59, 0xca], "vpbroadcastq zmm1{k5}{z}, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x5a, 0x0a], "vbroadcasti64x2 zmm1{k5}{z}, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x5b, 0x0a], "vbroadcasti64x4 zmm1{k5}{z}, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x5b, 0x4a, 0x01], "vbroadcasti64x4 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x62, 0x0a], "vpexpandw zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x62, 0x4a, 0x01], "vpexpandw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x2]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x62, 0xca], "vpexpandw zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x63, 0xca], "vpcompressw zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x64, 0x0a], "vpblendmq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x64, 0xca], "vpblendmq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x65, 0x0a], "vblendmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x65, 0xca], "vblendmpd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x66, 0x0a], "vpblendmw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x66, 0x4a, 0x01], "vpblendmw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x66, 0xca], "vpblendmw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x70, 0x0a], "vpshldvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x70, 0x4a, 0x01], "vpshldvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x70, 0xca], "vpshldvw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x71, 0x0a], "vpshldvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x71, 0xca], "vpshldvq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x72, 0x0a], "vpshrdvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x72, 0x4a, 0x01], "vpshrdvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x72, 0xca], "vpshrdvw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x73, 0x0a], "vpshrdvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x73, 0xca], "vpshrdvq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x75, 0x0a], "vpermi2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x75, 0x4a, 0x01], "vpermi2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x75, 0xca], "vpermi2w zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x76, 0x0a], "vpermi2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x76, 0xca], "vpermi2q zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x77, 0x0a], "vpermi2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x77, 0xca], "vpermi2pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7c, 0xca], "vpbroadcastd zmm1{k5}{z}, edx");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7d, 0x0a], "vpermt2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7d, 0x4a, 0x01], "vpermt2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7d, 0xca], "vpermt2w zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7e, 0x0a], "vpermt2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7e, 0xca], "vpermt2q zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7f, 0x0a], "vpermt2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x7f, 0xca], "vpermt2pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x83, 0xca], "vpmultishiftqb zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x88, 0x0a], "vexpandpd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x88, 0x4a, 0x01], "vexpandpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x88, 0xca], "vexpandpd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x89, 0x0a], "vpexpandq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x89, 0x4a, 0x01], "vpexpandq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x8]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x89, 0xca], "vpexpandq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x8a, 0xca], "vcompresspd zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x8b, 0xca], "vpcompressq zmm2{k5}{z}, zmm1");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x8d, 0x0a], "vpermw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x8d, 0x4a, 0x01], "vpermw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x8d, 0xca], "vpermw zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x98, 0x0a], "vfmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb4, 0xca], "vpmadd52luq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb5, 0xca], "vpmadd52huq zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xba, 0x0a], "vfmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xc4, 0x0a], "vpconflictq zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xc4, 0xca], "vpconflictq zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xc8, 0x0a], "vexp2pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xc8, 0xca], "vexp2pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xca, 0x0a], "vrcp28pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xca, 0xca], "vrcp28pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}{z}, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfd, 0xcd, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}{z}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x0d, 0x0a], "vpermilpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x14, 0x0a], "vprorvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x15, 0x0a], "vprolvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x16, 0x0a], "vpermpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x1f, 0x0a], "vpabsq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x28, 0x0a], "vpmuldq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x2c, 0x0a], "vscalefpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x36, 0x0a], "vpermq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x39, 0x0a], "vpminsq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x3b, 0x0a], "vpminuq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x3d, 0x0a], "vpmaxsq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x3f, 0x0a], "vpmaxuq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x40, 0x0a], "vpmullq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x42, 0x0a], "vgetexppd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x44, 0x0a], "vplzcntq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x45, 0x0a], "vpsrlvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x46, 0x0a], "vpsravq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x47, 0x0a], "vpsllvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x4c, 0x0a], "vrcp14pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x55, 0x0a], "vpopcntq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x64, 0x0a], "vpblendmq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x65, 0x0a], "vblendmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x71, 0x0a], "vpshldvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x73, 0x0a], "vpshrdvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x76, 0x0a], "vpermi2q zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x77, 0x0a], "vpermi2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x7e, 0x0a], "vpermt2q zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x7f, 0x0a], "vpermt2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x98, 0x0a], "vfmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xba, 0x0a], "vfmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xc4, 0x0a], "vpconflictq zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xc8, 0x0a], "vexp2pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xca, 0x0a], "vrcp28pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xdd, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x42, 0xca], "vgetexppd zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x43, 0xca], "vgetexpsd xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xc8, 0xca], "vexp2pd zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xca, 0xca], "vrcp28pd zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xcb, 0xca], "vrcp28sd xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}{z}{sae}, zmm2");
-    test_display(&[0x62, 0xf2, 0xfd, 0xfd, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}{z}{sae}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x26, 0x0a], "vptestnmw k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x26, 0x4a, 0x01], "vptestnmw k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x26, 0xca], "vptestnmw k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x27, 0x0a], "vptestnmq k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x27, 0x4a, 0x01], "vptestnmq k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x27, 0xca], "vptestnmq k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x28, 0xca], "vpmovm2w xmm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x29, 0xca], "vpmovw2m k1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x2a, 0xca], "vpbroadcastmb2q xmm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x38, 0xca], "vpmovm2q xmm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x08, 0x39, 0xca], "vpmovq2m k1, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x0d, 0x26, 0x0a], "vptestnmw k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x0d, 0x26, 0x4a, 0x01], "vptestnmw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x0d, 0x26, 0xca], "vptestnmw k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x0d, 0x27, 0x0a], "vptestnmq k1{k5}, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x0d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x0d, 0x27, 0xca], "vptestnmq k1{k5}, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x18, 0x27, 0x0a], "vptestnmq k1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x18, 0x27, 0x4a, 0x01], "vptestnmq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x1d, 0x27, 0x0a], "vptestnmq k1{k5}, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x1d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x26, 0x0a], "vptestnmw k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x26, 0x4a, 0x01], "vptestnmw k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x26, 0xca], "vptestnmw k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x27, 0x0a], "vptestnmq k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x27, 0x4a, 0x01], "vptestnmq k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x27, 0xca], "vptestnmq k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x28, 0xca], "vpmovm2w ymm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x29, 0xca], "vpmovw2m k1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x2a, 0xca], "vpbroadcastmb2q ymm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x38, 0xca], "vpmovm2q ymm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x28, 0x39, 0xca], "vpmovq2m k1, ymm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x2d, 0x26, 0x0a], "vptestnmw k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x2d, 0x26, 0x4a, 0x01], "vptestnmw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x2d, 0x26, 0xca], "vptestnmw k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x2d, 0x27, 0x0a], "vptestnmq k1{k5}, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x2d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x2d, 0x27, 0xca], "vptestnmq k1{k5}, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x38, 0x27, 0x0a], "vptestnmq k1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x38, 0x27, 0x4a, 0x01], "vptestnmq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x3d, 0x27, 0x0a], "vptestnmq k1{k5}, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x3d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x26, 0x0a], "vptestnmw k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x26, 0x4a, 0x01], "vptestnmw k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x26, 0xca], "vptestnmw k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x27, 0x0a], "vptestnmq k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x27, 0x4a, 0x01], "vptestnmq k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x27, 0xca], "vptestnmq k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x28, 0xca], "vpmovm2w zmm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x29, 0xca], "vpmovw2m k1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x2a, 0xca], "vpbroadcastmb2q zmm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x38, 0xca], "vpmovm2q zmm1, k2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x48, 0x39, 0xca], "vpmovq2m k1, zmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x4d, 0x26, 0x0a], "vptestnmw k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x4d, 0x26, 0x4a, 0x01], "vptestnmw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x4d, 0x26, 0xca], "vptestnmw k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x4d, 0x27, 0x0a], "vptestnmq k1{k5}, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x4d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xfe, 0x4d, 0x27, 0xca], "vptestnmq k1{k5}, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xfe, 0x58, 0x27, 0x0a], "vptestnmq k1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x58, 0x27, 0x4a, 0x01], "vptestnmq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x5d, 0x27, 0x0a], "vptestnmq k1{k5}, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xfe, 0x5d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf2, 0xff, 0x08, 0x68, 0x0a], "vp2intersectq k1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xff, 0x08, 0x68, 0x4a, 0x01], "vp2intersectq k1, xmm0, xmmword [bp + si * 1 + 0x10]");
-    test_display(&[0x62, 0xf2, 0xff, 0x08, 0x68, 0xca], "vp2intersectq k1, xmm0, xmm2");
-    test_display(&[0x62, 0xf2, 0xff, 0x18, 0x68, 0x0a], "vp2intersectq k1, xmm0, qword [bp + si * 1]{1to2}");
-    test_display(&[0x62, 0xf2, 0xff, 0x18, 0x68, 0x4a, 0x01], "vp2intersectq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}");
-    test_display(&[0x62, 0xf2, 0xff, 0x28, 0x68, 0x0a], "vp2intersectq k1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xff, 0x28, 0x68, 0x4a, 0x01], "vp2intersectq k1, ymm0, ymmword [bp + si * 1 + 0x20]");
-    test_display(&[0x62, 0xf2, 0xff, 0x28, 0x68, 0xca], "vp2intersectq k1, ymm0, ymm2");
-    test_display(&[0x62, 0xf2, 0xff, 0x38, 0x68, 0x0a], "vp2intersectq k1, ymm0, qword [bp + si * 1]{1to4}");
-    test_display(&[0x62, 0xf2, 0xff, 0x38, 0x68, 0x4a, 0x01], "vp2intersectq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}");
-    test_display(&[0x62, 0xf2, 0xff, 0x48, 0x68, 0x0a], "vp2intersectq k1, zmm0, zmmword [bp + si * 1]");
-    test_display(&[0x62, 0xf2, 0xff, 0x48, 0x68, 0x4a, 0x01], "vp2intersectq k1, zmm0, zmmword [bp + si * 1 + 0x40]");
-    test_display(&[0x62, 0xf2, 0xff, 0x48, 0x68, 0xca], "vp2intersectq k1, zmm0, zmm2");
-    test_display(&[0x62, 0xf2, 0xff, 0x58, 0x68, 0x0a], "vp2intersectq k1, zmm0, qword [bp + si * 1]{1to8}");
-    test_display(&[0x62, 0xf2, 0xff, 0x58, 0x68, 0x4a, 0x01], "vp2intersectq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x03, 0x0a, 0xcc], "valignd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x03, 0xca, 0xcc], "valignd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x04, 0x0a, 0xcc], "vpermilps xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x04, 0xca, 0xcc], "vpermilps xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x08, 0xca, 0xcc], "vrndscaleps xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1d, 0x0a, 0xcc], "vcvtps2ph qword [bp + si * 1], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph qword [bp + si * 1 + 0x8], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1e, 0x0a, 0xcc], "vpcmpud k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1e, 0xca, 0xcc], "vpcmpud k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1f, 0x0a, 0xcc], "vpcmpd k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x1f, 0xca, 0xcc], "vpcmpd k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x21, 0x0a, 0xcc], "vinsertps xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x21, 0x4a, 0x01, 0xcc], "vinsertps xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x21, 0xca, 0xcc], "vinsertps xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x25, 0x0a, 0xcc], "vpternlogd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x25, 0xca, 0xcc], "vpternlogd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x26, 0x0a, 0xcc], "vgetmantps xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x26, 0xca, 0xcc], "vgetmantps xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x3e, 0x0a, 0xcc], "vpcmpub k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x3e, 0xca, 0xcc], "vpcmpub k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x3f, 0x0a, 0xcc], "vpcmpb k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x3f, 0xca, 0xcc], "vpcmpb k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x42, 0x0a, 0xcc], "vdbpsadbw xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x42, 0xca, 0xcc], "vdbpsadbw xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x50, 0x0a, 0xcc], "vrangeps xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x50, 0xca, 0xcc], "vrangeps xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x54, 0xca, 0xcc], "vfixupimmps xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x56, 0x0a, 0xcc], "vreduceps xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x56, 0xca, 0xcc], "vreduceps xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x66, 0x0a, 0xcc], "vfpclassps k1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x66, 0xca, 0xcc], "vfpclassps k1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x71, 0x0a, 0xcc], "vpshldd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x71, 0xca, 0xcc], "vpshldd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x73, 0x0a, 0xcc], "vpshrdd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x08, 0x73, 0xca, 0xcc], "vpshrdd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x03, 0xca, 0xcc], "valignd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x04, 0xca, 0xcc], "vpermilps xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x08, 0xca, 0xcc], "vrndscaleps xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1d, 0x0a, 0xcc], "vcvtps2ph qword [bp + si * 1]{k5}, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph qword [bp + si * 1 + 0x8]{k5}, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1e, 0xca, 0xcc], "vpcmpud k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x1f, 0xca, 0xcc], "vpcmpd k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x25, 0xca, 0xcc], "vpternlogd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x26, 0xca, 0xcc], "vgetmantps xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x3e, 0x0a, 0xcc], "vpcmpub k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x3e, 0xca, 0xcc], "vpcmpub k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x3f, 0x0a, 0xcc], "vpcmpb k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x3f, 0xca, 0xcc], "vpcmpb k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x42, 0x0a, 0xcc], "vdbpsadbw xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x42, 0xca, 0xcc], "vdbpsadbw xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x50, 0xca, 0xcc], "vrangeps xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x54, 0xca, 0xcc], "vfixupimmps xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x56, 0xca, 0xcc], "vreduceps xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x66, 0xca, 0xcc], "vfpclassps k1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x71, 0xca, 0xcc], "vpshldd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x0d, 0x73, 0xca, 0xcc], "vpshrdd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x03, 0x0a, 0xcc], "valignd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x04, 0x0a, 0xcc], "vpermilps xmm1, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x1e, 0x0a, 0xcc], "vpcmpud k1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x1f, 0x0a, 0xcc], "vpcmpd k1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x25, 0x0a, 0xcc], "vpternlogd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x26, 0x0a, 0xcc], "vgetmantps xmm1, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x50, 0x0a, 0xcc], "vrangeps xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x56, 0x0a, 0xcc], "vreduceps xmm1, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x66, 0x0a, 0xcc], "vfpclassps k1, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x71, 0x0a, 0xcc], "vpshldd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x73, 0x0a, 0xcc], "vpshrdd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x18, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x1d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x03, 0x0a, 0xcc], "valignd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x03, 0xca, 0xcc], "valignd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x04, 0x0a, 0xcc], "vpermilps ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x04, 0xca, 0xcc], "vpermilps ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x08, 0xca, 0xcc], "vrndscaleps ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x0a, 0x0a, 0xcc], "vrndscaless xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x0a, 0x4a, 0x01, 0xcc], "vrndscaless xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x0a, 0xca, 0xcc], "vrndscaless xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x18, 0x0a, 0xcc], "vinsertf32x4 ymm1, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x18, 0xca, 0xcc], "vinsertf32x4 ymm1, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1d, 0x0a, 0xcc], "vcvtps2ph xmmword [bp + si * 1], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph xmmword [bp + si * 1 + 0x10], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1e, 0x0a, 0xcc], "vpcmpud k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1e, 0xca, 0xcc], "vpcmpud k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1f, 0x0a, 0xcc], "vpcmpd k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x1f, 0xca, 0xcc], "vpcmpd k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x23, 0xca, 0xcc], "vshuff32x4 ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x25, 0x0a, 0xcc], "vpternlogd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x25, 0xca, 0xcc], "vpternlogd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x26, 0x0a, 0xcc], "vgetmantps ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x26, 0xca, 0xcc], "vgetmantps ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x27, 0x0a, 0xcc], "vgetmantss xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x27, 0x4a, 0x01, 0xcc], "vgetmantss xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x27, 0xca, 0xcc], "vgetmantss xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x38, 0x0a, 0xcc], "vinserti32x4 ymm1, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x38, 0xca, 0xcc], "vinserti32x4 ymm1, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x3e, 0x0a, 0xcc], "vpcmpub k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x3e, 0xca, 0xcc], "vpcmpub k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x3f, 0x0a, 0xcc], "vpcmpb k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x3f, 0xca, 0xcc], "vpcmpb k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x42, 0x0a, 0xcc], "vdbpsadbw ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x42, 0xca, 0xcc], "vdbpsadbw ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x43, 0xca, 0xcc], "vshufi32x4 ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x50, 0x0a, 0xcc], "vrangeps ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x50, 0xca, 0xcc], "vrangeps ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x51, 0x0a, 0xcc], "vrangess xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x51, 0x4a, 0x01, 0xcc], "vrangess xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x51, 0xca, 0xcc], "vrangess xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x54, 0xca, 0xcc], "vfixupimmps ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x55, 0x0a, 0xcc], "vfixupimmss xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmss xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x55, 0xca, 0xcc], "vfixupimmss xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x56, 0x0a, 0xcc], "vreduceps ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x56, 0xca, 0xcc], "vreduceps ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x57, 0x0a, 0xcc], "vreducess xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x57, 0x4a, 0x01, 0xcc], "vreducess xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x57, 0xca, 0xcc], "vreducess xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x66, 0x0a, 0xcc], "vfpclassps k1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x66, 0xca, 0xcc], "vfpclassps k1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x67, 0x0a, 0xcc], "vfpclassss k1, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x67, 0x4a, 0x01, 0xcc], "vfpclassss k1, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x67, 0xca, 0xcc], "vfpclassss k1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x71, 0x0a, 0xcc], "vpshldd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x71, 0xca, 0xcc], "vpshldd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x73, 0x0a, 0xcc], "vpshrdd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x28, 0x73, 0xca, 0xcc], "vpshrdd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x03, 0xca, 0xcc], "valignd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x04, 0xca, 0xcc], "vpermilps ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x08, 0xca, 0xcc], "vrndscaleps ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x0a, 0x0a, 0xcc], "vrndscaless xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x0a, 0x4a, 0x01, 0xcc], "vrndscaless xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x18, 0x0a, 0xcc], "vinsertf32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x18, 0xca, 0xcc], "vinsertf32x4 ymm1{k5}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1d, 0x0a, 0xcc], "vcvtps2ph xmmword [bp + si * 1]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1e, 0xca, 0xcc], "vpcmpud k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x1f, 0xca, 0xcc], "vpcmpd k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x23, 0xca, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x25, 0xca, 0xcc], "vpternlogd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x26, 0xca, 0xcc], "vgetmantps ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x27, 0x0a, 0xcc], "vgetmantss xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x27, 0x4a, 0x01, 0xcc], "vgetmantss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x38, 0x0a, 0xcc], "vinserti32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x38, 0xca, 0xcc], "vinserti32x4 ymm1{k5}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x3e, 0x0a, 0xcc], "vpcmpub k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x3e, 0xca, 0xcc], "vpcmpub k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x3f, 0x0a, 0xcc], "vpcmpb k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x3f, 0xca, 0xcc], "vpcmpb k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x42, 0x0a, 0xcc], "vdbpsadbw ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x42, 0xca, 0xcc], "vdbpsadbw ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x43, 0xca, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x50, 0xca, 0xcc], "vrangeps ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x51, 0x0a, 0xcc], "vrangess xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x51, 0x4a, 0x01, 0xcc], "vrangess xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x54, 0xca, 0xcc], "vfixupimmps ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x55, 0x0a, 0xcc], "vfixupimmss xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x56, 0xca, 0xcc], "vreduceps ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x57, 0x0a, 0xcc], "vreducess xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x57, 0x4a, 0x01, 0xcc], "vreducess xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x66, 0xca, 0xcc], "vfpclassps k1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x67, 0x0a, 0xcc], "vfpclassss k1{k5}, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x67, 0x4a, 0x01, 0xcc], "vfpclassss k1{k5}, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x67, 0xca, 0xcc], "vfpclassss k1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x71, 0xca, 0xcc], "vpshldd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x2d, 0x73, 0xca, 0xcc], "vpshrdd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x03, 0x0a, 0xcc], "valignd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x04, 0x0a, 0xcc], "vpermilps ymm1, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x1e, 0x0a, 0xcc], "vpcmpud k1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x1f, 0x0a, 0xcc], "vpcmpd k1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x25, 0x0a, 0xcc], "vpternlogd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x26, 0x0a, 0xcc], "vgetmantps ymm1, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x50, 0x0a, 0xcc], "vrangeps ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x56, 0x0a, 0xcc], "vreduceps ymm1, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x66, 0x0a, 0xcc], "vfpclassps k1, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x71, 0x0a, 0xcc], "vpshldd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x73, 0x0a, 0xcc], "vpshrdd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x38, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x3d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x03, 0x0a, 0xcc], "valignd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x03, 0xca, 0xcc], "valignd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x04, 0x0a, 0xcc], "vpermilps zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x04, 0xca, 0xcc], "vpermilps zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x08, 0xca, 0xcc], "vrndscaleps zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x18, 0x0a, 0xcc], "vinsertf32x4 zmm1, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x18, 0xca, 0xcc], "vinsertf32x4 zmm1, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1a, 0x0a, 0xcc], "vinsertf32x8 zmm1, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf32x8 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1a, 0xca, 0xcc], "vinsertf32x8 zmm1, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1b, 0x0a, 0xcc], "vextractf32x8 ymmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1b, 0x4a, 0x01, 0xcc], "vextractf32x8 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1b, 0xca, 0xcc], "vextractf32x8 ymm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1d, 0x0a, 0xcc], "vcvtps2ph ymmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph ymmword [bp + si * 1 + 0x20], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1e, 0x0a, 0xcc], "vpcmpud k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1e, 0xca, 0xcc], "vpcmpud k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1f, 0x0a, 0xcc], "vpcmpd k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x1f, 0xca, 0xcc], "vpcmpd k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x23, 0xca, 0xcc], "vshuff32x4 zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x25, 0x0a, 0xcc], "vpternlogd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x25, 0xca, 0xcc], "vpternlogd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x26, 0x0a, 0xcc], "vgetmantps zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x26, 0xca, 0xcc], "vgetmantps zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x38, 0x0a, 0xcc], "vinserti32x4 zmm1, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x38, 0xca, 0xcc], "vinserti32x4 zmm1, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3a, 0x0a, 0xcc], "vinserti32x8 zmm1, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3a, 0x4a, 0x01, 0xcc], "vinserti32x8 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3a, 0xca, 0xcc], "vinserti32x8 zmm1, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3b, 0x0a, 0xcc], "vextracti32x8 ymmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3b, 0x4a, 0x01, 0xcc], "vextracti32x8 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3b, 0xca, 0xcc], "vextracti32x8 ymm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3e, 0x0a, 0xcc], "vpcmpub k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3e, 0xca, 0xcc], "vpcmpub k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3f, 0x0a, 0xcc], "vpcmpb k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x3f, 0xca, 0xcc], "vpcmpb k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x42, 0x0a, 0xcc], "vdbpsadbw zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x42, 0xca, 0xcc], "vdbpsadbw zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x43, 0xca, 0xcc], "vshufi32x4 zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x50, 0x0a, 0xcc], "vrangeps zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x50, 0xca, 0xcc], "vrangeps zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x54, 0xca, 0xcc], "vfixupimmps zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x56, 0x0a, 0xcc], "vreduceps zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x56, 0xca, 0xcc], "vreduceps zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x66, 0x0a, 0xcc], "vfpclassps k1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x66, 0xca, 0xcc], "vfpclassps k1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x71, 0x0a, 0xcc], "vpshldd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x71, 0xca, 0xcc], "vpshldd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x73, 0x0a, 0xcc], "vpshrdd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x48, 0x73, 0xca, 0xcc], "vpshrdd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x03, 0xca, 0xcc], "valignd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x04, 0xca, 0xcc], "vpermilps zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x18, 0x0a, 0xcc], "vinsertf32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x18, 0xca, 0xcc], "vinsertf32x4 zmm1{k5}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1a, 0x0a, 0xcc], "vinsertf32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1a, 0xca, 0xcc], "vinsertf32x8 zmm1{k5}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1b, 0x0a, 0xcc], "vextractf32x8 ymmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1b, 0x4a, 0x01, 0xcc], "vextractf32x8 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1b, 0xca, 0xcc], "vextractf32x8 ymm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0x0a, 0xcc], "vcvtps2ph ymmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1e, 0xca, 0xcc], "vpcmpud k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x1f, 0xca, 0xcc], "vpcmpd k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x23, 0xca, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x25, 0xca, 0xcc], "vpternlogd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x38, 0x0a, 0xcc], "vinserti32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x38, 0xca, 0xcc], "vinserti32x4 zmm1{k5}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3a, 0x0a, 0xcc], "vinserti32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3a, 0x4a, 0x01, 0xcc], "vinserti32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3a, 0xca, 0xcc], "vinserti32x8 zmm1{k5}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3b, 0x0a, 0xcc], "vextracti32x8 ymmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3b, 0x4a, 0x01, 0xcc], "vextracti32x8 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3b, 0xca, 0xcc], "vextracti32x8 ymm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3e, 0x0a, 0xcc], "vpcmpub k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3e, 0xca, 0xcc], "vpcmpub k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3f, 0x0a, 0xcc], "vpcmpb k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x3f, 0xca, 0xcc], "vpcmpb k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x42, 0x0a, 0xcc], "vdbpsadbw zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x42, 0xca, 0xcc], "vdbpsadbw zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x43, 0xca, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x66, 0xca, 0xcc], "vfpclassps k1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x71, 0xca, 0xcc], "vpshldd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x4d, 0x73, 0xca, 0xcc], "vpshrdd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x03, 0x0a, 0xcc], "valignd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x04, 0x0a, 0xcc], "vpermilps zmm1, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x1e, 0x0a, 0xcc], "vpcmpud k1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x1f, 0x0a, 0xcc], "vpcmpd k1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x25, 0x0a, 0xcc], "vpternlogd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x26, 0x0a, 0xcc], "vgetmantps zmm1, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x50, 0x0a, 0xcc], "vrangeps zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x56, 0x0a, 0xcc], "vreduceps zmm1, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x66, 0x0a, 0xcc], "vfpclassps k1, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x71, 0x0a, 0xcc], "vpshldd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x73, 0x0a, 0xcc], "vpshrdd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x58, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x5d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{sae}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x26, 0xca, 0xcc], "vgetmantps zmm1{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x27, 0xca, 0xcc], "vgetmantss xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x50, 0xca, 0xcc], "vrangeps zmm1{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x51, 0xca, 0xcc], "vrangess xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x56, 0xca, 0xcc], "vreduceps zmm1{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x78, 0x57, 0xca, 0xcc], "vreducess xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}{sae}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x7d, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x03, 0xca, 0xcc], "valignd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x04, 0xca, 0xcc], "vpermilps xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x08, 0xca, 0xcc], "vrndscaleps xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}{z}, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x25, 0xca, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x26, 0xca, 0xcc], "vgetmantps xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x42, 0x0a, 0xcc], "vdbpsadbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x42, 0xca, 0xcc], "vdbpsadbw xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x50, 0xca, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x54, 0xca, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x56, 0xca, 0xcc], "vreduceps xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x71, 0xca, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x8d, 0x73, 0xca, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0x9d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x03, 0xca, 0xcc], "valignd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x04, 0xca, 0xcc], "vpermilps ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x08, 0xca, 0xcc], "vrndscaleps ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x0a, 0x0a, 0xcc], "vrndscaless xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x0a, 0x4a, 0x01, 0xcc], "vrndscaless xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x18, 0x0a, 0xcc], "vinsertf32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x18, 0xca, 0xcc], "vinsertf32x4 ymm1{k5}{z}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}{z}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}{z}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x23, 0xca, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x25, 0xca, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x26, 0xca, 0xcc], "vgetmantps ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x27, 0x0a, 0xcc], "vgetmantss xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x27, 0x4a, 0x01, 0xcc], "vgetmantss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x38, 0x0a, 0xcc], "vinserti32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x38, 0xca, 0xcc], "vinserti32x4 ymm1{k5}{z}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}{z}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x42, 0x0a, 0xcc], "vdbpsadbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x42, 0xca, 0xcc], "vdbpsadbw ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x43, 0xca, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x50, 0xca, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x51, 0x0a, 0xcc], "vrangess xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x51, 0x4a, 0x01, 0xcc], "vrangess xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x54, 0xca, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x55, 0x0a, 0xcc], "vfixupimmss xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x56, 0xca, 0xcc], "vreduceps ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x57, 0x0a, 0xcc], "vreducess xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x57, 0x4a, 0x01, 0xcc], "vreducess xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x71, 0xca, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xad, 0x73, 0xca, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xbd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x03, 0xca, 0xcc], "valignd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x04, 0xca, 0xcc], "vpermilps zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x18, 0x0a, 0xcc], "vinsertf32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x18, 0xca, 0xcc], "vinsertf32x4 zmm1{k5}{z}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x1a, 0x0a, 0xcc], "vinsertf32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x1a, 0xca, 0xcc], "vinsertf32x8 zmm1{k5}{z}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x1b, 0xca, 0xcc], "vextractf32x8 ymm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x23, 0xca, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x25, 0xca, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x38, 0x0a, 0xcc], "vinserti32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x38, 0xca, 0xcc], "vinserti32x4 zmm1{k5}{z}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x3a, 0x0a, 0xcc], "vinserti32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x3a, 0x4a, 0x01, 0xcc], "vinserti32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x3a, 0xca, 0xcc], "vinserti32x8 zmm1{k5}{z}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x3b, 0xca, 0xcc], "vextracti32x8 ymm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x42, 0x0a, 0xcc], "vdbpsadbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x42, 0xca, 0xcc], "vdbpsadbw zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x43, 0xca, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x71, 0xca, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xcd, 0x73, 0xca, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xdd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}{z}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}{z}{sae}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}{z}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}{z}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0x7d, 0xfd, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x03, 0x0a, 0xcc], "valignq xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x03, 0xca, 0xcc], "valignq xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x05, 0x0a, 0xcc], "vpermilpd xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x05, 0xca, 0xcc], "vpermilpd xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x09, 0xca, 0xcc], "vrndscalepd xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x0f, 0x0a, 0xcc], "vpalignr xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x0f, 0xca, 0xcc], "vpalignr xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x14, 0x0a, 0xcc], "vpextrb byte [bp + si * 1], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x14, 0x4a, 0x01, 0xcc], "vpextrb byte [bp + si * 1 + 0x1], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x14, 0xca, 0xcc], "vpextrb edx, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x15, 0x0a, 0xcc], "vpextrw word [bp + si * 1], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x15, 0x4a, 0x01, 0xcc], "vpextrw word [bp + si * 1 + 0x2], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x15, 0xca, 0xcc], "vpextrw edx, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x16, 0x0a, 0xcc], "vpextrd dword [bp + si * 1], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x16, 0x4a, 0x01, 0xcc], "vpextrd dword [bp + si * 1 + 0x4], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x16, 0xca, 0xcc], "vpextrd edx, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x17, 0x0a, 0xcc], "vextractps dword [bp + si * 1], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x17, 0x4a, 0x01, 0xcc], "vextractps dword [bp + si * 1 + 0x4], xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x17, 0xca, 0xcc], "vextractps edx, xmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x1e, 0xca, 0xcc], "vpcmpuq k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x1f, 0x0a, 0xcc], "vpcmpq k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x1f, 0xca, 0xcc], "vpcmpq k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x20, 0x0a, 0xcc], "vpinsrb xmm1, xmm0, byte [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x20, 0x4a, 0x01, 0xcc], "vpinsrb xmm1, xmm0, byte [bp + si * 1 + 0x1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x20, 0xca, 0xcc], "vpinsrb xmm1, xmm0, edx, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x22, 0x0a, 0xcc], "vpinsrd xmm1, xmm0, dword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x22, 0x4a, 0x01, 0xcc], "vpinsrd xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x22, 0xca, 0xcc], "vpinsrd xmm1, xmm0, edx, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x25, 0x0a, 0xcc], "vpternlogq xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x25, 0xca, 0xcc], "vpternlogq xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x26, 0xca, 0xcc], "vgetmantpd xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x3e, 0x0a, 0xcc], "vpcmpuw k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x3e, 0xca, 0xcc], "vpcmpuw k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x3f, 0x0a, 0xcc], "vpcmpw k1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x3f, 0xca, 0xcc], "vpcmpw k1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x44, 0x0a, 0xcc], "vpclmulqdq xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x44, 0x4a, 0x01, 0xcc], "vpclmulqdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x44, 0xca, 0xcc], "vpclmulqdq xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x50, 0x0a, 0xcc], "vrangepd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x50, 0xca, 0xcc], "vrangepd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x54, 0xca, 0xcc], "vfixupimmpd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x56, 0x0a, 0xcc], "vreducepd xmm1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x56, 0xca, 0xcc], "vreducepd xmm1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x66, 0x0a, 0xcc], "vfpclasspd k1, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x66, 0xca, 0xcc], "vfpclasspd k1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x70, 0x0a, 0xcc], "vpshldw xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshldw xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x70, 0xca, 0xcc], "vpshldw xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x71, 0x0a, 0xcc], "vpshldq xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x71, 0xca, 0xcc], "vpshldq xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x72, 0x0a, 0xcc], "vpshrdw xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x72, 0xca, 0xcc], "vpshrdw xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x73, 0x0a, 0xcc], "vpshrdq xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0x73, 0xca, 0xcc], "vpshrdq xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0xce, 0xca, 0xcc], "vgf2p8affineqb xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x08, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x03, 0xca, 0xcc], "valignq xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x05, 0xca, 0xcc], "vpermilpd xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x09, 0xca, 0xcc], "vrndscalepd xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x0f, 0x0a, 0xcc], "vpalignr xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x0f, 0xca, 0xcc], "vpalignr xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x1e, 0xca, 0xcc], "vpcmpuq k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x1f, 0xca, 0xcc], "vpcmpq k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x25, 0xca, 0xcc], "vpternlogq xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x26, 0xca, 0xcc], "vgetmantpd xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x3e, 0x0a, 0xcc], "vpcmpuw k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x3e, 0xca, 0xcc], "vpcmpuw k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x3f, 0x0a, 0xcc], "vpcmpw k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x3f, 0xca, 0xcc], "vpcmpw k1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x50, 0xca, 0xcc], "vrangepd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x54, 0xca, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x56, 0xca, 0xcc], "vreducepd xmm1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x66, 0xca, 0xcc], "vfpclasspd k1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x70, 0x0a, 0xcc], "vpshldw xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x70, 0xca, 0xcc], "vpshldw xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x71, 0xca, 0xcc], "vpshldq xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x72, 0x0a, 0xcc], "vpshrdw xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x72, 0xca, 0xcc], "vpshrdw xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0x73, 0xca, 0xcc], "vpshrdq xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0xce, 0xca, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x0d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x03, 0x0a, 0xcc], "valignq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x05, 0x0a, 0xcc], "vpermilpd xmm1, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x1f, 0x0a, 0xcc], "vpcmpq k1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x25, 0x0a, 0xcc], "vpternlogq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x50, 0x0a, 0xcc], "vrangepd xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x56, 0x0a, 0xcc], "vreducepd xmm1, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x66, 0x0a, 0xcc], "vfpclasspd k1, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x71, 0x0a, 0xcc], "vpshldq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x73, 0x0a, 0xcc], "vpshrdq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x18, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x1d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x00, 0x0a, 0xcc], "vpermq ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x00, 0xca, 0xcc], "vpermq ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x01, 0x0a, 0xcc], "vpermpd ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x01, 0xca, 0xcc], "vpermpd ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x03, 0x0a, 0xcc], "valignq ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x03, 0xca, 0xcc], "valignq ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x05, 0x0a, 0xcc], "vpermilpd ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x05, 0xca, 0xcc], "vpermilpd ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x09, 0xca, 0xcc], "vrndscalepd ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x0b, 0x0a, 0xcc], "vrndscalesd xmm1, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x0b, 0x4a, 0x01, 0xcc], "vrndscalesd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x0f, 0x0a, 0xcc], "vpalignr ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x0f, 0xca, 0xcc], "vpalignr ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x18, 0x0a, 0xcc], "vinsertf64x2 ymm1, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x18, 0xca, 0xcc], "vinsertf64x2 ymm1, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x1e, 0xca, 0xcc], "vpcmpuq k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x1f, 0x0a, 0xcc], "vpcmpq k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x1f, 0xca, 0xcc], "vpcmpq k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x23, 0xca, 0xcc], "vshuff64x2 ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x25, 0x0a, 0xcc], "vpternlogq ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x25, 0xca, 0xcc], "vpternlogq ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x26, 0xca, 0xcc], "vgetmantpd ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x27, 0x0a, 0xcc], "vgetmantsd xmm1, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x27, 0x4a, 0x01, 0xcc], "vgetmantsd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x27, 0xca, 0xcc], "vgetmantsd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x38, 0x0a, 0xcc], "vinserti64x2 ymm1, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x38, 0xca, 0xcc], "vinserti64x2 ymm1, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x3e, 0x0a, 0xcc], "vpcmpuw k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x3e, 0xca, 0xcc], "vpcmpuw k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x3f, 0x0a, 0xcc], "vpcmpw k1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x3f, 0xca, 0xcc], "vpcmpw k1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x43, 0xca, 0xcc], "vshufi64x2 ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x44, 0x0a, 0xcc], "vpclmulqdq ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x44, 0x4a, 0x01, 0xcc], "vpclmulqdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x44, 0xca, 0xcc], "vpclmulqdq ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x50, 0x0a, 0xcc], "vrangepd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x50, 0xca, 0xcc], "vrangepd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x51, 0x0a, 0xcc], "vrangesd xmm1, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x51, 0x4a, 0x01, 0xcc], "vrangesd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x51, 0xca, 0xcc], "vrangesd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x54, 0xca, 0xcc], "vfixupimmpd ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x55, 0x0a, 0xcc], "vfixupimmsd xmm1, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmsd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x56, 0x0a, 0xcc], "vreducepd ymm1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x56, 0xca, 0xcc], "vreducepd ymm1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x57, 0x0a, 0xcc], "vreducesd xmm1, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x57, 0x4a, 0x01, 0xcc], "vreducesd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x57, 0xca, 0xcc], "vreducesd xmm1, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x66, 0x0a, 0xcc], "vfpclasspd k1, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x66, 0xca, 0xcc], "vfpclasspd k1, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x67, 0x0a, 0xcc], "vfpclasssd k1, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x67, 0x4a, 0x01, 0xcc], "vfpclasssd k1, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x67, 0xca, 0xcc], "vfpclasssd k1, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x70, 0x0a, 0xcc], "vpshldw ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshldw ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x70, 0xca, 0xcc], "vpshldw ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x71, 0x0a, 0xcc], "vpshldq ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x71, 0xca, 0xcc], "vpshldq ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x72, 0x0a, 0xcc], "vpshrdw ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x72, 0xca, 0xcc], "vpshrdw ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x73, 0x0a, 0xcc], "vpshrdq ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0x73, 0xca, 0xcc], "vpshrdq ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0xce, 0xca, 0xcc], "vgf2p8affineqb ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x28, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x00, 0xca, 0xcc], "vpermq ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x01, 0xca, 0xcc], "vpermpd ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x03, 0xca, 0xcc], "valignq ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x05, 0xca, 0xcc], "vpermilpd ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x09, 0xca, 0xcc], "vrndscalepd ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x0b, 0x0a, 0xcc], "vrndscalesd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x0b, 0x4a, 0x01, 0xcc], "vrndscalesd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x0f, 0x0a, 0xcc], "vpalignr ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x0f, 0xca, 0xcc], "vpalignr ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x18, 0x0a, 0xcc], "vinsertf64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x18, 0xca, 0xcc], "vinsertf64x2 ymm1{k5}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x1e, 0xca, 0xcc], "vpcmpuq k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x1f, 0xca, 0xcc], "vpcmpq k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x23, 0xca, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x25, 0xca, 0xcc], "vpternlogq ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x26, 0xca, 0xcc], "vgetmantpd ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x27, 0x0a, 0xcc], "vgetmantsd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x27, 0x4a, 0x01, 0xcc], "vgetmantsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x38, 0x0a, 0xcc], "vinserti64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x38, 0xca, 0xcc], "vinserti64x2 ymm1{k5}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x3e, 0x0a, 0xcc], "vpcmpuw k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x3e, 0xca, 0xcc], "vpcmpuw k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x3f, 0x0a, 0xcc], "vpcmpw k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x3f, 0xca, 0xcc], "vpcmpw k1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x43, 0xca, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x50, 0xca, 0xcc], "vrangepd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x51, 0x0a, 0xcc], "vrangesd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x51, 0x4a, 0x01, 0xcc], "vrangesd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x54, 0xca, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x55, 0x0a, 0xcc], "vfixupimmsd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x56, 0xca, 0xcc], "vreducepd ymm1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x57, 0x0a, 0xcc], "vreducesd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x57, 0x4a, 0x01, 0xcc], "vreducesd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x66, 0xca, 0xcc], "vfpclasspd k1{k5}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x67, 0x0a, 0xcc], "vfpclasssd k1{k5}, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x67, 0x4a, 0x01, 0xcc], "vfpclasssd k1{k5}, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x67, 0xca, 0xcc], "vfpclasssd k1{k5}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x70, 0x0a, 0xcc], "vpshldw ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x70, 0xca, 0xcc], "vpshldw ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x71, 0xca, 0xcc], "vpshldq ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x72, 0x0a, 0xcc], "vpshrdw ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x72, 0xca, 0xcc], "vpshrdw ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0x73, 0xca, 0xcc], "vpshrdq ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0xce, 0xca, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x2d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x00, 0x0a, 0xcc], "vpermq ymm1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x01, 0x0a, 0xcc], "vpermpd ymm1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x03, 0x0a, 0xcc], "valignq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x05, 0x0a, 0xcc], "vpermilpd ymm1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x1f, 0x0a, 0xcc], "vpcmpq k1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x25, 0x0a, 0xcc], "vpternlogq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x50, 0x0a, 0xcc], "vrangepd ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x56, 0x0a, 0xcc], "vreducepd ymm1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x66, 0x0a, 0xcc], "vfpclasspd k1, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x71, 0x0a, 0xcc], "vpshldq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x73, 0x0a, 0xcc], "vpshrdq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x38, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x3d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x00, 0x0a, 0xcc], "vpermq zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x00, 0xca, 0xcc], "vpermq zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x01, 0x0a, 0xcc], "vpermpd zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x01, 0xca, 0xcc], "vpermpd zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x03, 0x0a, 0xcc], "valignq zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x03, 0xca, 0xcc], "valignq zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x05, 0x0a, 0xcc], "vpermilpd zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x05, 0xca, 0xcc], "vpermilpd zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x09, 0xca, 0xcc], "vrndscalepd zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x0f, 0x0a, 0xcc], "vpalignr zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x0f, 0xca, 0xcc], "vpalignr zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x18, 0x0a, 0xcc], "vinsertf64x2 zmm1, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x18, 0xca, 0xcc], "vinsertf64x2 zmm1, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1a, 0x0a, 0xcc], "vinsertf64x4 zmm1, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf64x4 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1a, 0xca, 0xcc], "vinsertf64x4 zmm1, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1b, 0x0a, 0xcc], "vextractf64x4 ymmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1b, 0x4a, 0x01, 0xcc], "vextractf64x4 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1b, 0xca, 0xcc], "vextractf64x4 ymm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1e, 0xca, 0xcc], "vpcmpuq k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1f, 0x0a, 0xcc], "vpcmpq k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x1f, 0xca, 0xcc], "vpcmpq k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x23, 0xca, 0xcc], "vshuff64x2 zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x25, 0x0a, 0xcc], "vpternlogq zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x25, 0xca, 0xcc], "vpternlogq zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x26, 0xca, 0xcc], "vgetmantpd zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x38, 0x0a, 0xcc], "vinserti64x2 zmm1, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x38, 0xca, 0xcc], "vinserti64x2 zmm1, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3a, 0x0a, 0xcc], "vinserti64x4 zmm1, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3a, 0x4a, 0x01, 0xcc], "vinserti64x4 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3a, 0xca, 0xcc], "vinserti64x4 zmm1, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3b, 0x0a, 0xcc], "vextracti64x4 ymmword [bp + si * 1], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3b, 0x4a, 0x01, 0xcc], "vextracti64x4 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3b, 0xca, 0xcc], "vextracti64x4 ymm2, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3e, 0x0a, 0xcc], "vpcmpuw k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3e, 0xca, 0xcc], "vpcmpuw k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3f, 0x0a, 0xcc], "vpcmpw k1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x3f, 0xca, 0xcc], "vpcmpw k1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x43, 0xca, 0xcc], "vshufi64x2 zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x44, 0x0a, 0xcc], "vpclmulqdq zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x44, 0x4a, 0x01, 0xcc], "vpclmulqdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x44, 0xca, 0xcc], "vpclmulqdq zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x50, 0x0a, 0xcc], "vrangepd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x50, 0xca, 0xcc], "vrangepd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x56, 0x0a, 0xcc], "vreducepd zmm1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x56, 0xca, 0xcc], "vreducepd zmm1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x66, 0x0a, 0xcc], "vfpclasspd k1, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x66, 0xca, 0xcc], "vfpclasspd k1, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x70, 0x0a, 0xcc], "vpshldw zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshldw zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x70, 0xca, 0xcc], "vpshldw zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x71, 0x0a, 0xcc], "vpshldq zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x71, 0xca, 0xcc], "vpshldq zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x72, 0x0a, 0xcc], "vpshrdw zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x72, 0xca, 0xcc], "vpshrdw zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x73, 0x0a, 0xcc], "vpshrdq zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0x73, 0xca, 0xcc], "vpshrdq zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0xce, 0xca, 0xcc], "vgf2p8affineqb zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x48, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x00, 0xca, 0xcc], "vpermq zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x01, 0xca, 0xcc], "vpermpd zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x03, 0xca, 0xcc], "valignq zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x05, 0xca, 0xcc], "vpermilpd zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x0f, 0x0a, 0xcc], "vpalignr zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x0f, 0xca, 0xcc], "vpalignr zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x18, 0x0a, 0xcc], "vinsertf64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x18, 0xca, 0xcc], "vinsertf64x2 zmm1{k5}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1a, 0x0a, 0xcc], "vinsertf64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1a, 0xca, 0xcc], "vinsertf64x4 zmm1{k5}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1b, 0x0a, 0xcc], "vextractf64x4 ymmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1b, 0x4a, 0x01, 0xcc], "vextractf64x4 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1b, 0xca, 0xcc], "vextractf64x4 ymm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1e, 0xca, 0xcc], "vpcmpuq k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x1f, 0xca, 0xcc], "vpcmpq k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x23, 0xca, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x25, 0xca, 0xcc], "vpternlogq zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x38, 0x0a, 0xcc], "vinserti64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x38, 0xca, 0xcc], "vinserti64x2 zmm1{k5}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3a, 0x0a, 0xcc], "vinserti64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3a, 0x4a, 0x01, 0xcc], "vinserti64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3a, 0xca, 0xcc], "vinserti64x4 zmm1{k5}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3b, 0x0a, 0xcc], "vextracti64x4 ymmword [bp + si * 1]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3b, 0x4a, 0x01, 0xcc], "vextracti64x4 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3b, 0xca, 0xcc], "vextracti64x4 ymm2{k5}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3e, 0x0a, 0xcc], "vpcmpuw k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3e, 0xca, 0xcc], "vpcmpuw k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3f, 0x0a, 0xcc], "vpcmpw k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x3f, 0xca, 0xcc], "vpcmpw k1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x43, 0xca, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x66, 0xca, 0xcc], "vfpclasspd k1{k5}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x70, 0x0a, 0xcc], "vpshldw zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x70, 0xca, 0xcc], "vpshldw zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x71, 0xca, 0xcc], "vpshldq zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x72, 0x0a, 0xcc], "vpshrdw zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x72, 0xca, 0xcc], "vpshrdw zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0x73, 0xca, 0xcc], "vpshrdq zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0xce, 0xca, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x4d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x00, 0x0a, 0xcc], "vpermq zmm1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x01, 0x0a, 0xcc], "vpermpd zmm1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x03, 0x0a, 0xcc], "valignq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x05, 0x0a, 0xcc], "vpermilpd zmm1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x1f, 0x0a, 0xcc], "vpcmpq k1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x25, 0x0a, 0xcc], "vpternlogq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x50, 0x0a, 0xcc], "vrangepd zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x56, 0x0a, 0xcc], "vreducepd zmm1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x66, 0x0a, 0xcc], "vfpclasspd k1, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x71, 0x0a, 0xcc], "vpshldq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x73, 0x0a, 0xcc], "vpshrdq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x58, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x5d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x50, 0xca, 0xcc], "vrangepd zmm1{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x51, 0xca, 0xcc], "vrangesd xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x56, 0xca, 0xcc], "vreducepd zmm1{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x78, 0x57, 0xca, 0xcc], "vreducesd xmm1{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x7d, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x03, 0xca, 0xcc], "valignq xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x05, 0xca, 0xcc], "vpermilpd xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x09, 0xca, 0xcc], "vrndscalepd xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x0f, 0x0a, 0xcc], "vpalignr xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x0f, 0xca, 0xcc], "vpalignr xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x25, 0xca, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x26, 0xca, 0xcc], "vgetmantpd xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x50, 0xca, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x54, 0xca, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x56, 0xca, 0xcc], "vreducepd xmm1{k5}{z}, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x70, 0x0a, 0xcc], "vpshldw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x70, 0xca, 0xcc], "vpshldw xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x71, 0xca, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x72, 0x0a, 0xcc], "vpshrdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x72, 0xca, 0xcc], "vpshrdw xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0x73, 0xca, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0xce, 0xca, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x8d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0x9d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x00, 0xca, 0xcc], "vpermq ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x01, 0xca, 0xcc], "vpermpd ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x03, 0xca, 0xcc], "valignq ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x05, 0xca, 0xcc], "vpermilpd ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x09, 0xca, 0xcc], "vrndscalepd ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x0b, 0x0a, 0xcc], "vrndscalesd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x0b, 0x4a, 0x01, 0xcc], "vrndscalesd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x0f, 0x0a, 0xcc], "vpalignr ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x0f, 0xca, 0xcc], "vpalignr ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x18, 0x0a, 0xcc], "vinsertf64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x18, 0xca, 0xcc], "vinsertf64x2 ymm1{k5}{z}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}{z}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x23, 0xca, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x25, 0xca, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x26, 0xca, 0xcc], "vgetmantpd ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x27, 0x0a, 0xcc], "vgetmantsd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x27, 0x4a, 0x01, 0xcc], "vgetmantsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x38, 0x0a, 0xcc], "vinserti64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x38, 0xca, 0xcc], "vinserti64x2 ymm1{k5}{z}, ymm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}{z}, ymm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x43, 0xca, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x50, 0xca, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x51, 0x0a, 0xcc], "vrangesd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x51, 0x4a, 0x01, 0xcc], "vrangesd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x54, 0xca, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x55, 0x0a, 0xcc], "vfixupimmsd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x56, 0xca, 0xcc], "vreducepd ymm1{k5}{z}, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x57, 0x0a, 0xcc], "vreducesd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x57, 0x4a, 0x01, 0xcc], "vreducesd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}{z}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x70, 0x0a, 0xcc], "vpshldw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshldw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x70, 0xca, 0xcc], "vpshldw ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x71, 0xca, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x72, 0x0a, 0xcc], "vpshrdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x72, 0xca, 0xcc], "vpshrdw ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0x73, 0xca, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0xce, 0xca, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xad, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xbd, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x00, 0xca, 0xcc], "vpermq zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x01, 0xca, 0xcc], "vpermpd zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x03, 0xca, 0xcc], "valignq zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x05, 0xca, 0xcc], "vpermilpd zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x0f, 0x0a, 0xcc], "vpalignr zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x0f, 0xca, 0xcc], "vpalignr zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x18, 0x0a, 0xcc], "vinsertf64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x18, 0xca, 0xcc], "vinsertf64x2 zmm1{k5}{z}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x1a, 0x0a, 0xcc], "vinsertf64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x1a, 0xca, 0xcc], "vinsertf64x4 zmm1{k5}{z}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x1b, 0xca, 0xcc], "vextractf64x4 ymm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x23, 0xca, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x25, 0xca, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x38, 0x0a, 0xcc], "vinserti64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x38, 0xca, 0xcc], "vinserti64x2 zmm1{k5}{z}, zmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x3a, 0x0a, 0xcc], "vinserti64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x3a, 0x4a, 0x01, 0xcc], "vinserti64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x3a, 0xca, 0xcc], "vinserti64x4 zmm1{k5}{z}, zmm0, ymm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x3b, 0xca, 0xcc], "vextracti64x4 ymm2{k5}{z}, zmm1, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x43, 0xca, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}{z}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x70, 0x0a, 0xcc], "vpshldw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshldw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x70, 0xca, 0xcc], "vpshldw zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x71, 0xca, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x72, 0x0a, 0xcc], "vpshrdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x72, 0xca, 0xcc], "vpshrdw zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0x73, 0xca, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0xce, 0xca, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xcd, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xdd, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}{z}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}{z}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}{z}{sae}, zmm2, 0xcc");
-    test_display(&[0x62, 0xf3, 0xfd, 0xfd, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc");
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x8d, 0x11, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x18, 0x12, 0xca]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x18, 0x16, 0xca]); //
-    test_invalid(&[0x62, 0xf1, 0x7c, 0xbd, 0x28, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x9d, 0x29, 0xca]); // no sae/er support on movaps
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x38, 0x2b, 0x0a]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7c, 0xa8, 0x2b, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xfc, 0x28, 0x2b, 0x0a]); // no W=1
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x18, 0x2e, 0x0a]); // no broadcast from memory
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x68, 0x2e, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x88, 0x2e, 0x0a]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0xfc, 0xfd, 0x51, 0xca]); // requires W=0
-    test_invalid(&[0x62, 0xf1, 0xfc, 0x78, 0x5a, 0xca]); // W=0
-    test_invalid(&[0x62, 0xf1, 0x7c, 0xb8, 0xc2, 0x0a, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7c, 0x3d, 0xc6, 0xca, 0xcc]); // no broadcast from register source
-    test_invalid(&[0x62, 0xf1, 0xfd, 0xdd, 0x10, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0xfd, 0xbd, 0x14, 0xca]); // no broadcast in reg-reg
-    test_invalid(&[0x62, 0xf1, 0xfd, 0xbd, 0x15, 0xca]); // no broadcast in reg-reg
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x38, 0x28, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x18, 0x2b, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x88, 0x2b, 0x0a]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x08, 0x2b, 0x0a]); // no W=-
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x79, 0x2e, 0xca]); // mask reg must be 000
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x18, 0x2e, 0x0a]); // no broadcast from memory
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x68, 0x2e, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x88, 0x2e, 0x0a]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x28, 0x5b, 0xca]); // no W=1
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x3d, 0x66, 0xca]); // no broadcast on reg operand (no sae)
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x88, 0x6e, 0xca]); //no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x88, 0x6e, 0xca]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x88, 0x7e, 0xca]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0xfd, 0xbd, 0xc2, 0x0a, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x78, 0xe6, 0xca]); // requires W=1
-    test_invalid(&[0x62, 0xf1, 0x7d, 0x28, 0xe7, 0xca]); // no reg-reg encoding
-    test_invalid(&[0x62, 0xf1, 0xfd, 0x38, 0xf6, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xfd, 0xa8, 0xf6, 0x0a]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x6d, 0x10, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x6f, 0x10, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x38, 0x10, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x3d, 0x11, 0xca]);
-    test_invalid(&[0x62, 0xf1, 0x7e, 0xad, 0x11, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x29, 0x2a, 0xca]); // mask reg must be 000
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x38, 0x2a, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x68, 0x2a, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x29, 0x2c, 0xca]); // mask register must be 000
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x38, 0x2c, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x38, 0x2c, 0x0a]); // no broadcast, regardless of W
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x68, 0x2c, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x29, 0x2d, 0xca]); // mask register must be 000
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x38, 0x2d, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x68, 0x2d, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x78, 0x5a, 0x0a]); // no broadcast with memory source
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x68, 0x7b, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0xfe, 0x88, 0x7e, 0xca]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf1, 0x7e, 0x6d, 0xc2, 0xca, 0xcc]); // do not allow L'L=11
-    test_invalid(&[0x62, 0xf1, 0xff, 0x6d, 0x10, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0xff, 0x6f, 0x10, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0xff, 0x3d, 0x11, 0xca]);
-    test_invalid(&[0x62, 0xf1, 0xff, 0xad, 0x11, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0xff, 0xbd, 0x12, 0x0a]);
-    test_invalid(&[0x62, 0xf1, 0xff, 0x38, 0x51, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf1, 0xff, 0x68, 0x51, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0xff, 0xbd, 0x5a, 0x0a]); // no L'L=11 unless for sae
-    test_invalid(&[0x62, 0xf1, 0xff, 0x6f, 0x5a, 0x0a]); // no L'L=11 unless for sae
-    test_invalid(&[0x62, 0xf1, 0x7f, 0x78, 0x5f, 0xca]); // requires W=1
-    test_invalid(&[0x62, 0xf1, 0xff, 0x68, 0x7b, 0x0a]); // no L'L=11
-    test_invalid(&[0x62, 0xf1, 0xff, 0x6d, 0xc2, 0x0a, 0xcc]); // no L'L=11
-    test_invalid(&[0x62, 0xf2, 0xfd, 0x78, 0x13, 0x0a]); // W=0
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xbd, 0x14, 0xca]); // no broadcast
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xad, 0x25, 0xca]); // W must be 1
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xcd, 0x25, 0xca]);
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xad, 0x26, 0x0a]); // no zero-merge
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xad, 0x26, 0x0a]); // no zero-merge
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xdd, 0x27, 0x0a]); // no zero-merge
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x3d, 0x27, 0xca]); // no invalid broadcast mode
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xdd, 0x27, 0x0a]); // no zero-merge
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xbd, 0x28, 0xca]); // no broadcast on register source
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xad, 0x29, 0xca]); // no zero-merge
-    test_invalid(&[0x62, 0xf2, 0xfd, 0x3d, 0x29, 0xca]); // no zero-merge
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x28, 0x2a, 0xca]); // no register source
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xa8, 0x2a, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xfd, 0x2d, 0x0a]); // sae is indicated by evex.b, with memory source evex.b implies broadcast as well. vscalefss does not broadcast, so reject.
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xbd, 0x43, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x3d, 0x4d, 0xca]); // no sae
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x6d, 0x4d, 0xca]); // no L'L=11
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x3d, 0x4e, 0xca]); // no sae
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x68, 0x4f, 0xca]); // no L'L=11
-    test_invalid(&[0x62, 0xf2, 0x7d, 0xad, 0x63, 0x0a]); // no zero-merge on memory operands
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x38, 0x78, 0xca]); // deny evex.b
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x38, 0x7a, 0xca]); // still no evex.b
-    test_invalid(&[0x62, 0xf2, 0x7d, 0x38, 0x7c, 0xca]); // no broadcast here either
-    test_display(&[0x62, 0xf2, 0x7d, 0x68, 0x99, 0xca], "vfmadd132ss xmm1, xmm0, xmm2"); // no L'L==0 when not sae
-    test_invalid(&[0x62, 0xf2, 0xfd, 0x38, 0xdc, 0x0a]); // no broadcast
-    test_invalid(&[0x62, 0xf2, 0xfd, 0xa8, 0xdc, 0x0a]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf2, 0x7e, 0xad, 0x10, 0x0a]); // cannot set evex.z on stores.
-    test_invalid(&[0x62, 0xf2, 0x7e, 0xcd, 0x12, 0x0a]);
-    test_invalid(&[0x62, 0xf2, 0x7e, 0x88, 0x28, 0xca]); //
-    test_invalid(&[0x62, 0xf2, 0x7e, 0xa8, 0x39, 0xca]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf2, 0x7e, 0x88, 0x3a, 0xca]); // no zero "mask merge", no masking at all
-    test_invalid(&[0x62, 0xf2, 0x7e, 0xbd, 0x72, 0xca]); // no register-register broadcast
-    test_display(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0xca], "vp2intersectd k1, xmm0, xmm2"); // VP2INTERSECTD_MASKmskw_XMMu32_XMMu32_AVX512, extension: AVX512EVEX
-    test_invalid(&[0x62, 0xf2, 0x7f, 0x09, 0x68, 0xca]); // requires mask reg to be 000
-    test_invalid(&[0x62, 0xf2, 0xff, 0x09, 0x68, 0xca]); // requires mask reg to be 000
-    test_invalid(&[0x62, 0xf3, 0xfd, 0xbd, 0x00, 0xca, 0xcc]); // no broadcast on reg-reg ops
-    test_invalid(&[0x62, 0xf3, 0x7d, 0xbd, 0x04, 0xca, 0xcc]); // no broadcast on reg sources
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x5d, 0x0a, 0x0a, 0xcc]); // no broadcast with memory source
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x6d, 0x0a, 0x0a, 0xcc]); // no broadcast with memory source
-    test_invalid(&[0x62, 0xf3, 0xfd, 0xa8, 0x0b, 0xca, 0xcc]); // no zero-merge without mask reg
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x38, 0x0b, 0x0a, 0xcc]); // no broadcast on memory source
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x68, 0x0b, 0x0a, 0xcc]); // L'L==11 requires sae
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x3d, 0x0f, 0xca, 0xcc]); // no broadcast
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x38, 0x0f, 0x0a, 0xcc]); // still no broadcast
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x88, 0x14, 0xca, 0xcc]); // no zero mask-merge, no masking!
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x18, 0x14, 0xca, 0xcc]); // no broadcast
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x18, 0x15, 0xca, 0xcc]); // no broadcast
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x88, 0x15, 0xca, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x18, 0x16, 0xca, 0xcc]); // no broadcast
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x88, 0x16, 0xca, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x18, 0x17, 0xca, 0xcc]); // no broadcast
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x88, 0x17, 0xca, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x3d, 0x19, 0x0a, 0xcc]); // no zero-merge with memmory dest
-    test_invalid(&[0x62, 0xf3, 0x7d, 0xcd, 0x1b, 0x0a, 0xcc]); // no zero-merge into memory
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x3d, 0x1d, 0x0a, 0xcc]); // no zero-merge into memory
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x6d, 0x1d, 0x0a, 0xcc]); // no L'L==11 for non-sae
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x18, 0x20, 0xca, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x88, 0x20, 0xca, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x18, 0x21, 0xca, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x88, 0x21, 0xca, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x18, 0x22, 0xca, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x88, 0x22, 0xca, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0x7d, 0xad, 0x3e, 0xca, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x62, 0xf3, 0x7d, 0x38, 0x42, 0x0a, 0xcc]); // no broadcast
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x29, 0x44, 0xca, 0xcc]); // mask reg must be 000
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x18, 0x44, 0x0a, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0xfd, 0x88, 0x44, 0x0a, 0xcc]); //
-    test_invalid(&[0x62, 0xf3, 0xfd, 0xbd, 0x66, 0x0a, 0xcc]); // no zero mask-merge
-    test_invalid(&[0x63, 0xc1]); // no arpl in real mode
-    test_display(&[0x65, 0x66, 0x0f, 0x01, 0xdc], "stgi");
-    test_display(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword fs:[bx]");
-    test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
-    test_display(&[0x65, 0x89, 0x04], "mov word gs:[si], ax");
-    test_display(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg word gs:[bx], cx");
-    test_display(&[0x66, 0x0f, 0x01, 0xd8], "vmrun ax");
-    test_display(&[0x66, 0x0f, 0x02, 0x01], "lar eax, word [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x02, 0xc1], "lar eax, ecx");
-    test_display(&[0x66, 0x0f, 0x03, 0x01], "lsl eax, word [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x03, 0xc1], "lsl eax, ecx");
-    test_display(&[0x66, 0x0f, 0x05], "syscall");
-    test_display(&[0x66, 0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6");
-    test_display(&[0x66, 0x0f, 0x10, 0xc0], "movupd xmm0, xmm0");
-    test_display(&[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, qword [bp + di * 1]");
-    test_display(&[0x66, 0x0f, 0x13, 0x03], "movlpd qword [bp + di * 1], xmm0");
-    test_display(&[0x66, 0x0f, 0x14, 0x03], "unpcklpd xmm0, xmmword [bp + di * 1]");
-    test_display(&[0x66, 0x0f, 0x14, 0xc3], "unpcklpd xmm0, xmm3");
-    test_display(&[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, xmmword [bp + di * 1]");
-    test_display(&[0x66, 0x0f, 0x15, 0xc3], "unpckhpd xmm0, xmm3");
-    test_display(&[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, qword [bp + di * 1]");
-    test_display(&[0x66, 0x0f, 0x17, 0x03], "movhpd qword [bp + di * 1], xmm0");
-    test_display(&[0x66, 0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si * 1]");
-    test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si * 1]");
-    test_display(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0");
-    test_display(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0");
-    test_display(&[0x66, 0x0f, 0x29, 0x00], "movapd xmmword [bx + si * 1], xmm0");
-    test_display(&[0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [bx + si * 1]");
-    test_display(&[0x66, 0x0f, 0x2a, 0x0f], "cvtpi2pd xmm1, qword [bx]");
-    test_display(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7");
-    test_display(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7");
-    test_display(&[0x66, 0x0f, 0x2b, 0x0f], "movntpd xmmword [bx], xmm1");
-    test_display(&[0x66, 0x0f, 0x2c, 0x0f], "cvttpd2pi mm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x2c, 0xcf], "cvttpd2pi mm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x2d, 0x0f], "cvtpd2pi mm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x2d, 0xcf], "cvtpd2pi mm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x2e, 0x0f], "ucomisd xmm1, qword [bx]");
-    test_display(&[0x66, 0x0f, 0x2e, 0xcf], "ucomisd xmm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x2f, 0x0f], "comisd xmm1, qword [bx]");
-    test_display(&[0x66, 0x0f, 0x2f, 0xcf], "comisd xmm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x38, 0x00, 0xda], "pshufb xmm3, xmm2");
-    test_display(&[0x66, 0x0f, 0x38, 0x37, 0x03], "pcmpgtq xmm0, xmmword [bp + di * 1]");
-    test_display(&[0x66, 0x0f, 0x38, 0x37, 0xc3], "pcmpgtq xmm0, xmm3");
-    test_display(&[0x66, 0x0f, 0x38, 0x80, 0x01], "invept eax, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0x81, 0x01], "invvpid eax, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0xcf, 0x1c], "gf2p8mulb xmm3, xmmword [si]");
-    test_display(&[0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss dword [bx - 0x17], eax");
-    test_display(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, dword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x38, 0xf6, 0xc1], "adcx eax, ecx");
-    test_display(&[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, xmmword [bx + di * 1], 0x22");
-    test_display(&[0x66, 0x0f, 0x3a, 0x0c, 0xc1, 0x22], "blendps xmm0, xmm1, 0x22");
-    test_display(&[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, xmmword [bx + di * 1], 0x22");
-    test_display(&[0x66, 0x0f, 0x3a, 0x0d, 0xc1, 0x22], "blendpd xmm0, xmm1, 0x22");
-    test_display(&[0x66, 0x0f, 0x3a, 0x14, 0x01, 0x31], "pextrb byte [bx + di * 1], xmm0, 0x31");
-    test_display(&[0x66, 0x0f, 0x3a, 0x15, 0x01, 0x31], "pextrw word [bx + di * 1], xmm0, 0x31");
-    test_display(&[0x66, 0x0f, 0x3a, 0x16, 0x01, 0x31], "pextrd dword [bx + di * 1], xmm0, 0x31");
-    test_display(&[0x66, 0x0f, 0x3a, 0x17, 0x01, 0x31], "extractps dword [bx + di * 1], xmm0, 0x31");
-    test_display(&[0x66, 0x0f, 0x3a, 0x60, 0xc6, 0x54], "pcmpestrm xmm0, xmm6, 0x54");
-    test_display(&[0x66, 0x0f, 0x3a, 0x61, 0xc6, 0x54], "pcmpestri xmm0, xmm6, 0x54");
-    test_display(&[0x66, 0x0f, 0x3a, 0x62, 0xc6, 0x54], "pcmpistrm xmm0, xmm6, 0x54");
-    test_display(&[0x66, 0x0f, 0x3a, 0x63, 0xc6, 0x54], "pcmpistri xmm0, xmm6, 0x54");
-    test_display(&[0x66, 0x0f, 0x3a, 0xdf, 0x0f, 0xaa], "aeskeygenassist xmm1, xmmword [bx], 0xaa");
-    test_display(&[0x66, 0x0f, 0x50, 0xc1], "movmskpd eax, xmm1");
-    test_display(&[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x57, 0x01], "xorpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x58, 0x01], "addpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x59, 0x01], "mulpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x5a, 0x01], "cvtpd2ps xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x5b, 0x01], "cvtps2dq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x5c, 0x01], "subpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x5d, 0x01], "minpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x5e, 0x01], "divpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x5f, 0x01], "maxpd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0x6e, 0xc0], "movd xmm0, eax");
-    test_display(&[0x66, 0x0f, 0x70, 0xc0, 0x4e], "pshufd xmm0, xmm0, 0x4e");
-    test_display(&[0x66, 0x0f, 0x71, 0xd0, 0x8f], "psrlw xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x71, 0xe0, 0x8f], "psraw xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x71, 0xf0, 0x8f], "psllw xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x72, 0xd0, 0x8f], "psrld xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x72, 0xe0, 0x8f], "psrad xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x72, 0xf0, 0x8f], "pslld xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x73, 0xd0, 0x8f], "psrlq xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x73, 0xd8, 0x8f], "psrldq xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm0, 0x8f");
-    test_display(&[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x66, 0x0f, 0x74, 0xc1], "pcmpeqb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0x78, 0xc1, 0x4e, 0x76], "extrq xmm1, 0x4e, 0x76");
-    test_display(&[0x66, 0x0f, 0x79, 0xcf], "extrq xmm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x7c, 0x0f], "haddpd xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x7c, 0xcf], "haddpd xmm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x7d, 0x0f], "hsubpd xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0x7d, 0xcf], "hsubpd xmm1, xmm7");
-    test_display(&[0x66, 0x0f, 0x7e, 0x01], "movd dword [bx + di * 1], xmm0");
-    test_display(&[0x66, 0x0f, 0x7e, 0xc1], "movd ecx, xmm0");
-    test_display(&[0x66, 0x0f, 0xa4, 0xcf, 0x11], "shld edi, ecx, 0x11");
-    test_display(&[0x66, 0x0f, 0xac, 0xcf, 0x11], "shrd edi, ecx, 0x11");
-    test_display(&[0x66, 0x0f, 0xae, 0x37], "clwb zmmword [bx]");
-    test_display(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt zmmword [bx]");
-    test_display(&[0x66, 0x0f, 0xae, 0xf1], "tpause ecx");
-    test_display(&[0x66, 0x0f, 0xae, 0xf7], "tpause edi");
-    test_display(&[0x66, 0x0f, 0xaf, 0xd1], "imul edx, ecx");
-    test_display(&[0x66, 0x0f, 0xb3, 0xc0], "btr eax, eax");
-    test_display(&[0x66, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0x66, 0x0f, 0xc1, 0xcc], "xadd esp, ecx");
-    test_display(&[0x66, 0x0f, 0xc2, 0x03, 0x08], "cmppd xmm0, xmmword [bp + di * 1], 0x8");
-    test_display(&[0x66, 0x0f, 0xc2, 0xc3, 0x08], "cmppd xmm0, xmm3, 0x8");
-    test_display(&[0x66, 0x0f, 0xc4, 0x03, 0x08], "pinsrw xmm0, word [bp + di * 1], 0x8");
-    test_display(&[0x66, 0x0f, 0xc4, 0xc3, 0x08], "pinsrw xmm0, ebx, 0x8");
-    test_display(&[0x66, 0x0f, 0xc5, 0xd8, 0xff], "pextrw ebx, xmm0, 0xff");
-    test_display(&[0x66, 0x0f, 0xc6, 0x03, 0x08], "shufpd xmm0, xmmword [bp + di * 1], 0x8");
-    test_display(&[0x66, 0x0f, 0xc6, 0xc3, 0x08], "shufpd xmm0, xmm3, 0x8");
-    test_display(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]");
-    test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [bp + di * 1]");
-    test_display(&[0x66, 0x0f, 0xc7, 0x37], "vmclear qword [bx]");
-    test_display(&[0x66, 0x0f, 0xc7, 0xf5], "rdrand ebp");
-    test_display(&[0x66, 0x0f, 0xc7, 0xf7], "rdrand edi");
-    test_display(&[0x66, 0x0f, 0xc7, 0xfd], "rdseed ebp");
-    test_display(&[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, xmmword [bx]");
-    test_display(&[0x66, 0x0f, 0xd0, 0xcf], "addsubpd xmm1, xmm7");
-    test_display(&[0x66, 0x0f, 0xd1, 0x01], "psrlw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd1, 0xc1], "psrlw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xd2, 0x01], "psrld xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd2, 0xc1], "psrld xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xd3, 0x01], "psrlq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd3, 0xc1], "psrlq xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xd4, 0x01], "paddq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd4, 0xc1], "paddq xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xd5, 0x01], "pmullw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd5, 0xc1], "pmullw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xd6, 0x01], "movq qword [bx + di * 1], xmm0");
-    test_display(&[0x66, 0x0f, 0xd6, 0xc1], "movq xmm1, xmm0");
-    test_display(&[0x66, 0x0f, 0xd7, 0xc1], "pmovmskb eax, xmm1");
-    test_display(&[0x66, 0x0f, 0xd8, 0x01], "psubusb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd8, 0xc1], "psubusb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xd9, 0x01], "psubusw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xd9, 0xc1], "psubusw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xda, 0x01], "pminub xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xda, 0xc1], "pminub xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xdb, 0x01], "pand xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xdb, 0xc1], "pand xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xdc, 0x01], "paddusb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xdc, 0xc1], "paddusb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xdd, 0x01], "paddusw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xdd, 0xc1], "paddusw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xde, 0x01], "pmaxub xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xde, 0xc1], "pmaxub xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xdf, 0x01], "pandn xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xdf, 0xc1], "pandn xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe0, 0x01], "pavgb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe0, 0xc1], "pavgb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe1, 0x01], "psraw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe1, 0xc1], "psraw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe2, 0x01], "psrad xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe2, 0xc1], "psrad xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe3, 0x01], "pavgw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe3, 0xc1], "pavgw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe4, 0x01], "pmulhuw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe4, 0xc1], "pmulhuw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe5, 0x01], "pmulhw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe5, 0xc1], "pmulhw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe6, 0x01], "cvttpd2dq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe6, 0xc1], "cvttpd2dq xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe7, 0x01], "movntdq xmmword [bx + di * 1], xmm0");
-    test_display(&[0x66, 0x0f, 0xe8, 0x01], "psubsb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe8, 0xc1], "psubsb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xe9, 0x01], "psubsw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xe9, 0xc1], "psubsw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xea, 0x01], "pminsw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xea, 0xc1], "pminsw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xeb, 0x01], "por xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xeb, 0x12], "por xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x66, 0x0f, 0xeb, 0xc1], "por xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xeb, 0xc3], "por xmm0, xmm3");
-    test_display(&[0x66, 0x0f, 0xeb, 0xc4], "por xmm0, xmm4");
-    test_display(&[0x66, 0x0f, 0xeb, 0xd3], "por xmm2, xmm3");
-    test_display(&[0x66, 0x0f, 0xec, 0x01], "paddsb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xec, 0xc1], "paddsb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xed, 0x01], "paddsw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xed, 0xc1], "paddsw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xee, 0x01], "pmaxsw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xee, 0xc1], "pmaxsw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xef, 0x01], "pxor xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0");
-    test_display(&[0x66, 0x0f, 0xef, 0xc1], "pxor xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf1, 0x01], "psllw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf1, 0xc1], "psllw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf2, 0x01], "pslld xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf2, 0xc1], "pslld xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf3, 0x01], "psllq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf3, 0xc1], "psllq xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf4, 0x01], "pmuludq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf4, 0xc1], "pmuludq xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf5, 0x01], "pmaddwd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf5, 0xc1], "pmaddwd xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf6, 0x01], "psadbw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf6, 0xc1], "psadbw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf7, 0xc1], "maskmovdqu xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf8, 0x01], "psubb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf8, 0x12], "psubb xmm2, xmmword [bp + si * 1]");
-    test_display(&[0x66, 0x0f, 0xf8, 0xc1], "psubb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xf8, 0xc8], "psubb xmm1, xmm0");
-    test_display(&[0x66, 0x0f, 0xf8, 0xd0], "psubb xmm2, xmm0");
-    test_display(&[0x66, 0x0f, 0xf9, 0x01], "psubw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xf9, 0xc1], "psubw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xfa, 0x01], "psubd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xfa, 0xc1], "psubd xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xfb, 0x01], "psubq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xfb, 0xc1], "psubq xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xfc, 0x01], "paddb xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xfc, 0xc1], "paddb xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xfd, 0xc1], "paddw xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, xmmword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xfe, 0xc1], "paddd xmm0, xmm1");
-    test_display(&[0x66, 0x0f, 0xff, 0x01], "ud0 eax, dword [bx + di * 1]");
-    test_display(&[0x66, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
-    test_display(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "xacquire lock btc dword cs:[bp + di * 1], edx");
-    test_display(&[0x66, 0x31, 0xc0], "xor eax, eax");
-    test_display(&[0x66, 0x32, 0xc0], "xor al, al");
-    test_display(&[0x66, 0x32, 0xc5], "xor al, ch");
-    test_display(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b], "movntdqa xmm5, xmmword cs:[bp + di * 1]");
-    test_display(&[0x66, 0x50], "push eax");
-    test_display(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f], "pmovsxwd xmm3, qword [di + 0xf69]");
-    test_display(&[0x66, 0x8f, 0x00], "pop dword [bx + si * 1]");
-    test_display(&[0x66, 0x91], "xchg eax, ecx");
-    test_display(&[0x66, 0x99], "cdq");
-    test_display(&[0x66, 0xc5, 0x78, 0x10], "lds edi, far [bx + si * 1 + 0x10]");
-    test_display(&[0x66, 0xcf], "iretd");
-    test_display(&[0x66, 0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, esi");
-    test_display(&[0x66, 0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7");
-    test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xe8], "setssbsy");
-    test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xea], "saveprevssp");
-    test_display(&[0x66, 0xf3, 0x0f, 0xbd, 0xc1], "lzcnt eax, ecx");
-    test_display(&[0x66, 0xff, 0xd0], "call eax");
-    test_display(&[0x66, 0xff, 0xe0], "jmp eax");
-    test_display(&[0x67, 0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [ecx]");
-    test_display(&[0x67, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]");
-    test_display(&[0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [edi]");
-    test_display(&[0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [edi]");
-    test_display(&[0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [edi]");
-    test_display(&[0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [edi]");
-    test_display(&[0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [edi]");
-    test_display(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1");
-    test_display(&[0x67, 0xe5, 0x99], "in ax, 0x99");
-    test_display(&[0x67, 0xff, 0xd0], "call ax");
-    test_display(&[0x67, 0xff, 0xe0], "jmp ax");
-    test_display(&[0x68, 0x7f, 0x63], "push 0x637f");
-    test_display(&[0x6b, 0x43, 0x6f, 0x6d], "imul ax, word [bp + di * 1 + 0x6f], 0x6d");
-    test_display(&[0x72, 0x5a], "jb $+0x5a");
-    test_display(&[0x72, 0xf0], "jb $-0x10");
-    test_display(&[0x73, 0x31], "jnb $+0x31");
-    test_display(&[0x74, 0x47], "jz $+0x47");
-    test_display(&[0x81, 0xec, 0x10, 0x03], "sub sp, 0x310");
-    test_display(&[0x66, 0x81, 0xec, 0x10, 0x03, 0x00, 0x00], "sub esp, 0x310");
-    test_display(&[0x83, 0xf8, 0xff], "cmp ax, -0x1");
-    test_display(&[0x66, 0x83, 0xf8, 0xff], "cmp eax, -0x1");
-    test_display(&[0x89, 0x43, 0x18], "mov word [bp + di * 1 + 0x18], ax");
-    test_display(&[0x89, 0x46, 0x10], "mov word [bp + 0x10], ax");
-    test_display(&[0x89, 0x4e, 0x08], "mov word [bp + 0x8], cx");
-    test_display(&[0x89, 0x55, 0x94], "mov word [di - 0x6c], dx");
-    test_display(&[0x8b, 0x32], "mov si, word [bp + si * 1]");
-    test_display(&[0x8b, 0x4c, 0x10], "mov cx, word [si + 0x10]");
-    test_display(&[0x8d, 0x53, 0x08], "lea dx, word [bp + di * 1 + 0x8]");
-    test_display(&[0x8e, 0x00], "mov es, word [bx + si * 1]");
-    test_display(&[0x8e, 0xc0], "mov es, ax");
-    test_display(&[0x8c, 0xc0], "mov ax, es");
-    test_display(&[0x8e, 0x10], "mov ss, word [bx + si * 1]");
-    test_display(&[0x8e, 0xd0], "mov ss, ax");
-    test_display(&[0x8c, 0xd0], "mov ax, ss");
-    test_display(&[0x8e, 0x18], "mov ds, word [bx + si * 1]");
-    test_display(&[0x8e, 0xd8], "mov ds, ax");
-    test_display(&[0x8c, 0xd8], "mov ax, ds");
-    test_display(&[0x8e, 0x20], "mov fs, word [bx + si * 1]");
-    test_display(&[0x8e, 0x28], "mov gs, word [bx + si * 1]");
-    test_display(&[0x8f, 0x00], "pop word [bx + si * 1]");
-    test_display(&[0x90], "nop");
-    test_display(&[0x91], "xchg ax, cx");
-    test_display(&[0x98], "cbw");
-    test_display(&[0x9c], "pushf");
-    test_display(&[0xa0, 0x93, 0x62], "mov al, byte [0x6293]");
-    test_display(&[0xa1, 0x93, 0x62], "mov ax, word [0x6293]");
-    test_display(&[0xa2, 0x93, 0x62], "mov byte [0x6293], al");
-    test_display(&[0xa3, 0x93, 0x62], "mov word [0x6293], ax");
-    test_display(&[0xba, 0x01, 0x00], "mov dx, 0x1");
-    test_display(&[0xc3], "ret");
-    test_display(&[0xc4, 0x02], "les ax, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x38, 0x14, 0x0a], "vunpcklps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x38, 0x15, 0x0a], "vunpckhps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x38, 0xc6, 0xca, 0x77], "vshufps xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0x39, 0x14, 0x0a], "vunpcklpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x39, 0x15, 0x0a], "vunpckhpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x39, 0x60, 0xca], "vpunpcklbw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x61, 0xca], "vpunpcklwd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x62, 0xca], "vpunpckldq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x63, 0xca], "vpacksswb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x64, 0xca], "vpcmpgtb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x65, 0xca], "vpcmpgtw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x66, 0xca], "vpcmpgtd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x67, 0xca], "vpackuswb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x68, 0xca], "vpunpckhbw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x69, 0xca], "vpunpckhwd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x6a, 0xca], "vpunpckhdq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0x6b, 0xca], "vpackssdw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xc6, 0xca, 0x77], "vshufpd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0x39, 0xd5, 0xca], "vpmullw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xda, 0xca], "vpminub xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xde, 0xca], "vpmaxub xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xea, 0xca], "vpminsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xeb, 0xca], "vpor xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xec, 0xca], "vpaddsb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xed, 0xca], "vpaddsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xee, 0xca], "vpmaxsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x39, 0xef, 0xca], "vpxor xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0x3a, 0x5c, 0x0a], "vsubss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3b, 0x51, 0x0a], "vsqrtsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3b, 0x5c, 0x0a], "vsubsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3c, 0x14, 0x0a], "vunpcklps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3c, 0x15, 0x0a], "vunpckhps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3c, 0xc6, 0xca, 0x77], "vshufps ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x14, 0x0a], "vunpcklpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x15, 0x0a], "vunpckhpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x60, 0xca], "vpunpcklbw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x61, 0xca], "vpunpcklwd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x62, 0xca], "vpunpckldq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x63, 0xca], "vpacksswb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x64, 0xca], "vpcmpgtb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x65, 0xca], "vpcmpgtw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x66, 0xca], "vpcmpgtd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x67, 0xca], "vpackuswb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x68, 0xca], "vpunpckhbw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x69, 0xca], "vpunpckhwd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x6a, 0xca], "vpunpckhdq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0x6b, 0xca], "vpackssdw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xc6, 0xca, 0x77], "vshufpd ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xd5, 0xca], "vpmullw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xda, 0xca], "vpminub ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xde, 0xca], "vpmaxub ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xea, 0xca], "vpminsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xeb, 0xca], "vpor ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xec, 0xca], "vpaddsb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xed, 0xca], "vpaddsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xee, 0xca], "vpmaxsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3d, 0xef, 0xca], "vpxor ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0x3e, 0x5c, 0x0a], "vsubss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3f, 0x51, 0x0a], "vsqrtsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x3f, 0x5c, 0x0a], "vsubsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x78, 0x28, 0xca], "vmovaps xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x78, 0x29, 0xca], "vmovaps xmm2, xmm1");
-    test_display(&[0xc4, 0xc1, 0x78, 0x2b, 0x0a], "vmovntps xmmword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0x78, 0x5c, 0x0a], "vsubps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x78, 0xae, 0x11], "vldmxcsr dword [bx + di * 1]");
-    test_display(&[0xc4, 0xc1, 0x78, 0xae, 0x19], "vstmxcsr dword [bx + di * 1]");
-    test_display(&[0xc4, 0xc1, 0x79, 0x28, 0xca], "vmovapd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x79, 0x29, 0xca], "vmovapd xmm2, xmm1");
-    test_display(&[0xc4, 0xc1, 0x79, 0x2b, 0x0a], "vmovntpd xmmword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0x79, 0x2e, 0x0a], "vucomisd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x79, 0x2e, 0xca], "vucomisd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x79, 0x2f, 0x0a], "vcomisd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x79, 0x2f, 0xca], "vcomisd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x79, 0x50, 0xca], "vmovmskpd ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x79, 0x51, 0x0a], "vsqrtpd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x79, 0x5c, 0x0a], "vsubpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x79, 0x6f, 0xca], "vmovdqa xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x79, 0x7e, 0xca], "vmovd edx, xmm1");
-    test_display(&[0xc4, 0xc1, 0x79, 0x7f, 0xca], "vmovdqa xmm2, xmm1");
-    test_display(&[0xc4, 0xc1, 0x79, 0xc5, 0xca, 0x77], "vpextrw ecx, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0x79, 0xd7, 0xca], "vpmovmskb ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x12, 0x0a], "vmovsldup xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x2a, 0x0a], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x2c, 0xca], "vcvttss2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x2d, 0xca], "vcvtss2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x6f, 0xca], "vmovdqu xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7a, 0x7f, 0xca], "vmovdqu xmm2, xmm1");
-    test_display(&[0xc4, 0xc1, 0x7b, 0x12, 0x0a], "vmovddup xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7b, 0x2a, 0x0a], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7b, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx");
-    test_display(&[0xc4, 0xc1, 0x7b, 0x2c, 0xca], "vcvttsd2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7b, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7b, 0x2d, 0xca], "vcvtsd2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7c, 0x5c, 0x0a], "vsubps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x2e, 0x0a], "vucomisd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x2e, 0xca], "vucomisd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x2f, 0x0a], "vcomisd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x2f, 0xca], "vcomisd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x50, 0xca], "vmovmskpd ecx, ymm2");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x51, 0x0a], "vsqrtpd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x5c, 0x0a], "vsubpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x6f, 0xca], "vmovdqa ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0x7d, 0x7f, 0xca], "vmovdqa ymm2, ymm1");
-    test_display(&[0xc4, 0xc1, 0x7d, 0xd7, 0xca], "vpmovmskb ecx, ymm2");
-    test_display(&[0xc4, 0xc1, 0x7e, 0x12, 0x0a], "vmovsldup ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7e, 0x2c, 0xca], "vcvttss2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7e, 0x2d, 0x0a], "vcvtss2si ecx, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7e, 0x2d, 0xca], "vcvtss2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7e, 0x6f, 0xca], "vmovdqu ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0x7e, 0x7f, 0xca], "vmovdqu ymm2, ymm1");
-    test_display(&[0xc4, 0xc1, 0x7f, 0x12, 0x0a], "vmovddup ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7f, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx");
-    test_display(&[0xc4, 0xc1, 0x7f, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7f, 0x2c, 0xca], "vcvttsd2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0x7f, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0x7f, 0x2d, 0xca], "vcvtsd2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x12, 0x0a], "vmovlps xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x12, 0xca], "vmovhlps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x16, 0x0a], "vmovhps xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x54, 0xca], "vandps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x55, 0xca], "vandnps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x56, 0x0a], "vorps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x57, 0xca], "vxorps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x58, 0xca], "vaddps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x59, 0x0a], "vmulps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x5d, 0x0a], "vminps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x5e, 0x0a], "vdivps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0x5f, 0x0a], "vmaxps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb8, 0xc2, 0xca, 0x77], "vcmpps xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x12, 0x0a], "vmovlpd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x16, 0x0a], "vmovhpd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x54, 0x0a], "vandpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x55, 0x0a], "vandnpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x56, 0x0a], "vorpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x57, 0xca], "vxorpd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x58, 0x0a], "vaddpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x59, 0x0a], "vmulpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x5d, 0x0a], "vminpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x5e, 0x0a], "vdivpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x5f, 0x0a], "vmaxpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x71, 0xd2, 0x77], "vpsrlw xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x74, 0xca], "vpcmpeqb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x75, 0xca], "vpcmpeqw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x76, 0xca], "vpcmpeqd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x7c, 0xca], "vhaddpd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0x7d, 0xca], "vhsubpd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xc2, 0xca, 0x77], "vcmppd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xc4, 0xca, 0x77], "vpinsrw xmm1, xmm0, edx, 0x77");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd0, 0xca], "vaddsubpd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd1, 0xca], "vpsrlw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd2, 0xca], "vpsrld xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd3, 0xca], "vpsrlq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd4, 0xca], "vpaddq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd8, 0xca], "vpsubusb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xd9, 0xca], "vpsubusw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xdb, 0xca], "vpand xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xdc, 0xca], "vpaddusb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xdd, 0xca], "vpaddusw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xdf, 0xca], "vpandn xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe0, 0xca], "vpavgb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe1, 0xca], "vpsraw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe2, 0xca], "vpsrad xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe3, 0xca], "vpavgw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe4, 0xca], "vpmulhuw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe5, 0xca], "vpmulhw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe8, 0xca], "vpsubsb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xe9, 0xca], "vpsubsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xf1, 0xca], "vpsllw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xf2, 0xca], "vpslld xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xf3, 0xca], "vpsllq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xf4, 0xca], "vpmuludq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xf8, 0xca], "vpsubb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xf9, 0xca], "vpsubw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xfa, 0xca], "vpsubd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xfb, 0xca], "vpsubq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xfc, 0xca], "vpaddb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xfd, 0xca], "vpaddw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xb9, 0xfe, 0xca], "vpaddd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xba, 0x58, 0x0a], "vaddss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xba, 0x58, 0xca], "vaddss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xba, 0x59, 0x0a], "vmulss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xba, 0x5d, 0x0a], "vminss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xba, 0x5e, 0x0a], "vdivss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xba, 0x5f, 0x0a], "vmaxss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x11, 0xca], "vmovsd xmm2, xmm0, xmm1");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x58, 0x0a], "vaddsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x59, 0x0a], "vmulsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x5d, 0x0a], "vminsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x5e, 0x0a], "vdivsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x5f, 0x0a], "vmaxsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x7c, 0xca], "vhaddps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbb, 0x7d, 0xca], "vhsubps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbb, 0xc2, 0xca, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xbb, 0xd0, 0xca], "vaddsubps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x54, 0xca], "vandps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x55, 0xca], "vandnps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x56, 0x0a], "vorps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x57, 0xca], "vxorps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x58, 0xca], "vaddps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x59, 0x0a], "vmulps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x5d, 0x0a], "vminps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x5e, 0x0a], "vdivps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbc, 0x5f, 0x0a], "vmaxps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbc, 0xc2, 0xca, 0x77], "vcmpps ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x54, 0x0a], "vandpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x55, 0x0a], "vandnpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x56, 0x0a], "vorpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x57, 0xca], "vxorpd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x58, 0x0a], "vaddpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x59, 0x0a], "vmulpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x5d, 0x0a], "vminpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x5e, 0x0a], "vdivpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x5f, 0x0a], "vmaxpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x74, 0xca], "vpcmpeqb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x75, 0xca], "vpcmpeqw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x76, 0xca], "vpcmpeqd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x7c, 0xca], "vhaddpd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0x7d, 0xca], "vhsubpd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xc2, 0xca, 0x77], "vcmppd ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd0, 0xca], "vaddsubpd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd1, 0x0a], "vpsrlw ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd1, 0xca], "vpsrlw ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd2, 0x0a], "vpsrld ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd2, 0xca], "vpsrld ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd3, 0x0a], "vpsrlq ymm1, ymm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd3, 0xca], "vpsrlq ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd4, 0xca], "vpaddq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd8, 0xca], "vpsubusb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xd9, 0xca], "vpsubusw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xdb, 0xca], "vpand ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xdc, 0xca], "vpaddusb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xdd, 0xca], "vpaddusw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xdf, 0xca], "vpandn ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe0, 0xca], "vpavgb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe1, 0xca], "vpsraw ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe2, 0xca], "vpsrad ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe3, 0xca], "vpavgw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe4, 0xca], "vpmulhuw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe5, 0xca], "vpmulhw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe8, 0xca], "vpsubsb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xe9, 0xca], "vpsubsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xf1, 0xca], "vpsllw ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xf2, 0xca], "vpslld ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xf3, 0xca], "vpsllq ymm1, ymm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xf4, 0xca], "vpmuludq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xf8, 0xca], "vpsubb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xf9, 0xca], "vpsubw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xfa, 0xca], "vpsubd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xfb, 0xca], "vpsubq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xfc, 0xca], "vpaddb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xfd, 0xca], "vpaddw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbd, 0xfe, 0xca], "vpaddd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbe, 0x58, 0x0a], "vaddss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbe, 0x58, 0xca], "vaddss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xbe, 0x59, 0x0a], "vmulss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbe, 0x5d, 0x0a], "vminss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbe, 0x5e, 0x0a], "vdivss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbe, 0x5f, 0x0a], "vmaxss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x11, 0xca], "vmovsd xmm2, xmm0, xmm1");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x58, 0x0a], "vaddsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x59, 0x0a], "vmulsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x5d, 0x0a], "vminsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x5e, 0x0a], "vdivsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x5f, 0x0a], "vmaxsd xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x7c, 0xca], "vhaddps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbf, 0x7d, 0xca], "vhsubps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xbf, 0xc2, 0xca, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xbf, 0xd0, 0xca], "vaddsubps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x10, 0x0a], "vmovups xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x11, 0x0a], "vmovups xmmword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x17, 0x0a], "vmovhps qword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x50, 0xca], "vmovmskps ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x51, 0x0a], "vsqrtps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x52, 0xca], "vrsqrtps xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x53, 0xca], "vrcpps xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x5a, 0x0a], "vcvtps2pd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x5a, 0xca], "vcvtps2pd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x5b, 0x0a], "vcvtdq2ps xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xf8, 0x5b, 0xca], "vcvtdq2ps xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x10, 0x0a], "vmovupd xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x13, 0x0a], "vmovlpd qword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x17, 0x0a], "vmovhpd qword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x50, 0xca], "vmovmskpd ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x5a, 0xca], "vcvtpd2ps xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x5b, 0xca], "vcvtps2dq xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x6c, 0xca], "vpunpcklqdq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x6d, 0xca], "vpunpckhqdq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x6e, 0x0a], "vmovd xmm1, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x6e, 0xca], "vmovd xmm1, edx");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x70, 0xca, 0x77], "vpshufd xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x71, 0xd2, 0x77], "vpsrlw xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x71, 0xe2, 0x77], "vpsraw xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x71, 0xf2, 0x77], "vpsllw xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x72, 0xd2, 0x77], "vpsrld xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x72, 0xe2, 0x77], "vpsrad xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x72, 0xf2, 0x77], "vpslld xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x73, 0xd2, 0x77], "vpsrlq xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x73, 0xda, 0x77], "vpsrldq xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x73, 0xf2, 0x77], "vpsllq xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x73, 0xfa, 0x77], "vpslldq xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xf9, 0x7e, 0xca], "vmovd edx, xmm1");
-    test_display(&[0xc4, 0xc1, 0xf9, 0xe6, 0xca], "vcvttpd2dq xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0xe7, 0x0a], "vmovntdq xmmword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xf9, 0xf5, 0xca], "vpmaddwd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0xf6, 0xca], "vpsadbw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xf9, 0xf7, 0xca], "vmaskmovdqu xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x10, 0x0a], "vmovss xmm1, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x11, 0x0a], "vmovss dword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x12, 0x0a], "vmovsldup xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x16, 0xca], "vmovshdup xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x2a, 0x0a], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x51, 0x0a], "vsqrtss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x52, 0xca], "vrsqrtss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x53, 0xca], "vrcpss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x5a, 0x0a], "vcvtss2sd xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x5a, 0xca], "vcvtss2sd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x5b, 0xca], "vcvttps2dq xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfa, 0x70, 0xca, 0x77], "vpshufhw xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfa, 0xe6, 0xca], "vcvtdq2pd xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x10, 0x0a], "vmovsd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x11, 0x0a], "vmovsd qword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x2a, 0x0a], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x5a, 0x0a], "vcvtsd2ss xmm1, xmm0, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x5a, 0xca], "vcvtsd2ss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfb, 0x70, 0xca, 0x77], "vpshuflw xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfb, 0xe6, 0xca], "vcvtpd2dq xmm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfb, 0xf0, 0x0a], "vlddqu xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x10, 0x0a], "vmovups ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x11, 0x0a], "vmovups ymmword [bp + si * 1], ymm1");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x28, 0xca], "vmovaps ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x29, 0xca], "vmovaps ymm2, ymm1");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x2b, 0x0a], "vmovntps ymmword [bp + si * 1], ymm1");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x50, 0xca], "vmovmskps ecx, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x51, 0x0a], "vsqrtps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x52, 0xca], "vrsqrtps ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x53, 0xca], "vrcpps ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x5a, 0x0a], "vcvtps2pd ymm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x5a, 0xca], "vcvtps2pd ymm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x5b, 0x0a], "vcvtdq2ps ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfc, 0x5b, 0xca], "vcvtdq2ps ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x10, 0x0a], "vmovupd ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x28, 0xca], "vmovapd ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x29, 0xca], "vmovapd ymm2, ymm1");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x2b, 0x0a], "vmovntpd ymmword [bp + si * 1], ymm1");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x50, 0xca], "vmovmskpd ecx, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x5a, 0xca], "vcvtpd2ps xmm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x5b, 0xca], "vcvtps2dq ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x6c, 0xca], "vpunpcklqdq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x6d, 0xca], "vpunpckhqdq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x70, 0xca, 0x77], "vpshufd ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x71, 0xd2, 0x77], "vpsrlw ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x71, 0xe2, 0x77], "vpsraw ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x71, 0xf2, 0x77], "vpsllw ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x72, 0xd2, 0x77], "vpsrld ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x72, 0xe2, 0x77], "vpsrad ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x72, 0xf2, 0x77], "vpslld ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x73, 0xd2, 0x77], "vpsrlq ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x73, 0xda, 0x77], "vpsrldq ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x73, 0xf2, 0x77], "vpsllq ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0x73, 0xfa, 0x77], "vpslldq ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfd, 0xe6, 0xca], "vcvttpd2dq xmm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0xe7, 0x0a], "vmovntdq ymmword [bp + si * 1], ymm1");
-    test_display(&[0xc4, 0xc1, 0xfd, 0xf5, 0xca], "vpmaddwd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfd, 0xf6, 0xca], "vpsadbw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x10, 0x0a], "vmovss xmm1, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x11, 0x0a], "vmovss dword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x12, 0x0a], "vmovsldup ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x16, 0xca], "vmovshdup ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x2c, 0xca], "vcvttss2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x2d, 0x0a], "vcvtss2si ecx, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x51, 0x0a], "vsqrtss xmm1, xmm0, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x52, 0xca], "vrsqrtss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x53, 0xca], "vrcpss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x5a, 0xca], "vcvtss2sd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x5b, 0xca], "vcvttps2dq ymm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xfe, 0x70, 0xca, 0x77], "vpshufhw ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xfe, 0xe6, 0xca], "vcvtdq2pd ymm1, xmm2");
-    test_display(&[0xc4, 0xc1, 0xff, 0x10, 0x0a], "vmovsd xmm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xff, 0x11, 0x0a], "vmovsd qword [bp + si * 1], xmm1");
-    test_display(&[0xc4, 0xc1, 0xff, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx");
-    test_display(&[0xc4, 0xc1, 0xff, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc1, 0xff, 0x2c, 0xca], "vcvttsd2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0xff, 0x2d, 0xca], "vcvtsd2si ecx, xmm2");
-    test_display(&[0xc4, 0xc1, 0xff, 0x5a, 0xca], "vcvtsd2ss xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc1, 0xff, 0x70, 0xca, 0x77], "vpshuflw ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc1, 0xff, 0xe6, 0xca], "vcvtpd2dq xmm1, ymm2");
-    test_display(&[0xc4, 0xc1, 0xff, 0xf0, 0x0a], "vlddqu ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x39, 0x0c, 0xca], "vpermilps xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x0d, 0xca], "vpermilpd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x28, 0xca], "vpmuldq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x29, 0xca], "vpcmpeqq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x2b, 0xca], "vpackusdw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x2c, 0x0a], "vmaskmovps xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x39, 0x2d, 0x0a], "vmaskmovpd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x39, 0x2e, 0x0a], "vmaskmovps xmmword [bp + si * 1], xmm0, xmm1");
-    test_display(&[0xc4, 0xc2, 0x39, 0x2f, 0x0a], "vmaskmovpd xmmword [bp + si * 1], xmm0, xmm1");
-    test_display(&[0xc4, 0xc2, 0x39, 0x37, 0xca], "vpcmpgtq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x38, 0xca], "vpminsb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x39, 0xca], "vpminsd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x3a, 0xca], "vpminuw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x3b, 0xca], "vpminud xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x3c, 0xca], "vpmaxsb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x3d, 0xca], "vpmaxsd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x3e, 0xca], "vpmaxuw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x3f, 0xca], "vpmaxud xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x39, 0x40, 0xca], "vpmulld xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x0c, 0xca], "vpermilps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x0d, 0xca], "vpermilpd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x28, 0xca], "vpmuldq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x29, 0xca], "vpcmpeqq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x2b, 0x0a], "vpackusdw ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x2b, 0xca], "vpackusdw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x2c, 0x0a], "vmaskmovps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x2d, 0x0a], "vmaskmovpd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x2e, 0x0a], "vmaskmovps ymmword [bp + si * 1], ymm0, ymm1");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x2f, 0x0a], "vmaskmovpd ymmword [bp + si * 1], ymm0, ymm1");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x36, 0xca], "vpermd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x37, 0xca], "vpcmpgtq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x38, 0xca], "vpminsb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x39, 0xca], "vpminsd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x3a, 0xca], "vpminuw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x3b, 0xca], "vpminud ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x3c, 0xca], "vpmaxsb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x3d, 0xca], "vpmaxsd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x3e, 0xca], "vpmaxuw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x3f, 0xca], "vpmaxud ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x3d, 0x40, 0xca], "vpmulld ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x00, 0xca], "vpshufb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x01, 0xca], "vphaddw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x02, 0xca], "vphaddd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x03, 0xca], "vphaddsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x04, 0xca], "vpmaddubsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x05, 0xca], "vphsubw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x06, 0xca], "vphsubd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x07, 0xca], "vphsubsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x08, 0xca], "vpsignb xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x09, 0xca], "vpsignw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x0a, 0xca], "vpsignd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x0b, 0xca], "vpmulhrsw xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x0e, 0xca], "vtestps xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x0f, 0xca], "vtestpd xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x17, 0xca], "vptest xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x18, 0x0a], "vbroadcastss xmm1, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x79, 0x18, 0xca], "vbroadcastss xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x1c, 0xca], "vpabsb xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x1d, 0xca], "vpabsw xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x1e, 0xca], "vpabsd xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x20, 0xca], "vpmovsxbw xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x21, 0xca], "vpmovsxbd xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x22, 0xca], "vpmovsxbq xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x23, 0xca], "vpmovsxwd xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x24, 0xca], "vpmovsxwq xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x25, 0xca], "vpmovsxdq xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x2a, 0x0a], "vmovntdqa xmm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x79, 0x30, 0xca], "vpmovzxbw xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x31, 0xca], "vpmovzxbd xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x32, 0xca], "vpmovzxbq xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x33, 0xca], "vpmovzxwd xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x34, 0xca], "vpmovzxwq xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x35, 0xca], "vpmovzxdq xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x41, 0xca], "vphminposuw xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x45, 0x0a], "vpsrlvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x79, 0x45, 0xca], "vpsrlvd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x46, 0x0a], "vpsravd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x79, 0x47, 0x0a], "vpsllvd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x79, 0x47, 0xca], "vpsllvd xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0x79, 0x8c, 0x0a], "vpmaskmovd xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x79, 0x8e, 0x0a], "vpmaskmovd xmmword [bp + si * 1], xmm0, xmm1");
-    test_display(&[0xc4, 0xc2, 0x79, 0xdb, 0xca], "vaesimc xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x00, 0xca], "vpshufb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x01, 0xca], "vphaddw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x02, 0xca], "vphaddd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x03, 0xca], "vphaddsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x04, 0xca], "vpmaddubsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x05, 0xca], "vphsubw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x06, 0xca], "vphsubd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x07, 0xca], "vphsubsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x08, 0xca], "vpsignb ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x09, 0xca], "vpsignw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x0a, 0xca], "vpsignd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x0b, 0xca], "vpmulhrsw ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x0e, 0xca], "vtestps ymm1, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x0f, 0xca], "vtestpd ymm1, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x16, 0x0a], "vpermps ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x16, 0xca], "vpermps ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x17, 0xca], "vptest ymm1, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x18, 0x0a], "vbroadcastss ymm1, dword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x18, 0xca], "vbroadcastss ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x19, 0x0a], "vbroadcastsd ymm1, qword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x19, 0xca], "vbroadcastsd ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x1a, 0x0a], "vbroadcastf128 ymm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x1c, 0xca], "vpabsb ymm1, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x1d, 0xca], "vpabsw ymm1, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x1e, 0xca], "vpabsd ymm1, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x20, 0xca], "vpmovsxbw ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x21, 0xca], "vpmovsxbd ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x22, 0xca], "vpmovsxbq ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x23, 0xca], "vpmovsxwd ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x24, 0xca], "vpmovsxwq ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x25, 0xca], "vpmovsxdq ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x2a, 0x0a], "vmovntdqa ymm1, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x30, 0xca], "vpmovzxbw ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x31, 0xca], "vpmovzxbd ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x32, 0xca], "vpmovzxbq ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x33, 0xca], "vpmovzxwd ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x34, 0xca], "vpmovzxwq ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x35, 0xca], "vpmovzxdq ymm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x45, 0x0a], "vpsrlvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xe2, 0x79, 0x13, 0xca], "vcvtph2ps xmm1, xmm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x45, 0xca], "vpsrlvd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x46, 0x0a], "vpsravd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x47, 0x0a], "vpsllvd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x47, 0xca], "vpsllvd ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x5a, 0x0a], "vbroadcasti128 ymm1, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x8c, 0x0a], "vpmaskmovd ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0x7d, 0x8e, 0x0a], "vpmaskmovd ymmword [bp + si * 1], ymm0, ymm1");
-    test_display(&[0xc4, 0xc2, 0xb9, 0xdc, 0xca], "vaesenc xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0xb9, 0xdd, 0xca], "vaesenclast xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0xb9, 0xde, 0xca], "vaesdec xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0xb9, 0xdf, 0xca], "vaesdeclast xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0xbd, 0xdc, 0xca], "vaesenc ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0xbd, 0xdd, 0xca], "vaesenclast ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0xbd, 0xde, 0xca], "vaesdec ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0xbd, 0xdf, 0xca], "vaesdeclast ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0xf9, 0x45, 0x0a], "vpsrlvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0xf9, 0x45, 0xca], "vpsrlvq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0xf9, 0x47, 0x0a], "vpsllvq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0xf9, 0x47, 0xca], "vpsllvq xmm1, xmm0, xmm2");
-    test_display(&[0xc4, 0xc2, 0xf9, 0x8c, 0x0a], "vpmaskmovq xmm1, xmm0, xmmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0xf9, 0x8e, 0x0a], "vpmaskmovq xmmword [bp + si * 1], xmm0, xmm1");
-    test_display(&[0xc4, 0xc2, 0xfd, 0x45, 0x0a], "vpsrlvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0xfd, 0x45, 0xca], "vpsrlvq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0xfd, 0x47, 0x0a], "vpsllvq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0xfd, 0x47, 0xca], "vpsllvq ymm1, ymm0, ymm2");
-    test_display(&[0xc4, 0xc2, 0xfd, 0x8c, 0x0a], "vpmaskmovq ymm1, ymm0, ymmword [bp + si * 1]");
-    test_display(&[0xc4, 0xc2, 0xfd, 0x8e, 0x0a], "vpmaskmovq ymmword [bp + si * 1], ymm0, ymm1");
-    test_display(&[0xc4, 0xc3, 0x39, 0x0a, 0xca, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x0b, 0xca, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x0c, 0xca, 0x77], "vblendps xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x0d, 0xca, 0x77], "vblendpd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x0e, 0xca, 0x77], "vpblendw xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x20, 0x0a, 0x77], "vpinsrb xmm1, xmm0, byte [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x20, 0xca, 0x77], "vpinsrb xmm1, xmm0, edx, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x21, 0xca, 0x77], "vinsertps xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x22, 0x0a, 0x77], "vpinsrd xmm1, xmm0, dword [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x22, 0xca, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x40, 0xca, 0x77], "vdpps xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x41, 0xca, 0x77], "vdppd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x42, 0xca, 0x77], "vmpsadbw xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x39, 0x4c, 0xca, 0x77], "vpblendvb xmm1, xmm0, xmm2, xmm7");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x0a, 0xca, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x0b, 0xca, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x0c, 0xca, 0x77], "vblendps ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x0d, 0xca, 0x77], "vblendpd ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x0e, 0xca, 0x77], "vpblendw ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x18, 0xca, 0x77], "vinsertf128 ymm1, ymm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x38, 0xca, 0x77], "vinserti128 ymm1, ymm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x40, 0xca, 0x77], "vdpps ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x42, 0xca, 0x77], "vmpsadbw ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x3d, 0x4c, 0xca, 0x77], "vpblendvb ymm1, ymm0, ymm2, ymm7");
-    test_display(&[0xc4, 0xc3, 0x79, 0x02, 0x0a, 0x77], "vpblendd xmm1, xmm0, xmmword [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x02, 0xca, 0x77], "vpblendd xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x04, 0xca, 0x77], "vpermilps xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x05, 0xca, 0x77], "vpermilpd xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x08, 0xca, 0x77], "vroundps xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x09, 0xca, 0x77], "vroundpd xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x14, 0x0a, 0x77], "vpextrb byte [bp + si * 1], xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x14, 0xca, 0x77], "vpextrb edx, xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x15, 0x0a, 0x77], "vpextrw word [bp + si * 1], xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x15, 0xca, 0x77], "vpextrw edx, xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x16, 0x0a, 0x77], "vpextrd dword [bp + si * 1], xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x16, 0xca, 0x77], "vpextrd edx, xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x17, 0x0a, 0x77], "vextractps dword [bp + si * 1], xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x17, 0xca, 0x77], "vextractps edx, xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x60, 0xca, 0x77], "vpcmpestrm xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x61, 0xca, 0x77], "vpcmpestri xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x62, 0xca, 0x77], "vpcmpistrm xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x79, 0x63, 0xca, 0x77], "vpcmpistri xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x02, 0x0a, 0x77], "vpblendd ymm1, ymm0, ymmword [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x02, 0xca, 0x77], "vpblendd ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x04, 0xca, 0x77], "vpermilps ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x05, 0xca, 0x77], "vpermilpd ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x06, 0x0a, 0x77], "vperm2f128 ymm1, ymm0, ymmword [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x06, 0xca, 0x77], "vperm2f128 ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x08, 0xca, 0x77], "vroundps ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x09, 0xca, 0x77], "vroundpd ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x19, 0xca, 0x77], "vextractf128 xmm2, ymm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x1d, 0xca, 0x77], "vcvtps2ph xmm2, ymm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x39, 0xca, 0x77], "vextracti128 xmm2, ymm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x46, 0x0a, 0x77], "vperm2i128 ymm1, ymm0, ymmword [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0x7d, 0x46, 0xca, 0x77], "vperm2i128 ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0xb9, 0x0f, 0xca, 0x77], "vpalignr xmm1, xmm0, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0xb9, 0x22, 0x0a, 0x77], "vpinsrd xmm1, xmm0, dword [bp + si * 1], 0x77");
-    test_display(&[0xc4, 0xc3, 0xb9, 0x22, 0xca, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77");
-    test_display(&[0xc4, 0xc3, 0xbd, 0x0f, 0xca, 0x77], "vpalignr ymm1, ymm0, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0xf9, 0x16, 0x0a, 0x77], "vpextrd dword [bp + si * 1], xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0xf9, 0x16, 0xca, 0x77], "vpextrd edx, xmm1, 0x77");
-    test_display(&[0xc4, 0xc3, 0xf9, 0xdf, 0xca, 0x77], "vaeskeygenassist xmm1, xmm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0xfd, 0x00, 0xca, 0x77], "vpermq ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xc3, 0xfd, 0x01, 0xca, 0x77], "vpermpd ymm1, ymm2, 0x77");
-    test_display(&[0xc4, 0xe2, 0x60, 0xf2, 0x01], "andn eax, ebx, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0x60, 0xf5, 0x07], "bzhi eax, dword [bx], ebx");
-    test_display(&[0xc4, 0xe2, 0x60, 0xf7, 0x01], "bextr eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0x61, 0xf7, 0x01], "shlx eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0x62, 0xf5, 0x07], "pext eax, ebx, dword [bx]");
-    test_display(&[0xc4, 0xe2, 0x62, 0xf7, 0x01], "sarx eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0x63, 0xf5, 0x07], "pdep eax, ebx, dword [bx]");
-    test_display(&[0xc4, 0xe2, 0x63, 0xf6, 0x07], "mulx eax, ebx, dword [bx]");
-    test_display(&[0xc4, 0xe2, 0x63, 0xf7, 0x01], "shrx eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0x78, 0xf3, 0x09], "blsr eax, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0x78, 0xf3, 0x11], "blsmsk eax, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0x78, 0xf3, 0x19], "blsi eax, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0x79, 0x58, 0xc1], "vpbroadcastd xmm0, xmm1");
-    test_display(&[0xc4, 0xe2, 0x79, 0x59, 0xc1], "vpbroadcastq xmm0, xmm1");
-    test_display(&[0xc4, 0xe2, 0x79, 0x78, 0xc1], "vpbroadcastb xmm0, xmm1");
-    test_display(&[0xc4, 0xe2, 0x79, 0x79, 0xc1], "vpbroadcastw xmm0, xmm1");
-    test_display(&[0xc4, 0xe2, 0x7d, 0x58, 0xc1], "vpbroadcastd ymm0, ymm1");
-    test_display(&[0xc4, 0xe2, 0x7d, 0x59, 0xc1], "vpbroadcastq ymm0, ymm1");
-    test_display(&[0xc4, 0xe2, 0x7d, 0x78, 0xc1], "vpbroadcastb ymm0, ymm1");
-    test_display(&[0xc4, 0xe2, 0x7d, 0x79, 0xc1], "vpbroadcastw ymm0, ymm1");
-    test_display(&[0xc4, 0xe2, 0xe0, 0xf2, 0x01], "andn eax, ebx, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0xe0, 0xf5, 0x07], "bzhi eax, dword [bx], ebx");
-    test_display(&[0xc4, 0xe2, 0xe0, 0xf7, 0x01], "bextr eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0xe1, 0xf7, 0x01], "shlx eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0xe2, 0xf5, 0x07], "pext eax, ebx, dword [bx]");
-    test_display(&[0xc4, 0xe2, 0xe2, 0xf7, 0x01], "sarx eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0xe3, 0xf5, 0x07], "pdep eax, ebx, dword [bx]");
-    test_display(&[0xc4, 0xe2, 0xe3, 0xf6, 0x07], "mulx eax, ebx, dword [bx]");
-    test_display(&[0xc4, 0xe2, 0xe3, 0xf7, 0x01], "shrx eax, dword [bx + di * 1], ebx");
-    test_display(&[0xc4, 0xe2, 0xf8, 0xf3, 0x09], "blsr eax, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0xf8, 0xf3, 0x11], "blsmsk eax, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe2, 0xf8, 0xf3, 0x19], "blsi eax, dword [bx + di * 1]");
-    test_display(&[0xc4, 0xe3, 0x7b, 0xf0, 0x01, 0x05], "rorx eax, dword [bx + di * 1], 0x5");
-    test_display(&[0xc4, 0xe3, 0x7d, 0x1d, 0xca, 0x77], "vcvtps2ph xmm2, ymm1, 0x77");
-    test_display(&[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05], "rorx eax, dword [bx + di * 1], 0x5");
-    test_display(&[0xc5, 0x78, 0x10], "lds di, dword [bx + si * 1 + 0x10]");
-    test_display(&[0xc5, 0xf8, 0x10, 0x00], "vmovups xmm0, xmmword [bx + si * 1]");
-    test_display(&[0xc5, 0xf8, 0x10, 0x01], "vmovups xmm0, xmmword [bx + di * 1]");
-    test_display(&[0xc5, 0xf8, 0x2e, 0xca], "vucomiss xmm1, xmm2");
-    test_display(&[0xc5, 0xf8, 0x2f, 0xca], "vcomiss xmm1, xmm2");
-    test_display(&[0xc5, 0xfa, 0x2c, 0x0a], "vcvttss2si ecx, dword [bp + si * 1]");
-    test_display(&[0xc5, 0xfa, 0x2c, 0xca], "vcvttss2si ecx, xmm2");
-    test_display(&[0xc5, 0xfa, 0x2d, 0xca], "vcvtss2si ecx, xmm2");
-    test_display(&[0xc5, 0xfb, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx");
-    test_display(&[0xc5, 0xfb, 0x2c, 0xca], "vcvttsd2si ecx, xmm2");
-    test_display(&[0xc5, 0xfb, 0x2d, 0xca], "vcvtsd2si ecx, xmm2");
-    test_display(&[0xc5, 0xfc, 0x2e, 0x0a], "vucomiss xmm1, dword [bp + si * 1]");
-    test_display(&[0xc5, 0xfc, 0x2f, 0x0a], "vcomiss xmm1, dword [bp + si * 1]");
-    test_display(&[0xc5, 0xfe, 0x2c, 0xca], "vcvttss2si ecx, xmm2");
-    test_display(&[0xc5, 0xfe, 0x2d, 0xca], "vcvtss2si ecx, xmm2");
-    test_display(&[0xc5, 0xff, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx");
-    test_display(&[0xc5, 0xff, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]");
-    test_display(&[0xc5, 0xff, 0x2c, 0xca], "vcvttsd2si ecx, xmm2");
-    test_display(&[0xc5, 0xff, 0x2d, 0xca], "vcvtsd2si ecx, xmm2");
-    test_display(&[0xc6, 0xf8, 0x10], "xabort 0x10");
-    test_display(&[0xc7, 0x43, 0x10, 0x00, 0x00], "mov word [bp + di * 1 + 0x10], 0x0");
-    test_display(&[0xc7, 0xf8, 0x10, 0x12], "xbegin $+0x1210");
-    test_display(&[0xc8, 0x01, 0x02, 0x03], "enter 0x201, 0x3");
-    test_display(&[0xc9], "leave");
-    test_display(&[0xca, 0x12, 0x34], "retf 0x3412");
-    test_display(&[0xcb], "retf");
-    test_display(&[0xcd, 0x00], "int 0x0");
-    test_display(&[0xcd, 0xff], "int 0xff");
-    test_display(&[0xce], "into");
-    test_display(&[0xcf], "iret");
-    test_display(&[0xd2, 0xe0], "shl al, cl");
-    test_display(&[0xd4, 0x01], "aam 0x1");
-    test_display(&[0xd4, 0x0a], "aam 0xa");
-    test_display(&[0xd5, 0x01], "aad 0x1");
-    test_display(&[0xd5, 0x0a], "aad 0xa");
-    test_display(&[0xd8, 0x03], "fadd st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x0b], "fmul st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x13], "fcom st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x1b], "fcomp st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x23], "fsub st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x2b], "fsubr st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x33], "fdiv st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0x3b], "fdivr st(0), dword [bp + di * 1]");
-    test_display(&[0xd8, 0xc3], "fadd st(0), st(3)");
-    test_display(&[0xd8, 0xcb], "fmul st(0), st(3)");
-    test_display(&[0xd8, 0xd3], "fcom st(0), st(3)");
-    test_display(&[0xd8, 0xdb], "fcomp st(0), st(3)");
-    test_display(&[0xd8, 0xe3], "fsub st(0), st(3)");
-    test_display(&[0xd8, 0xeb], "fsubr st(0), st(3)");
-    test_display(&[0xd8, 0xf3], "fdiv st(0), st(3)");
-    test_display(&[0xd8, 0xfb], "fdivr st(0), st(3)");
-    test_display(&[0xd9, 0x03], "fld st(0), dword [bp + di * 1]");
-    test_display(&[0xd9, 0x13], "fst dword [bp + di * 1], st(0)");
-    test_display(&[0xd9, 0x1b], "fstp dword [bp + di * 1], st(0)");
-    test_display(&[0xd9, 0x23], "fldenv ptr [bp + di * 1]");
-    test_display(&[0xd9, 0x2b], "fldcw word [bp + di * 1]");
-    test_display(&[0xd9, 0x33], "fnstenv ptr [bp + di * 1]");
-    test_display(&[0xd9, 0x3b], "fnstcw word [bp + di * 1]");
-    test_display(&[0xd9, 0xc3], "fld st(0), st(3)");
-    test_display(&[0xd9, 0xcb], "fxch st(0), st(3)");
-    test_display(&[0xd9, 0xd0], "fnop");
-    test_display(&[0xd9, 0xdb], "fstpnce st(3), st(0)");
-    test_display(&[0xd9, 0xe0], "fchs");
-    test_display(&[0xd9, 0xe1], "fabs");
-    test_display(&[0xd9, 0xe4], "ftst");
-    test_display(&[0xd9, 0xe5], "fxam");
-    test_display(&[0xd9, 0xe8], "fld1");
-    test_display(&[0xd9, 0xe9], "fldl2t");
-    test_display(&[0xd9, 0xea], "fldl2e");
-    test_display(&[0xd9, 0xeb], "fldpi");
-    test_display(&[0xd9, 0xec], "fldlg2");
-    test_display(&[0xd9, 0xed], "fldln2");
-    test_display(&[0xd9, 0xee], "fldz");
-    test_display(&[0xd9, 0xf0], "f2xm1");
-    test_display(&[0xd9, 0xf1], "fyl2x");
-    test_display(&[0xd9, 0xf2], "fptan");
-    test_display(&[0xd9, 0xf3], "fpatan");
-    test_display(&[0xd9, 0xf4], "fxtract");
-    test_display(&[0xd9, 0xf5], "fprem1");
-    test_display(&[0xd9, 0xf6], "fdecstp");
-    test_display(&[0xd9, 0xf7], "fincstp");
-    test_display(&[0xd9, 0xf8], "fprem");
-    test_display(&[0xd9, 0xf9], "fyl2xp1");
-    test_display(&[0xd9, 0xfa], "fsqrt");
-    test_display(&[0xd9, 0xfb], "fsincos");
-    test_display(&[0xd9, 0xfc], "frndint");
-    test_display(&[0xd9, 0xfd], "fscale");
-    test_display(&[0xd9, 0xfe], "fsin");
-    test_display(&[0xd9, 0xff], "fcos");
-    test_display(&[0xda, 0x03], "fiadd st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x0b], "fimul st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x13], "ficom st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x1b], "ficomp st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x23], "fisub st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x2b], "fisubr st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x33], "fidiv st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0x3b], "fidivr st(0), dword [bp + di * 1]");
-    test_display(&[0xda, 0xc3], "fcmovb st(0), st(3)");
-    test_display(&[0xda, 0xcb], "fcmove st(0), st(3)");
-    test_display(&[0xda, 0xd3], "fcmovbe st(0), st(3)");
-    test_display(&[0xda, 0xdb], "fcmovu st(0), st(3)");
-    test_display(&[0xda, 0xe9], "fucompp");
-    test_display(&[0xdb, 0x03], "fild st(0), dword [bp + di * 1]");
-    test_display(&[0xdb, 0x0b], "fisttp dword [bp + di * 1], st(0)");
-    test_display(&[0xdb, 0x13], "fist dword [bp + di * 1], st(0)");
-    test_display(&[0xdb, 0x1b], "fistp dword [bp + di * 1], st(0)");
-    test_display(&[0xdb, 0x2b], "fld st(0), mword [bp + di * 1]");
-    test_display(&[0xdb, 0x3b], "fstp mword [bp + di * 1], st(0)");
-    test_display(&[0xdb, 0xc3], "fcmovnb st(0), st(3)");
-    test_display(&[0xdb, 0xcb], "fcmovne st(0), st(3)");
-    test_display(&[0xdb, 0xd3], "fcmovnbe st(0), st(3)");
-    test_display(&[0xdb, 0xdb], "fcmovnu st(0), st(3)");
-    test_display(&[0xdb, 0xe0], "feni8087_nop");
-    test_display(&[0xdb, 0xe1], "fdisi8087_nop");
-    test_display(&[0xdb, 0xe2], "fnclex");
-    test_display(&[0xdb, 0xe3], "fninit");
-    test_display(&[0xdb, 0xe4], "fsetpm287_nop");
-    test_display(&[0xdb, 0xeb], "fucomi st(0), st(3)");
-    test_display(&[0xdb, 0xf3], "fcomi st(0), st(3)");
-    test_display(&[0xdc, 0x03], "fadd st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x0b], "fmul st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x13], "fcom st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x1b], "fcomp st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x23], "fsub st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x2b], "fsubr st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x33], "fdiv st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0x3b], "fdivr st(0), qword [bp + di * 1]");
-    test_display(&[0xdc, 0xc3], "fadd st(3), st(0)");
-    test_display(&[0xdc, 0xcb], "fmul st(3), st(0)");
-    test_display(&[0xdc, 0xd3], "fcom st(0), st(3)");
-    test_display(&[0xdc, 0xdb], "fcomp st(0), st(3)");
-    test_display(&[0xdc, 0xe3], "fsubr st(3), st(0)");
-    test_display(&[0xdc, 0xeb], "fsub st(3), st(0)");
-    test_display(&[0xdc, 0xf3], "fdivr st(3), st(0)");
-    test_display(&[0xdc, 0xfb], "fdiv st(3), st(0)");
-    test_display(&[0xdd, 0x03], "fld st(0), qword [bp + di * 1]");
-    test_display(&[0xdd, 0x0b], "fisttp qword [bp + di * 1], st(0)");
-    test_display(&[0xdd, 0x13], "fst qword [bp + di * 1], st(0)");
-    test_display(&[0xdd, 0x1b], "fstp qword [bp + di * 1], st(0)");
-    test_display(&[0xdd, 0x23], "frstor ptr [bp + di * 1]");
-    test_display(&[0xdd, 0x33], "fnsave ptr [bp + di * 1]");
-    test_display(&[0xdd, 0x3b], "fnstsw word [bp + di * 1]");
-    test_display(&[0xdd, 0xc3], "ffree st(3)");
-    test_display(&[0xdd, 0xcb], "fxch st(0), st(3)");
-    test_display(&[0xdd, 0xd3], "fst st(3), st(0)");
-    test_display(&[0xdd, 0xdb], "fstp st(3), st(0)");
-    test_display(&[0xdd, 0xe3], "fucom st(0), st(3)");
-    test_display(&[0xdd, 0xeb], "fucomp st(0), st(3)");
-    test_display(&[0xde, 0x03], "fiadd st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x0b], "fimul st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x13], "ficom st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x1b], "ficomp st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x23], "fisub st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x2b], "fisubr st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x33], "fidiv st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0x3b], "fidivr st(0), word [bp + di * 1]");
-    test_display(&[0xde, 0xc3], "faddp st(3), st(0)");
-    test_display(&[0xde, 0xcb], "fmulp st(3), st(0)");
-    test_display(&[0xde, 0xd3], "fcomp st(0), st(3)");
-    test_display(&[0xde, 0xd9], "fcompp");
-    test_display(&[0xde, 0xe3], "fsubrp st(3), st(0)");
-    test_display(&[0xde, 0xeb], "fsubp st(3), st(0)");
-    test_display(&[0xde, 0xf3], "fdivrp st(3), st(0)");
-    test_display(&[0xde, 0xfb], "fdivp st(3), st(0)");
-    test_display(&[0xdf, 0x03], "fild st(0), word [bp + di * 1]");
-    test_display(&[0xdf, 0x0b], "fisttp word [bp + di * 1], st(0)");
-    test_display(&[0xdf, 0x13], "fist word [bp + di * 1], st(0)");
-    test_display(&[0xdf, 0x1b], "fistp word [bp + di * 1], st(0)");
-    test_display(&[0xdf, 0x23], "fbld st(0), mword [bp + di * 1]");
-    test_display(&[0xdf, 0x2b], "fild st(0), qword [bp + di * 1]");
-    test_display(&[0xdf, 0x33], "fbstp mword [bp + di * 1], st(0)");
-    test_display(&[0xdf, 0x3b], "fistp qword [bp + di * 1], st(0)");
-    test_display(&[0xdf, 0xc3], "ffreep st(3)");
-    test_display(&[0xdf, 0xcb], "fxch st(0), st(3)");
-    test_display(&[0xdf, 0xd3], "fstp st(3), st(0)");
-    test_display(&[0xdf, 0xdb], "fstp st(3), st(0)");
-    test_display(&[0xdf, 0xe0], "fnstsw ax");
-    test_display(&[0xdf, 0xeb], "fucomip st(0), st(3)");
-    test_display(&[0xdf, 0xf3], "fcomip st(0), st(3)");
-    test_display(&[0xe0, 0x12], "loopnz $+0x12");
-    test_display(&[0xe1, 0x12], "loopz $+0x12");
-    test_display(&[0xe2, 0x12], "loop $+0x12");
-    test_display(&[0xe3, 0x12], "jcxz $+0x12");
-    test_display(&[0xe3, 0xf0], "jcxz $-0x10");
-    test_display(&[0x67, 0xe3, 0x12], "jecxz $+0x12");
-    test_display(&[0x67, 0xe3, 0xf0], "jecxz $-0x10");
-    test_display(&[0xe4, 0x99], "in al, 0x99");
-    test_display(&[0xe5, 0x99], "in ax, 0x99");
-    test_display(&[0xe6, 0x99], "out 0x99, al");
-    test_display(&[0xe7, 0x99], "out 0x99, ax");
-    test_display(&[0xec], "in al, dx");
-    test_display(&[0xed], "in ax, dx");
-    test_display(&[0xee], "out dx, al");
-    test_display(&[0xef], "out dx, ax");
-    test_display(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc word [bx], dx");
-    test_display(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc word [bx], dx");
-    test_display(&[0xf0, 0x31, 0x00], "lock xor word [bx + si * 1], ax");
-    test_display(&[0xf0, 0x80, 0x30, 0x00], "lock xor byte [bx + si * 1], 0x0");
-    test_display(&[0xf1], "int 0x1");
-    test_display(&[0xf2, 0x0f, 0x06], "clts");
-    test_display(&[0xf2, 0x0f, 0x07], "sysret");
-    test_display(&[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, qword [bx]");
-    test_display(&[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7");
-    test_display(&[0xf2, 0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, dword [bx + si * 1]");
-    test_display(&[0xf2, 0x0f, 0x2a, 0x0f], "cvtsi2sd xmm1, dword [bx]");
-    test_display(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi");
-    test_display(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi");
-    test_display(&[0xf2, 0x0f, 0x2c, 0x0f], "cvttsd2si ecx, qword [bx]");
-    test_display(&[0xf2, 0x0f, 0x2c, 0xcf], "cvttsd2si ecx, xmm7");
-    test_display(&[0xf2, 0x0f, 0x2d, 0x0f], "cvtsd2si ecx, qword [bx]");
-    test_display(&[0xf2, 0x0f, 0x2d, 0xcf], "cvtsd2si ecx, xmm7");
-    test_display(&[0xf2, 0x0f, 0x38, 0xf0, 0xc1], "crc32 eax, cl");
-    test_display(&[0xf2, 0x0f, 0x38, 0xf0, 0xc6], "crc32 eax, dh");
-    test_display(&[0xf2, 0x0f, 0x38, 0xf1, 0xc1], "crc32 eax, cx");
-    test_display(&[0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, si");
-    test_display(&[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x58, 0x01], "addsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x59, 0x01], "mulsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x59, 0xc8], "mulsd xmm1, xmm0");
-    test_display(&[0xf2, 0x0f, 0x5a, 0x01], "cvtsd2ss xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x5c, 0x01], "subsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x5d, 0x01], "minsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x5e, 0x01], "divsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x5f, 0x01], "maxsd xmm0, qword [bx + di * 1]");
-    test_display(&[0xf2, 0x0f, 0x70, 0xc0, 0x4e], "pshuflw xmm0, xmm0, 0x4e");
-    test_display(&[0xf2, 0x0f, 0x78, 0xf1, 0x4e, 0x76], "insertq xmm6, xmm1, 0x4e, 0x76");
-    test_display(&[0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7");
-    test_display(&[0xf2, 0x0f, 0x7c, 0x0f], "haddps xmm1, xmmword [bx]");
-    test_display(&[0xf2, 0x0f, 0x7c, 0xcf], "haddps xmm1, xmm7");
-    test_display(&[0xf2, 0x0f, 0x7d, 0x0f], "hsubps xmm1, xmmword [bx]");
-    test_display(&[0xf2, 0x0f, 0x7d, 0xcf], "hsubps xmm1, xmm7");
-    test_display(&[0xf2, 0x0f, 0xae, 0xf1], "umwait ecx");
-    test_display(&[0xf2, 0x0f, 0xbc, 0xd3], "bsf dx, bx");
-    test_display(&[0xf2, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0xf2, 0x0f, 0xc1, 0xcc], "xadd sp, cx");
-    test_display(&[0xf2, 0x0f, 0xc2, 0x03, 0x08], "cmpsd xmm0, qword [bp + di * 1], 0x8");
-    test_display(&[0xf2, 0x0f, 0xc2, 0xc3, 0x08], "cmpsd xmm0, xmm3, 0x8");
-    test_display(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]");
-    test_display(&[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, xmmword [bx]");
-    test_display(&[0xf2, 0x0f, 0xd0, 0xcf], "addsubps xmm1, xmm7");
-    test_display(&[0xf2, 0x0f, 0xd6, 0xc3], "movdq2q mm0, xmm3");
-    test_display(&[0xf2, 0x0f, 0xf0, 0x0f], "lddqu xmm1, xmmword [bx]");
-    test_display(&[0xf2, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
-    test_display(&[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0], "movsd xmm0, xmm0");
-    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c], "enqcmd ax, zmmword ss:[bp + di * 1 + 0x1c09]");
-    test_display(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp qword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x01, 0xe8], "setssbsy");
-    test_display(&[0xf3, 0x0f, 0x01, 0xea], "saveprevssp");
-    test_display(&[0xf3, 0x0f, 0x12, 0x0f], "movsldup xmm1, xmmword [bx]");
-    test_display(&[0xf3, 0x0f, 0x12, 0xcf], "movsldup xmm1, xmm7");
-    test_display(&[0xf3, 0x0f, 0x16, 0x0f], "movshdup xmm1, xmmword [bx]");
-    test_display(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7");
-    test_display(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7");
-    test_display(&[0xf3, 0x0f, 0x1e, 0xfa], "endbr64");
-    test_display(&[0xf3, 0x0f, 0x1e, 0xfb], "endbr32");
-    test_display(&[0xf3, 0x0f, 0x1e, 0xfc], "nop sp, di");
-    test_display(&[0xf3, 0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, dword [bx + si * 1]");
-    test_display(&[0xf3, 0x0f, 0x2a, 0x01], "cvtsi2ss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x2a, 0xc1], "cvtsi2ss xmm0, ecx");
-    test_display(&[0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi");
-    test_display(&[0xf3, 0x0f, 0x2c, 0x01], "cvttss2si eax, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x2c, 0xc1], "cvttss2si eax, xmm1");
-    test_display(&[0xf3, 0x0f, 0x2d, 0x01], "cvtss2si eax, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x2d, 0xc1], "cvtss2si eax, xmm1");
-    test_display(&[0xf3, 0x0f, 0x38, 0xdd, 0x03], "aesdec128kl xmm0, m384b [bp + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x38, 0xf6, 0xc1], "adox eax, ecx");
-    test_display(&[0xf3, 0x0f, 0x51, 0x01], "sqrtss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x52, 0x01], "rsqrtss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x53, 0x01], "rcpss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x53, 0xc1], "rcpss xmm0, xmm1");
-    test_display(&[0xf3, 0x0f, 0x58, 0x01], "addss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x59, 0x01], "mulss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x59, 0xc8], "mulss xmm1, xmm0");
-    test_display(&[0xf3, 0x0f, 0x5a, 0x01], "cvtss2sd xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x5b, 0x01], "cvttps2dq xmm0, xmmword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x5c, 0x01], "subss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x5d, 0x01], "minss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x5e, 0x01], "divss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x5f, 0x01], "maxss xmm0, dword [bx + di * 1]");
-    test_display(&[0xf3, 0x0f, 0x6f, 0x07], "movdqu xmm0, xmmword [bx]");
-    test_display(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e");
-    test_display(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e");
-    test_display(&[0xf3, 0x0f, 0x7e, 0xc1], "movq xmm0, xmm1");
-    test_display(&[0xf3, 0x0f, 0x7f, 0x45, 0x00], "movdqu xmmword [di], xmm0");
-    test_display(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy qword [bx + si * 1]");
-    test_display(&[0xf3, 0x0f, 0xae, 0xe6], "ptwrite esi");
-    test_display(&[0xf3, 0x0f, 0xae, 0xe9], "incssp ecx");
-    test_display(&[0xf3, 0x0f, 0xae, 0xf1], "umonitor cx");
-    test_display(&[0x67, 0xf3, 0x0f, 0xae, 0xf1], "umonitor ecx");
-    test_display(&[0xf3, 0x0f, 0xb8, 0xc1], "popcnt ax, cx");
-    test_display(&[0xf3, 0x0f, 0xb8, 0xc1], "popcnt ax, cx");
-    test_display(&[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt dx, bx");
-    test_display(&[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt dx, bx");
-    test_display(&[0xf3, 0x0f, 0xbc, 0xd7], "tzcnt dx, di");
-    test_display(&[0xf3, 0x0f, 0xbd, 0xc1], "lzcnt ax, cx");
-    test_display(&[0xf3, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
-    test_display(&[0xf3, 0x0f, 0xc1, 0xcc], "xadd sp, cx");
-    test_display(&[0xf3, 0x0f, 0xc2, 0x03, 0x08], "cmpss xmm0, dword [bp + di * 1], 0x8");
-    test_display(&[0xf3, 0x0f, 0xc2, 0xc3, 0x08], "cmpss xmm0, xmm3, 0x8");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [bp + di * 1]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon qword [bx]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0xfd], "rdpid ebp");
-    test_display(&[0xf3, 0x0f, 0xd6, 0xc3], "movq2dq xmm0, mm3");
-    test_display(&[0xf3, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
-    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp qword [bx + di * 1]");
-    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xe8], "setssbsy");
-    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xea], "saveprevssp");
-    test_display(&[0xf3, 0xa5], "rep movs word es:[di], word ds:[si]");
-    test_display(&[0x67, 0xf3, 0xa5], "rep movs word es:[edi], word ds:[esi]");
-    test_display(&[0x66, 0x67, 0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]");
-    test_display(&[0xf3, 0xab], "rep stos word es:[di], ax");
-    test_display(&[0xf5], "cmc");
-    test_display(&[0xf6, 0x28], "imul byte [bx + si * 1]");
-    test_display(&[0xf6, 0xc2, 0x18], "test dl, 0x18");
-    test_display(&[0xf6, 0xe8], "imul al");
-    test_display(&[0xfe, 0x00], "inc byte [bx + si * 1]");
-    test_display(&[0xfe, 0x08], "dec byte [bx + si * 1]");
-    test_display(&[0xff, 0x00], "inc word [bx + si * 1]");
-    test_display(&[0xff, 0x08], "dec word [bx + si * 1]");
-    test_display(&[0xff, 0x15], "call word [di]");
-    test_display(&[0x67, 0xff, 0x15, 0x12, 0x12, 0x12, 0x12], "call word [0x12121212]");
-    // note that this call only writes two bytes, and only moves sp by two.
-    test_display(&[0x66, 0xff, 0x15], "call dword [di]");
-    test_display(&[0xff, 0x18], "callf dword [bx + si * 1]");
-    test_display(&[0xff, 0x24], "jmp word [si]");
-    test_display(&[0xff, 0x75, 0x08], "push word [di + 0x8]");
-    test_display(&[0xff, 0x75, 0xb8], "push word [di - 0x48]");
-    test_display(&[0xff, 0xe0], "jmp ax");
-    test_display(&[0xff, 0xd0], "call ax");
+mod real_mode {
+    use crate::real_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0x00, 0xcc], "add ah, cl"),
+        testcase!(&[0x03, 0x0b], "add cx, word [bp + di * 1]"),
+        testcase!(&[0x06], "push es"),
+        testcase!(&[0x07], "pop es"),
+        testcase!(&[0x0e], "push cs"),
+        testcase!(&[0x0f, 0x01, 0x38], "invlpg byte [bx + si * 1]"),
+        testcase!(&[0x0f, 0x01, 0x3f], "invlpg byte [bx]"),
+        testcase!(&[0x0f, 0x01, 0x40, 0xff], "sgdt far [bx + si * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x41, 0xff], "sgdt far [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x49, 0xff], "sidt far [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x51, 0xff], "lgdt far [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x59, 0xff], "lidt far [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x61, 0xff], "smsw word [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x71, 0xff], "lmsw word [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0x79, 0xff], "invlpg byte [bx + di * 1 - 0x1]"),
+        testcase!(&[0x0f, 0x01, 0xc0], "enclv"),
+        testcase!(&[0x0f, 0x01, 0xc1], "vmcall"),
+        testcase!(&[0x0f, 0x01, 0xc2], "vmlaunch"),
+        testcase!(&[0x0f, 0x01, 0xc3], "vmresume"),
+        testcase!(&[0x0f, 0x01, 0xc4], "vmxoff"),
+        testcase!(&[0x0f, 0x01, 0xc5], "pconfig"),
+        testcase!(&[0x0f, 0x01, 0xc8], "monitor"),
+        testcase!(&[0x0f, 0x01, 0xc8], "monitor"),
+        testcase!(&[0x0f, 0x01, 0xc9], "mwait"),
+        testcase!(&[0x0f, 0x01, 0xc9], "mwait"),
+        testcase!(&[0x0f, 0x01, 0xca], "clac"),
+        testcase!(&[0x0f, 0x01, 0xcb], "stac"),
+        testcase!(&[0x0f, 0x01, 0xcf], "encls"),
+        testcase!(&[0x0f, 0x01, 0xd0], "xgetbv"),
+        testcase!(&[0x0f, 0x01, 0xd1], "xsetbv"),
+        testcase!(&[0x0f, 0x01, 0xd4], "vmfunc"),
+        testcase!(&[0x0f, 0x01, 0xd5], "xend"),
+        testcase!(&[0x0f, 0x01, 0xd6], "xtest"),
+        testcase!(&[0x0f, 0x01, 0xd7], "enclu"),
+        testcase!(&[0x0f, 0x01, 0xd8], "vmrun ax"),
+        testcase!(&[0x0f, 0x01, 0xd9], "vmmcall"),
+        testcase!(&[0x0f, 0x01, 0xda], "vmload ax"),
+        testcase!(&[0x0f, 0x01, 0xdb], "vmsave ax"),
+        testcase!(&[0x0f, 0x01, 0xdc], "stgi"),
+        testcase!(&[0x0f, 0x01, 0xdd], "clgi"),
+        testcase!(&[0x0f, 0x01, 0xde], "skinit eax"),
+        testcase!(&[0x0f, 0x01, 0xdf], "invlpga ax, ecx"),
+        testcase!(&[0x0f, 0x01, 0xe0], "smsw ax"),
+        testcase!(&[0x0f, 0x01, 0xe1], "smsw cx"),
+        testcase!(&[0x0f, 0x01, 0xe2], "smsw dx"),
+        testcase!(&[0x0f, 0x01, 0xe3], "smsw bx"),
+        testcase!(&[0x0f, 0x01, 0xe4], "smsw sp"),
+        testcase!(&[0x0f, 0x01, 0xe5], "smsw bp"),
+        testcase!(&[0x0f, 0x01, 0xe6], "smsw si"),
+        testcase!(&[0x0f, 0x01, 0xe7], "smsw di"),
+        testcase!(&[0x0f, 0x01, 0xee], "rdpkru"),
+        testcase!(&[0x0f, 0x01, 0xef], "wrpkru"),
+        testcase!(&[0x0f, 0x01, 0xf0], "lmsw ax"),
+        testcase!(&[0x0f, 0x01, 0xf1], "lmsw cx"),
+        testcase!(&[0x0f, 0x01, 0xf2], "lmsw dx"),
+        testcase!(&[0x0f, 0x01, 0xf3], "lmsw bx"),
+        testcase!(&[0x0f, 0x01, 0xf4], "lmsw sp"),
+        testcase!(&[0x0f, 0x01, 0xf5], "lmsw bp"),
+        testcase!(&[0x0f, 0x01, 0xf6], "lmsw si"),
+        testcase!(&[0x0f, 0x01, 0xf7], "lmsw di"),
+        testcase!(&[0x0f, 0x01, 0xf9], "rdtscp"),
+        testcase!(&[0x0f, 0x01, 0xfa], "monitorx"),
+        testcase!(&[0x0f, 0x01, 0xfb], "mwaitx"),
+        testcase!(&[0x0f, 0x01, 0xfc], "clzero"),
+        testcase!(&[0x0f, 0x01, 0xfd], "rdpru ecx"),
+        testcase!(&[0x0f, 0x02, 0x01], "lar ax, word [bx + di * 1]"),
+        testcase!(&[0x0f, 0x02, 0xc1], "lar ax, cx"),
+        testcase!(&[0x0f, 0x03, 0x01], "lsl ax, word [bx + di * 1]"),
+        testcase!(&[0x0f, 0x03, 0xc1], "lsl ax, cx"),
+        testcase!(&[0x0f, 0x05], "syscall"),
+        testcase!(&[0x0f, 0x06], "clts"),
+        testcase!(&[0x0f, 0x07], "sysret"),
+        testcase!(&[0x0f, 0x0d, 0x08], "prefetchw zmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x0d, 0x00], "nop zmmword [bx + si * 1]"),
+        testcase!(invalid: &[0x0f, 0x0d, 0xc0]),
+        testcase!(&[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6"),
+        testcase!(&[0x0f, 0x0f, 0xe0, 0x8a], "pfnacc mm4, mm0"),
+        testcase!(&[0x0f, 0x12, 0x0f], "movlps xmm1, qword [bx]"),
+        testcase!(&[0x0f, 0x12, 0xc0], "movhlps xmm0, xmm0"),
+        testcase!(&[0x0f, 0x12, 0xcf], "movhlps xmm1, xmm7"),
+        testcase!(&[0x0f, 0x13, 0x00], "movlps qword [bx + si * 1], xmm0"),
+        testcase!(&[0x0f, 0x14, 0x08], "unpcklps xmm1, xmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x15, 0x08], "unpckhps xmm1, xmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x16, 0x0f], "movhps xmm1, qword [bx]"),
+        testcase!(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0"),
+        testcase!(&[0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7"),
+        testcase!(&[0x0f, 0x17, 0x00], "movhps qword [bx + si * 1], xmm0"),
+        testcase!(&[0x0f, 0x18, 0x00], "prefetchnta zmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x18, 0x08], "prefetcht0 zmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x18, 0x10], "prefetcht1 zmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x18, 0x18], "prefetcht2 zmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x18, 0x20], "nop zmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x18, 0xc0], "nop ax"),
+        testcase!(&[0x0f, 0x18, 0xcc], "nop sp"),
+        testcase!(&[0x0f, 0x19, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x1a, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x1b, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x1c, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x1d, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x1e, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x1f, 0x20], "nop word [bx + si * 1]"),
+        testcase!(&[0x0f, 0x20, 0xc0], "mov eax, cr0"),
+        testcase!(&[0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0x0f, 0x22, 0xc0], "mov cr0, eax"),
+        testcase!(&[0x0f, 0x22, 0xc7], "mov cr0, edi"),
+        testcase!(&[0x0f, 0x23, 0xc8], "mov dr1, eax"),
+        testcase!(&[0x0f, 0x23, 0xcf], "mov dr1, edi"),
+        testcase!(&[0x0f, 0x28, 0x00], "movaps xmm0, xmmword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x28, 0xd0], "movaps xmm2, xmm0"),
+        testcase!(&[0x0f, 0x29, 0x00], "movaps xmmword [bx + si * 1], xmm0"),
+        testcase!(&[0x0f, 0x2a, 0x00], "cvtpi2ps xmm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x2a, 0xcf], "cvtpi2ps xmm1, mm7"),
+        testcase!(&[0x0f, 0x2b, 0x00], "movntps xmmword [bx + si * 1], xmm0"),
+        testcase!(&[0x0f, 0x2c, 0xcf], "cvttps2pi mm1, xmm7"),
+        testcase!(&[0x0f, 0x2e, 0x00], "ucomiss xmm0, dword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x2f, 0x00], "comiss xmm0, dword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x30], "wrmsr"),
+        testcase!(&[0x0f, 0x31], "rdtsc"),
+        testcase!(&[0x0f, 0x32], "rdmsr"),
+        testcase!(&[0x0f, 0x33], "rdpmc"),
+        testcase!(&[0x0f, 0x34], "sysenter"),
+        testcase!(&[0x0f, 0x35], "sysexit"),
+        testcase!(&[0x0f, 0x37], "getsec"),
+        testcase!(&[0x0f, 0x38, 0x00, 0xda], "pshufb mm3, mm2"),
+        testcase!(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x0f, 0x38, 0xcb, 0x12], "sha256rnds2 xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x0f, 0x38, 0xcc, 0x12], "sha256msg1 xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x0f, 0x38, 0xcd, 0x12], "sha256msg2 xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x0f, 0x3a, 0x0f, 0xc1, 0x23], "palignr mm0, mm1, 0x23"),
+        testcase!(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, xmmword [bp + si * 1], 0x40"),
+        testcase!(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, xmmword [bp + si * 1], 0xff"),
+        // with astonishing dismay: 66-prefixed sha1rnds4 is #UD only in 32-bit and 16-bit mode.
+        testcase!(invalid: &[0x66, 0x0f, 0x3a, 0xcc, 0x12, 0xff]),
+        testcase!(&[0x0f, 0x43, 0xec], "cmovnb bp, sp"),
+        testcase!(&[0x0f, 0x50, 0xc1], "movmskps eax, xmm1"),
+        testcase!(&[0x0f, 0x51, 0x01], "sqrtps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x52, 0x01], "rsqrtps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x53, 0x01], "rcpps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x54, 0x01], "andps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x55, 0x01], "andnps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x56, 0x01], "orps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x57, 0x01], "xorps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x58, 0x01], "addps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x59, 0x01], "mulps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5a, 0x01], "cvtps2pd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5c, 0x01], "subps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5d, 0x01], "minps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5e, 0x01], "divps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x5f, 0x01], "maxps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x0f, 0x60, 0x00], "punpcklbw mm0, dword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x60, 0xc2], "punpcklbw mm0, mm2"),
+        testcase!(&[0x0f, 0x61, 0x00], "punpcklwd mm0, dword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x61, 0xc2], "punpcklwd mm0, mm2"),
+        testcase!(&[0x0f, 0x62, 0x00], "punpckldq mm0, dword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x62, 0xc2], "punpckldq mm0, mm2"),
+        testcase!(&[0x0f, 0x63, 0x00], "packsswb mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x63, 0xc2], "packsswb mm0, mm2"),
+        testcase!(&[0x0f, 0x64, 0x00], "pcmpgtb mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x64, 0xc2], "pcmpgtb mm0, mm2"),
+        testcase!(&[0x0f, 0x65, 0x00], "pcmpgtw mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x65, 0xc2], "pcmpgtw mm0, mm2"),
+        testcase!(&[0x0f, 0x66, 0x00], "pcmpgtd mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x66, 0xc2], "pcmpgtd mm0, mm2"),
+        testcase!(&[0x0f, 0x67, 0x00], "packuswb mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x67, 0xc2], "packuswb mm0, mm2"),
+        testcase!(&[0x0f, 0x68, 0x00], "punpckhbw mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x68, 0xc2], "punpckhbw mm0, mm2"),
+        testcase!(&[0x0f, 0x69, 0x00], "punpckhwd mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x69, 0xc2], "punpckhwd mm0, mm2"),
+        testcase!(&[0x0f, 0x6a, 0x00], "punpckhdq mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x6a, 0xc2], "punpckhdq mm0, mm2"),
+        testcase!(&[0x0f, 0x6b, 0x00], "packssdw mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x6b, 0xc2], "packssdw mm0, mm2"),
+        testcase!(&[0x0f, 0x6e, 0x00], "movd mm0, dword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x6e, 0xc2], "movd mm0, edx"),
+        testcase!(&[0x0f, 0x6f, 0x00], "movq mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0x6f, 0xc2], "movq mm0, mm2"),
+        testcase!(&[0x0f, 0x6f, 0xe9], "movq mm5, mm1"),
+        testcase!(&[0x0f, 0x6f, 0xfb], "movq mm7, mm3"),
+        testcase!(&[0x0f, 0x70, 0x00, 0x7f], "pshufw mm0, qword [bx + si * 1], 0x7f"),
+        testcase!(&[0x0f, 0x71, 0xd0, 0x7f], "psrlw mm0, 0x7f"),
+        testcase!(&[0x0f, 0x71, 0xe0, 0x7f], "psraw mm0, 0x7f"),
+        testcase!(&[0x0f, 0x71, 0xf0, 0x7f], "psllw mm0, 0x7f"),
+        testcase!(&[0x0f, 0x72, 0xd0, 0x7f], "psrld mm0, 0x7f"),
+        testcase!(&[0x0f, 0x72, 0xe0, 0x7f], "psrad mm0, 0x7f"),
+        testcase!(&[0x0f, 0x72, 0xf0, 0x7f], "pslld mm0, 0x7f"),
+        testcase!(&[0x0f, 0x73, 0xd0, 0x7f], "psrlq mm0, 0x7f"),
+        testcase!(&[0x0f, 0x73, 0xf0, 0x7f], "psllq mm0, 0x7f"),
+        testcase!(&[0x0f, 0x74, 0xc2], "pcmpeqb mm0, mm2"),
+        testcase!(&[0x0f, 0x75, 0xc2], "pcmpeqw mm0, mm2"),
+        testcase!(&[0x0f, 0x76, 0xc2], "pcmpeqd mm0, mm2"),
+        testcase!(&[0x0f, 0x78, 0x0b], "vmread dword [bp + di * 1], ecx"),
+        testcase!(&[0x0f, 0x78, 0xc4], "vmread esp, eax"),
+        testcase!(&[0x0f, 0x79, 0x0b], "vmwrite ecx, dword [bp + di * 1]"),
+        testcase!(&[0x0f, 0x79, 0xc5], "vmwrite eax, ebp"),
+        testcase!(&[0x0f, 0x7e, 0xcf], "movd edi, mm1"),
+        testcase!(&[0x0f, 0x7f, 0x0f], "movq qword [bx], mm1"),
+        testcase!(&[0x0f, 0x7f, 0xcf], "movq mm7, mm1"),
+        testcase!(&[0x0f, 0x86, 0x8b, 0x01], "jna $+0x18b"),
+        testcase!(&[0x0f, 0x97, 0x00], "seta byte [bx + si * 1]"),
+        testcase!(&[0x0f, 0x97, 0x08], "seta byte [bx + si * 1]"),
+        testcase!(&[0x0f, 0x97, 0xc0], "seta al"),
+        testcase!(&[0x0f, 0x97, 0xc8], "seta al"),
+        testcase!(&[0x0f, 0xa0], "push fs"),
+        testcase!(&[0x0f, 0xa1], "pop fs"),
+        testcase!(&[0x0f, 0xa2], "cpuid"),
+        testcase!(&[0x0f, 0xa3, 0xd0], "bt ax, dx"),
+        testcase!(&[0x0f, 0xa4, 0xc0, 0x11], "shld ax, ax, 0x11"),
+        testcase!(&[0x0f, 0xa5, 0xc0], "shld ax, ax, cl"),
+        testcase!(&[0x0f, 0xa5, 0xc9], "shld cx, cx, cl"),
+        testcase!(&[0x0f, 0xab, 0xd0], "bts ax, dx"),
+        testcase!(&[0x0f, 0xac, 0xc0, 0x11], "shrd ax, ax, 0x11"),
+        testcase!(&[0x0f, 0xad, 0xc9], "shrd cx, cx, cl"),
+        testcase!(&[0x0f, 0xae, 0x04], "fxsave ptr [si]"),
+        testcase!(&[0x0f, 0xae, 0x0c], "fxrstor ptr [si]"),
+        testcase!(&[0x0f, 0xae, 0x14], "ldmxcsr dword [si]"),
+        testcase!(&[0x0f, 0xae, 0x1c], "stmxcsr dword [si]"),
+        testcase!(&[0x0f, 0xae, 0x24], "xsave ptr [si]"),
+        testcase!(&[0x0f, 0xae, 0x2c], "xrstor ptr [si]"),
+        testcase!(&[0x0f, 0xae, 0x34], "xsaveopt ptr [si]"),
+        testcase!(&[0x0f, 0xae, 0x3c], "clflush zmmword [si]"),
+        testcase!(&[0x0f, 0xaf, 0xc2], "imul ax, dx"),
+        testcase!(&[0x0f, 0xb3, 0xd0], "btr ax, dx"),
+        testcase!(&[0x0f, 0xbb, 0x17], "btc word [bx], dx"),
+        testcase!(&[0x0f, 0xbc, 0xd3], "bsf dx, bx"),
+        testcase!(&[0x0f, 0xbc, 0xd3], "bsf dx, bx"),
+        testcase!(&[0x0f, 0xbe, 0x83, 0xb4, 0x00], "movsx ax, byte [bp + di * 1 + 0xb4]"),
+        testcase!(&[0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0x0f, 0xc1, 0xcc], "xadd sp, cx"),
+        testcase!(&[0x0f, 0xc3, 0x03], "movnti dword [bp + di * 1], eax"),
+        testcase!(&[0x0f, 0xc4, 0x00, 0x14], "pinsrw mm0, word [bx + si * 1], 0x14"),
+        testcase!(&[0x0f, 0xc4, 0xc0, 0x14], "pinsrw mm0, eax, 0x14"),
+        testcase!(&[0x0f, 0xc5, 0xd1, 0x00], "pextrw edx, mm1, 0x0"),
+        testcase!(&[0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]"),
+        testcase!(&[0x0f, 0xc7, 0x37], "vmptrld qword [bx]"),
+        testcase!(&[0x0f, 0xc7, 0x3f], "vmptrst qword [bx]"),
+        testcase!(&[0x0f, 0xc7, 0x5c, 0x24], "xrstors ptr [si + 0x24]"),
+        testcase!(&[0x0f, 0xc7, 0x64, 0x24], "xsavec ptr [si + 0x24]"),
+        testcase!(&[0x0f, 0xc7, 0x6c, 0x24], "xsaves ptr [si + 0x24]"),
+        testcase!(&[0x0f, 0xc7, 0x74, 0x24], "vmptrld qword [si + 0x24]"),
+        testcase!(&[0x0f, 0xc7, 0x7c, 0x24], "vmptrst qword [si + 0x24]"),
+        testcase!(&[0x0f, 0xc7, 0xf5], "rdrand bp"),
+        testcase!(&[0x0f, 0xc7, 0xfd], "rdseed bp"),
+        testcase!(&[0x0f, 0xd1, 0x00], "psrlw mm0, qword [bx + si * 1]"),
+        testcase!(&[0x0f, 0xd1, 0xcf], "psrlw mm1, mm7"),
+        testcase!(&[0x0f, 0xd7, 0xcf], "pmovmskb ecx, mm7"),
+        testcase!(&[0x0f, 0xd8, 0xc2], "psubusb mm0, mm2"),
+        testcase!(&[0x0f, 0xd9, 0xc2], "psubusw mm0, mm2"),
+        testcase!(&[0x0f, 0xda, 0xc2], "pminub mm0, mm2"),
+        testcase!(&[0x0f, 0xdb, 0xc2], "pand mm0, mm2"),
+        testcase!(&[0x0f, 0xdc, 0xc2], "paddusb mm0, mm2"),
+        testcase!(&[0x0f, 0xdd, 0xc2], "paddusw mm0, mm2"),
+        testcase!(&[0x0f, 0xde, 0xc2], "pmaxub mm0, mm2"),
+        testcase!(&[0x0f, 0xdf, 0xc2], "pandn mm0, mm2"),
+        testcase!(&[0x0f, 0xe5, 0x3d], "pmulhw mm7, qword [di]"),
+        testcase!(&[0x0f, 0xe7, 0x03], "movntq qword [bp + di * 1], mm0"),
+        testcase!(&[0x0f, 0xe8, 0xc2], "psubsb mm0, mm2"),
+        testcase!(&[0x0f, 0xe9, 0xc2], "psubsw mm0, mm2"),
+        testcase!(&[0x0f, 0xea, 0xc2], "pminsw mm0, mm2"),
+        testcase!(&[0x0f, 0xeb, 0xc2], "por mm0, mm2"),
+        testcase!(&[0x0f, 0xec, 0xc2], "paddsb mm0, mm2"),
+        testcase!(&[0x0f, 0xed, 0xc2], "paddsw mm0, mm2"),
+        testcase!(&[0x0f, 0xee, 0xc2], "pmaxsw mm0, mm2"),
+        testcase!(&[0x0f, 0xef, 0xc2], "pxor mm0, mm2"),
+        testcase!(&[0x0f, 0xf1, 0x02], "psllw mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf1, 0xc2], "psllw mm0, mm2"),
+        testcase!(&[0x0f, 0xf2, 0x02], "pslld mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf2, 0xc2], "pslld mm0, mm2"),
+        testcase!(&[0x0f, 0xf3, 0x02], "psllq mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf3, 0xc2], "psllq mm0, mm2"),
+        testcase!(&[0x0f, 0xf4, 0x02], "pmuludq mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf4, 0xc2], "pmuludq mm0, mm2"),
+        testcase!(&[0x0f, 0xf5, 0x02], "pmaddwd mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf5, 0xc2], "pmaddwd mm0, mm2"),
+        testcase!(&[0x0f, 0xf6, 0x02], "psadbw mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf6, 0xc2], "psadbw mm0, mm2"),
+        testcase!(&[0x0f, 0xf7, 0xc1], "maskmovq mm0, mm1"),
+        testcase!(&[0x0f, 0xf8, 0x02], "psubb mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf8, 0xc2], "psubb mm0, mm2"),
+        testcase!(&[0x0f, 0xf9, 0x02], "psubw mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xf9, 0xc2], "psubw mm0, mm2"),
+        testcase!(&[0x0f, 0xfa, 0x02], "psubd mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xfa, 0xc2], "psubd mm0, mm2"),
+        testcase!(&[0x0f, 0xfb, 0x02], "psubq mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xfb, 0xc2], "psubq mm0, mm2"),
+        testcase!(&[0x0f, 0xfc, 0x02], "paddb mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xfc, 0xc2], "paddb mm0, mm2"),
+        testcase!(&[0x0f, 0xfd, 0x02], "paddw mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xfd, 0xc2], "paddw mm0, mm2"),
+        testcase!(&[0x0f, 0xfd, 0xd2], "paddw mm2, mm2"),
+        testcase!(&[0x0f, 0xfe, 0x02], "paddd mm0, qword [bp + si * 1]"),
+        testcase!(&[0x0f, 0xfe, 0xc2], "paddd mm0, mm2"),
+        testcase!(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, dword [bp + di * 1 - 0x54]"),
+        testcase!(&[0x16], "push ss"),
+        testcase!(&[0x17], "pop ss"),
+        testcase!(&[0x1e], "push ds"),
+        testcase!(&[0x1f], "pop ds"),
+        testcase!(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, qword ss:[bx + si * 1 - 0x5]"),
+        testcase!(&[0x26, 0x66, 0x67, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm4"),
+        testcase!(&[0x27], "daa"),
+        testcase!(&[0x29, 0xc8], "sub ax, cx"),
+        testcase!(&[0x2e, 0x36, 0x0f, 0x18, 0xe7], "nop di"),
+        testcase!(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, xmmword [bx + si * 1], 0x48"),
+        testcase!(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, xmmword cs:[bx + si * 1 + 0x2d], 0x57"),
+        testcase!(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1], "insertps xmm1, dword fs:[bp + di * 1], -0x4f"),
+        testcase!(&[0x2f], "das"),
+        testcase!(&[0x31, 0xc9], "xor cx, cx"),
+        testcase!(&[0x33, 0x04], "xor ax, word [si]"),
+        testcase!(&[0x33, 0x05], "xor ax, word [di]"),
+        testcase!(&[0x33, 0x08], "xor cx, word [bx + si * 1]"),
+        testcase!(&[0x33, 0x20], "xor sp, word [bx + si * 1]"),
+        testcase!(&[0x33, 0x34], "xor si, word [si]"),
+        testcase!(&[0x33, 0x41, 0x23], "xor ax, word [bx + di * 1 + 0x23]"),
+        testcase!(&[0x33, 0x81, 0x23, 0x01], "xor ax, word [bx + di * 1 + 0x123]"),
+        testcase!(&[0x33, 0x84, 0xa5, 0x11], "xor ax, word [si + 0x11a5]"),
+        testcase!(&[0x33, 0xb4, 0x25, 0x20], "xor si, word [si + 0x2025]"),
+        testcase!(&[0x30, 0x40, 0x50], "xor byte [bx + si * 1 + 0x50], al"),
+        testcase!(&[0x33, 0xc0], "xor ax, ax"),
+        testcase!(&[0x33, 0xc1], "xor ax, cx"),
+        testcase!(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08], "movdir64b bp, zmmword es:[di + 0x80b]"),
+        testcase!(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, zmmword es:[ebp + 0x729080b]"),
+        testcase!(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[di + 0x3e], edx"),
+        testcase!(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e], "movdiri dword cs:[di + 0x3e], edx"),
+        testcase!(&[0x37], "aaa"),
+        testcase!(&[0x39, 0xc6], "cmp si, ax"),
+        testcase!(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss dword [bp + di * 1], esp"),
+        testcase!(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds si, zmmword fs:[bp + si * 1 + 0x54]"),
+        testcase!(&[0x3f], "aas"),
+        testcase!(&[0x40], "inc ax"),
+        testcase!(&[0x41], "inc cx"),
+        testcase!(&[0x47], "inc di"),
+        testcase!(&[0x48], "dec ax"),
+        testcase!(&[0x4f], "dec di"),
+        testcase!(&[0x5b], "pop bx"),
+        testcase!(&[0x5e], "pop si"),
+        testcase!(&[0x60], "pusha"),
+        testcase!(&[0x61], "popa"),
+        testcase!(&[0x66, 0x60], "pushad"),
+        testcase!(&[0x66, 0x61], "popad"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x10, 0x0a], "vmovups xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x10, 0x4a, 0x01], "vmovups xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x10, 0xca], "vmovups xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x11, 0x0a], "vmovups xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x11, 0x4a, 0x01], "vmovups xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x11, 0xca], "vmovups xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x12, 0x0a], "vmovlps xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x12, 0x4a, 0x01], "vmovlps xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x12, 0xca], "vmovhlps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x13, 0x0a], "vmovlps qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x13, 0x4a, 0x01], "vmovlps qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x14, 0x0a], "vunpcklps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x14, 0x4a, 0x01], "vunpcklps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x14, 0xca], "vunpcklps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x15, 0x0a], "vunpckhps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x15, 0x4a, 0x01], "vunpckhps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x15, 0xca], "vunpckhps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x16, 0x0a], "vmovhps xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x16, 0x4a, 0x01], "vmovhps xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x16, 0xca], "vmovlhps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x17, 0x0a], "vmovhps qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x17, 0x4a, 0x01], "vmovhps qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x28, 0x0a], "vmovaps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x28, 0x4a, 0x01], "vmovaps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x28, 0xca], "vmovaps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x29, 0x0a], "vmovaps xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x29, 0x4a, 0x01], "vmovaps xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x29, 0xca], "vmovaps xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x2b, 0x0a], "vmovntps xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x2b, 0x4a, 0x01], "vmovntps xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x51, 0x0a], "vsqrtps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x51, 0x4a, 0x01], "vsqrtps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x51, 0xca], "vsqrtps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x54, 0x0a], "vandps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x54, 0x4a, 0x01], "vandps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x54, 0xca], "vandps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x55, 0x0a], "vandnps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x55, 0x4a, 0x01], "vandnps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x55, 0xca], "vandnps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x56, 0x0a], "vorps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x56, 0x4a, 0x01], "vorps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x56, 0xca], "vorps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x57, 0x0a], "vxorps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x57, 0x4a, 0x01], "vxorps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x57, 0xca], "vxorps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x58, 0x0a], "vaddps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x58, 0x4a, 0x01], "vaddps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x58, 0xca], "vaddps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x59, 0x0a], "vmulps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x59, 0x4a, 0x01], "vmulps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x59, 0xca], "vmulps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5a, 0x0a], "vcvtps2pd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5a, 0xca], "vcvtps2pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5b, 0x0a], "vcvtdq2ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5b, 0xca], "vcvtdq2ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5c, 0x0a], "vsubps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5c, 0x4a, 0x01], "vsubps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5c, 0xca], "vsubps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5d, 0x0a], "vminps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5d, 0x4a, 0x01], "vminps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5d, 0xca], "vminps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5e, 0x0a], "vdivps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5e, 0x4a, 0x01], "vdivps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5e, 0xca], "vdivps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5f, 0x0a], "vmaxps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5f, 0x4a, 0x01], "vmaxps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x5f, 0xca], "vmaxps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x78, 0x0a], "vcvttps2udq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x78, 0xca], "vcvttps2udq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x79, 0x0a], "vcvtps2udq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0x79, 0xca], "vcvtps2udq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0xc2, 0x0a, 0xcc], "vcmpps k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0xc2, 0xca, 0xcc], "vcmpps k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0xc6, 0x0a, 0xcc], "vshufps xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x08, 0xc6, 0xca, 0xcc], "vshufps xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x10, 0x0a], "vmovups xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x10, 0x4a, 0x01], "vmovups xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x10, 0xca], "vmovups xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x11, 0x0a], "vmovups xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x11, 0x4a, 0x01], "vmovups xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x11, 0xca], "vmovups xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x14, 0x0a], "vunpcklps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x14, 0xca], "vunpcklps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x15, 0x0a], "vunpckhps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x15, 0xca], "vunpckhps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x28, 0x0a], "vmovaps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x28, 0x4a, 0x01], "vmovaps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x28, 0xca], "vmovaps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x29, 0x0a], "vmovaps xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x29, 0x4a, 0x01], "vmovaps xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x29, 0xca], "vmovaps xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x51, 0x0a], "vsqrtps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x51, 0xca], "vsqrtps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x54, 0x0a], "vandps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x54, 0xca], "vandps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x55, 0x0a], "vandnps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x55, 0xca], "vandnps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x56, 0x0a], "vorps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x56, 0xca], "vorps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x57, 0x0a], "vxorps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x57, 0xca], "vxorps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x58, 0x0a], "vaddps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x58, 0xca], "vaddps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x59, 0x0a], "vmulps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x59, 0xca], "vmulps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5a, 0xca], "vcvtps2pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5b, 0xca], "vcvtdq2ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5c, 0x0a], "vsubps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5c, 0xca], "vsubps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5d, 0x0a], "vminps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5d, 0xca], "vminps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5e, 0x0a], "vdivps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5e, 0xca], "vdivps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5f, 0x0a], "vmaxps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x5f, 0xca], "vmaxps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x78, 0xca], "vcvttps2udq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0x79, 0xca], "vcvtps2udq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x0d, 0xc6, 0xca, 0xcc], "vshufps xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x14, 0x0a], "vunpcklps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x14, 0x4a, 0x01], "vunpcklps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x15, 0x0a], "vunpckhps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x15, 0x4a, 0x01], "vunpckhps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x51, 0x0a], "vsqrtps xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x51, 0x4a, 0x01], "vsqrtps xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x51, 0xca], "vsqrtps zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x54, 0x0a], "vandps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x54, 0x4a, 0x01], "vandps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x55, 0x0a], "vandnps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x55, 0x4a, 0x01], "vandnps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x56, 0x0a], "vorps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x56, 0x4a, 0x01], "vorps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x57, 0x0a], "vxorps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x57, 0x4a, 0x01], "vxorps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x58, 0x0a], "vaddps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x58, 0x4a, 0x01], "vaddps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x58, 0xca], "vaddps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x59, 0x0a], "vmulps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x59, 0x4a, 0x01], "vmulps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x59, 0xca], "vmulps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5a, 0x0a], "vcvtps2pd xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5b, 0x0a], "vcvtdq2ps xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5b, 0xca], "vcvtdq2ps zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5c, 0x0a], "vsubps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5c, 0x4a, 0x01], "vsubps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5c, 0xca], "vsubps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5d, 0x0a], "vminps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5d, 0x4a, 0x01], "vminps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5e, 0x0a], "vdivps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5e, 0x4a, 0x01], "vdivps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5e, 0xca], "vdivps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5f, 0x0a], "vmaxps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x5f, 0x4a, 0x01], "vmaxps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x78, 0x0a], "vcvttps2udq xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x79, 0x0a], "vcvtps2udq xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0x79, 0xca], "vcvtps2udq zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0xc2, 0x0a, 0xcc], "vcmpps k1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0xc6, 0x0a, 0xcc], "vshufps xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x18, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x14, 0x0a], "vunpcklps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x15, 0x0a], "vunpckhps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x51, 0x0a], "vsqrtps xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x51, 0xca], "vsqrtps zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x54, 0x0a], "vandps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x55, 0x0a], "vandnps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x56, 0x0a], "vorps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x57, 0x0a], "vxorps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x58, 0x0a], "vaddps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x58, 0xca], "vaddps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x59, 0x0a], "vmulps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x59, 0xca], "vmulps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5c, 0x0a], "vsubps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5c, 0xca], "vsubps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5d, 0x0a], "vminps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5e, 0x0a], "vdivps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5e, 0xca], "vdivps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5f, 0x0a], "vmaxps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x1d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x10, 0x0a], "vmovups ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x10, 0x4a, 0x01], "vmovups ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x10, 0xca], "vmovups ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x11, 0x0a], "vmovups ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x11, 0x4a, 0x01], "vmovups ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x11, 0xca], "vmovups ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x14, 0x0a], "vunpcklps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x14, 0x4a, 0x01], "vunpcklps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x14, 0xca], "vunpcklps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x15, 0x0a], "vunpckhps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x15, 0x4a, 0x01], "vunpckhps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x15, 0xca], "vunpckhps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x28, 0x0a], "vmovaps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x28, 0x4a, 0x01], "vmovaps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x28, 0xca], "vmovaps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x29, 0x0a], "vmovaps ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x29, 0x4a, 0x01], "vmovaps ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x29, 0xca], "vmovaps ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2b, 0x0a], "vmovntps ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2b, 0x4a, 0x01], "vmovntps ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2e, 0x0a], "vucomiss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2e, 0x4a, 0x01], "vucomiss xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2e, 0xca], "vucomiss xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2f, 0x0a], "vcomiss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2f, 0x4a, 0x01], "vcomiss xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x2f, 0xca], "vcomiss xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x51, 0x0a], "vsqrtps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x51, 0x4a, 0x01], "vsqrtps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x51, 0xca], "vsqrtps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x54, 0x0a], "vandps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x54, 0x4a, 0x01], "vandps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x54, 0xca], "vandps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x55, 0x0a], "vandnps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x55, 0x4a, 0x01], "vandnps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x55, 0xca], "vandnps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x56, 0x0a], "vorps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x56, 0x4a, 0x01], "vorps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x56, 0xca], "vorps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x57, 0x0a], "vxorps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x57, 0x4a, 0x01], "vxorps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x57, 0xca], "vxorps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x58, 0x0a], "vaddps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x58, 0x4a, 0x01], "vaddps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x58, 0xca], "vaddps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x59, 0x0a], "vmulps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x59, 0x4a, 0x01], "vmulps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x59, 0xca], "vmulps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5a, 0x0a], "vcvtps2pd ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5a, 0xca], "vcvtps2pd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5b, 0x0a], "vcvtdq2ps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5b, 0xca], "vcvtdq2ps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5c, 0x0a], "vsubps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5c, 0x4a, 0x01], "vsubps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5c, 0xca], "vsubps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5d, 0x0a], "vminps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5d, 0x4a, 0x01], "vminps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5d, 0xca], "vminps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5e, 0x0a], "vdivps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5e, 0x4a, 0x01], "vdivps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5e, 0xca], "vdivps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5f, 0x0a], "vmaxps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5f, 0x4a, 0x01], "vmaxps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x5f, 0xca], "vmaxps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x78, 0x0a], "vcvttps2udq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x78, 0xca], "vcvttps2udq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x79, 0x0a], "vcvtps2udq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0x79, 0xca], "vcvtps2udq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0xc2, 0x0a, 0xcc], "vcmpps k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0xc2, 0xca, 0xcc], "vcmpps k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0xc6, 0x0a, 0xcc], "vshufps ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x28, 0xc6, 0xca, 0xcc], "vshufps ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x10, 0x0a], "vmovups ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x10, 0x4a, 0x01], "vmovups ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x10, 0xca], "vmovups ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x11, 0x0a], "vmovups ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x11, 0x4a, 0x01], "vmovups ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x11, 0xca], "vmovups ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x14, 0x0a], "vunpcklps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x14, 0xca], "vunpcklps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x15, 0x0a], "vunpckhps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x15, 0xca], "vunpckhps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x28, 0x0a], "vmovaps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x28, 0x4a, 0x01], "vmovaps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x28, 0xca], "vmovaps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x29, 0x0a], "vmovaps ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x29, 0x4a, 0x01], "vmovaps ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x29, 0xca], "vmovaps ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x51, 0x0a], "vsqrtps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x51, 0xca], "vsqrtps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x54, 0x0a], "vandps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x54, 0x4a, 0x01], "vandps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x54, 0xca], "vandps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x55, 0x0a], "vandnps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x55, 0xca], "vandnps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x56, 0x0a], "vorps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x56, 0x4a, 0x01], "vorps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x56, 0xca], "vorps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x57, 0x0a], "vxorps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x57, 0xca], "vxorps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x58, 0x0a], "vaddps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x58, 0xca], "vaddps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x59, 0x0a], "vmulps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x59, 0xca], "vmulps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5a, 0xca], "vcvtps2pd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5b, 0xca], "vcvtdq2ps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5c, 0x0a], "vsubps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5c, 0xca], "vsubps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5d, 0x0a], "vminps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5d, 0xca], "vminps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5e, 0x0a], "vdivps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5e, 0xca], "vdivps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5f, 0x0a], "vmaxps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x5f, 0xca], "vmaxps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x78, 0x0a], "vcvttps2udq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x78, 0xca], "vcvttps2udq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x79, 0x0a], "vcvtps2udq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0x79, 0xca], "vcvtps2udq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x2d, 0xc6, 0xca, 0xcc], "vshufps ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x14, 0x0a], "vunpcklps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x14, 0x4a, 0x01], "vunpcklps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x15, 0x0a], "vunpckhps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x15, 0x4a, 0x01], "vunpckhps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x51, 0x0a], "vsqrtps ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x51, 0x4a, 0x01], "vsqrtps ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x51, 0xca], "vsqrtps zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x54, 0x0a], "vandps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x54, 0x4a, 0x01], "vandps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x55, 0x0a], "vandnps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x55, 0x4a, 0x01], "vandnps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x56, 0x0a], "vorps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x56, 0x4a, 0x01], "vorps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x57, 0x0a], "vxorps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x57, 0x4a, 0x01], "vxorps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x58, 0x0a], "vaddps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x58, 0x4a, 0x01], "vaddps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x58, 0xca], "vaddps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x59, 0x0a], "vmulps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x59, 0x4a, 0x01], "vmulps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x59, 0xca], "vmulps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5a, 0x0a], "vcvtps2pd ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5b, 0x0a], "vcvtdq2ps ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5b, 0xca], "vcvtdq2ps zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5c, 0x0a], "vsubps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5c, 0x4a, 0x01], "vsubps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5c, 0xca], "vsubps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5d, 0x0a], "vminps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5d, 0x4a, 0x01], "vminps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5e, 0x0a], "vdivps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5e, 0x4a, 0x01], "vdivps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5e, 0xca], "vdivps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5f, 0x0a], "vmaxps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x5f, 0x4a, 0x01], "vmaxps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x78, 0x0a], "vcvttps2udq ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x79, 0x0a], "vcvtps2udq ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0x79, 0xca], "vcvtps2udq zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0xc2, 0x0a, 0xcc], "vcmpps k1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0xc6, 0x0a, 0xcc], "vshufps ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x38, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x14, 0x0a], "vunpcklps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x15, 0x0a], "vunpckhps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x51, 0x0a], "vsqrtps ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x51, 0xca], "vsqrtps zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x54, 0x0a], "vandps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x54, 0x4a, 0x01], "vandps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x55, 0x0a], "vandnps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x56, 0x0a], "vorps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x56, 0x4a, 0x01], "vorps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x57, 0x0a], "vxorps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x58, 0x0a], "vaddps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x58, 0xca], "vaddps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x59, 0x0a], "vmulps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x59, 0xca], "vmulps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5c, 0x0a], "vsubps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5c, 0xca], "vsubps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5d, 0x0a], "vminps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5e, 0x0a], "vdivps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5e, 0xca], "vdivps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5f, 0x0a], "vmaxps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x78, 0x0a], "vcvttps2udq ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x79, 0x0a], "vcvtps2udq ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x3d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x10, 0x0a], "vmovups zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x10, 0x4a, 0x01], "vmovups zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x10, 0xca], "vmovups zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x11, 0x0a], "vmovups zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x11, 0x4a, 0x01], "vmovups zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x11, 0xca], "vmovups zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x14, 0x0a], "vunpcklps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x14, 0x4a, 0x01], "vunpcklps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x14, 0xca], "vunpcklps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x15, 0x0a], "vunpckhps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x15, 0x4a, 0x01], "vunpckhps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x15, 0xca], "vunpckhps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x28, 0x0a], "vmovaps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x28, 0x4a, 0x01], "vmovaps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x28, 0xca], "vmovaps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x29, 0x0a], "vmovaps zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x29, 0x4a, 0x01], "vmovaps zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x29, 0xca], "vmovaps zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x2b, 0x0a], "vmovntps zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x2b, 0x4a, 0x01], "vmovntps zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x51, 0x0a], "vsqrtps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x51, 0x4a, 0x01], "vsqrtps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x51, 0xca], "vsqrtps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x54, 0x0a], "vandps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x54, 0x4a, 0x01], "vandps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x54, 0xca], "vandps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x55, 0x0a], "vandnps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x55, 0x4a, 0x01], "vandnps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x55, 0xca], "vandnps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x56, 0x0a], "vorps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x56, 0x4a, 0x01], "vorps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x56, 0xca], "vorps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x57, 0x0a], "vxorps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x57, 0x4a, 0x01], "vxorps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x57, 0xca], "vxorps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x58, 0x0a], "vaddps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x58, 0x4a, 0x01], "vaddps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x58, 0xca], "vaddps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x59, 0x0a], "vmulps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x59, 0x4a, 0x01], "vmulps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x59, 0xca], "vmulps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5a, 0x0a], "vcvtps2pd zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5a, 0xca], "vcvtps2pd zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5b, 0x0a], "vcvtdq2ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5b, 0xca], "vcvtdq2ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5c, 0x0a], "vsubps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5c, 0x4a, 0x01], "vsubps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5c, 0xca], "vsubps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5d, 0x0a], "vminps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5d, 0x4a, 0x01], "vminps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5d, 0xca], "vminps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5e, 0x0a], "vdivps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5e, 0x4a, 0x01], "vdivps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5e, 0xca], "vdivps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5f, 0x0a], "vmaxps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5f, 0x4a, 0x01], "vmaxps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x5f, 0xca], "vmaxps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x78, 0x0a], "vcvttps2udq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x78, 0xca], "vcvttps2udq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x79, 0x0a], "vcvtps2udq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0x79, 0xca], "vcvtps2udq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0xc2, 0x0a, 0xcc], "vcmpps k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0xc2, 0xca, 0xcc], "vcmpps k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0xc6, 0x0a, 0xcc], "vshufps zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x48, 0xc6, 0xca, 0xcc], "vshufps zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x10, 0x0a], "vmovups zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x10, 0x4a, 0x01], "vmovups zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x10, 0xca], "vmovups zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x11, 0x0a], "vmovups zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x11, 0x4a, 0x01], "vmovups zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x11, 0xca], "vmovups zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x14, 0x0a], "vunpcklps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x14, 0xca], "vunpcklps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x15, 0x0a], "vunpckhps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x15, 0xca], "vunpckhps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x28, 0x0a], "vmovaps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x28, 0x4a, 0x01], "vmovaps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x28, 0xca], "vmovaps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x29, 0x0a], "vmovaps zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x29, 0x4a, 0x01], "vmovaps zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x29, 0xca], "vmovaps zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x51, 0x0a], "vsqrtps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x51, 0xca], "vsqrtps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x54, 0x0a], "vandps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x54, 0x4a, 0x01], "vandps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x54, 0xca], "vandps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x55, 0x0a], "vandnps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x55, 0xca], "vandnps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x56, 0x0a], "vorps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x56, 0x4a, 0x01], "vorps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x56, 0xca], "vorps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x57, 0x0a], "vxorps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x57, 0xca], "vxorps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x58, 0x0a], "vaddps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x58, 0xca], "vaddps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x59, 0x0a], "vmulps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x59, 0xca], "vmulps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5a, 0xca], "vcvtps2pd zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5c, 0x0a], "vsubps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5c, 0xca], "vsubps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5d, 0x0a], "vminps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5d, 0xca], "vminps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5e, 0x0a], "vdivps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5e, 0xca], "vdivps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5f, 0x0a], "vmaxps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x5f, 0xca], "vmaxps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x78, 0x0a], "vcvttps2udq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x78, 0xca], "vcvttps2udq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x79, 0x0a], "vcvtps2udq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0x79, 0xca], "vcvtps2udq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x4d, 0xc6, 0xca, 0xcc], "vshufps zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x14, 0x0a], "vunpcklps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x14, 0x4a, 0x01], "vunpcklps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x15, 0x0a], "vunpckhps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x15, 0x4a, 0x01], "vunpckhps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x51, 0x0a], "vsqrtps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x51, 0x4a, 0x01], "vsqrtps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x51, 0xca], "vsqrtps zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x54, 0x0a], "vandps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x54, 0x4a, 0x01], "vandps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x55, 0x0a], "vandnps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x55, 0x4a, 0x01], "vandnps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x56, 0x0a], "vorps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x56, 0x4a, 0x01], "vorps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x57, 0x0a], "vxorps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x57, 0x4a, 0x01], "vxorps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x58, 0x0a], "vaddps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x58, 0x4a, 0x01], "vaddps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x58, 0xca], "vaddps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x59, 0x0a], "vmulps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x59, 0x4a, 0x01], "vmulps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x59, 0xca], "vmulps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5a, 0x0a], "vcvtps2pd zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5b, 0x0a], "vcvtdq2ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5b, 0xca], "vcvtdq2ps zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5c, 0x0a], "vsubps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5c, 0x4a, 0x01], "vsubps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5c, 0xca], "vsubps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5d, 0x0a], "vminps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5d, 0x4a, 0x01], "vminps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5e, 0x0a], "vdivps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5e, 0x4a, 0x01], "vdivps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5e, 0xca], "vdivps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5f, 0x0a], "vmaxps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x5f, 0x4a, 0x01], "vmaxps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x78, 0x0a], "vcvttps2udq zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x79, 0x0a], "vcvtps2udq zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0x79, 0xca], "vcvtps2udq zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0xc2, 0x0a, 0xcc], "vcmpps k1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0xc6, 0x0a, 0xcc], "vshufps zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x58, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x14, 0x0a], "vunpcklps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x15, 0x0a], "vunpckhps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x51, 0x0a], "vsqrtps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x51, 0xca], "vsqrtps zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x54, 0x0a], "vandps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x54, 0x4a, 0x01], "vandps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x55, 0x0a], "vandnps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x56, 0x0a], "vorps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x56, 0x4a, 0x01], "vorps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x57, 0x0a], "vxorps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x58, 0x0a], "vaddps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x58, 0xca], "vaddps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x59, 0x0a], "vmulps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x59, 0xca], "vmulps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5c, 0x0a], "vsubps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5c, 0xca], "vsubps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5d, 0x0a], "vminps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5e, 0x0a], "vdivps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5e, 0xca], "vdivps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5f, 0x0a], "vmaxps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x78, 0x0a], "vcvttps2udq zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x79, 0x0a], "vcvtps2udq zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0xc2, 0x0a, 0xcc], "vcmpps k1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpps k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x5d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x2e, 0xca], "vucomiss xmm1{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x2f, 0xca], "vcomiss xmm1{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x51, 0xca], "vsqrtps zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x58, 0xca], "vaddps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x59, 0xca], "vmulps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x5a, 0xca], "vcvtps2pd zmm1{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x5b, 0xca], "vcvtdq2ps zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x5c, 0xca], "vsubps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x5d, 0xca], "vminps zmm1{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x5e, 0xca], "vdivps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x5f, 0xca], "vmaxps zmm1{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x78, 0xca], "vcvttps2udq zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0x79, 0xca], "vcvtps2udq zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x78, 0xc2, 0xca, 0xcc], "vcmpps k1{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x51, 0xca], "vsqrtps zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x58, 0xca], "vaddps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x59, 0xca], "vmulps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x5a, 0xca], "vcvtps2pd zmm1{k5}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x5c, 0xca], "vsubps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x5d, 0xca], "vminps zmm1{k5}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x5e, 0xca], "vdivps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x5f, 0xca], "vmaxps zmm1{k5}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x78, 0xca], "vcvttps2udq zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x7d, 0xc2, 0xca, 0xcc], "vcmpps k1{k5}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x10, 0x0a], "vmovups xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x10, 0x4a, 0x01], "vmovups xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x10, 0xca], "vmovups xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x11, 0xca], "vmovups xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x14, 0x0a], "vunpcklps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x14, 0xca], "vunpcklps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x15, 0x0a], "vunpckhps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x15, 0xca], "vunpckhps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x28, 0x0a], "vmovaps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x28, 0x4a, 0x01], "vmovaps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x28, 0xca], "vmovaps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x29, 0xca], "vmovaps xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x51, 0x0a], "vsqrtps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x51, 0xca], "vsqrtps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x54, 0x0a], "vandps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x54, 0xca], "vandps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x55, 0x0a], "vandnps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x55, 0xca], "vandnps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x56, 0x0a], "vorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x56, 0xca], "vorps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x57, 0x0a], "vxorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x57, 0xca], "vxorps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x58, 0x0a], "vaddps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x58, 0xca], "vaddps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x59, 0x0a], "vmulps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x59, 0xca], "vmulps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5a, 0xca], "vcvtps2pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5b, 0xca], "vcvtdq2ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5c, 0x0a], "vsubps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5c, 0xca], "vsubps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5d, 0x0a], "vminps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5d, 0xca], "vminps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5e, 0x0a], "vdivps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5e, 0xca], "vdivps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5f, 0x0a], "vmaxps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x5f, 0xca], "vmaxps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x78, 0xca], "vcvttps2udq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0x79, 0xca], "vcvtps2udq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x8d, 0xc6, 0xca, 0xcc], "vshufps xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x14, 0x0a], "vunpcklps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x14, 0x4a, 0x01], "vunpcklps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x15, 0x0a], "vunpckhps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x15, 0x4a, 0x01], "vunpckhps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x51, 0x0a], "vsqrtps xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x51, 0x4a, 0x01], "vsqrtps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x54, 0x0a], "vandps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x54, 0x4a, 0x01], "vandps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x55, 0x0a], "vandnps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x55, 0x4a, 0x01], "vandnps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x56, 0x0a], "vorps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x56, 0x4a, 0x01], "vorps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x57, 0x0a], "vxorps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x57, 0x4a, 0x01], "vxorps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x58, 0x0a], "vaddps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x58, 0x4a, 0x01], "vaddps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x58, 0xca], "vaddps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x59, 0x0a], "vmulps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x59, 0x4a, 0x01], "vmulps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x59, 0xca], "vmulps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5a, 0x0a], "vcvtps2pd xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5a, 0x4a, 0x01], "vcvtps2pd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5b, 0x0a], "vcvtdq2ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5b, 0x4a, 0x01], "vcvtdq2ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5c, 0x0a], "vsubps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5c, 0x4a, 0x01], "vsubps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5c, 0xca], "vsubps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5d, 0x0a], "vminps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5d, 0x4a, 0x01], "vminps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5e, 0x0a], "vdivps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5e, 0x4a, 0x01], "vdivps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5e, 0xca], "vdivps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5f, 0x0a], "vmaxps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x5f, 0x4a, 0x01], "vmaxps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x78, 0x0a], "vcvttps2udq xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x78, 0x4a, 0x01], "vcvttps2udq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x79, 0x0a], "vcvtps2udq xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x79, 0x4a, 0x01], "vcvtps2udq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0xc6, 0x0a, 0xcc], "vshufps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0x9d, 0xc6, 0x4a, 0x01, 0xcc], "vshufps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x10, 0x0a], "vmovups ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x10, 0x4a, 0x01], "vmovups ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x10, 0xca], "vmovups ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x11, 0xca], "vmovups ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x14, 0x0a], "vunpcklps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x14, 0xca], "vunpcklps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x15, 0x0a], "vunpckhps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x15, 0xca], "vunpckhps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x28, 0x0a], "vmovaps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x28, 0x4a, 0x01], "vmovaps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x28, 0xca], "vmovaps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x29, 0xca], "vmovaps ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x51, 0x0a], "vsqrtps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x51, 0xca], "vsqrtps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x54, 0x0a], "vandps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x54, 0x4a, 0x01], "vandps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x54, 0xca], "vandps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x55, 0x0a], "vandnps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x55, 0xca], "vandnps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x56, 0x0a], "vorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x56, 0x4a, 0x01], "vorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x56, 0xca], "vorps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x57, 0x0a], "vxorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x57, 0xca], "vxorps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x58, 0x0a], "vaddps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x58, 0xca], "vaddps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x59, 0x0a], "vmulps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x59, 0xca], "vmulps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5a, 0xca], "vcvtps2pd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5b, 0xca], "vcvtdq2ps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5c, 0x0a], "vsubps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5c, 0xca], "vsubps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5d, 0x0a], "vminps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5d, 0xca], "vminps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5e, 0x0a], "vdivps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5e, 0xca], "vdivps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5f, 0x0a], "vmaxps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x5f, 0xca], "vmaxps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x78, 0x0a], "vcvttps2udq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x78, 0xca], "vcvttps2udq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x79, 0x0a], "vcvtps2udq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0x79, 0xca], "vcvtps2udq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xad, 0xc6, 0xca, 0xcc], "vshufps ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x14, 0x0a], "vunpcklps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x14, 0x4a, 0x01], "vunpcklps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x15, 0x0a], "vunpckhps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x15, 0x4a, 0x01], "vunpckhps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x51, 0x0a], "vsqrtps ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x51, 0x4a, 0x01], "vsqrtps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x54, 0x0a], "vandps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x54, 0x4a, 0x01], "vandps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x55, 0x0a], "vandnps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x55, 0x4a, 0x01], "vandnps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x56, 0x0a], "vorps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x56, 0x4a, 0x01], "vorps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x57, 0x0a], "vxorps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x57, 0x4a, 0x01], "vxorps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x58, 0x0a], "vaddps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x58, 0x4a, 0x01], "vaddps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x58, 0xca], "vaddps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x59, 0x0a], "vmulps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x59, 0x4a, 0x01], "vmulps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x59, 0xca], "vmulps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5a, 0x0a], "vcvtps2pd ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5a, 0x4a, 0x01], "vcvtps2pd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5b, 0x0a], "vcvtdq2ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5b, 0x4a, 0x01], "vcvtdq2ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5c, 0x0a], "vsubps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5c, 0x4a, 0x01], "vsubps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5c, 0xca], "vsubps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5d, 0x0a], "vminps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5d, 0x4a, 0x01], "vminps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5e, 0x0a], "vdivps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5e, 0x4a, 0x01], "vdivps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5e, 0xca], "vdivps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5f, 0x0a], "vmaxps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x5f, 0x4a, 0x01], "vmaxps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x78, 0x0a], "vcvttps2udq ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x78, 0x4a, 0x01], "vcvttps2udq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x79, 0x0a], "vcvtps2udq ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x79, 0x4a, 0x01], "vcvtps2udq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0xc6, 0x0a, 0xcc], "vshufps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xbd, 0xc6, 0x4a, 0x01, 0xcc], "vshufps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x10, 0x0a], "vmovups zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x10, 0x4a, 0x01], "vmovups zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x10, 0xca], "vmovups zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x11, 0xca], "vmovups zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x14, 0x0a], "vunpcklps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x14, 0xca], "vunpcklps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x15, 0x0a], "vunpckhps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x15, 0xca], "vunpckhps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x28, 0x0a], "vmovaps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x28, 0x4a, 0x01], "vmovaps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x28, 0xca], "vmovaps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x29, 0xca], "vmovaps zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x51, 0x0a], "vsqrtps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x54, 0x0a], "vandps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x54, 0x4a, 0x01], "vandps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x54, 0xca], "vandps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x55, 0x0a], "vandnps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x55, 0xca], "vandnps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x56, 0x0a], "vorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x56, 0x4a, 0x01], "vorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x56, 0xca], "vorps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x57, 0x0a], "vxorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x57, 0xca], "vxorps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x58, 0x0a], "vaddps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x58, 0xca], "vaddps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x59, 0x0a], "vmulps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x59, 0xca], "vmulps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5a, 0xca], "vcvtps2pd zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5c, 0x0a], "vsubps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5c, 0xca], "vsubps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5d, 0x0a], "vminps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5d, 0xca], "vminps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5e, 0x0a], "vdivps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5e, 0xca], "vdivps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5f, 0x0a], "vmaxps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x5f, 0xca], "vmaxps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x78, 0x0a], "vcvttps2udq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x78, 0xca], "vcvttps2udq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x79, 0x0a], "vcvtps2udq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xcd, 0xc6, 0xca, 0xcc], "vshufps zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x14, 0x0a], "vunpcklps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x14, 0x4a, 0x01], "vunpcklps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x15, 0x0a], "vunpckhps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x15, 0x4a, 0x01], "vunpckhps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x51, 0x0a], "vsqrtps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x51, 0x4a, 0x01], "vsqrtps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x54, 0x0a], "vandps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x54, 0x4a, 0x01], "vandps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x55, 0x0a], "vandnps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x55, 0x4a, 0x01], "vandnps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x56, 0x0a], "vorps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x56, 0x4a, 0x01], "vorps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x57, 0x0a], "vxorps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x57, 0x4a, 0x01], "vxorps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x58, 0x0a], "vaddps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x58, 0x4a, 0x01], "vaddps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x58, 0xca], "vaddps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x59, 0x0a], "vmulps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x59, 0x4a, 0x01], "vmulps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x59, 0xca], "vmulps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5a, 0x0a], "vcvtps2pd zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5a, 0x4a, 0x01], "vcvtps2pd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5b, 0x0a], "vcvtdq2ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5b, 0x4a, 0x01], "vcvtdq2ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5c, 0x0a], "vsubps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5c, 0x4a, 0x01], "vsubps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5c, 0xca], "vsubps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5d, 0x0a], "vminps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5d, 0x4a, 0x01], "vminps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5e, 0x0a], "vdivps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5e, 0x4a, 0x01], "vdivps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5e, 0xca], "vdivps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5f, 0x0a], "vmaxps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x5f, 0x4a, 0x01], "vmaxps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x78, 0x0a], "vcvttps2udq zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x78, 0x4a, 0x01], "vcvttps2udq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x79, 0x0a], "vcvtps2udq zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x79, 0x4a, 0x01], "vcvtps2udq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0xc6, 0x0a, 0xcc], "vshufps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xdd, 0xc6, 0x4a, 0x01, 0xcc], "vshufps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x51, 0xca], "vsqrtps zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x58, 0xca], "vaddps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x59, 0xca], "vmulps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x5a, 0xca], "vcvtps2pd zmm1{k5}{z}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x5b, 0xca], "vcvtdq2ps zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x5c, 0xca], "vsubps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x5d, 0xca], "vminps zmm1{k5}{z}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x5e, 0xca], "vdivps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x5f, 0xca], "vmaxps zmm1{k5}{z}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x78, 0xca], "vcvttps2udq zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7c, 0xfd, 0x79, 0xca], "vcvtps2udq zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x5b, 0x0a], "vcvtps2dq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x5b, 0xca], "vcvtps2dq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x62, 0x0a], "vpunpckldq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x62, 0x4a, 0x01], "vpunpckldq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x62, 0xca], "vpunpckldq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x66, 0x0a], "vpcmpgtd k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x66, 0x4a, 0x01], "vpcmpgtd k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x66, 0xca], "vpcmpgtd k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6a, 0x0a], "vpunpckhdq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6a, 0xca], "vpunpckhdq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6b, 0x0a], "vpackssdw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6b, 0x4a, 0x01], "vpackssdw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6b, 0xca], "vpackssdw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6f, 0x0a], "vmovdqa32 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6f, 0x4a, 0x01], "vmovdqa32 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x6f, 0xca], "vmovdqa32 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x70, 0x0a, 0xcc], "vpshufd xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x70, 0xca, 0xcc], "vpshufd xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x72, 0x0a, 0xcc], "vprold xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x72, 0xca, 0xcc], "vprold xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x76, 0x0a], "vpcmpeqd k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x76, 0x4a, 0x01], "vpcmpeqd k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x76, 0xca], "vpcmpeqd k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x78, 0x0a], "vcvttps2uqq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x78, 0xca], "vcvttps2uqq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x79, 0x0a], "vcvtps2uqq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x79, 0xca], "vcvtps2uqq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7a, 0x0a], "vcvttps2qq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7a, 0xca], "vcvttps2qq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7b, 0x0a], "vcvtps2qq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7b, 0xca], "vcvtps2qq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7f, 0x0a], "vmovdqa32 xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7f, 0x4a, 0x01], "vmovdqa32 xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0x7f, 0xca], "vmovdqa32 xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xd2, 0x0a], "vpsrld xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xd2, 0x4a, 0x01], "vpsrld xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xd2, 0xca], "vpsrld xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xdb, 0x0a], "vpandd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xdb, 0x4a, 0x01], "vpandd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xdb, 0xca], "vpandd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xdf, 0x0a], "vpandnd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xdf, 0x4a, 0x01], "vpandnd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xdf, 0xca], "vpandnd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xe2, 0x0a], "vpsrad xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xe2, 0x4a, 0x01], "vpsrad xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xe2, 0xca], "vpsrad xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xe7, 0x0a], "vmovntdq xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xe7, 0x4a, 0x01], "vmovntdq xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xeb, 0x0a], "vpord xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xeb, 0x4a, 0x01], "vpord xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xeb, 0xca], "vpord xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xef, 0x0a], "vpxord xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xef, 0x4a, 0x01], "vpxord xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xef, 0xca], "vpxord xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xf2, 0x0a], "vpslld xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xf2, 0x4a, 0x01], "vpslld xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xf2, 0xca], "vpslld xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xfa, 0x0a], "vpsubd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xfa, 0x4a, 0x01], "vpsubd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xfa, 0xca], "vpsubd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xfe, 0x0a], "vpaddd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xfe, 0x4a, 0x01], "vpaddd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x08, 0xfe, 0xca], "vpaddd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x5b, 0xca], "vcvtps2dq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x62, 0x0a], "vpunpckldq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x62, 0xca], "vpunpckldq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x66, 0x0a], "vpcmpgtd k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x66, 0xca], "vpcmpgtd k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6a, 0xca], "vpunpckhdq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6b, 0x0a], "vpackssdw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6b, 0xca], "vpackssdw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6f, 0x0a], "vmovdqa32 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqa32 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x6f, 0xca], "vmovdqa32 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x70, 0xca, 0xcc], "vpshufd xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x72, 0xca, 0xcc], "vprold xmm0{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x76, 0x0a], "vpcmpeqd k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x76, 0xca], "vpcmpeqd k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x78, 0xca], "vcvttps2uqq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x79, 0xca], "vcvtps2uqq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7a, 0xca], "vcvttps2qq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7b, 0xca], "vcvtps2qq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7f, 0x0a], "vmovdqa32 xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqa32 xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0x7f, 0xca], "vmovdqa32 xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xd2, 0x0a], "vpsrld xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xd2, 0x4a, 0x01], "vpsrld xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xd2, 0xca], "vpsrld xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xdb, 0x0a], "vpandd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xdb, 0xca], "vpandd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xdf, 0x0a], "vpandnd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xdf, 0xca], "vpandnd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xe2, 0x0a], "vpsrad xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xe2, 0x4a, 0x01], "vpsrad xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xe2, 0xca], "vpsrad xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xeb, 0x0a], "vpord xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xeb, 0xca], "vpord xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xef, 0x0a], "vpxord xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xef, 0xca], "vpxord xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xf2, 0x0a], "vpslld xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xf2, 0x4a, 0x01], "vpslld xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xf2, 0xca], "vpslld xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xfa, 0x0a], "vpsubd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xfa, 0xca], "vpsubd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xfe, 0x0a], "vpaddd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x0d, 0xfe, 0xca], "vpaddd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x5b, 0x0a], "vcvtps2dq xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x5b, 0xca], "vcvtps2dq zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x62, 0x0a], "vpunpckldq xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x62, 0x4a, 0x01], "vpunpckldq xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x66, 0x0a], "vpcmpgtd k1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x66, 0x4a, 0x01], "vpcmpgtd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x6a, 0x0a], "vpunpckhdq xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x6b, 0x0a], "vpackssdw xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x6b, 0x4a, 0x01], "vpackssdw xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x70, 0x0a, 0xcc], "vpshufd xmm1, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x72, 0x0a, 0xcc], "vprold xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x76, 0x0a], "vpcmpeqd k1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x76, 0x4a, 0x01], "vpcmpeqd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x78, 0x0a], "vcvttps2uqq xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x79, 0x0a], "vcvtps2uqq xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x79, 0xca], "vcvtps2uqq zmm1{rn-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x7a, 0x0a], "vcvttps2qq xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x7b, 0x0a], "vcvtps2qq xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0x7b, 0xca], "vcvtps2qq zmm1{rn-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xdb, 0x0a], "vpandd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xdb, 0x4a, 0x01], "vpandd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xdf, 0x0a], "vpandnd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xdf, 0x4a, 0x01], "vpandnd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xeb, 0x0a], "vpord xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xeb, 0x4a, 0x01], "vpord xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xef, 0x0a], "vpxord xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xef, 0x4a, 0x01], "vpxord xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xfa, 0x0a], "vpsubd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xfa, 0x4a, 0x01], "vpsubd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xfe, 0x0a], "vpaddd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x18, 0xfe, 0x4a, 0x01], "vpaddd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x62, 0x0a], "vpunpckldq xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x66, 0x0a], "vpcmpgtd k1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x6b, 0x0a], "vpackssdw xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x76, 0x0a], "vpcmpeqd k1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{rn-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{rn-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xdb, 0x0a], "vpandd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xdf, 0x0a], "vpandnd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xeb, 0x0a], "vpord xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xef, 0x0a], "vpxord xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xfa, 0x0a], "vpsubd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xfe, 0x0a], "vpaddd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x1d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x5b, 0x0a], "vcvtps2dq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x5b, 0xca], "vcvtps2dq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x62, 0x0a], "vpunpckldq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x62, 0x4a, 0x01], "vpunpckldq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x62, 0xca], "vpunpckldq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x66, 0x0a], "vpcmpgtd k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x66, 0x4a, 0x01], "vpcmpgtd k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x66, 0xca], "vpcmpgtd k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6a, 0x0a], "vpunpckhdq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6a, 0xca], "vpunpckhdq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6b, 0x0a], "vpackssdw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6b, 0x4a, 0x01], "vpackssdw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6b, 0xca], "vpackssdw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6f, 0x0a], "vmovdqa32 ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6f, 0x4a, 0x01], "vmovdqa32 ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x6f, 0xca], "vmovdqa32 ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x70, 0x0a, 0xcc], "vpshufd ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x70, 0xca, 0xcc], "vpshufd ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x72, 0x0a, 0xcc], "vprold ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x72, 0xca, 0xcc], "vprold ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x76, 0x0a], "vpcmpeqd k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x76, 0x4a, 0x01], "vpcmpeqd k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x76, 0xca], "vpcmpeqd k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x78, 0x0a], "vcvttps2uqq ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x78, 0xca], "vcvttps2uqq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x79, 0x0a], "vcvtps2uqq ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x79, 0xca], "vcvtps2uqq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7a, 0x0a], "vcvttps2qq ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7a, 0xca], "vcvttps2qq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7b, 0x0a], "vcvtps2qq ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7b, 0xca], "vcvtps2qq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7f, 0x0a], "vmovdqa32 ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7f, 0x4a, 0x01], "vmovdqa32 ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0x7f, 0xca], "vmovdqa32 ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xd2, 0x0a], "vpsrld ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xd2, 0x4a, 0x01], "vpsrld ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xd2, 0xca], "vpsrld ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xdb, 0x0a], "vpandd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xdb, 0x4a, 0x01], "vpandd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xdb, 0xca], "vpandd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xdf, 0x0a], "vpandnd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xdf, 0x4a, 0x01], "vpandnd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xdf, 0xca], "vpandnd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xe2, 0x0a], "vpsrad ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xe2, 0x4a, 0x01], "vpsrad ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xe2, 0xca], "vpsrad ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xe7, 0x0a], "vmovntdq ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xe7, 0x4a, 0x01], "vmovntdq ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xeb, 0x0a], "vpord ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xeb, 0x4a, 0x01], "vpord ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xeb, 0xca], "vpord ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xef, 0x0a], "vpxord ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xef, 0x4a, 0x01], "vpxord ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xef, 0xca], "vpxord ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xf2, 0x0a], "vpslld ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xf2, 0x4a, 0x01], "vpslld ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xf2, 0xca], "vpslld ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xfa, 0x0a], "vpsubd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xfa, 0x4a, 0x01], "vpsubd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xfa, 0xca], "vpsubd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xfe, 0x0a], "vpaddd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xfe, 0x4a, 0x01], "vpaddd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x28, 0xfe, 0xca], "vpaddd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x5b, 0xca], "vcvtps2dq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x62, 0x0a], "vpunpckldq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x62, 0xca], "vpunpckldq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x66, 0x0a], "vpcmpgtd k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x66, 0xca], "vpcmpgtd k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6a, 0xca], "vpunpckhdq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6b, 0x0a], "vpackssdw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6b, 0xca], "vpackssdw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6f, 0x0a], "vmovdqa32 ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqa32 ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x6f, 0xca], "vmovdqa32 ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x70, 0xca, 0xcc], "vpshufd ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x72, 0xca, 0xcc], "vprold ymm0{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x76, 0x0a], "vpcmpeqd k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x76, 0xca], "vpcmpeqd k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x78, 0xca], "vcvttps2uqq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x79, 0xca], "vcvtps2uqq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7a, 0xca], "vcvttps2qq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7b, 0xca], "vcvtps2qq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7f, 0x0a], "vmovdqa32 ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqa32 ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0x7f, 0xca], "vmovdqa32 ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xd2, 0x0a], "vpsrld ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xd2, 0x4a, 0x01], "vpsrld ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xd2, 0xca], "vpsrld ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xdb, 0x0a], "vpandd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xdb, 0xca], "vpandd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xdf, 0x0a], "vpandnd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xdf, 0xca], "vpandnd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xe2, 0x0a], "vpsrad ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xe2, 0x4a, 0x01], "vpsrad ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xe2, 0xca], "vpsrad ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xeb, 0x0a], "vpord ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xeb, 0xca], "vpord ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xef, 0x0a], "vpxord ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xef, 0xca], "vpxord ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xf2, 0x0a], "vpslld ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xf2, 0x4a, 0x01], "vpslld ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xf2, 0xca], "vpslld ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xfa, 0x0a], "vpsubd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xfa, 0xca], "vpsubd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xfe, 0x0a], "vpaddd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x2d, 0xfe, 0xca], "vpaddd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x5b, 0x0a], "vcvtps2dq ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x5b, 0xca], "vcvtps2dq zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x62, 0x0a], "vpunpckldq ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x62, 0x4a, 0x01], "vpunpckldq ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x66, 0x0a], "vpcmpgtd k1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x66, 0x4a, 0x01], "vpcmpgtd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x6a, 0x0a], "vpunpckhdq ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x6b, 0x0a], "vpackssdw ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x6b, 0x4a, 0x01], "vpackssdw ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x70, 0x0a, 0xcc], "vpshufd ymm1, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x72, 0x0a, 0xcc], "vprold ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x76, 0x0a], "vpcmpeqd k1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x76, 0x4a, 0x01], "vpcmpeqd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x78, 0x0a], "vcvttps2uqq ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x79, 0x0a], "vcvtps2uqq ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x79, 0xca], "vcvtps2uqq zmm1{rd-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x7a, 0x0a], "vcvttps2qq ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x7b, 0x0a], "vcvtps2qq ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0x7b, 0xca], "vcvtps2qq zmm1{rd-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xdb, 0x0a], "vpandd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xdb, 0x4a, 0x01], "vpandd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xdf, 0x0a], "vpandnd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xdf, 0x4a, 0x01], "vpandnd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xeb, 0x0a], "vpord ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xeb, 0x4a, 0x01], "vpord ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xef, 0x0a], "vpxord ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xef, 0x4a, 0x01], "vpxord ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xfa, 0x0a], "vpsubd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xfa, 0x4a, 0x01], "vpsubd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xfe, 0x0a], "vpaddd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x38, 0xfe, 0x4a, 0x01], "vpaddd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x62, 0x0a], "vpunpckldq ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x66, 0x0a], "vpcmpgtd k1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x6b, 0x0a], "vpackssdw ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x76, 0x0a], "vpcmpeqd k1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{rd-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{rd-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xdb, 0x0a], "vpandd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xdf, 0x0a], "vpandnd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xeb, 0x0a], "vpord ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xef, 0x0a], "vpxord ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xfa, 0x0a], "vpsubd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xfe, 0x0a], "vpaddd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x3d, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x5b, 0x0a], "vcvtps2dq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x5b, 0xca], "vcvtps2dq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x62, 0x0a], "vpunpckldq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x62, 0x4a, 0x01], "vpunpckldq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x62, 0xca], "vpunpckldq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x66, 0x0a], "vpcmpgtd k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x66, 0x4a, 0x01], "vpcmpgtd k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x66, 0xca], "vpcmpgtd k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6a, 0x0a], "vpunpckhdq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6a, 0xca], "vpunpckhdq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6b, 0x0a], "vpackssdw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6b, 0x4a, 0x01], "vpackssdw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6b, 0xca], "vpackssdw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6f, 0x0a], "vmovdqa32 zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6f, 0x4a, 0x01], "vmovdqa32 zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x6f, 0xca], "vmovdqa32 zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x70, 0x0a, 0xcc], "vpshufd zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x70, 0xca, 0xcc], "vpshufd zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x72, 0x0a, 0xcc], "vprold zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x72, 0xca, 0xcc], "vprold zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x76, 0x0a], "vpcmpeqd k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x76, 0x4a, 0x01], "vpcmpeqd k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x76, 0xca], "vpcmpeqd k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x78, 0x0a], "vcvttps2uqq zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x78, 0xca], "vcvttps2uqq zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x79, 0x0a], "vcvtps2uqq zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x79, 0xca], "vcvtps2uqq zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7a, 0x0a], "vcvttps2qq zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7a, 0xca], "vcvttps2qq zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7b, 0x0a], "vcvtps2qq zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7b, 0xca], "vcvtps2qq zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7f, 0x0a], "vmovdqa32 zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7f, 0x4a, 0x01], "vmovdqa32 zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0x7f, 0xca], "vmovdqa32 zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xd2, 0x0a], "vpsrld zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xd2, 0x4a, 0x01], "vpsrld zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xd2, 0xca], "vpsrld zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xdb, 0x0a], "vpandd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xdb, 0x4a, 0x01], "vpandd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xdb, 0xca], "vpandd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xdf, 0x0a], "vpandnd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xdf, 0x4a, 0x01], "vpandnd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xdf, 0xca], "vpandnd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xe2, 0x0a], "vpsrad zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xe2, 0x4a, 0x01], "vpsrad zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xe2, 0xca], "vpsrad zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xe7, 0x0a], "vmovntdq zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xe7, 0x4a, 0x01], "vmovntdq zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xeb, 0x0a], "vpord zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xeb, 0x4a, 0x01], "vpord zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xeb, 0xca], "vpord zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xef, 0x0a], "vpxord zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xef, 0x4a, 0x01], "vpxord zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xef, 0xca], "vpxord zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xf2, 0x0a], "vpslld zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xf2, 0x4a, 0x01], "vpslld zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xf2, 0xca], "vpslld zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xfa, 0x0a], "vpsubd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xfa, 0x4a, 0x01], "vpsubd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xfa, 0xca], "vpsubd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xfe, 0x0a], "vpaddd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xfe, 0x4a, 0x01], "vpaddd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x48, 0xfe, 0xca], "vpaddd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x62, 0x0a], "vpunpckldq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x62, 0xca], "vpunpckldq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x66, 0x0a], "vpcmpgtd k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x66, 0xca], "vpcmpgtd k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6a, 0xca], "vpunpckhdq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6b, 0x0a], "vpackssdw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6b, 0xca], "vpackssdw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6f, 0x0a], "vmovdqa32 zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqa32 zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x6f, 0xca], "vmovdqa32 zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x70, 0xca, 0xcc], "vpshufd zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x72, 0xca, 0xcc], "vprold zmm0{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x76, 0x0a], "vpcmpeqd k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x76, 0xca], "vpcmpeqd k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x78, 0xca], "vcvttps2uqq zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7a, 0xca], "vcvttps2qq zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7f, 0x0a], "vmovdqa32 zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqa32 zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0x7f, 0xca], "vmovdqa32 zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xd2, 0x0a], "vpsrld zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xd2, 0x4a, 0x01], "vpsrld zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xd2, 0xca], "vpsrld zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xdb, 0x0a], "vpandd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xdb, 0xca], "vpandd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xdf, 0x0a], "vpandnd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xdf, 0xca], "vpandnd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xe2, 0x0a], "vpsrad zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xe2, 0x4a, 0x01], "vpsrad zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xe2, 0xca], "vpsrad zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xeb, 0x0a], "vpord zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xeb, 0xca], "vpord zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xef, 0x0a], "vpxord zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xef, 0xca], "vpxord zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xf2, 0x0a], "vpslld zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xf2, 0x4a, 0x01], "vpslld zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xf2, 0xca], "vpslld zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xfa, 0x0a], "vpsubd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xfa, 0xca], "vpsubd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xfe, 0x0a], "vpaddd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x4d, 0xfe, 0xca], "vpaddd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x5b, 0x0a], "vcvtps2dq zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x5b, 0xca], "vcvtps2dq zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x62, 0x0a], "vpunpckldq zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x62, 0x4a, 0x01], "vpunpckldq zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x66, 0x0a], "vpcmpgtd k1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x66, 0x4a, 0x01], "vpcmpgtd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x6a, 0x0a], "vpunpckhdq zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x6b, 0x0a], "vpackssdw zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x6b, 0x4a, 0x01], "vpackssdw zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x70, 0x0a, 0xcc], "vpshufd zmm1, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x72, 0x0a, 0xcc], "vprold zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x76, 0x0a], "vpcmpeqd k1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x76, 0x4a, 0x01], "vpcmpeqd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x78, 0x0a], "vcvttps2uqq zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x79, 0x0a], "vcvtps2uqq zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x79, 0xca], "vcvtps2uqq zmm1{ru-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x7a, 0x0a], "vcvttps2qq zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x7b, 0x0a], "vcvtps2qq zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0x7b, 0xca], "vcvtps2qq zmm1{ru-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xdb, 0x0a], "vpandd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xdb, 0x4a, 0x01], "vpandd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xdf, 0x0a], "vpandnd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xdf, 0x4a, 0x01], "vpandnd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xeb, 0x0a], "vpord zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xeb, 0x4a, 0x01], "vpord zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xef, 0x0a], "vpxord zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xef, 0x4a, 0x01], "vpxord zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xfa, 0x0a], "vpsubd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xfa, 0x4a, 0x01], "vpsubd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xfe, 0x0a], "vpaddd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x58, 0xfe, 0x4a, 0x01], "vpaddd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x62, 0x0a], "vpunpckldq zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x66, 0x0a], "vpcmpgtd k1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x66, 0x4a, 0x01], "vpcmpgtd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x6b, 0x0a], "vpackssdw zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x76, 0x0a], "vpcmpeqd k1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x76, 0x4a, 0x01], "vpcmpeqd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{ru-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{ru-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xdb, 0x0a], "vpandd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xdf, 0x0a], "vpandnd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xeb, 0x0a], "vpord zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xef, 0x0a], "vpxord zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xfa, 0x0a], "vpsubd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xfe, 0x0a], "vpaddd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x5d, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x78, 0x5b, 0xca], "vcvtps2dq zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x78, 0x78, 0xca], "vcvttps2uqq zmm1{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x78, 0x79, 0xca], "vcvtps2uqq zmm1{rz-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x78, 0x7a, 0xca], "vcvttps2qq zmm1{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x78, 0x7b, 0xca], "vcvtps2qq zmm1{rz-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x7d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x7d, 0x78, 0xca], "vcvttps2uqq zmm1{k5}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x7d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{rz-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x7d, 0x7a, 0xca], "vcvttps2qq zmm1{k5}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x7d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{rz-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x5b, 0xca], "vcvtps2dq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x62, 0x0a], "vpunpckldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x62, 0xca], "vpunpckldq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6a, 0xca], "vpunpckhdq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6b, 0x0a], "vpackssdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6b, 0xca], "vpackssdw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6f, 0x0a], "vmovdqa32 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqa32 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x6f, 0xca], "vmovdqa32 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x70, 0xca, 0xcc], "vpshufd xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x72, 0xca, 0xcc], "vprold xmm0{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x78, 0xca], "vcvttps2uqq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x79, 0xca], "vcvtps2uqq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7a, 0xca], "vcvttps2qq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7b, 0xca], "vcvtps2qq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0x7f, 0xca], "vmovdqa32 xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xd2, 0x0a], "vpsrld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xd2, 0x4a, 0x01], "vpsrld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xd2, 0xca], "vpsrld xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xdb, 0x0a], "vpandd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xdb, 0xca], "vpandd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xdf, 0x0a], "vpandnd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xdf, 0xca], "vpandnd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xe2, 0x0a], "vpsrad xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xe2, 0x4a, 0x01], "vpsrad xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xe2, 0xca], "vpsrad xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xeb, 0x0a], "vpord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xeb, 0xca], "vpord xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xef, 0x0a], "vpxord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xef, 0xca], "vpxord xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xf2, 0x0a], "vpslld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xf2, 0x4a, 0x01], "vpslld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xf2, 0xca], "vpslld xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xfa, 0x0a], "vpsubd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xfa, 0xca], "vpsubd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xfe, 0x0a], "vpaddd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x8d, 0xfe, 0xca], "vpaddd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x5b, 0x0a], "vcvtps2dq xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x5b, 0x4a, 0x01], "vcvtps2dq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x62, 0x0a], "vpunpckldq xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x62, 0x4a, 0x01], "vpunpckldq xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x6a, 0x0a], "vpunpckhdq xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x6a, 0x4a, 0x01], "vpunpckhdq xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x6b, 0x0a], "vpackssdw xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x6b, 0x4a, 0x01], "vpackssdw xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x70, 0x0a, 0xcc], "vpshufd xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x70, 0x4a, 0x01, 0xcc], "vpshufd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x72, 0x0a, 0xcc], "vprold xmm0{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x72, 0x4a, 0x01, 0xcc], "vprold xmm0{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x78, 0x0a], "vcvttps2uqq xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x78, 0x4a, 0x01], "vcvttps2uqq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x79, 0x0a], "vcvtps2uqq xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x79, 0x4a, 0x01], "vcvtps2uqq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{rn-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x7a, 0x0a], "vcvttps2qq xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x7a, 0x4a, 0x01], "vcvttps2qq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x7b, 0x0a], "vcvtps2qq xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x7b, 0x4a, 0x01], "vcvtps2qq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{rn-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xdb, 0x0a], "vpandd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xdb, 0x4a, 0x01], "vpandd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xdf, 0x0a], "vpandnd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xdf, 0x4a, 0x01], "vpandnd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xeb, 0x0a], "vpord xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xeb, 0x4a, 0x01], "vpord xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xef, 0x0a], "vpxord xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xef, 0x4a, 0x01], "vpxord xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xfa, 0x0a], "vpsubd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xfa, 0x4a, 0x01], "vpsubd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xfe, 0x0a], "vpaddd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0x9d, 0xfe, 0x4a, 0x01], "vpaddd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x5b, 0xca], "vcvtps2dq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x62, 0x0a], "vpunpckldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x62, 0xca], "vpunpckldq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6a, 0xca], "vpunpckhdq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6b, 0x0a], "vpackssdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6b, 0xca], "vpackssdw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6f, 0x0a], "vmovdqa32 ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6f, 0x4a, 0x01], "vmovdqa32 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x6f, 0xca], "vmovdqa32 ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x70, 0xca, 0xcc], "vpshufd ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x72, 0xca, 0xcc], "vprold ymm0{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x78, 0xca], "vcvttps2uqq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x79, 0xca], "vcvtps2uqq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7a, 0xca], "vcvttps2qq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7b, 0xca], "vcvtps2qq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0x7f, 0xca], "vmovdqa32 ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xd2, 0x0a], "vpsrld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xd2, 0x4a, 0x01], "vpsrld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xd2, 0xca], "vpsrld ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xdb, 0x0a], "vpandd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xdb, 0xca], "vpandd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xdf, 0x0a], "vpandnd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xdf, 0xca], "vpandnd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xe2, 0x0a], "vpsrad ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xe2, 0x4a, 0x01], "vpsrad ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xe2, 0xca], "vpsrad ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xeb, 0x0a], "vpord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xeb, 0xca], "vpord ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xef, 0x0a], "vpxord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xef, 0xca], "vpxord ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xf2, 0x0a], "vpslld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xf2, 0x4a, 0x01], "vpslld ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xf2, 0xca], "vpslld ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xfa, 0x0a], "vpsubd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xfa, 0xca], "vpsubd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xfe, 0x0a], "vpaddd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xad, 0xfe, 0xca], "vpaddd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x5b, 0x0a], "vcvtps2dq ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x5b, 0x4a, 0x01], "vcvtps2dq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x62, 0x0a], "vpunpckldq ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x62, 0x4a, 0x01], "vpunpckldq ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x6a, 0x0a], "vpunpckhdq ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x6a, 0x4a, 0x01], "vpunpckhdq ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x6b, 0x0a], "vpackssdw ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x6b, 0x4a, 0x01], "vpackssdw ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x70, 0x0a, 0xcc], "vpshufd ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x70, 0x4a, 0x01, 0xcc], "vpshufd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x72, 0x0a, 0xcc], "vprold ymm0{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x72, 0x4a, 0x01, 0xcc], "vprold ymm0{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x78, 0x0a], "vcvttps2uqq ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x78, 0x4a, 0x01], "vcvttps2uqq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x79, 0x0a], "vcvtps2uqq ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x79, 0x4a, 0x01], "vcvtps2uqq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{rd-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x7a, 0x0a], "vcvttps2qq ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x7a, 0x4a, 0x01], "vcvttps2qq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x7b, 0x0a], "vcvtps2qq ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x7b, 0x4a, 0x01], "vcvtps2qq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{rd-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xdb, 0x0a], "vpandd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xdb, 0x4a, 0x01], "vpandd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xdf, 0x0a], "vpandnd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xdf, 0x4a, 0x01], "vpandnd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xeb, 0x0a], "vpord ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xeb, 0x4a, 0x01], "vpord ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xef, 0x0a], "vpxord ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xef, 0x4a, 0x01], "vpxord ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xfa, 0x0a], "vpsubd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xfa, 0x4a, 0x01], "vpsubd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xfe, 0x0a], "vpaddd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xbd, 0xfe, 0x4a, 0x01], "vpaddd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x62, 0x0a], "vpunpckldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x62, 0xca], "vpunpckldq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6a, 0xca], "vpunpckhdq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6b, 0x0a], "vpackssdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6b, 0xca], "vpackssdw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6f, 0x0a], "vmovdqa32 zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqa32 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x6f, 0xca], "vmovdqa32 zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x70, 0xca, 0xcc], "vpshufd zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x72, 0xca, 0xcc], "vprold zmm0{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x78, 0xca], "vcvttps2uqq zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7a, 0xca], "vcvttps2qq zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0x7f, 0xca], "vmovdqa32 zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xd2, 0x0a], "vpsrld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xd2, 0x4a, 0x01], "vpsrld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xd2, 0xca], "vpsrld zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xdb, 0x0a], "vpandd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xdb, 0xca], "vpandd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xdf, 0x0a], "vpandnd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xdf, 0xca], "vpandnd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xe2, 0x0a], "vpsrad zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xe2, 0x4a, 0x01], "vpsrad zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xe2, 0xca], "vpsrad zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xeb, 0x0a], "vpord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xeb, 0xca], "vpord zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xef, 0x0a], "vpxord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xef, 0xca], "vpxord zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xf2, 0x0a], "vpslld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xf2, 0x4a, 0x01], "vpslld zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xf2, 0xca], "vpslld zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xfa, 0x0a], "vpsubd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xfa, 0xca], "vpsubd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xfe, 0x0a], "vpaddd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xcd, 0xfe, 0xca], "vpaddd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x5b, 0x0a], "vcvtps2dq zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x5b, 0x4a, 0x01], "vcvtps2dq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x62, 0x0a], "vpunpckldq zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x62, 0x4a, 0x01], "vpunpckldq zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x6a, 0x0a], "vpunpckhdq zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x6a, 0x4a, 0x01], "vpunpckhdq zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x6b, 0x0a], "vpackssdw zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x6b, 0x4a, 0x01], "vpackssdw zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x70, 0x0a, 0xcc], "vpshufd zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x70, 0x4a, 0x01, 0xcc], "vpshufd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x72, 0x0a, 0xcc], "vprold zmm0{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x72, 0x4a, 0x01, 0xcc], "vprold zmm0{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x78, 0x0a], "vcvttps2uqq zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x78, 0x4a, 0x01], "vcvttps2uqq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x79, 0x0a], "vcvtps2uqq zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x79, 0x4a, 0x01], "vcvtps2uqq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{ru-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x7a, 0x0a], "vcvttps2qq zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x7a, 0x4a, 0x01], "vcvttps2qq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x7b, 0x0a], "vcvtps2qq zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x7b, 0x4a, 0x01], "vcvtps2qq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{ru-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xdb, 0x0a], "vpandd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xdb, 0x4a, 0x01], "vpandd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xdf, 0x0a], "vpandnd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xdf, 0x4a, 0x01], "vpandnd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xeb, 0x0a], "vpord zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xeb, 0x4a, 0x01], "vpord zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xef, 0x0a], "vpxord zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xef, 0x4a, 0x01], "vpxord zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xfa, 0x0a], "vpsubd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xfa, 0x4a, 0x01], "vpsubd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xfe, 0x0a], "vpaddd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xdd, 0xfe, 0x4a, 0x01], "vpaddd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xfd, 0x5b, 0xca], "vcvtps2dq zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xfd, 0x78, 0xca], "vcvttps2uqq zmm1{k5}{z}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xfd, 0x79, 0xca], "vcvtps2uqq zmm1{k5}{z}{rz-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xfd, 0x7a, 0xca], "vcvttps2qq zmm1{k5}{z}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7d, 0xfd, 0x7b, 0xca], "vcvtps2qq zmm1{k5}{z}{rz-sae}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x12, 0x0a], "vmovsldup xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x12, 0x4a, 0x01], "vmovsldup xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x12, 0xca], "vmovsldup xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x16, 0x0a], "vmovshdup xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x16, 0x4a, 0x01], "vmovshdup xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x16, 0xca], "vmovshdup xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x5b, 0x0a], "vcvttps2dq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x5b, 0xca], "vcvttps2dq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x6f, 0x0a], "vmovdqu32 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu32 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x6f, 0xca], "vmovdqu32 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x7a, 0x0a], "vcvtudq2pd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x7a, 0xca], "vcvtudq2pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x7f, 0x0a], "vmovdqu32 xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu32 xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0x7f, 0xca], "vmovdqu32 xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0xe6, 0x0a], "vcvtdq2pd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x08, 0xe6, 0xca], "vcvtdq2pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x12, 0x0a], "vmovsldup xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x12, 0x4a, 0x01], "vmovsldup xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x12, 0xca], "vmovsldup xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x16, 0x0a], "vmovshdup xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x16, 0x4a, 0x01], "vmovshdup xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x16, 0xca], "vmovshdup xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x5b, 0xca], "vcvttps2dq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x6f, 0x0a], "vmovdqu32 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu32 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x6f, 0xca], "vmovdqu32 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x7a, 0xca], "vcvtudq2pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x7f, 0x0a], "vmovdqu32 xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu32 xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0x7f, 0xca], "vmovdqu32 xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x0d, 0xe6, 0xca], "vcvtdq2pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x51, 0xca], "vsqrtss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x58, 0xca], "vaddss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x59, 0xca], "vmulss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x5b, 0x0a], "vcvttps2dq xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x5c, 0xca], "vsubss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x5e, 0xca], "vdivss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x7a, 0x0a], "vcvtudq2pd xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0xe6, 0x0a], "vcvtdq2pd xmm1, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x18, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x51, 0xca], "vsqrtss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x58, 0xca], "vaddss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x59, 0xca], "vmulss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x5c, 0xca], "vsubss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x5e, 0xca], "vdivss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x1d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x10, 0x0a], "vmovss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x10, 0x4a, 0x01], "vmovss xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x10, 0xca], "vmovss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x11, 0x0a], "vmovss dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x11, 0x4a, 0x01], "vmovss dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x11, 0xca], "vmovss xmm2, xmm0, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x12, 0x0a], "vmovsldup ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x12, 0x4a, 0x01], "vmovsldup ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x12, 0xca], "vmovsldup ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x16, 0x0a], "vmovshdup ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x16, 0x4a, 0x01], "vmovshdup ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x16, 0xca], "vmovshdup ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x51, 0x0a], "vsqrtss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x51, 0x4a, 0x01], "vsqrtss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x51, 0xca], "vsqrtss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x58, 0x0a], "vaddss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x58, 0x4a, 0x01], "vaddss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x58, 0xca], "vaddss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x59, 0x0a], "vmulss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x59, 0x4a, 0x01], "vmulss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x59, 0xca], "vmulss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5a, 0x0a], "vcvtss2sd xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5a, 0x4a, 0x01], "vcvtss2sd xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5a, 0xca], "vcvtss2sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5b, 0x0a], "vcvttps2dq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5b, 0xca], "vcvttps2dq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5c, 0x0a], "vsubss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5c, 0x4a, 0x01], "vsubss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5c, 0xca], "vsubss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5d, 0x0a], "vminss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5d, 0x4a, 0x01], "vminss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5d, 0xca], "vminss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5e, 0x0a], "vdivss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5e, 0x4a, 0x01], "vdivss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5e, 0xca], "vdivss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5f, 0x0a], "vmaxss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5f, 0x4a, 0x01], "vmaxss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x5f, 0xca], "vmaxss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x6f, 0x0a], "vmovdqu32 ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu32 ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x6f, 0xca], "vmovdqu32 ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x7a, 0x0a], "vcvtudq2pd ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x7a, 0xca], "vcvtudq2pd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x7f, 0x0a], "vmovdqu32 ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu32 ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0x7f, 0xca], "vmovdqu32 ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0xc2, 0x0a, 0xcc], "vcmpss k1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmpss k1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0xc2, 0xca, 0xcc], "vcmpss k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0xe6, 0x0a], "vcvtdq2pd ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x28, 0xe6, 0xca], "vcvtdq2pd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x10, 0x0a], "vmovss xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x10, 0x4a, 0x01], "vmovss xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x10, 0xca], "vmovss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x11, 0x0a], "vmovss dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x11, 0x4a, 0x01], "vmovss dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x11, 0xca], "vmovss xmm2{k5}, xmm0, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x12, 0x0a], "vmovsldup ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x12, 0x4a, 0x01], "vmovsldup ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x12, 0xca], "vmovsldup ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x16, 0x0a], "vmovshdup ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x16, 0x4a, 0x01], "vmovshdup ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x16, 0xca], "vmovshdup ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x51, 0x0a], "vsqrtss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x51, 0x4a, 0x01], "vsqrtss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x51, 0xca], "vsqrtss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x58, 0x0a], "vaddss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x58, 0x4a, 0x01], "vaddss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x58, 0xca], "vaddss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x59, 0x0a], "vmulss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x59, 0x4a, 0x01], "vmulss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x59, 0xca], "vmulss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5a, 0x0a], "vcvtss2sd xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5a, 0x4a, 0x01], "vcvtss2sd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5a, 0xca], "vcvtss2sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5b, 0xca], "vcvttps2dq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5c, 0x0a], "vsubss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5c, 0x4a, 0x01], "vsubss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5c, 0xca], "vsubss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5d, 0x0a], "vminss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5d, 0x4a, 0x01], "vminss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5d, 0xca], "vminss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5e, 0x0a], "vdivss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5e, 0x4a, 0x01], "vdivss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5e, 0xca], "vdivss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5f, 0x0a], "vmaxss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5f, 0x4a, 0x01], "vmaxss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x5f, 0xca], "vmaxss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x6f, 0x0a], "vmovdqu32 ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu32 ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x6f, 0xca], "vmovdqu32 ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x7a, 0xca], "vcvtudq2pd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x7f, 0x0a], "vmovdqu32 ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu32 ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0x7f, 0xca], "vmovdqu32 ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0xc2, 0x0a, 0xcc], "vcmpss k1{k5}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpss k1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0xc2, 0xca, 0xcc], "vcmpss k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x2d, 0xe6, 0xca], "vcvtdq2pd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x51, 0xca], "vsqrtss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x58, 0xca], "vaddss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x59, 0xca], "vmulss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x5b, 0x0a], "vcvttps2dq ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x5c, 0xca], "vsubss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x5e, 0xca], "vdivss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x7a, 0x0a], "vcvtudq2pd ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0xe6, 0x0a], "vcvtdq2pd ymm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x38, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x51, 0xca], "vsqrtss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x58, 0xca], "vaddss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x59, 0xca], "vmulss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x5c, 0xca], "vsubss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x5e, 0xca], "vdivss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x3d, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x12, 0x0a], "vmovsldup zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x12, 0x4a, 0x01], "vmovsldup zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x12, 0xca], "vmovsldup zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x16, 0x0a], "vmovshdup zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x16, 0x4a, 0x01], "vmovshdup zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x16, 0xca], "vmovshdup zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x5b, 0x0a], "vcvttps2dq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x5b, 0xca], "vcvttps2dq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x6f, 0x0a], "vmovdqu32 zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu32 zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x6f, 0xca], "vmovdqu32 zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x7a, 0x0a], "vcvtudq2pd zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x7a, 0xca], "vcvtudq2pd zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x7f, 0x0a], "vmovdqu32 zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu32 zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0x7f, 0xca], "vmovdqu32 zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0xe6, 0x0a], "vcvtdq2pd zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x48, 0xe6, 0xca], "vcvtdq2pd zmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x12, 0x0a], "vmovsldup zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x12, 0x4a, 0x01], "vmovsldup zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x12, 0xca], "vmovsldup zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x16, 0x0a], "vmovshdup zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x16, 0x4a, 0x01], "vmovshdup zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x16, 0xca], "vmovshdup zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x5b, 0xca], "vcvttps2dq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x6f, 0x0a], "vmovdqu32 zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu32 zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x6f, 0xca], "vmovdqu32 zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x7a, 0xca], "vcvtudq2pd zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x7f, 0x0a], "vmovdqu32 zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu32 zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0x7f, 0xca], "vmovdqu32 zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x4d, 0xe6, 0xca], "vcvtdq2pd zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x51, 0xca], "vsqrtss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x58, 0xca], "vaddss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x59, 0xca], "vmulss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x5b, 0x0a], "vcvttps2dq zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x5c, 0xca], "vsubss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x5e, 0xca], "vdivss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x7a, 0x0a], "vcvtudq2pd zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0xe6, 0x0a], "vcvtdq2pd zmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x58, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x51, 0xca], "vsqrtss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x58, 0xca], "vaddss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x59, 0xca], "vmulss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x5c, 0xca], "vsubss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x5e, 0xca], "vdivss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x5d, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x51, 0xca], "vsqrtss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x58, 0xca], "vaddss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x59, 0xca], "vmulss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x5a, 0xca], "vcvtss2sd xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x5b, 0xca], "vcvttps2dq zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x5c, 0xca], "vsubss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x5d, 0xca], "vminss xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x5e, 0xca], "vdivss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0x5f, 0xca], "vmaxss xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x78, 0xc2, 0xca, 0xcc], "vcmpss k1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x51, 0xca], "vsqrtss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x58, 0xca], "vaddss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x59, 0xca], "vmulss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x5a, 0xca], "vcvtss2sd xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x5b, 0xca], "vcvttps2dq zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x5c, 0xca], "vsubss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x5d, 0xca], "vminss xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x5e, 0xca], "vdivss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0x5f, 0xca], "vmaxss xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x7d, 0xc2, 0xca, 0xcc], "vcmpss k1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x12, 0x0a], "vmovsldup xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x12, 0x4a, 0x01], "vmovsldup xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x12, 0xca], "vmovsldup xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x16, 0x0a], "vmovshdup xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x16, 0x4a, 0x01], "vmovshdup xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x16, 0xca], "vmovshdup xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x5b, 0xca], "vcvttps2dq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x6f, 0x0a], "vmovdqu32 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu32 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x6f, 0xca], "vmovdqu32 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x7a, 0xca], "vcvtudq2pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0x7f, 0xca], "vmovdqu32 xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x8d, 0xe6, 0xca], "vcvtdq2pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x58, 0xca], "vaddss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x59, 0xca], "vmulss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x5b, 0x0a], "vcvttps2dq xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x5b, 0x4a, 0x01], "vcvttps2dq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x5c, 0xca], "vsubss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x5e, 0xca], "vdivss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x7a, 0x0a], "vcvtudq2pd xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0x7a, 0x4a, 0x01], "vcvtudq2pd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0xe6, 0x0a], "vcvtdq2pd xmm1{k5}{z}, dword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0x9d, 0xe6, 0x4a, 0x01], "vcvtdq2pd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x10, 0x0a], "vmovss xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x10, 0x4a, 0x01], "vmovss xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x10, 0xca], "vmovss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x11, 0xca], "vmovss xmm2{k5}{z}, xmm0, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x12, 0x0a], "vmovsldup ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x12, 0x4a, 0x01], "vmovsldup ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x12, 0xca], "vmovsldup ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x16, 0x0a], "vmovshdup ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x16, 0x4a, 0x01], "vmovshdup ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x16, 0xca], "vmovshdup ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x51, 0x0a], "vsqrtss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x51, 0x4a, 0x01], "vsqrtss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x51, 0xca], "vsqrtss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x58, 0x0a], "vaddss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x58, 0x4a, 0x01], "vaddss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x58, 0xca], "vaddss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x59, 0x0a], "vmulss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x59, 0x4a, 0x01], "vmulss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x59, 0xca], "vmulss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5a, 0x0a], "vcvtss2sd xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5a, 0x4a, 0x01], "vcvtss2sd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5a, 0xca], "vcvtss2sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5b, 0xca], "vcvttps2dq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5c, 0x0a], "vsubss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5c, 0x4a, 0x01], "vsubss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5c, 0xca], "vsubss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5d, 0x0a], "vminss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5d, 0x4a, 0x01], "vminss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5d, 0xca], "vminss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5e, 0x0a], "vdivss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5e, 0x4a, 0x01], "vdivss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5e, 0xca], "vdivss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5f, 0x0a], "vmaxss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5f, 0x4a, 0x01], "vmaxss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x5f, 0xca], "vmaxss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x6f, 0x0a], "vmovdqu32 ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu32 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x6f, 0xca], "vmovdqu32 ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x7a, 0xca], "vcvtudq2pd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0x7f, 0xca], "vmovdqu32 ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xad, 0xe6, 0xca], "vcvtdq2pd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x58, 0xca], "vaddss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x59, 0xca], "vmulss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x5b, 0x0a], "vcvttps2dq ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x5b, 0x4a, 0x01], "vcvttps2dq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x5c, 0xca], "vsubss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x5e, 0xca], "vdivss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x7a, 0x0a], "vcvtudq2pd ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0x7a, 0x4a, 0x01], "vcvtudq2pd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0xe6, 0x0a], "vcvtdq2pd ymm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xbd, 0xe6, 0x4a, 0x01], "vcvtdq2pd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x12, 0x0a], "vmovsldup zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x12, 0x4a, 0x01], "vmovsldup zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x12, 0xca], "vmovsldup zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x16, 0x0a], "vmovshdup zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x16, 0x4a, 0x01], "vmovshdup zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x16, 0xca], "vmovshdup zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x5b, 0xca], "vcvttps2dq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x6f, 0x0a], "vmovdqu32 zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu32 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x6f, 0xca], "vmovdqu32 zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x7a, 0xca], "vcvtudq2pd zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0x7f, 0xca], "vmovdqu32 zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xcd, 0xe6, 0xca], "vcvtdq2pd zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x58, 0xca], "vaddss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x59, 0xca], "vmulss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x5b, 0x0a], "vcvttps2dq zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x5b, 0x4a, 0x01], "vcvttps2dq zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x5c, 0xca], "vsubss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x5e, 0xca], "vdivss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x7a, 0x0a], "vcvtudq2pd zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0x7a, 0x4a, 0x01], "vcvtudq2pd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0xe6, 0x0a], "vcvtdq2pd zmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xdd, 0xe6, 0x4a, 0x01], "vcvtdq2pd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x51, 0xca], "vsqrtss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x58, 0xca], "vaddss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x59, 0xca], "vmulss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x5a, 0xca], "vcvtss2sd xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x5b, 0xca], "vcvttps2dq zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x5c, 0xca], "vsubss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x5d, 0xca], "vminss xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x5e, 0xca], "vdivss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7e, 0xfd, 0x5f, 0xca], "vmaxss xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x6f, 0x0a], "vmovdqu8 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu8 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x6f, 0xca], "vmovdqu8 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x7a, 0x0a], "vcvtudq2ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x7a, 0xca], "vcvtudq2ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x7f, 0x0a], "vmovdqu8 xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu8 xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x08, 0x7f, 0xca], "vmovdqu8 xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x6f, 0x0a], "vmovdqu8 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu8 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x6f, 0xca], "vmovdqu8 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x7a, 0xca], "vcvtudq2ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x7f, 0x0a], "vmovdqu8 xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu8 xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x0d, 0x7f, 0xca], "vmovdqu8 xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x18, 0x7a, 0x0a], "vcvtudq2ps xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x18, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x18, 0x7a, 0xca], "vcvtudq2ps zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x1d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x1d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x1d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x6f, 0x0a], "vmovdqu8 ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu8 ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x6f, 0xca], "vmovdqu8 ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x7a, 0x0a], "vcvtudq2ps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x7a, 0xca], "vcvtudq2ps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x7f, 0x0a], "vmovdqu8 ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu8 ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x28, 0x7f, 0xca], "vmovdqu8 ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x6f, 0x0a], "vmovdqu8 ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu8 ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x6f, 0xca], "vmovdqu8 ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x7a, 0xca], "vcvtudq2ps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x7f, 0x0a], "vmovdqu8 ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu8 ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x2d, 0x7f, 0xca], "vmovdqu8 ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x38, 0x7a, 0x0a], "vcvtudq2ps ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x38, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x38, 0x7a, 0xca], "vcvtudq2ps zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x3d, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x3d, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x3d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x6f, 0x0a], "vmovdqu8 zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu8 zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x6f, 0xca], "vmovdqu8 zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x7a, 0x0a], "vcvtudq2ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x7a, 0xca], "vcvtudq2ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x7f, 0x0a], "vmovdqu8 zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu8 zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x48, 0x7f, 0xca], "vmovdqu8 zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x6f, 0x0a], "vmovdqu8 zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu8 zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x6f, 0xca], "vmovdqu8 zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x7f, 0x0a], "vmovdqu8 zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu8 zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x4d, 0x7f, 0xca], "vmovdqu8 zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x58, 0x7a, 0x0a], "vcvtudq2ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x58, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x58, 0x7a, 0xca], "vcvtudq2ps zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x5d, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x5d, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x5d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x78, 0x7a, 0xca], "vcvtudq2ps zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x7d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x6f, 0x0a], "vmovdqu8 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu8 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x6f, 0xca], "vmovdqu8 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x7a, 0xca], "vcvtudq2ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x8d, 0x7f, 0xca], "vmovdqu8 xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x9d, 0x7a, 0x0a], "vcvtudq2ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x9d, 0x7a, 0x4a, 0x01], "vcvtudq2ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0x9d, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x6f, 0x0a], "vmovdqu8 ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu8 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x6f, 0xca], "vmovdqu8 ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x7a, 0xca], "vcvtudq2ps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xad, 0x7f, 0xca], "vmovdqu8 ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xbd, 0x7a, 0x0a], "vcvtudq2ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xbd, 0x7a, 0x4a, 0x01], "vcvtudq2ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xbd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x6f, 0x0a], "vmovdqu8 zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu8 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x6f, 0xca], "vmovdqu8 zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xcd, 0x7f, 0xca], "vmovdqu8 zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xdd, 0x7a, 0x0a], "vcvtudq2ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xdd, 0x7a, 0x4a, 0x01], "vcvtudq2ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xdd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0x7f, 0xfd, 0x7a, 0xca], "vcvtudq2ps zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x5b, 0x0a], "vcvtqq2ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x5b, 0xca], "vcvtqq2ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x78, 0x0a], "vcvttpd2udq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x78, 0xca], "vcvttpd2udq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x79, 0x0a], "vcvtpd2udq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x08, 0x79, 0xca], "vcvtpd2udq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x78, 0xca], "vcvttpd2udq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x0d, 0x79, 0xca], "vcvtpd2udq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x5b, 0x0a], "vcvtqq2ps xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x5b, 0xca], "vcvtqq2ps ymm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x78, 0x0a], "vcvttpd2udq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x79, 0x0a], "vcvtpd2udq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x18, 0x79, 0xca], "vcvtpd2udq ymm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x1d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x5b, 0x0a], "vcvtqq2ps xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x5b, 0xca], "vcvtqq2ps xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x78, 0x0a], "vcvttpd2udq xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x78, 0xca], "vcvttpd2udq xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x79, 0x0a], "vcvtpd2udq xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x28, 0x79, 0xca], "vcvtpd2udq xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x78, 0xca], "vcvttpd2udq xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x2d, 0x79, 0xca], "vcvtpd2udq xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x5b, 0x0a], "vcvtqq2ps xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x5b, 0xca], "vcvtqq2ps ymm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x78, 0x0a], "vcvttpd2udq xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x79, 0x0a], "vcvtpd2udq xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x38, 0x79, 0xca], "vcvtpd2udq ymm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x3d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x5b, 0x0a], "vcvtqq2ps ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x5b, 0xca], "vcvtqq2ps ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x78, 0x0a], "vcvttpd2udq ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x78, 0xca], "vcvttpd2udq ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x79, 0x0a], "vcvtpd2udq ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x48, 0x79, 0xca], "vcvtpd2udq ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x78, 0xca], "vcvttpd2udq ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x4d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x5b, 0x0a], "vcvtqq2ps ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x5b, 0xca], "vcvtqq2ps ymm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x78, 0x0a], "vcvttpd2udq ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x79, 0x0a], "vcvtpd2udq ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x58, 0x79, 0xca], "vcvtpd2udq ymm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x5d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x78, 0x5b, 0xca], "vcvtqq2ps ymm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x78, 0x78, 0xca], "vcvttpd2udq ymm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x78, 0x79, 0xca], "vcvtpd2udq ymm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x7d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x7d, 0x78, 0xca], "vcvttpd2udq ymm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x7d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x78, 0xca], "vcvttpd2udq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x8d, 0x79, 0xca], "vcvtpd2udq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0x9d, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x5b, 0xca], "vcvtqq2ps xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x78, 0xca], "vcvttpd2udq xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xad, 0x79, 0xca], "vcvtpd2udq xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x5b, 0x0a], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x5b, 0x4a, 0x01], "vcvtqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x78, 0x0a], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x78, 0x4a, 0x01], "vcvttpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x79, 0x0a], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x79, 0x4a, 0x01], "vcvtpd2udq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xbd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x78, 0xca], "vcvttpd2udq ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xcd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x5b, 0x0a], "vcvtqq2ps ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x5b, 0x4a, 0x01], "vcvtqq2ps ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x78, 0x0a], "vcvttpd2udq ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x78, 0x4a, 0x01], "vcvttpd2udq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x79, 0x0a], "vcvtpd2udq ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x79, 0x4a, 0x01], "vcvtpd2udq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xdd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xfd, 0x5b, 0xca], "vcvtqq2ps ymm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xfd, 0x78, 0xca], "vcvttpd2udq ymm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfc, 0xfd, 0x79, 0xca], "vcvtpd2udq ymm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x10, 0x0a], "vmovupd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x10, 0x4a, 0x01], "vmovupd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x10, 0xca], "vmovupd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x11, 0x0a], "vmovupd xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x11, 0x4a, 0x01], "vmovupd xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x11, 0xca], "vmovupd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x12, 0x0a], "vmovlpd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x12, 0x4a, 0x01], "vmovlpd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x13, 0x0a], "vmovlpd qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x13, 0x4a, 0x01], "vmovlpd qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x14, 0x0a], "vunpcklpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x14, 0x4a, 0x01], "vunpcklpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x14, 0xca], "vunpcklpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x15, 0x0a], "vunpckhpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x15, 0x4a, 0x01], "vunpckhpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x15, 0xca], "vunpckhpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x16, 0x0a], "vmovhpd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x16, 0x4a, 0x01], "vmovhpd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x17, 0x0a], "vmovhpd qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x17, 0x4a, 0x01], "vmovhpd qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x28, 0x0a], "vmovapd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x28, 0x4a, 0x01], "vmovapd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x28, 0xca], "vmovapd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x29, 0x0a], "vmovapd xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x29, 0x4a, 0x01], "vmovapd xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x29, 0xca], "vmovapd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x2b, 0x0a], "vmovntpd xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x2b, 0x4a, 0x01], "vmovntpd xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x51, 0x0a], "vsqrtpd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x51, 0x4a, 0x01], "vsqrtpd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x51, 0xca], "vsqrtpd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x54, 0x0a], "vandpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x54, 0x4a, 0x01], "vandpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x54, 0xca], "vandpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x55, 0x0a], "vandnpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x55, 0x4a, 0x01], "vandnpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x55, 0xca], "vandnpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x56, 0x0a], "vorpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x56, 0x4a, 0x01], "vorpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x56, 0xca], "vorpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x57, 0x0a], "vxorpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x57, 0x4a, 0x01], "vxorpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x57, 0xca], "vxorpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x58, 0x0a], "vaddpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x58, 0x4a, 0x01], "vaddpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x58, 0xca], "vaddpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x59, 0x0a], "vmulpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x59, 0x4a, 0x01], "vmulpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x59, 0xca], "vmulpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5a, 0x0a], "vcvtpd2ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5a, 0xca], "vcvtpd2ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5c, 0x0a], "vsubpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5c, 0x4a, 0x01], "vsubpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5c, 0xca], "vsubpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5d, 0x0a], "vminpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5d, 0x4a, 0x01], "vminpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5d, 0xca], "vminpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5e, 0x0a], "vdivpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5e, 0x4a, 0x01], "vdivpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5e, 0xca], "vdivpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5f, 0x0a], "vmaxpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5f, 0x4a, 0x01], "vmaxpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x5f, 0xca], "vmaxpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x60, 0x0a], "vpunpcklbw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x60, 0x4a, 0x01], "vpunpcklbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x60, 0xca], "vpunpcklbw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x61, 0x0a], "vpunpcklwd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x61, 0x4a, 0x01], "vpunpcklwd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x61, 0xca], "vpunpcklwd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x63, 0x0a], "vpacksswb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x63, 0x4a, 0x01], "vpacksswb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x63, 0xca], "vpacksswb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x64, 0x0a], "vpcmpgtb k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x64, 0x4a, 0x01], "vpcmpgtb k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x64, 0xca], "vpcmpgtb k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x65, 0x0a], "vpcmpgtw k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x65, 0x4a, 0x01], "vpcmpgtw k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x65, 0xca], "vpcmpgtw k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x67, 0x0a], "vpackuswb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x67, 0x4a, 0x01], "vpackuswb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x67, 0xca], "vpackuswb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x68, 0x0a], "vpunpckhbw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x68, 0x4a, 0x01], "vpunpckhbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x68, 0xca], "vpunpckhbw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x69, 0x0a], "vpunpckhwd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x69, 0x4a, 0x01], "vpunpckhwd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x69, 0xca], "vpunpckhwd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6c, 0x0a], "vpunpcklqdq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6c, 0xca], "vpunpcklqdq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6d, 0x0a], "vpunpckhqdq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6d, 0xca], "vpunpckhqdq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6e, 0x0a], "vmovd xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6e, 0x4a, 0x01], "vmovd xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6e, 0xca], "vmovd xmm1, edx"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6f, 0x0a], "vmovdqa64 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6f, 0x4a, 0x01], "vmovdqa64 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x6f, 0xca], "vmovdqa64 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x72, 0x0a, 0xcc], "vprolq xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x72, 0xca, 0xcc], "vprolq xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x74, 0x0a], "vpcmpeqb k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x74, 0x4a, 0x01], "vpcmpeqb k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x74, 0xca], "vpcmpeqb k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x75, 0x0a], "vpcmpeqw k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x75, 0x4a, 0x01], "vpcmpeqw k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x75, 0xca], "vpcmpeqw k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x78, 0x0a], "vcvttpd2uqq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x78, 0xca], "vcvttpd2uqq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x79, 0x0a], "vcvtpd2uqq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x79, 0xca], "vcvtpd2uqq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7a, 0x0a], "vcvttpd2qq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7a, 0xca], "vcvttpd2qq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7b, 0x0a], "vcvtpd2qq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7b, 0xca], "vcvtpd2qq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7e, 0x0a], "vmovd dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7e, 0x4a, 0x01], "vmovd dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7e, 0xca], "vmovd edx, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7f, 0x0a], "vmovdqa64 xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7f, 0x4a, 0x01], "vmovdqa64 xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0x7f, 0xca], "vmovdqa64 xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc2, 0x0a, 0xcc], "vcmppd k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc2, 0xca, 0xcc], "vcmppd k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc4, 0x0a, 0xcc], "vpinsrw xmm1, xmm0, word [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc4, 0x4a, 0x01, 0xcc], "vpinsrw xmm1, xmm0, word [bp + si * 1 + 0x2], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc4, 0xca, 0xcc], "vpinsrw xmm1, xmm0, edx, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc5, 0xca, 0xcc], "vpextrw ecx, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc6, 0x0a, 0xcc], "vshufpd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xc6, 0xca, 0xcc], "vshufpd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd1, 0x0a], "vpsrlw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd1, 0x4a, 0x01], "vpsrlw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd1, 0xca], "vpsrlw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd3, 0x0a], "vpsrlq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd3, 0x4a, 0x01], "vpsrlq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd3, 0xca], "vpsrlq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd4, 0x0a], "vpaddq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd4, 0x4a, 0x01], "vpaddq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd4, 0xca], "vpaddq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd5, 0x0a], "vpmullw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd5, 0x4a, 0x01], "vpmullw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd5, 0xca], "vpmullw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd6, 0x0a], "vmovq qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd6, 0x4a, 0x01], "vmovq qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd6, 0xca], "vmovq xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd8, 0x0a], "vpsubusb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd8, 0x4a, 0x01], "vpsubusb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd8, 0xca], "vpsubusb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd9, 0x0a], "vpsubusw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd9, 0x4a, 0x01], "vpsubusw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xd9, 0xca], "vpsubusw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xda, 0x0a], "vpminub xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xda, 0x4a, 0x01], "vpminub xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xda, 0xca], "vpminub xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdb, 0x0a], "vpandq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdb, 0x4a, 0x01], "vpandq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdb, 0xca], "vpandq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdc, 0x0a], "vpaddusb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdc, 0x4a, 0x01], "vpaddusb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdc, 0xca], "vpaddusb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdd, 0x0a], "vpaddusw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdd, 0x4a, 0x01], "vpaddusw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdd, 0xca], "vpaddusw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xde, 0x0a], "vpmaxub xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xde, 0x4a, 0x01], "vpmaxub xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xde, 0xca], "vpmaxub xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdf, 0x0a], "vpandnq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdf, 0x4a, 0x01], "vpandnq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xdf, 0xca], "vpandnq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe0, 0x0a], "vpavgb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe0, 0x4a, 0x01], "vpavgb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe0, 0xca], "vpavgb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe1, 0x0a], "vpsraw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe1, 0x4a, 0x01], "vpsraw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe1, 0xca], "vpsraw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe2, 0x0a], "vpsraq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe2, 0x4a, 0x01], "vpsraq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe2, 0xca], "vpsraq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe3, 0x0a], "vpavgw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe3, 0x4a, 0x01], "vpavgw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe3, 0xca], "vpavgw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe4, 0x0a], "vpmulhuw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe4, 0x4a, 0x01], "vpmulhuw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe4, 0xca], "vpmulhuw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe5, 0x0a], "vpmulhw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe5, 0x4a, 0x01], "vpmulhw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe5, 0xca], "vpmulhw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe6, 0x0a], "vcvttpd2dq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe6, 0xca], "vcvttpd2dq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe8, 0x0a], "vpsubsb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe8, 0x4a, 0x01], "vpsubsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe8, 0xca], "vpsubsb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe9, 0x0a], "vpsubsw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe9, 0x4a, 0x01], "vpsubsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xe9, 0xca], "vpsubsw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xea, 0x0a], "vpminsw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xea, 0x4a, 0x01], "vpminsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xea, 0xca], "vpminsw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xeb, 0x0a], "vporq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xeb, 0x4a, 0x01], "vporq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xeb, 0xca], "vporq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xec, 0x0a], "vpaddsb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xec, 0x4a, 0x01], "vpaddsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xec, 0xca], "vpaddsb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xed, 0x0a], "vpaddsw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xed, 0x4a, 0x01], "vpaddsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xed, 0xca], "vpaddsw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xee, 0x0a], "vpmaxsw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xee, 0x4a, 0x01], "vpmaxsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xee, 0xca], "vpmaxsw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xef, 0x0a], "vpxorq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xef, 0x4a, 0x01], "vpxorq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xef, 0xca], "vpxorq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf1, 0x0a], "vpsllw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf1, 0x4a, 0x01], "vpsllw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf1, 0xca], "vpsllw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf3, 0x0a], "vpsllq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf3, 0x4a, 0x01], "vpsllq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf3, 0xca], "vpsllq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf4, 0x0a], "vpmuludq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf4, 0x4a, 0x01], "vpmuludq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf4, 0xca], "vpmuludq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf5, 0x0a], "vpmaddwd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf5, 0x4a, 0x01], "vpmaddwd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf5, 0xca], "vpmaddwd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf6, 0x0a], "vpsadbw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf6, 0x4a, 0x01], "vpsadbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf6, 0xca], "vpsadbw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf8, 0x0a], "vpsubb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf8, 0x4a, 0x01], "vpsubb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf8, 0xca], "vpsubb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf9, 0x0a], "vpsubw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf9, 0x4a, 0x01], "vpsubw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xf9, 0xca], "vpsubw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfb, 0x0a], "vpsubq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfb, 0x4a, 0x01], "vpsubq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfb, 0xca], "vpsubq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfc, 0x0a], "vpaddb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfc, 0x4a, 0x01], "vpaddb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfc, 0xca], "vpaddb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfd, 0x0a], "vpaddw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfd, 0x4a, 0x01], "vpaddw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x08, 0xfd, 0xca], "vpaddw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x10, 0x0a], "vmovupd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x10, 0x4a, 0x01], "vmovupd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x10, 0xca], "vmovupd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x11, 0x0a], "vmovupd xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x11, 0x4a, 0x01], "vmovupd xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x11, 0xca], "vmovupd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x14, 0x0a], "vunpcklpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x14, 0xca], "vunpcklpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x15, 0x0a], "vunpckhpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x15, 0xca], "vunpckhpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x28, 0x0a], "vmovapd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x28, 0x4a, 0x01], "vmovapd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x28, 0xca], "vmovapd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x29, 0x0a], "vmovapd xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x29, 0x4a, 0x01], "vmovapd xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x29, 0xca], "vmovapd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x51, 0x0a], "vsqrtpd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x51, 0xca], "vsqrtpd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x54, 0x0a], "vandpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x54, 0xca], "vandpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x55, 0x0a], "vandnpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x55, 0xca], "vandnpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x56, 0x0a], "vorpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x56, 0xca], "vorpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x57, 0x0a], "vxorpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x57, 0xca], "vxorpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x58, 0x0a], "vaddpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x58, 0xca], "vaddpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x59, 0x0a], "vmulpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x59, 0xca], "vmulpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5c, 0x0a], "vsubpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5c, 0xca], "vsubpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5d, 0x0a], "vminpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5d, 0xca], "vminpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5e, 0x0a], "vdivpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5e, 0xca], "vdivpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5f, 0x0a], "vmaxpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x5f, 0xca], "vmaxpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x60, 0x0a], "vpunpcklbw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x60, 0x4a, 0x01], "vpunpcklbw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x60, 0xca], "vpunpcklbw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x61, 0x0a], "vpunpcklwd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x61, 0x4a, 0x01], "vpunpcklwd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x61, 0xca], "vpunpcklwd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x63, 0x0a], "vpacksswb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x63, 0x4a, 0x01], "vpacksswb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x63, 0xca], "vpacksswb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x64, 0x0a], "vpcmpgtb k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x64, 0x4a, 0x01], "vpcmpgtb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x64, 0xca], "vpcmpgtb k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x65, 0x0a], "vpcmpgtw k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x65, 0x4a, 0x01], "vpcmpgtw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x65, 0xca], "vpcmpgtw k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x67, 0x0a], "vpackuswb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x67, 0x4a, 0x01], "vpackuswb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x67, 0xca], "vpackuswb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x68, 0x0a], "vpunpckhbw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x68, 0x4a, 0x01], "vpunpckhbw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x68, 0xca], "vpunpckhbw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x69, 0x0a], "vpunpckhwd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x69, 0x4a, 0x01], "vpunpckhwd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x69, 0xca], "vpunpckhwd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6c, 0xca], "vpunpcklqdq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6d, 0xca], "vpunpckhqdq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6f, 0x0a], "vmovdqa64 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqa64 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x6f, 0xca], "vmovdqa64 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x72, 0xca, 0xcc], "vprolq xmm0{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x74, 0x0a], "vpcmpeqb k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x74, 0x4a, 0x01], "vpcmpeqb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x74, 0xca], "vpcmpeqb k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x75, 0x0a], "vpcmpeqw k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x75, 0x4a, 0x01], "vpcmpeqw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x75, 0xca], "vpcmpeqw k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x78, 0xca], "vcvttpd2uqq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x79, 0xca], "vcvtpd2uqq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7a, 0xca], "vcvttpd2qq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7b, 0xca], "vcvtpd2qq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7f, 0x0a], "vmovdqa64 xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqa64 xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0x7f, 0xca], "vmovdqa64 xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xc6, 0xca, 0xcc], "vshufpd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd1, 0x0a], "vpsrlw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd1, 0x4a, 0x01], "vpsrlw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd1, 0xca], "vpsrlw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd3, 0x0a], "vpsrlq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd3, 0x4a, 0x01], "vpsrlq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd3, 0xca], "vpsrlq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd4, 0x0a], "vpaddq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd4, 0xca], "vpaddq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd5, 0x0a], "vpmullw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd5, 0x4a, 0x01], "vpmullw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd5, 0xca], "vpmullw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd8, 0x0a], "vpsubusb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd8, 0x4a, 0x01], "vpsubusb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd8, 0xca], "vpsubusb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd9, 0x0a], "vpsubusw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd9, 0x4a, 0x01], "vpsubusw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xd9, 0xca], "vpsubusw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xda, 0x0a], "vpminub xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xda, 0x4a, 0x01], "vpminub xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xda, 0xca], "vpminub xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdb, 0x0a], "vpandq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdb, 0xca], "vpandq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdc, 0x0a], "vpaddusb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdc, 0x4a, 0x01], "vpaddusb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdc, 0xca], "vpaddusb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdd, 0x0a], "vpaddusw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdd, 0x4a, 0x01], "vpaddusw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdd, 0xca], "vpaddusw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xde, 0x0a], "vpmaxub xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xde, 0x4a, 0x01], "vpmaxub xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xde, 0xca], "vpmaxub xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdf, 0x0a], "vpandnq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xdf, 0xca], "vpandnq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe0, 0x0a], "vpavgb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe0, 0x4a, 0x01], "vpavgb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe0, 0xca], "vpavgb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe1, 0x0a], "vpsraw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe1, 0x4a, 0x01], "vpsraw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe1, 0xca], "vpsraw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe2, 0x0a], "vpsraq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe2, 0x4a, 0x01], "vpsraq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe2, 0xca], "vpsraq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe3, 0x0a], "vpavgw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe3, 0x4a, 0x01], "vpavgw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe3, 0xca], "vpavgw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe4, 0x0a], "vpmulhuw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe4, 0x4a, 0x01], "vpmulhuw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe4, 0xca], "vpmulhuw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe5, 0x0a], "vpmulhw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe5, 0x4a, 0x01], "vpmulhw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe5, 0xca], "vpmulhw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe8, 0x0a], "vpsubsb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe8, 0x4a, 0x01], "vpsubsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe8, 0xca], "vpsubsb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe9, 0x0a], "vpsubsw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe9, 0x4a, 0x01], "vpsubsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xe9, 0xca], "vpsubsw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xea, 0x0a], "vpminsw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xea, 0x4a, 0x01], "vpminsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xea, 0xca], "vpminsw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xeb, 0x0a], "vporq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xeb, 0xca], "vporq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xec, 0x0a], "vpaddsb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xec, 0x4a, 0x01], "vpaddsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xec, 0xca], "vpaddsb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xed, 0x0a], "vpaddsw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xed, 0x4a, 0x01], "vpaddsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xed, 0xca], "vpaddsw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xee, 0x0a], "vpmaxsw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xee, 0x4a, 0x01], "vpmaxsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xee, 0xca], "vpmaxsw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xef, 0x0a], "vpxorq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xef, 0xca], "vpxorq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf1, 0x0a], "vpsllw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf1, 0x4a, 0x01], "vpsllw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf1, 0xca], "vpsllw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf3, 0x0a], "vpsllq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf3, 0x4a, 0x01], "vpsllq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf3, 0xca], "vpsllq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf4, 0x0a], "vpmuludq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf4, 0xca], "vpmuludq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf5, 0x0a], "vpmaddwd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf5, 0x4a, 0x01], "vpmaddwd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf5, 0xca], "vpmaddwd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf8, 0x0a], "vpsubb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf8, 0x4a, 0x01], "vpsubb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf8, 0xca], "vpsubb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf9, 0x0a], "vpsubw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf9, 0x4a, 0x01], "vpsubw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xf9, 0xca], "vpsubw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfb, 0x0a], "vpsubq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfb, 0xca], "vpsubq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfc, 0x0a], "vpaddb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfc, 0x4a, 0x01], "vpaddb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfc, 0xca], "vpaddb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfd, 0x0a], "vpaddw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfd, 0x4a, 0x01], "vpaddw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x0d, 0xfd, 0xca], "vpaddw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x14, 0x0a], "vunpcklpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x14, 0x4a, 0x01], "vunpcklpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x15, 0x0a], "vunpckhpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x15, 0x4a, 0x01], "vunpckhpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x51, 0x0a], "vsqrtpd xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x51, 0x4a, 0x01], "vsqrtpd xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x51, 0xca], "vsqrtpd zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x54, 0x0a], "vandpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x54, 0x4a, 0x01], "vandpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x55, 0x0a], "vandnpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x55, 0x4a, 0x01], "vandnpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x56, 0x0a], "vorpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x56, 0x4a, 0x01], "vorpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x57, 0x0a], "vxorpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x57, 0x4a, 0x01], "vxorpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x58, 0x0a], "vaddpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x58, 0x4a, 0x01], "vaddpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x58, 0xca], "vaddpd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x59, 0x0a], "vmulpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x59, 0x4a, 0x01], "vmulpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x59, 0xca], "vmulpd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5a, 0x0a], "vcvtpd2ps xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5a, 0xca], "vcvtpd2ps ymm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5c, 0x0a], "vsubpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5c, 0x4a, 0x01], "vsubpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5c, 0xca], "vsubpd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5d, 0x0a], "vminpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5d, 0x4a, 0x01], "vminpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5e, 0x0a], "vdivpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5e, 0x4a, 0x01], "vdivpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5e, 0xca], "vdivpd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5f, 0x0a], "vmaxpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x5f, 0x4a, 0x01], "vmaxpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x6c, 0x0a], "vpunpcklqdq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x6d, 0x0a], "vpunpckhqdq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x72, 0x0a, 0xcc], "vprolq xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x78, 0x0a], "vcvttpd2uqq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x79, 0x0a], "vcvtpd2uqq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x79, 0xca], "vcvtpd2uqq zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x7a, 0x0a], "vcvttpd2qq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x7b, 0x0a], "vcvtpd2qq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0x7b, 0xca], "vcvtpd2qq zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xc2, 0x0a, 0xcc], "vcmppd k1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xc6, 0x0a, 0xcc], "vshufpd xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xd4, 0x0a], "vpaddq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xd4, 0x4a, 0x01], "vpaddq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xdb, 0x0a], "vpandq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xdb, 0x4a, 0x01], "vpandq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xdf, 0x0a], "vpandnq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xdf, 0x4a, 0x01], "vpandnq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xe6, 0x0a], "vcvttpd2dq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xeb, 0x0a], "vporq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xeb, 0x4a, 0x01], "vporq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xef, 0x0a], "vpxorq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xef, 0x4a, 0x01], "vpxorq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xf4, 0x0a], "vpmuludq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xf4, 0x4a, 0x01], "vpmuludq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xfb, 0x0a], "vpsubq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x18, 0xfb, 0x4a, 0x01], "vpsubq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x14, 0x0a], "vunpcklpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x15, 0x0a], "vunpckhpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x51, 0x0a], "vsqrtpd xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x51, 0xca], "vsqrtpd zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x54, 0x0a], "vandpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x55, 0x0a], "vandnpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x56, 0x0a], "vorpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x57, 0x0a], "vxorpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x58, 0x0a], "vaddpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x58, 0xca], "vaddpd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x59, 0x0a], "vmulpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x59, 0xca], "vmulpd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5c, 0x0a], "vsubpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5c, 0xca], "vsubpd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5d, 0x0a], "vminpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5e, 0x0a], "vdivpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5e, 0xca], "vdivpd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5f, 0x0a], "vmaxpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xd4, 0x0a], "vpaddq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xdb, 0x0a], "vpandq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xdf, 0x0a], "vpandnq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xeb, 0x0a], "vporq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xef, 0x0a], "vpxorq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xf4, 0x0a], "vpmuludq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xfb, 0x0a], "vpsubq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x1d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x10, 0x0a], "vmovupd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x10, 0x4a, 0x01], "vmovupd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x10, 0xca], "vmovupd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x11, 0x0a], "vmovupd ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x11, 0x4a, 0x01], "vmovupd ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x11, 0xca], "vmovupd ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x14, 0x0a], "vunpcklpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x14, 0x4a, 0x01], "vunpcklpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x14, 0xca], "vunpcklpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x15, 0x0a], "vunpckhpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x15, 0x4a, 0x01], "vunpckhpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x15, 0xca], "vunpckhpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x28, 0x0a], "vmovapd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x28, 0x4a, 0x01], "vmovapd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x28, 0xca], "vmovapd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x29, 0x0a], "vmovapd ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x29, 0x4a, 0x01], "vmovapd ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x29, 0xca], "vmovapd ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2b, 0x0a], "vmovntpd ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2b, 0x4a, 0x01], "vmovntpd ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2e, 0x0a], "vucomisd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2e, 0x4a, 0x01], "vucomisd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2e, 0xca], "vucomisd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2f, 0x0a], "vcomisd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2f, 0x4a, 0x01], "vcomisd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x2f, 0xca], "vcomisd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x51, 0x0a], "vsqrtpd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x51, 0x4a, 0x01], "vsqrtpd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x51, 0xca], "vsqrtpd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x54, 0x0a], "vandpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x54, 0x4a, 0x01], "vandpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x54, 0xca], "vandpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x55, 0x0a], "vandnpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x55, 0x4a, 0x01], "vandnpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x55, 0xca], "vandnpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x56, 0x0a], "vorpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x56, 0x4a, 0x01], "vorpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x56, 0xca], "vorpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x57, 0x0a], "vxorpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x57, 0x4a, 0x01], "vxorpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x57, 0xca], "vxorpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x58, 0x0a], "vaddpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x58, 0x4a, 0x01], "vaddpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x58, 0xca], "vaddpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x59, 0x0a], "vmulpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x59, 0x4a, 0x01], "vmulpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x59, 0xca], "vmulpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5a, 0x0a], "vcvtpd2ps xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5a, 0xca], "vcvtpd2ps xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5c, 0x0a], "vsubpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5c, 0x4a, 0x01], "vsubpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5c, 0xca], "vsubpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5d, 0x0a], "vminpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5d, 0x4a, 0x01], "vminpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5d, 0xca], "vminpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5e, 0x0a], "vdivpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5e, 0x4a, 0x01], "vdivpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5e, 0xca], "vdivpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5f, 0x0a], "vmaxpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5f, 0x4a, 0x01], "vmaxpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x5f, 0xca], "vmaxpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x60, 0x0a], "vpunpcklbw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x60, 0x4a, 0x01], "vpunpcklbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x60, 0xca], "vpunpcklbw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x61, 0x0a], "vpunpcklwd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x61, 0x4a, 0x01], "vpunpcklwd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x61, 0xca], "vpunpcklwd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x63, 0x0a], "vpacksswb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x63, 0x4a, 0x01], "vpacksswb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x63, 0xca], "vpacksswb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x64, 0x0a], "vpcmpgtb k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x64, 0x4a, 0x01], "vpcmpgtb k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x64, 0xca], "vpcmpgtb k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x65, 0x0a], "vpcmpgtw k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x65, 0x4a, 0x01], "vpcmpgtw k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x65, 0xca], "vpcmpgtw k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x67, 0x0a], "vpackuswb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x67, 0x4a, 0x01], "vpackuswb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x67, 0xca], "vpackuswb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x68, 0x0a], "vpunpckhbw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x68, 0x4a, 0x01], "vpunpckhbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x68, 0xca], "vpunpckhbw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x69, 0x0a], "vpunpckhwd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x69, 0x4a, 0x01], "vpunpckhwd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x69, 0xca], "vpunpckhwd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6c, 0x0a], "vpunpcklqdq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6c, 0xca], "vpunpcklqdq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6d, 0x0a], "vpunpckhqdq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6d, 0xca], "vpunpckhqdq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6f, 0x0a], "vmovdqa64 ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6f, 0x4a, 0x01], "vmovdqa64 ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x6f, 0xca], "vmovdqa64 ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x72, 0x0a, 0xcc], "vprolq ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x72, 0xca, 0xcc], "vprolq ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x74, 0x0a], "vpcmpeqb k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x74, 0x4a, 0x01], "vpcmpeqb k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x74, 0xca], "vpcmpeqb k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x75, 0x0a], "vpcmpeqw k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x75, 0x4a, 0x01], "vpcmpeqw k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x75, 0xca], "vpcmpeqw k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x78, 0x0a], "vcvttpd2uqq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x78, 0xca], "vcvttpd2uqq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x79, 0x0a], "vcvtpd2uqq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x79, 0xca], "vcvtpd2uqq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7a, 0x0a], "vcvttpd2qq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7a, 0xca], "vcvttpd2qq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7b, 0x0a], "vcvtpd2qq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7b, 0xca], "vcvtpd2qq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7f, 0x0a], "vmovdqa64 ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7f, 0x4a, 0x01], "vmovdqa64 ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0x7f, 0xca], "vmovdqa64 ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xc2, 0x0a, 0xcc], "vcmppd k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xc2, 0xca, 0xcc], "vcmppd k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xc6, 0x0a, 0xcc], "vshufpd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xc6, 0xca, 0xcc], "vshufpd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd1, 0x0a], "vpsrlw ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd1, 0x4a, 0x01], "vpsrlw ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd1, 0xca], "vpsrlw ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd3, 0x0a], "vpsrlq ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd3, 0x4a, 0x01], "vpsrlq ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd3, 0xca], "vpsrlq ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd4, 0x0a], "vpaddq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd4, 0x4a, 0x01], "vpaddq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd4, 0xca], "vpaddq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd5, 0x0a], "vpmullw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd5, 0x4a, 0x01], "vpmullw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd5, 0xca], "vpmullw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd8, 0x0a], "vpsubusb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd8, 0x4a, 0x01], "vpsubusb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd8, 0xca], "vpsubusb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd9, 0x0a], "vpsubusw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd9, 0x4a, 0x01], "vpsubusw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xd9, 0xca], "vpsubusw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xda, 0x0a], "vpminub ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xda, 0x4a, 0x01], "vpminub ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xda, 0xca], "vpminub ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdb, 0x0a], "vpandq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdb, 0x4a, 0x01], "vpandq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdb, 0xca], "vpandq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdc, 0x0a], "vpaddusb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdc, 0x4a, 0x01], "vpaddusb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdc, 0xca], "vpaddusb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdd, 0x0a], "vpaddusw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdd, 0x4a, 0x01], "vpaddusw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdd, 0xca], "vpaddusw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xde, 0x0a], "vpmaxub ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xde, 0x4a, 0x01], "vpmaxub ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xde, 0xca], "vpmaxub ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdf, 0x0a], "vpandnq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdf, 0x4a, 0x01], "vpandnq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xdf, 0xca], "vpandnq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe0, 0x0a], "vpavgb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe0, 0x4a, 0x01], "vpavgb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe0, 0xca], "vpavgb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe1, 0x0a], "vpsraw ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe1, 0x4a, 0x01], "vpsraw ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe1, 0xca], "vpsraw ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe2, 0x0a], "vpsraq ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe2, 0x4a, 0x01], "vpsraq ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe2, 0xca], "vpsraq ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe3, 0x0a], "vpavgw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe3, 0x4a, 0x01], "vpavgw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe3, 0xca], "vpavgw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe4, 0x0a], "vpmulhuw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe4, 0x4a, 0x01], "vpmulhuw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe4, 0xca], "vpmulhuw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe5, 0x0a], "vpmulhw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe5, 0x4a, 0x01], "vpmulhw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe5, 0xca], "vpmulhw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe6, 0x0a], "vcvttpd2dq xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe6, 0xca], "vcvttpd2dq xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe8, 0x0a], "vpsubsb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe8, 0x4a, 0x01], "vpsubsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe8, 0xca], "vpsubsb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe9, 0x0a], "vpsubsw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe9, 0x4a, 0x01], "vpsubsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xe9, 0xca], "vpsubsw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xea, 0x0a], "vpminsw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xea, 0x4a, 0x01], "vpminsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xea, 0xca], "vpminsw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xeb, 0x0a], "vporq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xeb, 0x4a, 0x01], "vporq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xeb, 0xca], "vporq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xec, 0x0a], "vpaddsb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xec, 0x4a, 0x01], "vpaddsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xec, 0xca], "vpaddsb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xed, 0x0a], "vpaddsw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xed, 0x4a, 0x01], "vpaddsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xed, 0xca], "vpaddsw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xee, 0x0a], "vpmaxsw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xee, 0x4a, 0x01], "vpmaxsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xee, 0xca], "vpmaxsw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xef, 0x0a], "vpxorq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xef, 0x4a, 0x01], "vpxorq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xef, 0xca], "vpxorq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf1, 0x0a], "vpsllw ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf1, 0x4a, 0x01], "vpsllw ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf1, 0xca], "vpsllw ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf3, 0x0a], "vpsllq ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf3, 0x4a, 0x01], "vpsllq ymm1, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf3, 0xca], "vpsllq ymm1, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf4, 0x0a], "vpmuludq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf4, 0x4a, 0x01], "vpmuludq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf4, 0xca], "vpmuludq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf5, 0x0a], "vpmaddwd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf5, 0x4a, 0x01], "vpmaddwd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf5, 0xca], "vpmaddwd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf6, 0x0a], "vpsadbw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf6, 0x4a, 0x01], "vpsadbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf6, 0xca], "vpsadbw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf8, 0x0a], "vpsubb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf8, 0x4a, 0x01], "vpsubb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf8, 0xca], "vpsubb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf9, 0x0a], "vpsubw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf9, 0x4a, 0x01], "vpsubw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xf9, 0xca], "vpsubw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfb, 0x0a], "vpsubq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfb, 0x4a, 0x01], "vpsubq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfb, 0xca], "vpsubq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfc, 0x0a], "vpaddb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfc, 0x4a, 0x01], "vpaddb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfc, 0xca], "vpaddb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfd, 0x0a], "vpaddw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfd, 0x4a, 0x01], "vpaddw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x28, 0xfd, 0xca], "vpaddw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x10, 0x0a], "vmovupd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x10, 0x4a, 0x01], "vmovupd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x10, 0xca], "vmovupd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x11, 0x0a], "vmovupd ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x11, 0x4a, 0x01], "vmovupd ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x11, 0xca], "vmovupd ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x14, 0x0a], "vunpcklpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x14, 0xca], "vunpcklpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x15, 0x0a], "vunpckhpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x15, 0xca], "vunpckhpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x28, 0x0a], "vmovapd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x28, 0x4a, 0x01], "vmovapd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x28, 0xca], "vmovapd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x29, 0x0a], "vmovapd ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x29, 0x4a, 0x01], "vmovapd ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x29, 0xca], "vmovapd ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x51, 0x0a], "vsqrtpd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x51, 0xca], "vsqrtpd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x54, 0x0a], "vandpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x54, 0xca], "vandpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x55, 0x0a], "vandnpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x55, 0xca], "vandnpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x56, 0x0a], "vorpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x56, 0xca], "vorpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x57, 0x0a], "vxorpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x57, 0xca], "vxorpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x58, 0x0a], "vaddpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x58, 0xca], "vaddpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x59, 0x0a], "vmulpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x59, 0xca], "vmulpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5c, 0x0a], "vsubpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5c, 0xca], "vsubpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5d, 0x0a], "vminpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5d, 0xca], "vminpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5e, 0x0a], "vdivpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5e, 0xca], "vdivpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5f, 0x0a], "vmaxpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x5f, 0xca], "vmaxpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x60, 0x0a], "vpunpcklbw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x60, 0x4a, 0x01], "vpunpcklbw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x60, 0xca], "vpunpcklbw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x61, 0x0a], "vpunpcklwd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x61, 0x4a, 0x01], "vpunpcklwd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x61, 0xca], "vpunpcklwd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x63, 0x0a], "vpacksswb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x63, 0x4a, 0x01], "vpacksswb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x63, 0xca], "vpacksswb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x64, 0x0a], "vpcmpgtb k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x64, 0x4a, 0x01], "vpcmpgtb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x64, 0xca], "vpcmpgtb k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x65, 0x0a], "vpcmpgtw k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x65, 0x4a, 0x01], "vpcmpgtw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x65, 0xca], "vpcmpgtw k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x67, 0x0a], "vpackuswb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x67, 0x4a, 0x01], "vpackuswb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x67, 0xca], "vpackuswb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x68, 0x0a], "vpunpckhbw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x68, 0x4a, 0x01], "vpunpckhbw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x68, 0xca], "vpunpckhbw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x69, 0x0a], "vpunpckhwd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x69, 0x4a, 0x01], "vpunpckhwd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x69, 0xca], "vpunpckhwd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6c, 0xca], "vpunpcklqdq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6d, 0xca], "vpunpckhqdq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6f, 0x0a], "vmovdqa64 ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqa64 ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x6f, 0xca], "vmovdqa64 ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x72, 0xca, 0xcc], "vprolq ymm0{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x74, 0x0a], "vpcmpeqb k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x74, 0x4a, 0x01], "vpcmpeqb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x74, 0xca], "vpcmpeqb k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x75, 0x0a], "vpcmpeqw k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x75, 0x4a, 0x01], "vpcmpeqw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x75, 0xca], "vpcmpeqw k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x78, 0xca], "vcvttpd2uqq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x79, 0xca], "vcvtpd2uqq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7a, 0xca], "vcvttpd2qq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7b, 0xca], "vcvtpd2qq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7f, 0x0a], "vmovdqa64 ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqa64 ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0x7f, 0xca], "vmovdqa64 ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xc6, 0xca, 0xcc], "vshufpd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd1, 0x0a], "vpsrlw ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd1, 0x4a, 0x01], "vpsrlw ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd1, 0xca], "vpsrlw ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd3, 0x0a], "vpsrlq ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd3, 0x4a, 0x01], "vpsrlq ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd3, 0xca], "vpsrlq ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd4, 0x0a], "vpaddq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd4, 0xca], "vpaddq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd5, 0x0a], "vpmullw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd5, 0x4a, 0x01], "vpmullw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd5, 0xca], "vpmullw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd8, 0x0a], "vpsubusb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd8, 0x4a, 0x01], "vpsubusb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd8, 0xca], "vpsubusb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd9, 0x0a], "vpsubusw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd9, 0x4a, 0x01], "vpsubusw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xd9, 0xca], "vpsubusw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xda, 0x0a], "vpminub ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xda, 0x4a, 0x01], "vpminub ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xda, 0xca], "vpminub ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdb, 0x0a], "vpandq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdb, 0xca], "vpandq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdc, 0x0a], "vpaddusb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdc, 0x4a, 0x01], "vpaddusb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdc, 0xca], "vpaddusb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdd, 0x0a], "vpaddusw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdd, 0x4a, 0x01], "vpaddusw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdd, 0xca], "vpaddusw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xde, 0x0a], "vpmaxub ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xde, 0x4a, 0x01], "vpmaxub ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xde, 0xca], "vpmaxub ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdf, 0x0a], "vpandnq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xdf, 0xca], "vpandnq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe0, 0x0a], "vpavgb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe0, 0x4a, 0x01], "vpavgb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe0, 0xca], "vpavgb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe1, 0x0a], "vpsraw ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe1, 0x4a, 0x01], "vpsraw ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe1, 0xca], "vpsraw ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe2, 0x0a], "vpsraq ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe2, 0x4a, 0x01], "vpsraq ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe2, 0xca], "vpsraq ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe3, 0x0a], "vpavgw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe3, 0x4a, 0x01], "vpavgw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe3, 0xca], "vpavgw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe4, 0x0a], "vpmulhuw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe4, 0x4a, 0x01], "vpmulhuw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe4, 0xca], "vpmulhuw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe5, 0x0a], "vpmulhw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe5, 0x4a, 0x01], "vpmulhw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe5, 0xca], "vpmulhw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe8, 0x0a], "vpsubsb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe8, 0x4a, 0x01], "vpsubsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe8, 0xca], "vpsubsb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe9, 0x0a], "vpsubsw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe9, 0x4a, 0x01], "vpsubsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xe9, 0xca], "vpsubsw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xea, 0x0a], "vpminsw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xea, 0x4a, 0x01], "vpminsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xea, 0xca], "vpminsw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xeb, 0x0a], "vporq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xeb, 0xca], "vporq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xec, 0x0a], "vpaddsb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xec, 0x4a, 0x01], "vpaddsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xec, 0xca], "vpaddsb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xed, 0x0a], "vpaddsw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xed, 0x4a, 0x01], "vpaddsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xed, 0xca], "vpaddsw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xee, 0x0a], "vpmaxsw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xee, 0x4a, 0x01], "vpmaxsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xee, 0xca], "vpmaxsw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xef, 0x0a], "vpxorq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xef, 0xca], "vpxorq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf1, 0x0a], "vpsllw ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf1, 0x4a, 0x01], "vpsllw ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf1, 0xca], "vpsllw ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf3, 0x0a], "vpsllq ymm1{k5}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf3, 0x4a, 0x01], "vpsllq ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf3, 0xca], "vpsllq ymm1{k5}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf4, 0x0a], "vpmuludq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf4, 0xca], "vpmuludq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf5, 0x0a], "vpmaddwd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf5, 0x4a, 0x01], "vpmaddwd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf5, 0xca], "vpmaddwd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf8, 0x0a], "vpsubb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf8, 0x4a, 0x01], "vpsubb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf8, 0xca], "vpsubb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf9, 0x0a], "vpsubw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf9, 0x4a, 0x01], "vpsubw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xf9, 0xca], "vpsubw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfb, 0x0a], "vpsubq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfb, 0xca], "vpsubq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfc, 0x0a], "vpaddb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfc, 0x4a, 0x01], "vpaddb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfc, 0xca], "vpaddb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfd, 0x0a], "vpaddw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfd, 0x4a, 0x01], "vpaddw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x2d, 0xfd, 0xca], "vpaddw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x14, 0x0a], "vunpcklpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x14, 0x4a, 0x01], "vunpcklpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x15, 0x0a], "vunpckhpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x15, 0x4a, 0x01], "vunpckhpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x51, 0x0a], "vsqrtpd ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x51, 0x4a, 0x01], "vsqrtpd ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x51, 0xca], "vsqrtpd zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x54, 0x0a], "vandpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x54, 0x4a, 0x01], "vandpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x55, 0x0a], "vandnpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x55, 0x4a, 0x01], "vandnpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x56, 0x0a], "vorpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x56, 0x4a, 0x01], "vorpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x57, 0x0a], "vxorpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x57, 0x4a, 0x01], "vxorpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x58, 0x0a], "vaddpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x58, 0x4a, 0x01], "vaddpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x58, 0xca], "vaddpd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x59, 0x0a], "vmulpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x59, 0x4a, 0x01], "vmulpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x59, 0xca], "vmulpd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5a, 0x0a], "vcvtpd2ps xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5a, 0xca], "vcvtpd2ps ymm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5c, 0x0a], "vsubpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5c, 0x4a, 0x01], "vsubpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5c, 0xca], "vsubpd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5d, 0x0a], "vminpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5d, 0x4a, 0x01], "vminpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5e, 0x0a], "vdivpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5e, 0x4a, 0x01], "vdivpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5e, 0xca], "vdivpd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5f, 0x0a], "vmaxpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x5f, 0x4a, 0x01], "vmaxpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x6c, 0x0a], "vpunpcklqdq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x6d, 0x0a], "vpunpckhqdq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x72, 0x0a, 0xcc], "vprolq ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x78, 0x0a], "vcvttpd2uqq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x79, 0x0a], "vcvtpd2uqq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x79, 0xca], "vcvtpd2uqq zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x7a, 0x0a], "vcvttpd2qq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x7b, 0x0a], "vcvtpd2qq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0x7b, 0xca], "vcvtpd2qq zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xc2, 0x0a, 0xcc], "vcmppd k1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xc6, 0x0a, 0xcc], "vshufpd ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xd4, 0x0a], "vpaddq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xd4, 0x4a, 0x01], "vpaddq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xdb, 0x0a], "vpandq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xdb, 0x4a, 0x01], "vpandq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xdf, 0x0a], "vpandnq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xdf, 0x4a, 0x01], "vpandnq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xe6, 0x0a], "vcvttpd2dq xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xeb, 0x0a], "vporq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xeb, 0x4a, 0x01], "vporq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xef, 0x0a], "vpxorq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xef, 0x4a, 0x01], "vpxorq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xf4, 0x0a], "vpmuludq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xf4, 0x4a, 0x01], "vpmuludq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xfb, 0x0a], "vpsubq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x38, 0xfb, 0x4a, 0x01], "vpsubq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x14, 0x0a], "vunpcklpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x15, 0x0a], "vunpckhpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x51, 0x0a], "vsqrtpd ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x51, 0xca], "vsqrtpd zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x54, 0x0a], "vandpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x55, 0x0a], "vandnpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x56, 0x0a], "vorpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x57, 0x0a], "vxorpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x58, 0x0a], "vaddpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x58, 0xca], "vaddpd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x59, 0x0a], "vmulpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x59, 0xca], "vmulpd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5c, 0x0a], "vsubpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5c, 0xca], "vsubpd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5d, 0x0a], "vminpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5e, 0x0a], "vdivpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5e, 0xca], "vdivpd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5f, 0x0a], "vmaxpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xd4, 0x0a], "vpaddq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xdb, 0x0a], "vpandq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xdf, 0x0a], "vpandnq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xeb, 0x0a], "vporq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xef, 0x0a], "vpxorq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xf4, 0x0a], "vpmuludq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xfb, 0x0a], "vpsubq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x3d, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x10, 0x0a], "vmovupd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x10, 0x4a, 0x01], "vmovupd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x10, 0xca], "vmovupd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x11, 0x0a], "vmovupd zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x11, 0x4a, 0x01], "vmovupd zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x11, 0xca], "vmovupd zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x14, 0x0a], "vunpcklpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x14, 0x4a, 0x01], "vunpcklpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x14, 0xca], "vunpcklpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x15, 0x0a], "vunpckhpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x15, 0x4a, 0x01], "vunpckhpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x15, 0xca], "vunpckhpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x28, 0x0a], "vmovapd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x28, 0x4a, 0x01], "vmovapd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x28, 0xca], "vmovapd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x29, 0x0a], "vmovapd zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x29, 0x4a, 0x01], "vmovapd zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x29, 0xca], "vmovapd zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x2b, 0x0a], "vmovntpd zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x2b, 0x4a, 0x01], "vmovntpd zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x51, 0x0a], "vsqrtpd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x51, 0x4a, 0x01], "vsqrtpd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x51, 0xca], "vsqrtpd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x54, 0x0a], "vandpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x54, 0x4a, 0x01], "vandpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x54, 0xca], "vandpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x55, 0x0a], "vandnpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x55, 0x4a, 0x01], "vandnpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x55, 0xca], "vandnpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x56, 0x0a], "vorpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x56, 0x4a, 0x01], "vorpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x56, 0xca], "vorpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x57, 0x0a], "vxorpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x57, 0x4a, 0x01], "vxorpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x57, 0xca], "vxorpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x58, 0x0a], "vaddpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x58, 0x4a, 0x01], "vaddpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x58, 0xca], "vaddpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x59, 0x0a], "vmulpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x59, 0x4a, 0x01], "vmulpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x59, 0xca], "vmulpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5a, 0x0a], "vcvtpd2ps ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5a, 0xca], "vcvtpd2ps ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5c, 0x0a], "vsubpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5c, 0x4a, 0x01], "vsubpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5c, 0xca], "vsubpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5d, 0x0a], "vminpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5d, 0x4a, 0x01], "vminpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5d, 0xca], "vminpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5e, 0x0a], "vdivpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5e, 0x4a, 0x01], "vdivpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5e, 0xca], "vdivpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5f, 0x0a], "vmaxpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5f, 0x4a, 0x01], "vmaxpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x5f, 0xca], "vmaxpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x60, 0x0a], "vpunpcklbw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x60, 0x4a, 0x01], "vpunpcklbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x60, 0xca], "vpunpcklbw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x61, 0x0a], "vpunpcklwd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x61, 0x4a, 0x01], "vpunpcklwd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x61, 0xca], "vpunpcklwd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x63, 0x0a], "vpacksswb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x63, 0x4a, 0x01], "vpacksswb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x63, 0xca], "vpacksswb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x64, 0x0a], "vpcmpgtb k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x64, 0x4a, 0x01], "vpcmpgtb k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x64, 0xca], "vpcmpgtb k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x65, 0x0a], "vpcmpgtw k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x65, 0x4a, 0x01], "vpcmpgtw k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x65, 0xca], "vpcmpgtw k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x67, 0x0a], "vpackuswb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x67, 0x4a, 0x01], "vpackuswb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x67, 0xca], "vpackuswb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x68, 0x0a], "vpunpckhbw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x68, 0x4a, 0x01], "vpunpckhbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x68, 0xca], "vpunpckhbw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x69, 0x0a], "vpunpckhwd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x69, 0x4a, 0x01], "vpunpckhwd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x69, 0xca], "vpunpckhwd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6c, 0x0a], "vpunpcklqdq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6c, 0xca], "vpunpcklqdq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6d, 0x0a], "vpunpckhqdq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6d, 0xca], "vpunpckhqdq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6f, 0x0a], "vmovdqa64 zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6f, 0x4a, 0x01], "vmovdqa64 zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x6f, 0xca], "vmovdqa64 zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x72, 0x0a, 0xcc], "vprolq zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x72, 0xca, 0xcc], "vprolq zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x74, 0x0a], "vpcmpeqb k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x74, 0x4a, 0x01], "vpcmpeqb k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x74, 0xca], "vpcmpeqb k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x75, 0x0a], "vpcmpeqw k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x75, 0x4a, 0x01], "vpcmpeqw k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x75, 0xca], "vpcmpeqw k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x78, 0x0a], "vcvttpd2uqq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x78, 0xca], "vcvttpd2uqq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x79, 0x0a], "vcvtpd2uqq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x79, 0xca], "vcvtpd2uqq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7a, 0x0a], "vcvttpd2qq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7a, 0xca], "vcvttpd2qq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7b, 0x0a], "vcvtpd2qq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7b, 0xca], "vcvtpd2qq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7f, 0x0a], "vmovdqa64 zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7f, 0x4a, 0x01], "vmovdqa64 zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0x7f, 0xca], "vmovdqa64 zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xc2, 0x0a, 0xcc], "vcmppd k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xc2, 0xca, 0xcc], "vcmppd k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xc6, 0x0a, 0xcc], "vshufpd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xc6, 0xca, 0xcc], "vshufpd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd1, 0x0a], "vpsrlw zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd1, 0x4a, 0x01], "vpsrlw zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd1, 0xca], "vpsrlw zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd3, 0x0a], "vpsrlq zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd3, 0x4a, 0x01], "vpsrlq zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd3, 0xca], "vpsrlq zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd4, 0x0a], "vpaddq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd4, 0x4a, 0x01], "vpaddq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd4, 0xca], "vpaddq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd5, 0x0a], "vpmullw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd5, 0x4a, 0x01], "vpmullw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd5, 0xca], "vpmullw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd8, 0x0a], "vpsubusb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd8, 0x4a, 0x01], "vpsubusb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd8, 0xca], "vpsubusb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd9, 0x0a], "vpsubusw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd9, 0x4a, 0x01], "vpsubusw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xd9, 0xca], "vpsubusw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xda, 0x0a], "vpminub zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xda, 0x4a, 0x01], "vpminub zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xda, 0xca], "vpminub zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdb, 0x0a], "vpandq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdb, 0x4a, 0x01], "vpandq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdb, 0xca], "vpandq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdc, 0x0a], "vpaddusb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdc, 0x4a, 0x01], "vpaddusb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdc, 0xca], "vpaddusb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdd, 0x0a], "vpaddusw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdd, 0x4a, 0x01], "vpaddusw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdd, 0xca], "vpaddusw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xde, 0x0a], "vpmaxub zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xde, 0x4a, 0x01], "vpmaxub zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xde, 0xca], "vpmaxub zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdf, 0x0a], "vpandnq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdf, 0x4a, 0x01], "vpandnq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xdf, 0xca], "vpandnq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe0, 0x0a], "vpavgb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe0, 0x4a, 0x01], "vpavgb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe0, 0xca], "vpavgb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe1, 0x0a], "vpsraw zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe1, 0x4a, 0x01], "vpsraw zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe1, 0xca], "vpsraw zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe2, 0x0a], "vpsraq zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe2, 0x4a, 0x01], "vpsraq zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe2, 0xca], "vpsraq zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe3, 0x0a], "vpavgw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe3, 0x4a, 0x01], "vpavgw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe3, 0xca], "vpavgw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe4, 0x0a], "vpmulhuw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe4, 0x4a, 0x01], "vpmulhuw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe4, 0xca], "vpmulhuw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe5, 0x0a], "vpmulhw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe5, 0x4a, 0x01], "vpmulhw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe5, 0xca], "vpmulhw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe6, 0x0a], "vcvttpd2dq ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe6, 0xca], "vcvttpd2dq ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe8, 0x0a], "vpsubsb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe8, 0x4a, 0x01], "vpsubsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe8, 0xca], "vpsubsb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe9, 0x0a], "vpsubsw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe9, 0x4a, 0x01], "vpsubsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xe9, 0xca], "vpsubsw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xea, 0x0a], "vpminsw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xea, 0x4a, 0x01], "vpminsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xea, 0xca], "vpminsw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xeb, 0x0a], "vporq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xeb, 0x4a, 0x01], "vporq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xeb, 0xca], "vporq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xec, 0x0a], "vpaddsb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xec, 0x4a, 0x01], "vpaddsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xec, 0xca], "vpaddsb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xed, 0x0a], "vpaddsw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xed, 0x4a, 0x01], "vpaddsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xed, 0xca], "vpaddsw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xee, 0x0a], "vpmaxsw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xee, 0x4a, 0x01], "vpmaxsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xee, 0xca], "vpmaxsw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xef, 0x0a], "vpxorq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xef, 0x4a, 0x01], "vpxorq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xef, 0xca], "vpxorq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf1, 0x0a], "vpsllw zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf1, 0x4a, 0x01], "vpsllw zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf1, 0xca], "vpsllw zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf3, 0x0a], "vpsllq zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf3, 0x4a, 0x01], "vpsllq zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf3, 0xca], "vpsllq zmm1, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf4, 0x0a], "vpmuludq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf4, 0x4a, 0x01], "vpmuludq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf4, 0xca], "vpmuludq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf5, 0x0a], "vpmaddwd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf5, 0x4a, 0x01], "vpmaddwd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf5, 0xca], "vpmaddwd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf6, 0x0a], "vpsadbw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf6, 0x4a, 0x01], "vpsadbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf6, 0xca], "vpsadbw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf8, 0x0a], "vpsubb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf8, 0x4a, 0x01], "vpsubb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf8, 0xca], "vpsubb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf9, 0x0a], "vpsubw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf9, 0x4a, 0x01], "vpsubw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xf9, 0xca], "vpsubw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfb, 0x0a], "vpsubq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfb, 0x4a, 0x01], "vpsubq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfb, 0xca], "vpsubq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfc, 0x0a], "vpaddb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfc, 0x4a, 0x01], "vpaddb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfc, 0xca], "vpaddb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfd, 0x0a], "vpaddw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfd, 0x4a, 0x01], "vpaddw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x48, 0xfd, 0xca], "vpaddw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x10, 0x0a], "vmovupd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x10, 0x4a, 0x01], "vmovupd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x10, 0xca], "vmovupd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x11, 0x0a], "vmovupd zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x11, 0x4a, 0x01], "vmovupd zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x11, 0xca], "vmovupd zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x14, 0x0a], "vunpcklpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x14, 0xca], "vunpcklpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x15, 0x0a], "vunpckhpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x15, 0xca], "vunpckhpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x28, 0x0a], "vmovapd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x28, 0x4a, 0x01], "vmovapd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x28, 0xca], "vmovapd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x29, 0x0a], "vmovapd zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x29, 0x4a, 0x01], "vmovapd zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x29, 0xca], "vmovapd zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x51, 0x0a], "vsqrtpd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x51, 0xca], "vsqrtpd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x54, 0x0a], "vandpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x54, 0xca], "vandpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x55, 0x0a], "vandnpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x55, 0xca], "vandnpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x56, 0x0a], "vorpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x56, 0xca], "vorpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x57, 0x0a], "vxorpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x57, 0xca], "vxorpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x58, 0x0a], "vaddpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x58, 0xca], "vaddpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x59, 0x0a], "vmulpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x59, 0xca], "vmulpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5c, 0x0a], "vsubpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5c, 0xca], "vsubpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5d, 0x0a], "vminpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5d, 0xca], "vminpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5e, 0x0a], "vdivpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5e, 0xca], "vdivpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5f, 0x0a], "vmaxpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x5f, 0xca], "vmaxpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x60, 0x0a], "vpunpcklbw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x60, 0x4a, 0x01], "vpunpcklbw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x60, 0xca], "vpunpcklbw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x61, 0x0a], "vpunpcklwd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x61, 0x4a, 0x01], "vpunpcklwd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x61, 0xca], "vpunpcklwd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x63, 0x0a], "vpacksswb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x63, 0x4a, 0x01], "vpacksswb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x63, 0xca], "vpacksswb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x64, 0x0a], "vpcmpgtb k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x64, 0x4a, 0x01], "vpcmpgtb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x64, 0xca], "vpcmpgtb k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x65, 0x0a], "vpcmpgtw k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x65, 0x4a, 0x01], "vpcmpgtw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x65, 0xca], "vpcmpgtw k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x67, 0x0a], "vpackuswb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x67, 0x4a, 0x01], "vpackuswb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x67, 0xca], "vpackuswb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x68, 0x0a], "vpunpckhbw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x68, 0x4a, 0x01], "vpunpckhbw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x68, 0xca], "vpunpckhbw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x69, 0x0a], "vpunpckhwd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x69, 0x4a, 0x01], "vpunpckhwd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x69, 0xca], "vpunpckhwd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6c, 0xca], "vpunpcklqdq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6d, 0xca], "vpunpckhqdq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6f, 0x0a], "vmovdqa64 zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqa64 zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x6f, 0xca], "vmovdqa64 zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x72, 0xca, 0xcc], "vprolq zmm0{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x74, 0x0a], "vpcmpeqb k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x74, 0x4a, 0x01], "vpcmpeqb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x74, 0xca], "vpcmpeqb k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x75, 0x0a], "vpcmpeqw k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x75, 0x4a, 0x01], "vpcmpeqw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x75, 0xca], "vpcmpeqw k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7f, 0x0a], "vmovdqa64 zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqa64 zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0x7f, 0xca], "vmovdqa64 zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xc6, 0xca, 0xcc], "vshufpd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd1, 0x0a], "vpsrlw zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd1, 0x4a, 0x01], "vpsrlw zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd1, 0xca], "vpsrlw zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd3, 0x0a], "vpsrlq zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd3, 0x4a, 0x01], "vpsrlq zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd3, 0xca], "vpsrlq zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd4, 0x0a], "vpaddq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd4, 0xca], "vpaddq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd5, 0x0a], "vpmullw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd5, 0x4a, 0x01], "vpmullw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd5, 0xca], "vpmullw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd8, 0x0a], "vpsubusb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd8, 0x4a, 0x01], "vpsubusb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd8, 0xca], "vpsubusb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd9, 0x0a], "vpsubusw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd9, 0x4a, 0x01], "vpsubusw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xd9, 0xca], "vpsubusw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xda, 0x0a], "vpminub zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xda, 0x4a, 0x01], "vpminub zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xda, 0xca], "vpminub zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdb, 0x0a], "vpandq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdb, 0xca], "vpandq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdc, 0x0a], "vpaddusb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdc, 0x4a, 0x01], "vpaddusb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdc, 0xca], "vpaddusb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdd, 0x0a], "vpaddusw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdd, 0x4a, 0x01], "vpaddusw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdd, 0xca], "vpaddusw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xde, 0x0a], "vpmaxub zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xde, 0x4a, 0x01], "vpmaxub zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xde, 0xca], "vpmaxub zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdf, 0x0a], "vpandnq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xdf, 0xca], "vpandnq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe0, 0x0a], "vpavgb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe0, 0x4a, 0x01], "vpavgb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe0, 0xca], "vpavgb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe1, 0x0a], "vpsraw zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe1, 0x4a, 0x01], "vpsraw zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe1, 0xca], "vpsraw zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe2, 0x0a], "vpsraq zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe2, 0x4a, 0x01], "vpsraq zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe2, 0xca], "vpsraq zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe3, 0x0a], "vpavgw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe3, 0x4a, 0x01], "vpavgw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe3, 0xca], "vpavgw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe4, 0x0a], "vpmulhuw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe4, 0x4a, 0x01], "vpmulhuw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe4, 0xca], "vpmulhuw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe5, 0x0a], "vpmulhw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe5, 0x4a, 0x01], "vpmulhw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe5, 0xca], "vpmulhw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe8, 0x0a], "vpsubsb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe8, 0x4a, 0x01], "vpsubsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe8, 0xca], "vpsubsb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe9, 0x0a], "vpsubsw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe9, 0x4a, 0x01], "vpsubsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xe9, 0xca], "vpsubsw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xea, 0x0a], "vpminsw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xea, 0x4a, 0x01], "vpminsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xea, 0xca], "vpminsw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xeb, 0x0a], "vporq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xeb, 0xca], "vporq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xec, 0x0a], "vpaddsb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xec, 0x4a, 0x01], "vpaddsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xec, 0xca], "vpaddsb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xed, 0x0a], "vpaddsw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xed, 0x4a, 0x01], "vpaddsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xed, 0xca], "vpaddsw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xee, 0x0a], "vpmaxsw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xee, 0x4a, 0x01], "vpmaxsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xee, 0xca], "vpmaxsw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xef, 0x0a], "vpxorq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xef, 0xca], "vpxorq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf1, 0x0a], "vpsllw zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf1, 0x4a, 0x01], "vpsllw zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf1, 0xca], "vpsllw zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf3, 0x0a], "vpsllq zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf3, 0x4a, 0x01], "vpsllq zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf3, 0xca], "vpsllq zmm1{k5}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf4, 0x0a], "vpmuludq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf4, 0xca], "vpmuludq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf5, 0x0a], "vpmaddwd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf5, 0x4a, 0x01], "vpmaddwd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf5, 0xca], "vpmaddwd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf8, 0x0a], "vpsubb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf8, 0x4a, 0x01], "vpsubb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf8, 0xca], "vpsubb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf9, 0x0a], "vpsubw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf9, 0x4a, 0x01], "vpsubw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xf9, 0xca], "vpsubw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfb, 0x0a], "vpsubq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfb, 0xca], "vpsubq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfc, 0x0a], "vpaddb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfc, 0x4a, 0x01], "vpaddb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfc, 0xca], "vpaddb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfd, 0x0a], "vpaddw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfd, 0x4a, 0x01], "vpaddw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x4d, 0xfd, 0xca], "vpaddw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x14, 0x0a], "vunpcklpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x14, 0x4a, 0x01], "vunpcklpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x15, 0x0a], "vunpckhpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x15, 0x4a, 0x01], "vunpckhpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x51, 0x0a], "vsqrtpd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x51, 0x4a, 0x01], "vsqrtpd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x51, 0xca], "vsqrtpd zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x54, 0x0a], "vandpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x54, 0x4a, 0x01], "vandpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x55, 0x0a], "vandnpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x55, 0x4a, 0x01], "vandnpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x56, 0x0a], "vorpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x56, 0x4a, 0x01], "vorpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x57, 0x0a], "vxorpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x57, 0x4a, 0x01], "vxorpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x58, 0x0a], "vaddpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x58, 0x4a, 0x01], "vaddpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x58, 0xca], "vaddpd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x59, 0x0a], "vmulpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x59, 0x4a, 0x01], "vmulpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x59, 0xca], "vmulpd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5a, 0x0a], "vcvtpd2ps ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5a, 0xca], "vcvtpd2ps ymm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5c, 0x0a], "vsubpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5c, 0x4a, 0x01], "vsubpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5c, 0xca], "vsubpd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5d, 0x0a], "vminpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5d, 0x4a, 0x01], "vminpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5e, 0x0a], "vdivpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5e, 0x4a, 0x01], "vdivpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5e, 0xca], "vdivpd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5f, 0x0a], "vmaxpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x5f, 0x4a, 0x01], "vmaxpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x6c, 0x0a], "vpunpcklqdq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x6d, 0x0a], "vpunpckhqdq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x72, 0x0a, 0xcc], "vprolq zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x78, 0x0a], "vcvttpd2uqq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x79, 0x0a], "vcvtpd2uqq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x79, 0xca], "vcvtpd2uqq zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x7a, 0x0a], "vcvttpd2qq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x7b, 0x0a], "vcvtpd2qq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0x7b, 0xca], "vcvtpd2qq zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xc2, 0x0a, 0xcc], "vcmppd k1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xc6, 0x0a, 0xcc], "vshufpd zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xd4, 0x0a], "vpaddq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xd4, 0x4a, 0x01], "vpaddq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xdb, 0x0a], "vpandq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xdb, 0x4a, 0x01], "vpandq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xdf, 0x0a], "vpandnq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xdf, 0x4a, 0x01], "vpandnq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xe6, 0x0a], "vcvttpd2dq ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xeb, 0x0a], "vporq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xeb, 0x4a, 0x01], "vporq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xef, 0x0a], "vpxorq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xef, 0x4a, 0x01], "vpxorq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xf4, 0x0a], "vpmuludq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xf4, 0x4a, 0x01], "vpmuludq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xfb, 0x0a], "vpsubq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x58, 0xfb, 0x4a, 0x01], "vpsubq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x14, 0x0a], "vunpcklpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x15, 0x0a], "vunpckhpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x51, 0x0a], "vsqrtpd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x51, 0xca], "vsqrtpd zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x54, 0x0a], "vandpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x55, 0x0a], "vandnpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x56, 0x0a], "vorpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x57, 0x0a], "vxorpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x58, 0x0a], "vaddpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x58, 0xca], "vaddpd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x59, 0x0a], "vmulpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x59, 0xca], "vmulpd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5c, 0x0a], "vsubpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5c, 0xca], "vsubpd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5d, 0x0a], "vminpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5e, 0x0a], "vdivpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5e, 0xca], "vdivpd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5f, 0x0a], "vmaxpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xc2, 0x0a, 0xcc], "vcmppd k1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xc2, 0x4a, 0x01, 0xcc], "vcmppd k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xd4, 0x0a], "vpaddq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xdb, 0x0a], "vpandq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xdf, 0x0a], "vpandnq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xeb, 0x0a], "vporq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xef, 0x0a], "vpxorq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xf4, 0x0a], "vpmuludq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xfb, 0x0a], "vpsubq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x5d, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x2e, 0xca], "vucomisd xmm1{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x2f, 0xca], "vcomisd xmm1{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x51, 0xca], "vsqrtpd zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x58, 0xca], "vaddpd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x59, 0xca], "vmulpd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x5a, 0xca], "vcvtpd2ps ymm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x5c, 0xca], "vsubpd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x5d, 0xca], "vminpd zmm1{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x5e, 0xca], "vdivpd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x5f, 0xca], "vmaxpd zmm1{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x78, 0xca], "vcvttpd2uqq zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x79, 0xca], "vcvtpd2uqq zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x7a, 0xca], "vcvttpd2qq zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0x7b, 0xca], "vcvtpd2qq zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0xc2, 0xca, 0xcc], "vcmppd k1{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x78, 0xe6, 0xca], "vcvttpd2dq ymm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x51, 0xca], "vsqrtpd zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x58, 0xca], "vaddpd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x59, 0xca], "vmulpd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x5c, 0xca], "vsubpd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x5d, 0xca], "vminpd zmm1{k5}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x5e, 0xca], "vdivpd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x5f, 0xca], "vmaxpd zmm1{k5}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0xc2, 0xca, 0xcc], "vcmppd k1{k5}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x7d, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x10, 0x0a], "vmovupd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x10, 0x4a, 0x01], "vmovupd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x10, 0xca], "vmovupd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x11, 0xca], "vmovupd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x14, 0x0a], "vunpcklpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x14, 0xca], "vunpcklpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x15, 0x0a], "vunpckhpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x15, 0xca], "vunpckhpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x28, 0x0a], "vmovapd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x28, 0x4a, 0x01], "vmovapd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x28, 0xca], "vmovapd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x29, 0xca], "vmovapd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x51, 0x0a], "vsqrtpd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x51, 0xca], "vsqrtpd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x54, 0x0a], "vandpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x54, 0xca], "vandpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x55, 0x0a], "vandnpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x55, 0xca], "vandnpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x56, 0x0a], "vorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x56, 0xca], "vorpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x57, 0x0a], "vxorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x57, 0xca], "vxorpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x58, 0x0a], "vaddpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x58, 0xca], "vaddpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x59, 0x0a], "vmulpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x59, 0xca], "vmulpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5c, 0x0a], "vsubpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5c, 0xca], "vsubpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5d, 0x0a], "vminpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5d, 0xca], "vminpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5e, 0x0a], "vdivpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5e, 0xca], "vdivpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5f, 0x0a], "vmaxpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x5f, 0xca], "vmaxpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x60, 0x0a], "vpunpcklbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x60, 0x4a, 0x01], "vpunpcklbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x60, 0xca], "vpunpcklbw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x61, 0x0a], "vpunpcklwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x61, 0x4a, 0x01], "vpunpcklwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x61, 0xca], "vpunpcklwd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x63, 0x0a], "vpacksswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x63, 0x4a, 0x01], "vpacksswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x63, 0xca], "vpacksswb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x67, 0x0a], "vpackuswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x67, 0x4a, 0x01], "vpackuswb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x67, 0xca], "vpackuswb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x68, 0x0a], "vpunpckhbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x68, 0x4a, 0x01], "vpunpckhbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x68, 0xca], "vpunpckhbw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x69, 0x0a], "vpunpckhwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x69, 0x4a, 0x01], "vpunpckhwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x69, 0xca], "vpunpckhwd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6c, 0xca], "vpunpcklqdq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6d, 0xca], "vpunpckhqdq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6f, 0x0a], "vmovdqa64 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqa64 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x6f, 0xca], "vmovdqa64 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x72, 0xca, 0xcc], "vprolq xmm0{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x78, 0xca], "vcvttpd2uqq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x79, 0xca], "vcvtpd2uqq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7a, 0xca], "vcvttpd2qq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7b, 0xca], "vcvtpd2qq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0x7f, 0xca], "vmovdqa64 xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xc6, 0xca, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd1, 0x0a], "vpsrlw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd1, 0x4a, 0x01], "vpsrlw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd1, 0xca], "vpsrlw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd3, 0x0a], "vpsrlq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd3, 0x4a, 0x01], "vpsrlq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd3, 0xca], "vpsrlq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd4, 0x0a], "vpaddq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd4, 0xca], "vpaddq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd5, 0x0a], "vpmullw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd5, 0x4a, 0x01], "vpmullw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd5, 0xca], "vpmullw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd8, 0x0a], "vpsubusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd8, 0x4a, 0x01], "vpsubusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd8, 0xca], "vpsubusb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd9, 0x0a], "vpsubusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd9, 0x4a, 0x01], "vpsubusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xd9, 0xca], "vpsubusw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xda, 0x0a], "vpminub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xda, 0x4a, 0x01], "vpminub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xda, 0xca], "vpminub xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdb, 0x0a], "vpandq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdb, 0xca], "vpandq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdc, 0x0a], "vpaddusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdc, 0x4a, 0x01], "vpaddusb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdc, 0xca], "vpaddusb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdd, 0x0a], "vpaddusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdd, 0x4a, 0x01], "vpaddusw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdd, 0xca], "vpaddusw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xde, 0x0a], "vpmaxub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xde, 0x4a, 0x01], "vpmaxub xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xde, 0xca], "vpmaxub xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdf, 0x0a], "vpandnq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xdf, 0xca], "vpandnq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe0, 0x0a], "vpavgb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe0, 0x4a, 0x01], "vpavgb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe0, 0xca], "vpavgb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe1, 0x0a], "vpsraw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe1, 0x4a, 0x01], "vpsraw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe1, 0xca], "vpsraw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe2, 0x0a], "vpsraq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe2, 0x4a, 0x01], "vpsraq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe2, 0xca], "vpsraq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe3, 0x0a], "vpavgw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe3, 0x4a, 0x01], "vpavgw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe3, 0xca], "vpavgw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe4, 0x0a], "vpmulhuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe4, 0x4a, 0x01], "vpmulhuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe4, 0xca], "vpmulhuw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe5, 0x0a], "vpmulhw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe5, 0x4a, 0x01], "vpmulhw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe5, 0xca], "vpmulhw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe8, 0x0a], "vpsubsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe8, 0x4a, 0x01], "vpsubsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe8, 0xca], "vpsubsb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe9, 0x0a], "vpsubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe9, 0x4a, 0x01], "vpsubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xe9, 0xca], "vpsubsw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xea, 0x0a], "vpminsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xea, 0x4a, 0x01], "vpminsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xea, 0xca], "vpminsw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xeb, 0x0a], "vporq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xeb, 0xca], "vporq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xec, 0x0a], "vpaddsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xec, 0x4a, 0x01], "vpaddsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xec, 0xca], "vpaddsb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xed, 0x0a], "vpaddsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xed, 0x4a, 0x01], "vpaddsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xed, 0xca], "vpaddsw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xee, 0x0a], "vpmaxsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xee, 0x4a, 0x01], "vpmaxsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xee, 0xca], "vpmaxsw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xef, 0x0a], "vpxorq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xef, 0xca], "vpxorq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf1, 0x0a], "vpsllw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf1, 0x4a, 0x01], "vpsllw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf1, 0xca], "vpsllw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf3, 0x0a], "vpsllq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf3, 0x4a, 0x01], "vpsllq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf3, 0xca], "vpsllq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf4, 0x0a], "vpmuludq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf4, 0xca], "vpmuludq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf5, 0x0a], "vpmaddwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf5, 0x4a, 0x01], "vpmaddwd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf5, 0xca], "vpmaddwd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf8, 0x0a], "vpsubb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf8, 0x4a, 0x01], "vpsubb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf8, 0xca], "vpsubb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf9, 0x0a], "vpsubw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf9, 0x4a, 0x01], "vpsubw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xf9, 0xca], "vpsubw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfb, 0x0a], "vpsubq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfb, 0xca], "vpsubq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfc, 0x0a], "vpaddb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfc, 0x4a, 0x01], "vpaddb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfc, 0xca], "vpaddb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfd, 0x0a], "vpaddw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfd, 0x4a, 0x01], "vpaddw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x8d, 0xfd, 0xca], "vpaddw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x14, 0x0a], "vunpcklpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x14, 0x4a, 0x01], "vunpcklpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x15, 0x0a], "vunpckhpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x15, 0x4a, 0x01], "vunpckhpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x51, 0x0a], "vsqrtpd xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x51, 0x4a, 0x01], "vsqrtpd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x54, 0x0a], "vandpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x54, 0x4a, 0x01], "vandpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x55, 0x0a], "vandnpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x55, 0x4a, 0x01], "vandnpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x56, 0x0a], "vorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x56, 0x4a, 0x01], "vorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x57, 0x0a], "vxorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x57, 0x4a, 0x01], "vxorpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x58, 0x0a], "vaddpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x58, 0x4a, 0x01], "vaddpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x58, 0xca], "vaddpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x59, 0x0a], "vmulpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x59, 0x4a, 0x01], "vmulpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x59, 0xca], "vmulpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5c, 0x0a], "vsubpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5c, 0x4a, 0x01], "vsubpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5d, 0x0a], "vminpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5d, 0x4a, 0x01], "vminpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5e, 0x0a], "vdivpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5e, 0x4a, 0x01], "vdivpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5f, 0x0a], "vmaxpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x5f, 0x4a, 0x01], "vmaxpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x6c, 0x0a], "vpunpcklqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x6c, 0x4a, 0x01], "vpunpcklqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x6d, 0x0a], "vpunpckhqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x6d, 0x4a, 0x01], "vpunpckhqdq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x72, 0x0a, 0xcc], "vprolq xmm0{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x72, 0x4a, 0x01, 0xcc], "vprolq xmm0{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x78, 0x0a], "vcvttpd2uqq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x78, 0x4a, 0x01], "vcvttpd2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x79, 0x0a], "vcvtpd2uqq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x79, 0x4a, 0x01], "vcvtpd2uqq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x7a, 0x0a], "vcvttpd2qq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x7a, 0x4a, 0x01], "vcvttpd2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x7b, 0x0a], "vcvtpd2qq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x7b, 0x4a, 0x01], "vcvtpd2qq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xc6, 0x0a, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xd4, 0x0a], "vpaddq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xd4, 0x4a, 0x01], "vpaddq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xdb, 0x0a], "vpandq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xdb, 0x4a, 0x01], "vpandq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xdf, 0x0a], "vpandnq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xdf, 0x4a, 0x01], "vpandnq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xeb, 0x0a], "vporq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xeb, 0x4a, 0x01], "vporq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xef, 0x0a], "vpxorq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xef, 0x4a, 0x01], "vpxorq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xf4, 0x0a], "vpmuludq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xf4, 0x4a, 0x01], "vpmuludq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xfb, 0x0a], "vpsubq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0x9d, 0xfb, 0x4a, 0x01], "vpsubq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x10, 0x0a], "vmovupd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x10, 0x4a, 0x01], "vmovupd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x10, 0xca], "vmovupd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x11, 0xca], "vmovupd ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x14, 0x0a], "vunpcklpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x14, 0xca], "vunpcklpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x15, 0x0a], "vunpckhpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x15, 0xca], "vunpckhpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x28, 0x0a], "vmovapd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x28, 0x4a, 0x01], "vmovapd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x28, 0xca], "vmovapd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x29, 0xca], "vmovapd ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x51, 0x0a], "vsqrtpd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x51, 0xca], "vsqrtpd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x54, 0x0a], "vandpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x54, 0xca], "vandpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x55, 0x0a], "vandnpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x55, 0xca], "vandnpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x56, 0x0a], "vorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x56, 0xca], "vorpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x57, 0x0a], "vxorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x57, 0xca], "vxorpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x58, 0x0a], "vaddpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x58, 0xca], "vaddpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x59, 0x0a], "vmulpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x59, 0xca], "vmulpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5a, 0xca], "vcvtpd2ps xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5c, 0x0a], "vsubpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5c, 0xca], "vsubpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5d, 0x0a], "vminpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5d, 0xca], "vminpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5e, 0x0a], "vdivpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5e, 0xca], "vdivpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5f, 0x0a], "vmaxpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x5f, 0xca], "vmaxpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x60, 0x0a], "vpunpcklbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x60, 0x4a, 0x01], "vpunpcklbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x60, 0xca], "vpunpcklbw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x61, 0x0a], "vpunpcklwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x61, 0x4a, 0x01], "vpunpcklwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x61, 0xca], "vpunpcklwd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x63, 0x0a], "vpacksswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x63, 0x4a, 0x01], "vpacksswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x63, 0xca], "vpacksswb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x67, 0x0a], "vpackuswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x67, 0x4a, 0x01], "vpackuswb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x67, 0xca], "vpackuswb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x68, 0x0a], "vpunpckhbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x68, 0x4a, 0x01], "vpunpckhbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x68, 0xca], "vpunpckhbw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x69, 0x0a], "vpunpckhwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x69, 0x4a, 0x01], "vpunpckhwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x69, 0xca], "vpunpckhwd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6c, 0xca], "vpunpcklqdq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6d, 0xca], "vpunpckhqdq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6f, 0x0a], "vmovdqa64 ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6f, 0x4a, 0x01], "vmovdqa64 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x6f, 0xca], "vmovdqa64 ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x72, 0xca, 0xcc], "vprolq ymm0{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x78, 0xca], "vcvttpd2uqq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x79, 0xca], "vcvtpd2uqq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7a, 0xca], "vcvttpd2qq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7b, 0xca], "vcvtpd2qq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0x7f, 0xca], "vmovdqa64 ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xc6, 0xca, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd1, 0x0a], "vpsrlw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd1, 0x4a, 0x01], "vpsrlw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd1, 0xca], "vpsrlw ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd3, 0x0a], "vpsrlq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd3, 0x4a, 0x01], "vpsrlq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd3, 0xca], "vpsrlq ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd4, 0x0a], "vpaddq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd4, 0xca], "vpaddq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd5, 0x0a], "vpmullw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd5, 0x4a, 0x01], "vpmullw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd5, 0xca], "vpmullw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd8, 0x0a], "vpsubusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd8, 0x4a, 0x01], "vpsubusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd8, 0xca], "vpsubusb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd9, 0x0a], "vpsubusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd9, 0x4a, 0x01], "vpsubusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xd9, 0xca], "vpsubusw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xda, 0x0a], "vpminub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xda, 0x4a, 0x01], "vpminub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xda, 0xca], "vpminub ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdb, 0x0a], "vpandq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdb, 0xca], "vpandq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdc, 0x0a], "vpaddusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdc, 0x4a, 0x01], "vpaddusb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdc, 0xca], "vpaddusb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdd, 0x0a], "vpaddusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdd, 0x4a, 0x01], "vpaddusw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdd, 0xca], "vpaddusw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xde, 0x0a], "vpmaxub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xde, 0x4a, 0x01], "vpmaxub ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xde, 0xca], "vpmaxub ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdf, 0x0a], "vpandnq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xdf, 0xca], "vpandnq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe0, 0x0a], "vpavgb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe0, 0x4a, 0x01], "vpavgb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe0, 0xca], "vpavgb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe1, 0x0a], "vpsraw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe1, 0x4a, 0x01], "vpsraw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe1, 0xca], "vpsraw ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe2, 0x0a], "vpsraq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe2, 0x4a, 0x01], "vpsraq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe2, 0xca], "vpsraq ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe3, 0x0a], "vpavgw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe3, 0x4a, 0x01], "vpavgw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe3, 0xca], "vpavgw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe4, 0x0a], "vpmulhuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe4, 0x4a, 0x01], "vpmulhuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe4, 0xca], "vpmulhuw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe5, 0x0a], "vpmulhw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe5, 0x4a, 0x01], "vpmulhw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe5, 0xca], "vpmulhw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe6, 0xca], "vcvttpd2dq xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe8, 0x0a], "vpsubsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe8, 0x4a, 0x01], "vpsubsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe8, 0xca], "vpsubsb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe9, 0x0a], "vpsubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe9, 0x4a, 0x01], "vpsubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xe9, 0xca], "vpsubsw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xea, 0x0a], "vpminsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xea, 0x4a, 0x01], "vpminsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xea, 0xca], "vpminsw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xeb, 0x0a], "vporq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xeb, 0xca], "vporq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xec, 0x0a], "vpaddsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xec, 0x4a, 0x01], "vpaddsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xec, 0xca], "vpaddsb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xed, 0x0a], "vpaddsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xed, 0x4a, 0x01], "vpaddsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xed, 0xca], "vpaddsw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xee, 0x0a], "vpmaxsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xee, 0x4a, 0x01], "vpmaxsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xee, 0xca], "vpmaxsw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xef, 0x0a], "vpxorq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xef, 0xca], "vpxorq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf1, 0x0a], "vpsllw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf1, 0x4a, 0x01], "vpsllw ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf1, 0xca], "vpsllw ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf3, 0x0a], "vpsllq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf3, 0x4a, 0x01], "vpsllq ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf3, 0xca], "vpsllq ymm1{k5}{z}, ymm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf4, 0x0a], "vpmuludq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf4, 0xca], "vpmuludq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf5, 0x0a], "vpmaddwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf5, 0x4a, 0x01], "vpmaddwd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf5, 0xca], "vpmaddwd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf8, 0x0a], "vpsubb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf8, 0x4a, 0x01], "vpsubb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf8, 0xca], "vpsubb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf9, 0x0a], "vpsubw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf9, 0x4a, 0x01], "vpsubw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xf9, 0xca], "vpsubw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfb, 0x0a], "vpsubq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfb, 0xca], "vpsubq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfc, 0x0a], "vpaddb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfc, 0x4a, 0x01], "vpaddb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfc, 0xca], "vpaddb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfd, 0x0a], "vpaddw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfd, 0x4a, 0x01], "vpaddw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xad, 0xfd, 0xca], "vpaddw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x14, 0x0a], "vunpcklpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x14, 0x4a, 0x01], "vunpcklpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x15, 0x0a], "vunpckhpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x15, 0x4a, 0x01], "vunpckhpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x51, 0x0a], "vsqrtpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x51, 0x4a, 0x01], "vsqrtpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x54, 0x0a], "vandpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x54, 0x4a, 0x01], "vandpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x55, 0x0a], "vandnpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x55, 0x4a, 0x01], "vandnpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x56, 0x0a], "vorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x56, 0x4a, 0x01], "vorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x57, 0x0a], "vxorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x57, 0x4a, 0x01], "vxorpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x58, 0x0a], "vaddpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x58, 0x4a, 0x01], "vaddpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x58, 0xca], "vaddpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x59, 0x0a], "vmulpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x59, 0x4a, 0x01], "vmulpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x59, 0xca], "vmulpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5a, 0x0a], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5a, 0x4a, 0x01], "vcvtpd2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5c, 0x0a], "vsubpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5c, 0x4a, 0x01], "vsubpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5d, 0x0a], "vminpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5d, 0x4a, 0x01], "vminpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5e, 0x0a], "vdivpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5e, 0x4a, 0x01], "vdivpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5f, 0x0a], "vmaxpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x5f, 0x4a, 0x01], "vmaxpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x6c, 0x0a], "vpunpcklqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x6c, 0x4a, 0x01], "vpunpcklqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x6d, 0x0a], "vpunpckhqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x6d, 0x4a, 0x01], "vpunpckhqdq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x72, 0x0a, 0xcc], "vprolq ymm0{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x72, 0x4a, 0x01, 0xcc], "vprolq ymm0{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x78, 0x0a], "vcvttpd2uqq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x78, 0x4a, 0x01], "vcvttpd2uqq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x79, 0x0a], "vcvtpd2uqq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x79, 0x4a, 0x01], "vcvtpd2uqq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x7a, 0x0a], "vcvttpd2qq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x7a, 0x4a, 0x01], "vcvttpd2qq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x7b, 0x0a], "vcvtpd2qq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x7b, 0x4a, 0x01], "vcvtpd2qq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xc6, 0x0a, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xd4, 0x0a], "vpaddq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xd4, 0x4a, 0x01], "vpaddq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xdb, 0x0a], "vpandq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xdb, 0x4a, 0x01], "vpandq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xdf, 0x0a], "vpandnq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xdf, 0x4a, 0x01], "vpandnq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xe6, 0x0a], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xe6, 0x4a, 0x01], "vcvttpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xeb, 0x0a], "vporq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xeb, 0x4a, 0x01], "vporq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xef, 0x0a], "vpxorq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xef, 0x4a, 0x01], "vpxorq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xf4, 0x0a], "vpmuludq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xf4, 0x4a, 0x01], "vpmuludq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xfb, 0x0a], "vpsubq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xbd, 0xfb, 0x4a, 0x01], "vpsubq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x10, 0x0a], "vmovupd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x10, 0x4a, 0x01], "vmovupd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x10, 0xca], "vmovupd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x11, 0xca], "vmovupd zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x14, 0x0a], "vunpcklpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x14, 0xca], "vunpcklpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x15, 0x0a], "vunpckhpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x15, 0xca], "vunpckhpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x28, 0x0a], "vmovapd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x28, 0x4a, 0x01], "vmovapd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x28, 0xca], "vmovapd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x29, 0xca], "vmovapd zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x51, 0x0a], "vsqrtpd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x54, 0x0a], "vandpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x54, 0xca], "vandpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x55, 0x0a], "vandnpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x55, 0xca], "vandnpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x56, 0x0a], "vorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x56, 0xca], "vorpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x57, 0x0a], "vxorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x57, 0xca], "vxorpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x58, 0x0a], "vaddpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x58, 0xca], "vaddpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x59, 0x0a], "vmulpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x59, 0xca], "vmulpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5c, 0x0a], "vsubpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5d, 0x0a], "vminpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5d, 0xca], "vminpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5e, 0x0a], "vdivpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5f, 0x0a], "vmaxpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x5f, 0xca], "vmaxpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x60, 0x0a], "vpunpcklbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x60, 0x4a, 0x01], "vpunpcklbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x60, 0xca], "vpunpcklbw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x61, 0x0a], "vpunpcklwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x61, 0x4a, 0x01], "vpunpcklwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x61, 0xca], "vpunpcklwd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x63, 0x0a], "vpacksswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x63, 0x4a, 0x01], "vpacksswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x63, 0xca], "vpacksswb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x67, 0x0a], "vpackuswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x67, 0x4a, 0x01], "vpackuswb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x67, 0xca], "vpackuswb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x68, 0x0a], "vpunpckhbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x68, 0x4a, 0x01], "vpunpckhbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x68, 0xca], "vpunpckhbw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x69, 0x0a], "vpunpckhwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x69, 0x4a, 0x01], "vpunpckhwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x69, 0xca], "vpunpckhwd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6c, 0xca], "vpunpcklqdq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6d, 0xca], "vpunpckhqdq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6f, 0x0a], "vmovdqa64 zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqa64 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x6f, 0xca], "vmovdqa64 zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x72, 0xca, 0xcc], "vprolq zmm0{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0x7f, 0xca], "vmovdqa64 zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xc6, 0xca, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd1, 0x0a], "vpsrlw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd1, 0x4a, 0x01], "vpsrlw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd1, 0xca], "vpsrlw zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd3, 0x0a], "vpsrlq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd3, 0x4a, 0x01], "vpsrlq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd3, 0xca], "vpsrlq zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd4, 0x0a], "vpaddq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd4, 0xca], "vpaddq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd5, 0x0a], "vpmullw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd5, 0x4a, 0x01], "vpmullw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd5, 0xca], "vpmullw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd8, 0x0a], "vpsubusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd8, 0x4a, 0x01], "vpsubusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd8, 0xca], "vpsubusb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd9, 0x0a], "vpsubusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd9, 0x4a, 0x01], "vpsubusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xd9, 0xca], "vpsubusw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xda, 0x0a], "vpminub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xda, 0x4a, 0x01], "vpminub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xda, 0xca], "vpminub zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdb, 0x0a], "vpandq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdb, 0xca], "vpandq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdc, 0x0a], "vpaddusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdc, 0x4a, 0x01], "vpaddusb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdc, 0xca], "vpaddusb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdd, 0x0a], "vpaddusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdd, 0x4a, 0x01], "vpaddusw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdd, 0xca], "vpaddusw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xde, 0x0a], "vpmaxub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xde, 0x4a, 0x01], "vpmaxub zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xde, 0xca], "vpmaxub zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdf, 0x0a], "vpandnq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xdf, 0xca], "vpandnq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe0, 0x0a], "vpavgb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe0, 0x4a, 0x01], "vpavgb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe0, 0xca], "vpavgb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe1, 0x0a], "vpsraw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe1, 0x4a, 0x01], "vpsraw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe1, 0xca], "vpsraw zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe2, 0x0a], "vpsraq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe2, 0x4a, 0x01], "vpsraq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe2, 0xca], "vpsraq zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe3, 0x0a], "vpavgw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe3, 0x4a, 0x01], "vpavgw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe3, 0xca], "vpavgw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe4, 0x0a], "vpmulhuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe4, 0x4a, 0x01], "vpmulhuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe4, 0xca], "vpmulhuw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe5, 0x0a], "vpmulhw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe5, 0x4a, 0x01], "vpmulhw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe5, 0xca], "vpmulhw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe8, 0x0a], "vpsubsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe8, 0x4a, 0x01], "vpsubsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe8, 0xca], "vpsubsb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe9, 0x0a], "vpsubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe9, 0x4a, 0x01], "vpsubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xe9, 0xca], "vpsubsw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xea, 0x0a], "vpminsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xea, 0x4a, 0x01], "vpminsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xea, 0xca], "vpminsw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xeb, 0x0a], "vporq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xeb, 0xca], "vporq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xec, 0x0a], "vpaddsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xec, 0x4a, 0x01], "vpaddsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xec, 0xca], "vpaddsb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xed, 0x0a], "vpaddsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xed, 0x4a, 0x01], "vpaddsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xed, 0xca], "vpaddsw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xee, 0x0a], "vpmaxsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xee, 0x4a, 0x01], "vpmaxsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xee, 0xca], "vpmaxsw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xef, 0x0a], "vpxorq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xef, 0xca], "vpxorq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf1, 0x0a], "vpsllw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf1, 0x4a, 0x01], "vpsllw zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf1, 0xca], "vpsllw zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf3, 0x0a], "vpsllq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf3, 0x4a, 0x01], "vpsllq zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf3, 0xca], "vpsllq zmm1{k5}{z}, zmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf4, 0x0a], "vpmuludq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf4, 0xca], "vpmuludq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf5, 0x0a], "vpmaddwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf5, 0x4a, 0x01], "vpmaddwd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf5, 0xca], "vpmaddwd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf8, 0x0a], "vpsubb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf8, 0x4a, 0x01], "vpsubb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf8, 0xca], "vpsubb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf9, 0x0a], "vpsubw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf9, 0x4a, 0x01], "vpsubw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xf9, 0xca], "vpsubw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfb, 0x0a], "vpsubq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfb, 0xca], "vpsubq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfc, 0x0a], "vpaddb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfc, 0x4a, 0x01], "vpaddb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfc, 0xca], "vpaddb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfd, 0x0a], "vpaddw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfd, 0x4a, 0x01], "vpaddw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xcd, 0xfd, 0xca], "vpaddw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x14, 0x0a], "vunpcklpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x14, 0x4a, 0x01], "vunpcklpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x15, 0x0a], "vunpckhpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x15, 0x4a, 0x01], "vunpckhpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x51, 0x0a], "vsqrtpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x51, 0x4a, 0x01], "vsqrtpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x54, 0x0a], "vandpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x54, 0x4a, 0x01], "vandpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x55, 0x0a], "vandnpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x55, 0x4a, 0x01], "vandnpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x56, 0x0a], "vorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x56, 0x4a, 0x01], "vorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x57, 0x0a], "vxorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x57, 0x4a, 0x01], "vxorpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x58, 0x0a], "vaddpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x58, 0x4a, 0x01], "vaddpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x58, 0xca], "vaddpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x59, 0x0a], "vmulpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x59, 0x4a, 0x01], "vmulpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x59, 0xca], "vmulpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5a, 0x0a], "vcvtpd2ps ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5a, 0x4a, 0x01], "vcvtpd2ps ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5c, 0x0a], "vsubpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5c, 0x4a, 0x01], "vsubpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5d, 0x0a], "vminpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5d, 0x4a, 0x01], "vminpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5e, 0x0a], "vdivpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5e, 0x4a, 0x01], "vdivpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5f, 0x0a], "vmaxpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x5f, 0x4a, 0x01], "vmaxpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x6c, 0x0a], "vpunpcklqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x6c, 0x4a, 0x01], "vpunpcklqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x6d, 0x0a], "vpunpckhqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x6d, 0x4a, 0x01], "vpunpckhqdq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x72, 0x0a, 0xcc], "vprolq zmm0{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x72, 0x4a, 0x01, 0xcc], "vprolq zmm0{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x78, 0x0a], "vcvttpd2uqq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x78, 0x4a, 0x01], "vcvttpd2uqq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x79, 0x0a], "vcvtpd2uqq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x79, 0x4a, 0x01], "vcvtpd2uqq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x7a, 0x0a], "vcvttpd2qq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x7a, 0x4a, 0x01], "vcvttpd2qq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x7b, 0x0a], "vcvtpd2qq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x7b, 0x4a, 0x01], "vcvtpd2qq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xc6, 0x0a, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xc6, 0x4a, 0x01, 0xcc], "vshufpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xd4, 0x0a], "vpaddq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xd4, 0x4a, 0x01], "vpaddq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xdb, 0x0a], "vpandq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xdb, 0x4a, 0x01], "vpandq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xdf, 0x0a], "vpandnq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xdf, 0x4a, 0x01], "vpandnq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xe6, 0x0a], "vcvttpd2dq ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xe6, 0x4a, 0x01], "vcvttpd2dq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xeb, 0x0a], "vporq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xeb, 0x4a, 0x01], "vporq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xef, 0x0a], "vpxorq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xef, 0x4a, 0x01], "vpxorq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xf4, 0x0a], "vpmuludq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xf4, 0x4a, 0x01], "vpmuludq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xfb, 0x0a], "vpsubq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xdd, 0xfb, 0x4a, 0x01], "vpsubq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x51, 0xca], "vsqrtpd zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x58, 0xca], "vaddpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x59, 0xca], "vmulpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x5a, 0xca], "vcvtpd2ps ymm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x5c, 0xca], "vsubpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x5d, 0xca], "vminpd zmm1{k5}{z}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x5e, 0xca], "vdivpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x5f, 0xca], "vmaxpd zmm1{k5}{z}{sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x78, 0xca], "vcvttpd2uqq zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x79, 0xca], "vcvtpd2uqq zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x7a, 0xca], "vcvttpd2qq zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0x7b, 0xca], "vcvtpd2qq zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfd, 0xfd, 0xe6, 0xca], "vcvttpd2dq ymm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x6f, 0x0a], "vmovdqu64 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu64 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x6f, 0xca], "vmovdqu64 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x70, 0x0a, 0xcc], "vpshufhw xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x70, 0xca, 0xcc], "vpshufhw xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7a, 0x0a], "vcvtuqq2pd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7a, 0xca], "vcvtuqq2pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7e, 0x0a], "vmovq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7e, 0x4a, 0x01], "vmovq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7e, 0xca], "vmovq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7f, 0x0a], "vmovdqu64 xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu64 xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0x7f, 0xca], "vmovdqu64 xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0xe6, 0x0a], "vcvtqq2pd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x08, 0xe6, 0xca], "vcvtqq2pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x6f, 0x0a], "vmovdqu64 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu64 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x6f, 0xca], "vmovdqu64 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x70, 0x0a, 0xcc], "vpshufhw xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x70, 0xca, 0xcc], "vpshufhw xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x7a, 0xca], "vcvtuqq2pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x7f, 0x0a], "vmovdqu64 xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu64 xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0x7f, 0xca], "vmovdqu64 xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x0d, 0xe6, 0xca], "vcvtqq2pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x2a, 0xca], "vcvtsi2ss xmm1{rn-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x2d, 0xca], "vcvtss2si ecx{rn-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x79, 0xca], "vcvtss2usi ecx{rn-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x7a, 0x0a], "vcvtuqq2pd xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x7a, 0xca], "vcvtuqq2pd zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0x7b, 0xca], "vcvtusi2ss xmm1{rn-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0xe6, 0x0a], "vcvtqq2pd xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x18, 0xe6, 0xca], "vcvtqq2pd zmm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x1d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x1d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x1d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x1d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x1d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x1d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2a, 0x0a], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2a, 0x4a, 0x01], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2c, 0x0a], "vcvttss2si ecx, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2c, 0x4a, 0x01], "vcvttss2si ecx, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2c, 0xca], "vcvttss2si ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2d, 0x0a], "vcvtss2si ecx, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2d, 0x4a, 0x01], "vcvtss2si ecx, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x2d, 0xca], "vcvtss2si ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x6f, 0x0a], "vmovdqu64 ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu64 ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x6f, 0xca], "vmovdqu64 ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x70, 0x0a, 0xcc], "vpshufhw ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x70, 0xca, 0xcc], "vpshufhw ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x78, 0x0a], "vcvttss2usi ecx, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x78, 0x4a, 0x01], "vcvttss2usi ecx, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x78, 0xca], "vcvttss2usi ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x79, 0x0a], "vcvtss2usi ecx, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x79, 0x4a, 0x01], "vcvtss2usi ecx, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x79, 0xca], "vcvtss2usi ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7a, 0x0a], "vcvtuqq2pd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7a, 0xca], "vcvtuqq2pd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7b, 0x0a], "vcvtusi2ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7b, 0x4a, 0x01], "vcvtusi2ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7b, 0xca], "vcvtusi2ss xmm1, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7f, 0x0a], "vmovdqu64 ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu64 ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0x7f, 0xca], "vmovdqu64 ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0xe6, 0x0a], "vcvtqq2pd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x28, 0xe6, 0xca], "vcvtqq2pd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x6f, 0x0a], "vmovdqu64 ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu64 ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x6f, 0xca], "vmovdqu64 ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x70, 0x0a, 0xcc], "vpshufhw ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x70, 0xca, 0xcc], "vpshufhw ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x7a, 0xca], "vcvtuqq2pd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x7f, 0x0a], "vmovdqu64 ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu64 ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0x7f, 0xca], "vmovdqu64 ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x2d, 0xe6, 0xca], "vcvtqq2pd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x2a, 0xca], "vcvtsi2ss xmm1{rd-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x2d, 0xca], "vcvtss2si ecx{rd-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x79, 0xca], "vcvtss2usi ecx{rd-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x7a, 0x0a], "vcvtuqq2pd ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x7a, 0xca], "vcvtuqq2pd zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0x7b, 0xca], "vcvtusi2ss xmm1{rd-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0xe6, 0x0a], "vcvtqq2pd ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x38, 0xe6, 0xca], "vcvtqq2pd zmm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x3d, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x3d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x3d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x3d, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x3d, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x3d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x6f, 0x0a], "vmovdqu64 zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu64 zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x6f, 0xca], "vmovdqu64 zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x70, 0x0a, 0xcc], "vpshufhw zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x70, 0xca, 0xcc], "vpshufhw zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x7a, 0x0a], "vcvtuqq2pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x7a, 0xca], "vcvtuqq2pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x7f, 0x0a], "vmovdqu64 zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu64 zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0x7f, 0xca], "vmovdqu64 zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0xe6, 0x0a], "vcvtqq2pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x48, 0xe6, 0xca], "vcvtqq2pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x6f, 0x0a], "vmovdqu64 zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu64 zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x6f, 0xca], "vmovdqu64 zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x70, 0x0a, 0xcc], "vpshufhw zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x70, 0xca, 0xcc], "vpshufhw zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x7f, 0x0a], "vmovdqu64 zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu64 zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0x7f, 0xca], "vmovdqu64 zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x4d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x2a, 0xca], "vcvtsi2ss xmm1{ru-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x2d, 0xca], "vcvtss2si ecx{ru-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x79, 0xca], "vcvtss2usi ecx{ru-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x7a, 0x0a], "vcvtuqq2pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x7a, 0xca], "vcvtuqq2pd zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0x7b, 0xca], "vcvtusi2ss xmm1{ru-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0xe6, 0x0a], "vcvtqq2pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x58, 0xe6, 0xca], "vcvtqq2pd zmm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x5d, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x5d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x5d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x5d, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x5d, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x5d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x2a, 0xca], "vcvtsi2ss xmm1{rz-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x2c, 0xca], "vcvttss2si ecx{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x2d, 0xca], "vcvtss2si ecx{rz-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x78, 0xca], "vcvttss2usi ecx{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x79, 0xca], "vcvtss2usi ecx{rz-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x7a, 0xca], "vcvtuqq2pd zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0x7b, 0xca], "vcvtusi2ss xmm1{rz-sae}, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x78, 0xe6, 0xca], "vcvtqq2pd zmm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x7d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x7d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x6f, 0x0a], "vmovdqu64 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu64 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x6f, 0xca], "vmovdqu64 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x70, 0x0a, 0xcc], "vpshufhw xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x70, 0xca, 0xcc], "vpshufhw xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x7a, 0xca], "vcvtuqq2pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0x7f, 0xca], "vmovdqu64 xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x8d, 0xe6, 0xca], "vcvtqq2pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x9d, 0x7a, 0x0a], "vcvtuqq2pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x9d, 0x7a, 0x4a, 0x01], "vcvtuqq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x9d, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x9d, 0xe6, 0x0a], "vcvtqq2pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x9d, 0xe6, 0x4a, 0x01], "vcvtqq2pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0x9d, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x6f, 0x0a], "vmovdqu64 ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu64 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x6f, 0xca], "vmovdqu64 ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x70, 0x0a, 0xcc], "vpshufhw ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x70, 0xca, 0xcc], "vpshufhw ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x7a, 0xca], "vcvtuqq2pd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0x7f, 0xca], "vmovdqu64 ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xad, 0xe6, 0xca], "vcvtqq2pd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xbd, 0x7a, 0x0a], "vcvtuqq2pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xbd, 0x7a, 0x4a, 0x01], "vcvtuqq2pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xbd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xbd, 0xe6, 0x0a], "vcvtqq2pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xbd, 0xe6, 0x4a, 0x01], "vcvtqq2pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xbd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x6f, 0x0a], "vmovdqu64 zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu64 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x6f, 0xca], "vmovdqu64 zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x70, 0x0a, 0xcc], "vpshufhw zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshufhw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x70, 0xca, 0xcc], "vpshufhw zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0x7f, 0xca], "vmovdqu64 zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xcd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xdd, 0x7a, 0x0a], "vcvtuqq2pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xdd, 0x7a, 0x4a, 0x01], "vcvtuqq2pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xdd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xdd, 0xe6, 0x0a], "vcvtqq2pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xdd, 0xe6, 0x4a, 0x01], "vcvtqq2pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xdd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xfd, 0x7a, 0xca], "vcvtuqq2pd zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xfe, 0xfd, 0xe6, 0xca], "vcvtqq2pd zmm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x12, 0x0a], "vmovddup xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x12, 0x4a, 0x01], "vmovddup xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x12, 0xca], "vmovddup xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x6f, 0x0a], "vmovdqu16 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x6f, 0x4a, 0x01], "vmovdqu16 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x6f, 0xca], "vmovdqu16 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x70, 0x0a, 0xcc], "vpshuflw xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x70, 0xca, 0xcc], "vpshuflw xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x7a, 0x0a], "vcvtuqq2ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x7a, 0xca], "vcvtuqq2ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x7f, 0x0a], "vmovdqu16 xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x7f, 0x4a, 0x01], "vmovdqu16 xmmword [bp + si * 1 + 0x10], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0x7f, 0xca], "vmovdqu16 xmm2, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0xe6, 0x0a], "vcvtpd2dq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x08, 0xe6, 0xca], "vcvtpd2dq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x12, 0x0a], "vmovddup xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x12, 0x4a, 0x01], "vmovddup xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x12, 0xca], "vmovddup xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x6f, 0x0a], "vmovdqu16 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x6f, 0x4a, 0x01], "vmovdqu16 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x6f, 0xca], "vmovdqu16 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x70, 0x0a, 0xcc], "vpshuflw xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x70, 0xca, 0xcc], "vpshuflw xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x7f, 0x0a], "vmovdqu16 xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x7f, 0x4a, 0x01], "vmovdqu16 xmmword [bp + si * 1 + 0x10]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0x7f, 0xca], "vmovdqu16 xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x0d, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x2d, 0xca], "vcvtsd2si ecx{rn-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x51, 0xca], "vsqrtsd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x58, 0xca], "vaddsd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x59, 0xca], "vmulsd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x5a, 0xca], "vcvtsd2ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x5c, 0xca], "vsubsd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x5e, 0xca], "vdivsd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x79, 0xca], "vcvtsd2usi ecx{rn-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x7a, 0x0a], "vcvtuqq2ps xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0x7a, 0xca], "vcvtuqq2ps ymm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0xe6, 0x0a], "vcvtpd2dq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x18, 0xe6, 0xca], "vcvtpd2dq ymm1{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x51, 0xca], "vsqrtsd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x58, 0xca], "vaddsd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x59, 0xca], "vmulsd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x5c, 0xca], "vsubsd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x5e, 0xca], "vdivsd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x1d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x10, 0x0a], "vmovsd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x10, 0x4a, 0x01], "vmovsd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x10, 0xca], "vmovsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x11, 0x0a], "vmovsd qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x11, 0x4a, 0x01], "vmovsd qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x11, 0xca], "vmovsd xmm2, xmm0, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x12, 0x0a], "vmovddup ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x12, 0x4a, 0x01], "vmovddup ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x12, 0xca], "vmovddup ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2a, 0x0a], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2a, 0x4a, 0x01], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2c, 0x4a, 0x01], "vcvttsd2si ecx, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2c, 0xca], "vcvttsd2si ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2d, 0x4a, 0x01], "vcvtsd2si ecx, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x2d, 0xca], "vcvtsd2si ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x51, 0x0a], "vsqrtsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x51, 0x4a, 0x01], "vsqrtsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x51, 0xca], "vsqrtsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x58, 0x0a], "vaddsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x58, 0x4a, 0x01], "vaddsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x58, 0xca], "vaddsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x59, 0x0a], "vmulsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x59, 0x4a, 0x01], "vmulsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x59, 0xca], "vmulsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5a, 0x0a], "vcvtsd2ss xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5a, 0x4a, 0x01], "vcvtsd2ss xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5a, 0xca], "vcvtsd2ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5c, 0x0a], "vsubsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5c, 0x4a, 0x01], "vsubsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5c, 0xca], "vsubsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5d, 0x0a], "vminsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5d, 0x4a, 0x01], "vminsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5d, 0xca], "vminsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5e, 0x0a], "vdivsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5e, 0x4a, 0x01], "vdivsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5e, 0xca], "vdivsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5f, 0x0a], "vmaxsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5f, 0x4a, 0x01], "vmaxsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x5f, 0xca], "vmaxsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x6f, 0x0a], "vmovdqu16 ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x6f, 0x4a, 0x01], "vmovdqu16 ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x6f, 0xca], "vmovdqu16 ymm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x70, 0x0a, 0xcc], "vpshuflw ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x70, 0xca, 0xcc], "vpshuflw ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x78, 0x0a], "vcvttsd2usi ecx, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x78, 0x4a, 0x01], "vcvttsd2usi ecx, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x78, 0xca], "vcvttsd2usi ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x79, 0x0a], "vcvtsd2usi ecx, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x79, 0x4a, 0x01], "vcvtsd2usi ecx, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x79, 0xca], "vcvtsd2usi ecx, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7a, 0x0a], "vcvtuqq2ps xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7a, 0xca], "vcvtuqq2ps xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7b, 0x0a], "vcvtusi2sd xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7b, 0x4a, 0x01], "vcvtusi2sd xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7f, 0x0a], "vmovdqu16 ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7f, 0x4a, 0x01], "vmovdqu16 ymmword [bp + si * 1 + 0x20], ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0x7f, 0xca], "vmovdqu16 ymm2, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0xc2, 0x0a, 0xcc], "vcmpsd k1, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0xc2, 0x4a, 0x01, 0xcc], "vcmpsd k1, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0xc2, 0xca, 0xcc], "vcmpsd k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0xe6, 0x0a], "vcvtpd2dq xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x28, 0xe6, 0xca], "vcvtpd2dq xmm1, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x10, 0x0a], "vmovsd xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x10, 0x4a, 0x01], "vmovsd xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x10, 0xca], "vmovsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x11, 0x0a], "vmovsd qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x11, 0x4a, 0x01], "vmovsd qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x11, 0xca], "vmovsd xmm2{k5}, xmm0, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x12, 0x0a], "vmovddup ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x12, 0x4a, 0x01], "vmovddup ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x12, 0xca], "vmovddup ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x51, 0x0a], "vsqrtsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x51, 0x4a, 0x01], "vsqrtsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x51, 0xca], "vsqrtsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x58, 0x0a], "vaddsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x58, 0x4a, 0x01], "vaddsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x58, 0xca], "vaddsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x59, 0x0a], "vmulsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x59, 0x4a, 0x01], "vmulsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x59, 0xca], "vmulsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5a, 0x0a], "vcvtsd2ss xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5a, 0x4a, 0x01], "vcvtsd2ss xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5c, 0x0a], "vsubsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5c, 0x4a, 0x01], "vsubsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5c, 0xca], "vsubsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5d, 0x0a], "vminsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5d, 0x4a, 0x01], "vminsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5d, 0xca], "vminsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5e, 0x0a], "vdivsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5e, 0x4a, 0x01], "vdivsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5e, 0xca], "vdivsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5f, 0x0a], "vmaxsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5f, 0x4a, 0x01], "vmaxsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x5f, 0xca], "vmaxsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x6f, 0x0a], "vmovdqu16 ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x6f, 0x4a, 0x01], "vmovdqu16 ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x6f, 0xca], "vmovdqu16 ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x70, 0x0a, 0xcc], "vpshuflw ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x70, 0xca, 0xcc], "vpshuflw ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x7f, 0x0a], "vmovdqu16 ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x7f, 0x4a, 0x01], "vmovdqu16 ymmword [bp + si * 1 + 0x20]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0x7f, 0xca], "vmovdqu16 ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0xc2, 0x0a, 0xcc], "vcmpsd k1{k5}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0xc2, 0x4a, 0x01, 0xcc], "vcmpsd k1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0xc2, 0xca, 0xcc], "vcmpsd k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x2d, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x2d, 0xca], "vcvtsd2si ecx{rd-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x51, 0xca], "vsqrtsd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x58, 0xca], "vaddsd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x59, 0xca], "vmulsd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x5a, 0xca], "vcvtsd2ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x5c, 0xca], "vsubsd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x5e, 0xca], "vdivsd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x79, 0xca], "vcvtsd2usi ecx{rd-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x7a, 0x0a], "vcvtuqq2ps xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0x7a, 0xca], "vcvtuqq2ps ymm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0xe6, 0x0a], "vcvtpd2dq xmm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x38, 0xe6, 0xca], "vcvtpd2dq ymm1{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x51, 0xca], "vsqrtsd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x58, 0xca], "vaddsd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x59, 0xca], "vmulsd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x5c, 0xca], "vsubsd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x5e, 0xca], "vdivsd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x3d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x12, 0x0a], "vmovddup zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x12, 0x4a, 0x01], "vmovddup zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x12, 0xca], "vmovddup zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x6f, 0x0a], "vmovdqu16 zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x6f, 0x4a, 0x01], "vmovdqu16 zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x6f, 0xca], "vmovdqu16 zmm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x70, 0x0a, 0xcc], "vpshuflw zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x70, 0xca, 0xcc], "vpshuflw zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x7a, 0x0a], "vcvtuqq2ps ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x7a, 0xca], "vcvtuqq2ps ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x7f, 0x0a], "vmovdqu16 zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x7f, 0x4a, 0x01], "vmovdqu16 zmmword [bp + si * 1 + 0x40], zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0x7f, 0xca], "vmovdqu16 zmm2, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0xe6, 0x0a], "vcvtpd2dq ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x48, 0xe6, 0xca], "vcvtpd2dq ymm1, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x12, 0x0a], "vmovddup zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x12, 0x4a, 0x01], "vmovddup zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x12, 0xca], "vmovddup zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x6f, 0x0a], "vmovdqu16 zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x6f, 0x4a, 0x01], "vmovdqu16 zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x6f, 0xca], "vmovdqu16 zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x70, 0x0a, 0xcc], "vpshuflw zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x70, 0xca, 0xcc], "vpshuflw zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x7f, 0x0a], "vmovdqu16 zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x7f, 0x4a, 0x01], "vmovdqu16 zmmword [bp + si * 1 + 0x40]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0x7f, 0xca], "vmovdqu16 zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x4d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x2d, 0xca], "vcvtsd2si ecx{ru-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x51, 0xca], "vsqrtsd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x58, 0xca], "vaddsd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x59, 0xca], "vmulsd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x5a, 0xca], "vcvtsd2ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x5c, 0xca], "vsubsd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x5e, 0xca], "vdivsd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x79, 0xca], "vcvtsd2usi ecx{ru-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x7a, 0x0a], "vcvtuqq2ps ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0x7a, 0xca], "vcvtuqq2ps ymm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0xe6, 0x0a], "vcvtpd2dq ymm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x58, 0xe6, 0xca], "vcvtpd2dq ymm1{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x51, 0xca], "vsqrtsd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x58, 0xca], "vaddsd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x59, 0xca], "vmulsd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x5c, 0xca], "vsubsd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x5e, 0xca], "vdivsd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x5d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x2c, 0xca], "vcvttsd2si ecx{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x2d, 0xca], "vcvtsd2si ecx{rz-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x51, 0xca], "vsqrtsd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x58, 0xca], "vaddsd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x59, 0xca], "vmulsd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x5a, 0xca], "vcvtsd2ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x5c, 0xca], "vsubsd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x5d, 0xca], "vminsd xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x5e, 0xca], "vdivsd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x5f, 0xca], "vmaxsd xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x78, 0xca], "vcvttsd2usi ecx{sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x79, 0xca], "vcvtsd2usi ecx{rz-sae}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x7a, 0xca], "vcvtuqq2ps ymm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0x7b, 0xca], "vcvtusi2sd xmm1, xmm0, edx"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0xc2, 0xca, 0xcc], "vcmpsd k1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x78, 0xe6, 0xca], "vcvtpd2dq ymm1{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x51, 0xca], "vsqrtsd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x58, 0xca], "vaddsd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x59, 0xca], "vmulsd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x5c, 0xca], "vsubsd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x5d, 0xca], "vminsd xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x5e, 0xca], "vdivsd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x5f, 0xca], "vmaxsd xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0xc2, 0xca, 0xcc], "vcmpsd k1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x7d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x12, 0x0a], "vmovddup xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x12, 0x4a, 0x01], "vmovddup xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x12, 0xca], "vmovddup xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x6f, 0x0a], "vmovdqu16 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x6f, 0x4a, 0x01], "vmovdqu16 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x6f, 0xca], "vmovdqu16 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x70, 0x0a, 0xcc], "vpshuflw xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x70, 0xca, 0xcc], "vpshuflw xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0x7f, 0xca], "vmovdqu16 xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x8d, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x58, 0xca], "vaddsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x59, 0xca], "vmulsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0x9d, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{rn-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x10, 0x0a], "vmovsd xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x10, 0x4a, 0x01], "vmovsd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x10, 0xca], "vmovsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x11, 0xca], "vmovsd xmm2{k5}{z}, xmm0, xmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x12, 0x0a], "vmovddup ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x12, 0x4a, 0x01], "vmovddup ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x12, 0xca], "vmovddup ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x51, 0x0a], "vsqrtsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x51, 0x4a, 0x01], "vsqrtsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x58, 0x0a], "vaddsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x58, 0x4a, 0x01], "vaddsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x58, 0xca], "vaddsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x59, 0x0a], "vmulsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x59, 0x4a, 0x01], "vmulsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x59, 0xca], "vmulsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5a, 0x0a], "vcvtsd2ss xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5a, 0x4a, 0x01], "vcvtsd2ss xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5c, 0x0a], "vsubsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5c, 0x4a, 0x01], "vsubsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5c, 0xca], "vsubsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5d, 0x0a], "vminsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5d, 0x4a, 0x01], "vminsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5d, 0xca], "vminsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5e, 0x0a], "vdivsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5e, 0x4a, 0x01], "vdivsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5e, 0xca], "vdivsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5f, 0x0a], "vmaxsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5f, 0x4a, 0x01], "vmaxsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x5f, 0xca], "vmaxsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x6f, 0x0a], "vmovdqu16 ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x6f, 0x4a, 0x01], "vmovdqu16 ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x6f, 0xca], "vmovdqu16 ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x70, 0x0a, 0xcc], "vpshuflw ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x70, 0xca, 0xcc], "vpshuflw ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x7a, 0xca], "vcvtuqq2ps xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0x7f, 0xca], "vmovdqu16 ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xad, 0xe6, 0xca], "vcvtpd2dq xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x58, 0xca], "vaddsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x59, 0xca], "vmulsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x7a, 0x0a], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x7a, 0x4a, 0x01], "vcvtuqq2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0xe6, 0x0a], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0xe6, 0x4a, 0x01], "vcvtpd2dq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xbd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{rd-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x12, 0x0a], "vmovddup zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x12, 0x4a, 0x01], "vmovddup zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x12, 0xca], "vmovddup zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x6f, 0x0a], "vmovdqu16 zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x6f, 0x4a, 0x01], "vmovdqu16 zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x6f, 0xca], "vmovdqu16 zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x70, 0x0a, 0xcc], "vpshuflw zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshuflw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x70, 0xca, 0xcc], "vpshuflw zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0x7f, 0xca], "vmovdqu16 zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xcd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x58, 0xca], "vaddsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x59, 0xca], "vmulsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x7a, 0x0a], "vcvtuqq2ps ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x7a, 0x4a, 0x01], "vcvtuqq2ps ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0xe6, 0x0a], "vcvtpd2dq ymm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0xe6, 0x4a, 0x01], "vcvtpd2dq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xdd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{ru-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x51, 0xca], "vsqrtsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x58, 0xca], "vaddsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x59, 0xca], "vmulsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x5a, 0xca], "vcvtsd2ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x5c, 0xca], "vsubsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x5d, 0xca], "vminsd xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x5e, 0xca], "vdivsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x5f, 0xca], "vmaxsd xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0x7a, 0xca], "vcvtuqq2ps ymm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf1, 0xff, 0xfd, 0xe6, 0xca], "vcvtpd2dq ymm1{k5}{z}{rz-sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x0c, 0x0a], "vpermilps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x0c, 0x4a, 0x01], "vpermilps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x0c, 0xca], "vpermilps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x13, 0x0a], "vcvtph2ps xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x13, 0x4a, 0x01], "vcvtph2ps xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x13, 0xca], "vcvtph2ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x14, 0x0a], "vprorvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x14, 0x4a, 0x01], "vprorvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x14, 0xca], "vprorvd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x15, 0x0a], "vprolvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x15, 0x4a, 0x01], "vprolvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x15, 0xca], "vprolvd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x18, 0x0a], "vbroadcastss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x18, 0x4a, 0x01], "vbroadcastss xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x18, 0xca], "vbroadcastss xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x1e, 0x0a], "vpabsd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x1e, 0x4a, 0x01], "vpabsd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x1e, 0xca], "vpabsd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x25, 0x0a], "vpmovsxdq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x25, 0x4a, 0x01], "vpmovsxdq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x25, 0xca], "vpmovsxdq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x26, 0x0a], "vptestmb k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x26, 0x4a, 0x01], "vptestmb k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x26, 0xca], "vptestmb k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x27, 0x0a], "vptestmd k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x27, 0x4a, 0x01], "vptestmd k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x27, 0xca], "vptestmd k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x0a], "vmovntdqa xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2a, 0x4a, 0x01], "vmovntdqa xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2b, 0x0a], "vpackusdw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2b, 0x4a, 0x01], "vpackusdw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2b, 0xca], "vpackusdw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2c, 0x0a], "vscalefps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2c, 0x4a, 0x01], "vscalefps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x2c, 0xca], "vscalefps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x35, 0x0a], "vpmovzxdq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x35, 0x4a, 0x01], "vpmovzxdq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x35, 0xca], "vpmovzxdq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x39, 0x0a], "vpminsd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x39, 0x4a, 0x01], "vpminsd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x39, 0xca], "vpminsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3b, 0x0a], "vpminud xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3b, 0x4a, 0x01], "vpminud xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3b, 0xca], "vpminud xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3d, 0x0a], "vpmaxsd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3d, 0xca], "vpmaxsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3f, 0x0a], "vpmaxud xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3f, 0x4a, 0x01], "vpmaxud xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x3f, 0xca], "vpmaxud xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x40, 0x0a], "vpmulld xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x40, 0x4a, 0x01], "vpmulld xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x40, 0xca], "vpmulld xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x42, 0x0a], "vgetexpps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x42, 0x4a, 0x01], "vgetexpps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x42, 0xca], "vgetexpps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x44, 0x0a], "vplzcntd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x44, 0x4a, 0x01], "vplzcntd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x44, 0xca], "vplzcntd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x45, 0x0a], "vpsrlvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x45, 0x4a, 0x01], "vpsrlvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x45, 0xca], "vpsrlvd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x46, 0x0a], "vpsravd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x46, 0x4a, 0x01], "vpsravd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x46, 0xca], "vpsravd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x47, 0x0a], "vpsllvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x47, 0x4a, 0x01], "vpsllvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x47, 0xca], "vpsllvd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x4c, 0x0a], "vrcp14ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x4c, 0xca], "vrcp14ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x4e, 0x0a], "vrsqrt14ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x4e, 0xca], "vrsqrt14ps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x50, 0x0a], "vpdpbusd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x50, 0x4a, 0x01], "vpdpbusd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x50, 0xca], "vpdpbusd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x51, 0x0a], "vpdpbusds xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x51, 0x4a, 0x01], "vpdpbusds xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x51, 0xca], "vpdpbusds xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x52, 0x0a], "vpdpwssd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x52, 0x4a, 0x01], "vpdpwssd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x52, 0xca], "vpdpwssd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x53, 0x0a], "vpdpwssds xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x53, 0x4a, 0x01], "vpdpwssds xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x53, 0xca], "vpdpwssds xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x54, 0x0a], "vpopcntb xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x54, 0x4a, 0x01], "vpopcntb xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x54, 0xca], "vpopcntb xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x55, 0x0a], "vpopcntd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x55, 0x4a, 0x01], "vpopcntd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x55, 0xca], "vpopcntd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x58, 0x0a], "vpbroadcastd xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x58, 0x4a, 0x01], "vpbroadcastd xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x58, 0xca], "vpbroadcastd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x59, 0x0a], "vbroadcasti32x2 xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x59, 0x4a, 0x01], "vbroadcasti32x2 xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x59, 0xca], "vbroadcasti32x2 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x62, 0x0a], "vpexpandb xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x62, 0x4a, 0x01], "vpexpandb xmm1, xmmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x62, 0xca], "vpexpandb xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x63, 0x0a], "vpcompressb xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x63, 0x4a, 0x01], "vpcompressb xmmword [bp + si * 1 + 0x1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x63, 0xca], "vpcompressb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x64, 0x0a], "vpblendmd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x64, 0x4a, 0x01], "vpblendmd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x64, 0xca], "vpblendmd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x65, 0x0a], "vblendmps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x65, 0x4a, 0x01], "vblendmps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x65, 0xca], "vblendmps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x66, 0x0a], "vpblendmb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x66, 0x4a, 0x01], "vpblendmb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x66, 0xca], "vpblendmb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x71, 0x0a], "vpshldvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x71, 0x4a, 0x01], "vpshldvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x71, 0xca], "vpshldvd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x73, 0x0a], "vpshrdvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x73, 0x4a, 0x01], "vpshrdvd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x73, 0xca], "vpshrdvd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x75, 0x0a], "vpermi2b xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x75, 0x4a, 0x01], "vpermi2b xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x75, 0xca], "vpermi2b xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x76, 0x0a], "vpermi2d xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x76, 0x4a, 0x01], "vpermi2d xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x76, 0xca], "vpermi2d xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x77, 0x0a], "vpermi2ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x77, 0x4a, 0x01], "vpermi2ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x77, 0xca], "vpermi2ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x78, 0x0a], "vpbroadcastb xmm1, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x78, 0x4a, 0x01], "vpbroadcastb xmm1, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x78, 0xca], "vpbroadcastb xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x79, 0x0a], "vpbroadcastw xmm1, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x79, 0x4a, 0x01], "vpbroadcastw xmm1, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x79, 0xca], "vpbroadcastw xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7a, 0xca], "vpbroadcastb xmm1, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7b, 0xca], "vpbroadcastw xmm1, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7d, 0x0a], "vpermt2b xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7d, 0x4a, 0x01], "vpermt2b xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7d, 0xca], "vpermt2b xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7e, 0x0a], "vpermt2d xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7e, 0x4a, 0x01], "vpermt2d xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7e, 0xca], "vpermt2d xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7f, 0x0a], "vpermt2ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x7f, 0xca], "vpermt2ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x88, 0x0a], "vexpandps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x88, 0x4a, 0x01], "vexpandps xmm1, xmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x88, 0xca], "vexpandps xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x89, 0x0a], "vpexpandd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x89, 0x4a, 0x01], "vpexpandd xmm1, xmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x89, 0xca], "vpexpandd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8a, 0x0a], "vcompressps xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8a, 0x4a, 0x01], "vcompressps xmmword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8a, 0xca], "vcompressps xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8b, 0x0a], "vpcompressd xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8b, 0x4a, 0x01], "vpcompressd xmmword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8b, 0xca], "vpcompressd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8d, 0x0a], "vpermb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8d, 0x4a, 0x01], "vpermb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8d, 0xca], "vpermb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8f, 0x0a], "vpshufbitqmb k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x8f, 0xca], "vpshufbitqmb k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x96, 0x0a], "vfmaddsub132ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x96, 0xca], "vfmaddsub132ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x97, 0x0a], "vfmsubadd132ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x97, 0xca], "vfmsubadd132ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x98, 0x0a], "vfmadd132ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x98, 0xca], "vfmadd132ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9a, 0x0a], "vfmsub132ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9a, 0xca], "vfmsub132ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9c, 0x0a], "vfnmadd132ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9c, 0xca], "vfnmadd132ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9e, 0x0a], "vfnmsub132ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0x9e, 0xca], "vfnmsub132ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa6, 0x0a], "vfmaddsub213ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa6, 0xca], "vfmaddsub213ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa7, 0x0a], "vfmsubadd213ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa7, 0xca], "vfmsubadd213ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa8, 0x0a], "vfmadd213ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xa8, 0xca], "vfmadd213ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xaa, 0x0a], "vfmsub213ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xaa, 0xca], "vfmsub213ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xac, 0x0a], "vfnmadd213ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xac, 0xca], "vfnmadd213ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xae, 0x0a], "vfnmsub213ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xae, 0xca], "vfnmsub213ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb6, 0x0a], "vfmaddsub231ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb6, 0xca], "vfmaddsub231ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb7, 0x0a], "vfmsubadd231ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb7, 0xca], "vfmsubadd231ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb8, 0x0a], "vfmadd231ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xb8, 0xca], "vfmadd231ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xba, 0x0a], "vfmsub231ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xba, 0xca], "vfmsub231ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xbc, 0x0a], "vfnmadd231ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xbc, 0xca], "vfnmadd231ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xbe, 0x0a], "vfnmsub231ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xbe, 0xca], "vfnmsub231ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xc4, 0x0a], "vpconflictd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xc4, 0x4a, 0x01], "vpconflictd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xc4, 0xca], "vpconflictd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xcf, 0x0a], "vgf2p8mulb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xcf, 0x4a, 0x01], "vgf2p8mulb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x08, 0xcf, 0xca], "vgf2p8mulb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x0c, 0x0a], "vpermilps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x0c, 0xca], "vpermilps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x13, 0x0a], "vcvtph2ps xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x13, 0x4a, 0x01], "vcvtph2ps xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x13, 0xca], "vcvtph2ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x14, 0x0a], "vprorvd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x14, 0xca], "vprorvd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x15, 0x0a], "vprolvd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x15, 0xca], "vprolvd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x18, 0x0a], "vbroadcastss xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x18, 0x4a, 0x01], "vbroadcastss xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x18, 0xca], "vbroadcastss xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x1e, 0x0a], "vpabsd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x1e, 0xca], "vpabsd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x25, 0x0a], "vpmovsxdq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x25, 0x4a, 0x01], "vpmovsxdq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x25, 0xca], "vpmovsxdq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x26, 0x0a], "vptestmb k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x26, 0x4a, 0x01], "vptestmb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x26, 0xca], "vptestmb k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x27, 0x0a], "vptestmd k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x27, 0xca], "vptestmd k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x2b, 0x0a], "vpackusdw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x2b, 0xca], "vpackusdw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x2c, 0x0a], "vscalefps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x2c, 0xca], "vscalefps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x35, 0x0a], "vpmovzxdq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x35, 0x4a, 0x01], "vpmovzxdq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x35, 0xca], "vpmovzxdq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x39, 0x0a], "vpminsd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x39, 0xca], "vpminsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3b, 0x0a], "vpminud xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3b, 0xca], "vpminud xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3d, 0xca], "vpmaxsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3f, 0x0a], "vpmaxud xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x3f, 0xca], "vpmaxud xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x40, 0x0a], "vpmulld xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x40, 0xca], "vpmulld xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x42, 0x0a], "vgetexpps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x42, 0xca], "vgetexpps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x44, 0x0a], "vplzcntd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x44, 0xca], "vplzcntd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x45, 0x0a], "vpsrlvd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x45, 0xca], "vpsrlvd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x46, 0x0a], "vpsravd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x46, 0xca], "vpsravd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x47, 0x0a], "vpsllvd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x47, 0xca], "vpsllvd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x4c, 0xca], "vrcp14ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x4e, 0xca], "vrsqrt14ps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x50, 0x0a], "vpdpbusd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x50, 0xca], "vpdpbusd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x51, 0x0a], "vpdpbusds xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x51, 0xca], "vpdpbusds xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x52, 0x0a], "vpdpwssd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x52, 0xca], "vpdpwssd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x53, 0x0a], "vpdpwssds xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x53, 0xca], "vpdpwssds xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x54, 0x0a], "vpopcntb xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x54, 0x4a, 0x01], "vpopcntb xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x54, 0xca], "vpopcntb xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x55, 0x0a], "vpopcntd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x55, 0xca], "vpopcntd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x58, 0x0a], "vpbroadcastd xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x58, 0x4a, 0x01], "vpbroadcastd xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x58, 0xca], "vpbroadcastd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x59, 0x0a], "vbroadcasti32x2 xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x59, 0xca], "vbroadcasti32x2 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x62, 0x0a], "vpexpandb xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x62, 0x4a, 0x01], "vpexpandb xmm1{k5}, xmmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x62, 0xca], "vpexpandb xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x63, 0x0a], "vpcompressb xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x63, 0x4a, 0x01], "vpcompressb xmmword [bp + si * 1 + 0x1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x63, 0xca], "vpcompressb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x64, 0x0a], "vpblendmd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x64, 0xca], "vpblendmd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x65, 0x0a], "vblendmps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x65, 0xca], "vblendmps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x66, 0x0a], "vpblendmb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x66, 0x4a, 0x01], "vpblendmb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x66, 0xca], "vpblendmb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x71, 0x0a], "vpshldvd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x71, 0xca], "vpshldvd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x73, 0x0a], "vpshrdvd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x73, 0xca], "vpshrdvd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x75, 0x0a], "vpermi2b xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x75, 0x4a, 0x01], "vpermi2b xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x75, 0xca], "vpermi2b xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x76, 0x0a], "vpermi2d xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x76, 0xca], "vpermi2d xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x77, 0x0a], "vpermi2ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x77, 0xca], "vpermi2ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x78, 0x0a], "vpbroadcastb xmm1{k5}, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x78, 0x4a, 0x01], "vpbroadcastb xmm1{k5}, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x78, 0xca], "vpbroadcastb xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x79, 0x0a], "vpbroadcastw xmm1{k5}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x79, 0x4a, 0x01], "vpbroadcastw xmm1{k5}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x79, 0xca], "vpbroadcastw xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7a, 0xca], "vpbroadcastb xmm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7b, 0xca], "vpbroadcastw xmm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7d, 0x0a], "vpermt2b xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7d, 0x4a, 0x01], "vpermt2b xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7d, 0xca], "vpermt2b xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7e, 0x0a], "vpermt2d xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7e, 0xca], "vpermt2d xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x7f, 0xca], "vpermt2ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x88, 0x0a], "vexpandps xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x88, 0x4a, 0x01], "vexpandps xmm1{k5}, xmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x88, 0xca], "vexpandps xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x89, 0x0a], "vpexpandd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x89, 0x4a, 0x01], "vpexpandd xmm1{k5}, xmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x89, 0xca], "vpexpandd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8a, 0x0a], "vcompressps xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8a, 0x4a, 0x01], "vcompressps xmmword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8a, 0xca], "vcompressps xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8b, 0x0a], "vpcompressd xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8b, 0x4a, 0x01], "vpcompressd xmmword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8b, 0xca], "vpcompressd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8d, 0x0a], "vpermb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8d, 0x4a, 0x01], "vpermb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8d, 0xca], "vpermb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8f, 0x0a], "vpshufbitqmb k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x8f, 0xca], "vpshufbitqmb k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x96, 0xca], "vfmaddsub132ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x97, 0xca], "vfmsubadd132ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x98, 0xca], "vfmadd132ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9a, 0xca], "vfmsub132ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9c, 0xca], "vfnmadd132ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0x9e, 0xca], "vfnmsub132ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa6, 0xca], "vfmaddsub213ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa7, 0xca], "vfmsubadd213ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xa8, 0xca], "vfmadd213ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xaa, 0xca], "vfmsub213ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xac, 0xca], "vfnmadd213ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xae, 0xca], "vfnmsub213ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb6, 0xca], "vfmaddsub231ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb7, 0xca], "vfmsubadd231ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xb8, 0xca], "vfmadd231ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xba, 0xca], "vfmsub231ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xbc, 0xca], "vfnmadd231ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xbe, 0xca], "vfnmsub231ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xc4, 0x0a], "vpconflictd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xc4, 0xca], "vpconflictd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xcf, 0x0a], "vgf2p8mulb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xcf, 0x4a, 0x01], "vgf2p8mulb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x0d, 0xcf, 0xca], "vgf2p8mulb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x0c, 0x0a], "vpermilps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x0c, 0x4a, 0x01], "vpermilps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x14, 0x0a], "vprorvd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x14, 0x4a, 0x01], "vprorvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x15, 0x0a], "vprolvd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x15, 0x4a, 0x01], "vprolvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x1e, 0x0a], "vpabsd xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x1e, 0x4a, 0x01], "vpabsd xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x27, 0x0a], "vptestmd k1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x27, 0x4a, 0x01], "vptestmd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x2b, 0x0a], "vpackusdw xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x2b, 0x4a, 0x01], "vpackusdw xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x2c, 0x0a], "vscalefps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x2c, 0x4a, 0x01], "vscalefps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x2c, 0xca], "vscalefps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x2d, 0xca], "vscalefss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x39, 0x0a], "vpminsd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x39, 0x4a, 0x01], "vpminsd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x3b, 0x0a], "vpminud xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x3b, 0x4a, 0x01], "vpminud xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x3d, 0x0a], "vpmaxsd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x3f, 0x0a], "vpmaxud xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x3f, 0x4a, 0x01], "vpmaxud xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x40, 0x0a], "vpmulld xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x40, 0x4a, 0x01], "vpmulld xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x42, 0x0a], "vgetexpps xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x42, 0x4a, 0x01], "vgetexpps xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x44, 0x0a], "vplzcntd xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x44, 0x4a, 0x01], "vplzcntd xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x45, 0x0a], "vpsrlvd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x45, 0x4a, 0x01], "vpsrlvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x46, 0x0a], "vpsravd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x46, 0x4a, 0x01], "vpsravd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x47, 0x0a], "vpsllvd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x47, 0x4a, 0x01], "vpsllvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x4c, 0x0a], "vrcp14ps xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x4e, 0x0a], "vrsqrt14ps xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x50, 0x0a], "vpdpbusd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x50, 0x4a, 0x01], "vpdpbusd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x51, 0x0a], "vpdpbusds xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x51, 0x4a, 0x01], "vpdpbusds xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x52, 0x0a], "vpdpwssd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x52, 0x4a, 0x01], "vpdpwssd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x53, 0x0a], "vpdpwssds xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x53, 0x4a, 0x01], "vpdpwssds xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x55, 0x0a], "vpopcntd xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x55, 0x4a, 0x01], "vpopcntd xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x64, 0x0a], "vpblendmd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x64, 0x4a, 0x01], "vpblendmd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x65, 0x0a], "vblendmps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x65, 0x4a, 0x01], "vblendmps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x71, 0x0a], "vpshldvd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x71, 0x4a, 0x01], "vpshldvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x73, 0x0a], "vpshrdvd xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x73, 0x4a, 0x01], "vpshrdvd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x76, 0x0a], "vpermi2d xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x76, 0x4a, 0x01], "vpermi2d xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x77, 0x0a], "vpermi2ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x77, 0x4a, 0x01], "vpermi2ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x7e, 0x0a], "vpermt2d xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x7e, 0x4a, 0x01], "vpermt2d xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x7f, 0x0a], "vpermt2ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x96, 0x0a], "vfmaddsub132ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x96, 0xca], "vfmaddsub132ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x97, 0x0a], "vfmsubadd132ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x97, 0xca], "vfmsubadd132ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x98, 0x0a], "vfmadd132ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x98, 0xca], "vfmadd132ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x99, 0xca], "vfmadd132ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9a, 0x0a], "vfmsub132ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9a, 0xca], "vfmsub132ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9b, 0xca], "vfmsub132ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9c, 0x0a], "vfnmadd132ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9c, 0xca], "vfnmadd132ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9d, 0xca], "vfnmadd132ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9e, 0x0a], "vfnmsub132ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9e, 0xca], "vfnmsub132ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0x9f, 0xca], "vfnmsub132ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa6, 0x0a], "vfmaddsub213ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa6, 0xca], "vfmaddsub213ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa7, 0x0a], "vfmsubadd213ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa7, 0xca], "vfmsubadd213ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa8, 0x0a], "vfmadd213ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa8, 0xca], "vfmadd213ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xa9, 0xca], "vfmadd213ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xaa, 0x0a], "vfmsub213ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xaa, 0xca], "vfmsub213ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xab, 0xca], "vfmsub213ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xac, 0x0a], "vfnmadd213ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xac, 0xca], "vfnmadd213ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xad, 0xca], "vfnmadd213ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xae, 0x0a], "vfnmsub213ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xae, 0xca], "vfnmsub213ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xaf, 0xca], "vfnmsub213ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb6, 0x0a], "vfmaddsub231ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb6, 0xca], "vfmaddsub231ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb7, 0x0a], "vfmsubadd231ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb7, 0xca], "vfmsubadd231ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb8, 0x0a], "vfmadd231ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb8, 0xca], "vfmadd231ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xb9, 0xca], "vfmadd231ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xba, 0x0a], "vfmsub231ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xba, 0xca], "vfmsub231ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbb, 0xca], "vfmsub231ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbc, 0x0a], "vfnmadd231ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbc, 0xca], "vfnmadd231ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbd, 0xca], "vfnmadd231ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbe, 0x0a], "vfnmsub231ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbe, 0xca], "vfnmsub231ps zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xbf, 0xca], "vfnmsub231ss xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xc4, 0x0a], "vpconflictd xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x18, 0xc4, 0x4a, 0x01], "vpconflictd xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x0c, 0x0a], "vpermilps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x14, 0x0a], "vprorvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x15, 0x0a], "vprolvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x1e, 0x0a], "vpabsd xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x27, 0x0a], "vptestmd k1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x2b, 0x0a], "vpackusdw xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x2c, 0x0a], "vscalefps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x2c, 0xca], "vscalefps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x2d, 0xca], "vscalefss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x39, 0x0a], "vpminsd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x3b, 0x0a], "vpminud xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x3f, 0x0a], "vpmaxud xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x40, 0x0a], "vpmulld xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x42, 0x0a], "vgetexpps xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x44, 0x0a], "vplzcntd xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x45, 0x0a], "vpsrlvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x46, 0x0a], "vpsravd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x47, 0x0a], "vpsllvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x50, 0x0a], "vpdpbusd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x51, 0x0a], "vpdpbusds xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x52, 0x0a], "vpdpwssd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x53, 0x0a], "vpdpwssds xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x55, 0x0a], "vpopcntd xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x64, 0x0a], "vpblendmd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x65, 0x0a], "vblendmps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x71, 0x0a], "vpshldvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x73, 0x0a], "vpshrdvd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x76, 0x0a], "vpermi2d xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x77, 0x0a], "vpermi2ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x7e, 0x0a], "vpermt2d xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xc4, 0x0a], "vpconflictd xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x1d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x0c, 0x0a], "vpermilps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x0c, 0x4a, 0x01], "vpermilps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x0c, 0xca], "vpermilps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x13, 0x0a], "vcvtph2ps ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x13, 0x4a, 0x01], "vcvtph2ps ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x13, 0xca], "vcvtph2ps ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x14, 0x0a], "vprorvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x14, 0x4a, 0x01], "vprorvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x14, 0xca], "vprorvd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x15, 0x0a], "vprolvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x15, 0x4a, 0x01], "vprolvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x15, 0xca], "vprolvd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x16, 0x0a], "vpermps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x16, 0x4a, 0x01], "vpermps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x16, 0xca], "vpermps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x18, 0x0a], "vbroadcastss ymm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x18, 0x4a, 0x01], "vbroadcastss ymm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x18, 0xca], "vbroadcastss ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x19, 0x0a], "vbroadcastf32x2 ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x19, 0x4a, 0x01], "vbroadcastf32x2 ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x19, 0xca], "vbroadcastf32x2 ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x1a, 0x0a], "vbroadcastf32x4 ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x1e, 0x0a], "vpabsd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x1e, 0x4a, 0x01], "vpabsd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x1e, 0xca], "vpabsd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x25, 0x0a], "vpmovsxdq ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x25, 0x4a, 0x01], "vpmovsxdq ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x25, 0xca], "vpmovsxdq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x26, 0x0a], "vptestmb k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x26, 0x4a, 0x01], "vptestmb k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x26, 0xca], "vptestmb k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x27, 0x0a], "vptestmd k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x27, 0x4a, 0x01], "vptestmd k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x27, 0xca], "vptestmd k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2a, 0x0a], "vmovntdqa ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2a, 0x4a, 0x01], "vmovntdqa ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2b, 0x0a], "vpackusdw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2b, 0x4a, 0x01], "vpackusdw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2b, 0xca], "vpackusdw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2c, 0x0a], "vscalefps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2c, 0x4a, 0x01], "vscalefps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2c, 0xca], "vscalefps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2d, 0x0a], "vscalefss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2d, 0x4a, 0x01], "vscalefss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x2d, 0xca], "vscalefss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x35, 0x0a], "vpmovzxdq ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x35, 0x4a, 0x01], "vpmovzxdq ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x35, 0xca], "vpmovzxdq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x36, 0x0a], "vpermd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x36, 0x4a, 0x01], "vpermd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x36, 0xca], "vpermd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x39, 0x0a], "vpminsd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x39, 0x4a, 0x01], "vpminsd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x39, 0xca], "vpminsd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3b, 0x0a], "vpminud ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3b, 0x4a, 0x01], "vpminud ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3b, 0xca], "vpminud ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3d, 0x0a], "vpmaxsd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3d, 0xca], "vpmaxsd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3f, 0x0a], "vpmaxud ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3f, 0x4a, 0x01], "vpmaxud ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x3f, 0xca], "vpmaxud ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x40, 0x0a], "vpmulld ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x40, 0x4a, 0x01], "vpmulld ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x40, 0xca], "vpmulld ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x42, 0x0a], "vgetexpps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x42, 0x4a, 0x01], "vgetexpps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x42, 0xca], "vgetexpps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x43, 0x0a], "vgetexpss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x43, 0x4a, 0x01], "vgetexpss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x43, 0xca], "vgetexpss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x44, 0x0a], "vplzcntd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x44, 0x4a, 0x01], "vplzcntd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x44, 0xca], "vplzcntd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x45, 0x0a], "vpsrlvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x45, 0x4a, 0x01], "vpsrlvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x45, 0xca], "vpsrlvd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x46, 0x0a], "vpsravd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x46, 0x4a, 0x01], "vpsravd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x46, 0xca], "vpsravd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x47, 0x0a], "vpsllvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x47, 0x4a, 0x01], "vpsllvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x47, 0xca], "vpsllvd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4c, 0x0a], "vrcp14ps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4c, 0xca], "vrcp14ps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4d, 0x0a], "vrcp14ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4d, 0x4a, 0x01], "vrcp14ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4d, 0xca], "vrcp14ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4e, 0x0a], "vrsqrt14ps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4e, 0xca], "vrsqrt14ps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4f, 0x0a], "vrsqrt14ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4f, 0x4a, 0x01], "vrsqrt14ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x4f, 0xca], "vrsqrt14ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x50, 0x0a], "vpdpbusd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x50, 0x4a, 0x01], "vpdpbusd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x50, 0xca], "vpdpbusd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x51, 0x0a], "vpdpbusds ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x51, 0x4a, 0x01], "vpdpbusds ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x51, 0xca], "vpdpbusds ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x52, 0x0a], "vpdpwssd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x52, 0x4a, 0x01], "vpdpwssd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x52, 0xca], "vpdpwssd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x53, 0x0a], "vpdpwssds ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x53, 0x4a, 0x01], "vpdpwssds ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x53, 0xca], "vpdpwssds ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x54, 0x0a], "vpopcntb ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x54, 0x4a, 0x01], "vpopcntb ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x54, 0xca], "vpopcntb ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x55, 0x0a], "vpopcntd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x55, 0x4a, 0x01], "vpopcntd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x55, 0xca], "vpopcntd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x58, 0x0a], "vpbroadcastd ymm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x58, 0x4a, 0x01], "vpbroadcastd ymm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x58, 0xca], "vpbroadcastd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x59, 0x0a], "vbroadcasti32x2 ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x59, 0x4a, 0x01], "vbroadcasti32x2 ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x59, 0xca], "vbroadcasti32x2 ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x5a, 0x0a], "vbroadcasti32x4 ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x62, 0x0a], "vpexpandb ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x62, 0x4a, 0x01], "vpexpandb ymm1, ymmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x62, 0xca], "vpexpandb ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x63, 0x0a], "vpcompressb ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x63, 0x4a, 0x01], "vpcompressb ymmword [bp + si * 1 + 0x1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x63, 0xca], "vpcompressb ymm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x64, 0x0a], "vpblendmd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x64, 0x4a, 0x01], "vpblendmd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x64, 0xca], "vpblendmd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x65, 0x0a], "vblendmps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x65, 0x4a, 0x01], "vblendmps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x65, 0xca], "vblendmps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x66, 0x0a], "vpblendmb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x66, 0x4a, 0x01], "vpblendmb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x66, 0xca], "vpblendmb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x71, 0x0a], "vpshldvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x71, 0x4a, 0x01], "vpshldvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x71, 0xca], "vpshldvd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x73, 0x0a], "vpshrdvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x73, 0x4a, 0x01], "vpshrdvd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x73, 0xca], "vpshrdvd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x75, 0x0a], "vpermi2b ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x75, 0x4a, 0x01], "vpermi2b ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x75, 0xca], "vpermi2b ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x76, 0x0a], "vpermi2d ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x76, 0x4a, 0x01], "vpermi2d ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x76, 0xca], "vpermi2d ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x77, 0x0a], "vpermi2ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x77, 0x4a, 0x01], "vpermi2ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x77, 0xca], "vpermi2ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x78, 0x0a], "vpbroadcastb ymm1, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x78, 0x4a, 0x01], "vpbroadcastb ymm1, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x78, 0xca], "vpbroadcastb ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x79, 0x0a], "vpbroadcastw ymm1, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x79, 0x4a, 0x01], "vpbroadcastw ymm1, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x79, 0xca], "vpbroadcastw ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7a, 0xca], "vpbroadcastb ymm1, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7b, 0xca], "vpbroadcastw ymm1, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7d, 0x0a], "vpermt2b ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7d, 0x4a, 0x01], "vpermt2b ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7d, 0xca], "vpermt2b ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7e, 0x0a], "vpermt2d ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7e, 0x4a, 0x01], "vpermt2d ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7e, 0xca], "vpermt2d ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7f, 0x0a], "vpermt2ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x7f, 0xca], "vpermt2ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x88, 0x0a], "vexpandps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x88, 0x4a, 0x01], "vexpandps ymm1, ymmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x88, 0xca], "vexpandps ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x89, 0x0a], "vpexpandd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x89, 0x4a, 0x01], "vpexpandd ymm1, ymmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x89, 0xca], "vpexpandd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8a, 0x0a], "vcompressps ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8a, 0x4a, 0x01], "vcompressps ymmword [bp + si * 1 + 0x4], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8a, 0xca], "vcompressps ymm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8b, 0x0a], "vpcompressd ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8b, 0x4a, 0x01], "vpcompressd ymmword [bp + si * 1 + 0x4], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8b, 0xca], "vpcompressd ymm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8d, 0x0a], "vpermb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8d, 0x4a, 0x01], "vpermb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8d, 0xca], "vpermb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8f, 0x0a], "vpshufbitqmb k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x8f, 0xca], "vpshufbitqmb k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x96, 0x0a], "vfmaddsub132ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x96, 0xca], "vfmaddsub132ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x97, 0x0a], "vfmsubadd132ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x97, 0xca], "vfmsubadd132ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x98, 0x0a], "vfmadd132ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x98, 0xca], "vfmadd132ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x99, 0x0a], "vfmadd132ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x99, 0x4a, 0x01], "vfmadd132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x99, 0xca], "vfmadd132ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9a, 0x0a], "vfmsub132ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9a, 0xca], "vfmsub132ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9b, 0x0a], "vfmsub132ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9b, 0x4a, 0x01], "vfmsub132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9b, 0xca], "vfmsub132ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9c, 0x0a], "vfnmadd132ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9c, 0xca], "vfnmadd132ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9d, 0x0a], "vfnmadd132ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9d, 0x4a, 0x01], "vfnmadd132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9d, 0xca], "vfnmadd132ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9e, 0x0a], "vfnmsub132ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9e, 0xca], "vfnmsub132ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9f, 0x0a], "vfnmsub132ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9f, 0x4a, 0x01], "vfnmsub132ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0x9f, 0xca], "vfnmsub132ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa6, 0x0a], "vfmaddsub213ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa6, 0xca], "vfmaddsub213ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa7, 0x0a], "vfmsubadd213ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa7, 0xca], "vfmsubadd213ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa8, 0x0a], "vfmadd213ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa8, 0xca], "vfmadd213ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa9, 0x0a], "vfmadd213ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa9, 0x4a, 0x01], "vfmadd213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xa9, 0xca], "vfmadd213ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xaa, 0x0a], "vfmsub213ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xaa, 0xca], "vfmsub213ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xab, 0x0a], "vfmsub213ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xab, 0x4a, 0x01], "vfmsub213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xab, 0xca], "vfmsub213ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xac, 0x0a], "vfnmadd213ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xac, 0xca], "vfnmadd213ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xad, 0x0a], "vfnmadd213ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xad, 0x4a, 0x01], "vfnmadd213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xad, 0xca], "vfnmadd213ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xae, 0x0a], "vfnmsub213ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xae, 0xca], "vfnmsub213ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xaf, 0x0a], "vfnmsub213ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xaf, 0x4a, 0x01], "vfnmsub213ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xaf, 0xca], "vfnmsub213ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb6, 0x0a], "vfmaddsub231ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb6, 0xca], "vfmaddsub231ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb7, 0x0a], "vfmsubadd231ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb7, 0xca], "vfmsubadd231ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb8, 0x0a], "vfmadd231ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb8, 0xca], "vfmadd231ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb9, 0x0a], "vfmadd231ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb9, 0x4a, 0x01], "vfmadd231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xb9, 0xca], "vfmadd231ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xba, 0x0a], "vfmsub231ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xba, 0xca], "vfmsub231ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbb, 0x0a], "vfmsub231ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbb, 0x4a, 0x01], "vfmsub231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbb, 0xca], "vfmsub231ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbc, 0x0a], "vfnmadd231ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbc, 0xca], "vfnmadd231ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbd, 0x0a], "vfnmadd231ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbd, 0x4a, 0x01], "vfnmadd231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbd, 0xca], "vfnmadd231ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbe, 0x0a], "vfnmsub231ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbe, 0xca], "vfnmsub231ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbf, 0x0a], "vfnmsub231ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbf, 0x4a, 0x01], "vfnmsub231ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xbf, 0xca], "vfnmsub231ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xc4, 0x0a], "vpconflictd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xc4, 0x4a, 0x01], "vpconflictd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xc4, 0xca], "vpconflictd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcb, 0x0a], "vrcp28ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcb, 0x4a, 0x01], "vrcp28ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcb, 0xca], "vrcp28ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcd, 0x0a], "vrsqrt28ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcd, 0x4a, 0x01], "vrsqrt28ss xmm1, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcd, 0xca], "vrsqrt28ss xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcf, 0x0a], "vgf2p8mulb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcf, 0x4a, 0x01], "vgf2p8mulb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x28, 0xcf, 0xca], "vgf2p8mulb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x0c, 0x0a], "vpermilps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x0c, 0xca], "vpermilps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x13, 0x0a], "vcvtph2ps ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x13, 0x4a, 0x01], "vcvtph2ps ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x13, 0xca], "vcvtph2ps ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x14, 0x0a], "vprorvd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x14, 0xca], "vprorvd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x15, 0x0a], "vprolvd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x15, 0xca], "vprolvd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x16, 0x0a], "vpermps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x16, 0xca], "vpermps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x18, 0x0a], "vbroadcastss ymm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x18, 0x4a, 0x01], "vbroadcastss ymm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x18, 0xca], "vbroadcastss ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x19, 0x0a], "vbroadcastf32x2 ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x19, 0x4a, 0x01], "vbroadcastf32x2 ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x19, 0xca], "vbroadcastf32x2 ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x1a, 0x0a], "vbroadcastf32x4 ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x1e, 0x0a], "vpabsd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x1e, 0xca], "vpabsd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x25, 0x0a], "vpmovsxdq ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x25, 0x4a, 0x01], "vpmovsxdq ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x25, 0xca], "vpmovsxdq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x26, 0x0a], "vptestmb k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x26, 0x4a, 0x01], "vptestmb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x26, 0xca], "vptestmb k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x27, 0x0a], "vptestmd k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x27, 0xca], "vptestmd k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2b, 0x0a], "vpackusdw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2b, 0xca], "vpackusdw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2c, 0x0a], "vscalefps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2c, 0xca], "vscalefps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2d, 0x0a], "vscalefss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2d, 0x4a, 0x01], "vscalefss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x2d, 0xca], "vscalefss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x35, 0x0a], "vpmovzxdq ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x35, 0x4a, 0x01], "vpmovzxdq ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x35, 0xca], "vpmovzxdq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x36, 0x0a], "vpermd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x36, 0xca], "vpermd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x39, 0x0a], "vpminsd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x39, 0xca], "vpminsd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3b, 0x0a], "vpminud ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3b, 0xca], "vpminud ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3d, 0x0a], "vpmaxsd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3d, 0xca], "vpmaxsd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3f, 0x0a], "vpmaxud ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x3f, 0xca], "vpmaxud ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x40, 0x0a], "vpmulld ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x40, 0xca], "vpmulld ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x42, 0x0a], "vgetexpps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x42, 0xca], "vgetexpps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x43, 0x0a], "vgetexpss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x43, 0x4a, 0x01], "vgetexpss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x43, 0xca], "vgetexpss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x44, 0x0a], "vplzcntd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x44, 0xca], "vplzcntd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x45, 0x0a], "vpsrlvd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x45, 0xca], "vpsrlvd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x46, 0x0a], "vpsravd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x46, 0xca], "vpsravd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x47, 0x0a], "vpsllvd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x47, 0xca], "vpsllvd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4c, 0x0a], "vrcp14ps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4c, 0xca], "vrcp14ps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4d, 0x0a], "vrcp14ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4d, 0x4a, 0x01], "vrcp14ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4d, 0xca], "vrcp14ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4e, 0xca], "vrsqrt14ps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4f, 0x0a], "vrsqrt14ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4f, 0x4a, 0x01], "vrsqrt14ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x4f, 0xca], "vrsqrt14ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x50, 0x0a], "vpdpbusd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x50, 0xca], "vpdpbusd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x51, 0x0a], "vpdpbusds ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x51, 0xca], "vpdpbusds ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x52, 0x0a], "vpdpwssd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x52, 0xca], "vpdpwssd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x53, 0x0a], "vpdpwssds ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x53, 0xca], "vpdpwssds ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x54, 0x0a], "vpopcntb ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x54, 0x4a, 0x01], "vpopcntb ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x54, 0xca], "vpopcntb ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x55, 0x0a], "vpopcntd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x55, 0xca], "vpopcntd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x58, 0x0a], "vpbroadcastd ymm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x58, 0x4a, 0x01], "vpbroadcastd ymm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x58, 0xca], "vpbroadcastd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x59, 0x0a], "vbroadcasti32x2 ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x59, 0xca], "vbroadcasti32x2 ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x5a, 0x0a], "vbroadcasti32x4 ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x62, 0x0a], "vpexpandb ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x62, 0x4a, 0x01], "vpexpandb ymm1{k5}, ymmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x62, 0xca], "vpexpandb ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x63, 0x0a], "vpcompressb ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x63, 0x4a, 0x01], "vpcompressb ymmword [bp + si * 1 + 0x1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x63, 0xca], "vpcompressb ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x64, 0x0a], "vpblendmd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x64, 0xca], "vpblendmd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x65, 0x0a], "vblendmps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x65, 0xca], "vblendmps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x66, 0x0a], "vpblendmb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x66, 0x4a, 0x01], "vpblendmb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x66, 0xca], "vpblendmb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x71, 0x0a], "vpshldvd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x71, 0xca], "vpshldvd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x73, 0x0a], "vpshrdvd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x73, 0xca], "vpshrdvd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x75, 0x0a], "vpermi2b ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x75, 0x4a, 0x01], "vpermi2b ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x75, 0xca], "vpermi2b ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x76, 0x0a], "vpermi2d ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x76, 0xca], "vpermi2d ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x77, 0x0a], "vpermi2ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x77, 0xca], "vpermi2ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x78, 0x0a], "vpbroadcastb ymm1{k5}, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x78, 0x4a, 0x01], "vpbroadcastb ymm1{k5}, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x78, 0xca], "vpbroadcastb ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x79, 0x0a], "vpbroadcastw ymm1{k5}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x79, 0x4a, 0x01], "vpbroadcastw ymm1{k5}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x79, 0xca], "vpbroadcastw ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7a, 0xca], "vpbroadcastb ymm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7b, 0xca], "vpbroadcastw ymm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7d, 0x0a], "vpermt2b ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7d, 0x4a, 0x01], "vpermt2b ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7d, 0xca], "vpermt2b ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7e, 0x0a], "vpermt2d ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7e, 0xca], "vpermt2d ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7f, 0x0a], "vpermt2ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x7f, 0xca], "vpermt2ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x88, 0x0a], "vexpandps ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x88, 0x4a, 0x01], "vexpandps ymm1{k5}, ymmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x88, 0xca], "vexpandps ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x89, 0x0a], "vpexpandd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x89, 0x4a, 0x01], "vpexpandd ymm1{k5}, ymmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x89, 0xca], "vpexpandd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8a, 0x0a], "vcompressps ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8a, 0x4a, 0x01], "vcompressps ymmword [bp + si * 1 + 0x4]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8a, 0xca], "vcompressps ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8b, 0x0a], "vpcompressd ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8b, 0x4a, 0x01], "vpcompressd ymmword [bp + si * 1 + 0x4]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8b, 0xca], "vpcompressd ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8d, 0x0a], "vpermb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8d, 0x4a, 0x01], "vpermb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8d, 0xca], "vpermb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8f, 0x0a], "vpshufbitqmb k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x8f, 0xca], "vpshufbitqmb k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x96, 0xca], "vfmaddsub132ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x97, 0xca], "vfmsubadd132ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x98, 0x0a], "vfmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x98, 0xca], "vfmadd132ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x99, 0x0a], "vfmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x99, 0x4a, 0x01], "vfmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x99, 0xca], "vfmadd132ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9a, 0xca], "vfmsub132ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9b, 0x0a], "vfmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9b, 0x4a, 0x01], "vfmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9c, 0xca], "vfnmadd132ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9d, 0x0a], "vfnmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9d, 0x4a, 0x01], "vfnmadd132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9e, 0xca], "vfnmsub132ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9f, 0x0a], "vfnmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9f, 0x4a, 0x01], "vfnmsub132ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa6, 0xca], "vfmaddsub213ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa7, 0xca], "vfmsubadd213ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa8, 0xca], "vfmadd213ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa9, 0x0a], "vfmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa9, 0x4a, 0x01], "vfmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xaa, 0xca], "vfmsub213ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xab, 0x0a], "vfmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xab, 0x4a, 0x01], "vfmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xab, 0xca], "vfmsub213ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xac, 0xca], "vfnmadd213ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xad, 0x0a], "vfnmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xad, 0x4a, 0x01], "vfnmadd213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xae, 0xca], "vfnmsub213ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xaf, 0x0a], "vfnmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xaf, 0x4a, 0x01], "vfnmsub213ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb6, 0xca], "vfmaddsub231ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb7, 0xca], "vfmsubadd231ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb8, 0xca], "vfmadd231ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb9, 0x0a], "vfmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb9, 0x4a, 0x01], "vfmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xba, 0x0a], "vfmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xba, 0xca], "vfmsub231ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbb, 0x0a], "vfmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbb, 0x4a, 0x01], "vfmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbc, 0xca], "vfnmadd231ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbd, 0x0a], "vfnmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbd, 0x4a, 0x01], "vfnmadd231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbe, 0xca], "vfnmsub231ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbf, 0x0a], "vfnmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbf, 0x4a, 0x01], "vfnmsub231ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xc4, 0x0a], "vpconflictd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xc4, 0xca], "vpconflictd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcb, 0x0a], "vrcp28ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcb, 0x4a, 0x01], "vrcp28ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcb, 0xca], "vrcp28ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcd, 0x0a], "vrsqrt28ss xmm1{k5}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcd, 0x4a, 0x01], "vrsqrt28ss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcf, 0x0a], "vgf2p8mulb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcf, 0x4a, 0x01], "vgf2p8mulb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x2d, 0xcf, 0xca], "vgf2p8mulb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x0c, 0x0a], "vpermilps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x0c, 0x4a, 0x01], "vpermilps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x14, 0x0a], "vprorvd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x14, 0x4a, 0x01], "vprorvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x15, 0x0a], "vprolvd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x15, 0x4a, 0x01], "vprolvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x16, 0x0a], "vpermps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x16, 0x4a, 0x01], "vpermps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x1e, 0x0a], "vpabsd ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x1e, 0x4a, 0x01], "vpabsd ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x27, 0x0a], "vptestmd k1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x27, 0x4a, 0x01], "vptestmd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x2b, 0x0a], "vpackusdw ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x2b, 0x4a, 0x01], "vpackusdw ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x2c, 0x0a], "vscalefps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x2c, 0x4a, 0x01], "vscalefps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x2c, 0xca], "vscalefps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x2d, 0xca], "vscalefss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x36, 0x0a], "vpermd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x36, 0x4a, 0x01], "vpermd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x39, 0x0a], "vpminsd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x39, 0x4a, 0x01], "vpminsd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x3b, 0x0a], "vpminud ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x3b, 0x4a, 0x01], "vpminud ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x3d, 0x0a], "vpmaxsd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x3f, 0x0a], "vpmaxud ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x3f, 0x4a, 0x01], "vpmaxud ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x40, 0x0a], "vpmulld ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x40, 0x4a, 0x01], "vpmulld ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x42, 0x0a], "vgetexpps ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x42, 0x4a, 0x01], "vgetexpps ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x44, 0x0a], "vplzcntd ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x44, 0x4a, 0x01], "vplzcntd ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x45, 0x0a], "vpsrlvd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x45, 0x4a, 0x01], "vpsrlvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x46, 0x0a], "vpsravd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x46, 0x4a, 0x01], "vpsravd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x47, 0x0a], "vpsllvd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x47, 0x4a, 0x01], "vpsllvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x4c, 0x0a], "vrcp14ps ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x4e, 0x0a], "vrsqrt14ps ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x50, 0x0a], "vpdpbusd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x50, 0x4a, 0x01], "vpdpbusd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x51, 0x0a], "vpdpbusds ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x51, 0x4a, 0x01], "vpdpbusds ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x52, 0x0a], "vpdpwssd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x52, 0x4a, 0x01], "vpdpwssd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x53, 0x0a], "vpdpwssds ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x53, 0x4a, 0x01], "vpdpwssds ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x55, 0x0a], "vpopcntd ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x55, 0x4a, 0x01], "vpopcntd ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x64, 0x0a], "vpblendmd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x64, 0x4a, 0x01], "vpblendmd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x65, 0x0a], "vblendmps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x65, 0x4a, 0x01], "vblendmps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x71, 0x0a], "vpshldvd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x71, 0x4a, 0x01], "vpshldvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x73, 0x0a], "vpshrdvd ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x73, 0x4a, 0x01], "vpshrdvd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x76, 0x0a], "vpermi2d ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x76, 0x4a, 0x01], "vpermi2d ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x77, 0x0a], "vpermi2ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x77, 0x4a, 0x01], "vpermi2ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x7e, 0x0a], "vpermt2d ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x7e, 0x4a, 0x01], "vpermt2d ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x7f, 0x0a], "vpermt2ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x96, 0x0a], "vfmaddsub132ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x96, 0xca], "vfmaddsub132ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x97, 0x0a], "vfmsubadd132ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x97, 0xca], "vfmsubadd132ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x98, 0x0a], "vfmadd132ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x98, 0xca], "vfmadd132ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x99, 0xca], "vfmadd132ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9a, 0x0a], "vfmsub132ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9a, 0xca], "vfmsub132ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9b, 0xca], "vfmsub132ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9c, 0x0a], "vfnmadd132ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9c, 0xca], "vfnmadd132ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9d, 0xca], "vfnmadd132ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9e, 0x0a], "vfnmsub132ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9e, 0xca], "vfnmsub132ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0x9f, 0xca], "vfnmsub132ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa6, 0x0a], "vfmaddsub213ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa6, 0xca], "vfmaddsub213ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa7, 0x0a], "vfmsubadd213ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa7, 0xca], "vfmsubadd213ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa8, 0x0a], "vfmadd213ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa8, 0xca], "vfmadd213ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xa9, 0xca], "vfmadd213ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xaa, 0x0a], "vfmsub213ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xaa, 0xca], "vfmsub213ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xab, 0xca], "vfmsub213ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xac, 0x0a], "vfnmadd213ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xac, 0xca], "vfnmadd213ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xad, 0xca], "vfnmadd213ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xae, 0x0a], "vfnmsub213ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xae, 0xca], "vfnmsub213ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xaf, 0xca], "vfnmsub213ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb6, 0x0a], "vfmaddsub231ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb6, 0xca], "vfmaddsub231ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb7, 0x0a], "vfmsubadd231ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb7, 0xca], "vfmsubadd231ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb8, 0x0a], "vfmadd231ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb8, 0xca], "vfmadd231ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xb9, 0xca], "vfmadd231ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xba, 0x0a], "vfmsub231ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xba, 0xca], "vfmsub231ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbb, 0xca], "vfmsub231ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbc, 0x0a], "vfnmadd231ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbc, 0xca], "vfnmadd231ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbd, 0xca], "vfnmadd231ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbe, 0x0a], "vfnmsub231ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbe, 0xca], "vfnmsub231ps zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xbf, 0xca], "vfnmsub231ss xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xc4, 0x0a], "vpconflictd ymm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x38, 0xc4, 0x4a, 0x01], "vpconflictd ymm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x0c, 0x0a], "vpermilps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x14, 0x0a], "vprorvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x15, 0x0a], "vprolvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x16, 0x0a], "vpermps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x1e, 0x0a], "vpabsd ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x27, 0x0a], "vptestmd k1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x2b, 0x0a], "vpackusdw ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x2c, 0x0a], "vscalefps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x2c, 0xca], "vscalefps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x2d, 0xca], "vscalefss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x36, 0x0a], "vpermd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x39, 0x0a], "vpminsd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x3b, 0x0a], "vpminud ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x3d, 0x0a], "vpmaxsd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x3f, 0x0a], "vpmaxud ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x40, 0x0a], "vpmulld ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x42, 0x0a], "vgetexpps ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x44, 0x0a], "vplzcntd ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x45, 0x0a], "vpsrlvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x46, 0x0a], "vpsravd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x47, 0x0a], "vpsllvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x4c, 0x0a], "vrcp14ps ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x50, 0x0a], "vpdpbusd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x51, 0x0a], "vpdpbusds ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x52, 0x0a], "vpdpwssd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x53, 0x0a], "vpdpwssds ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x55, 0x0a], "vpopcntd ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x64, 0x0a], "vpblendmd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x65, 0x0a], "vblendmps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x71, 0x0a], "vpshldvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x73, 0x0a], "vpshrdvd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x76, 0x0a], "vpermi2d ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x77, 0x0a], "vpermi2ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x7e, 0x0a], "vpermt2d ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x7f, 0x0a], "vpermt2ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x98, 0x0a], "vfmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xba, 0x0a], "vfmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xc4, 0x0a], "vpconflictd ymm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x3d, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x0c, 0x0a], "vpermilps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x0c, 0x4a, 0x01], "vpermilps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x0c, 0xca], "vpermilps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x13, 0x0a], "vcvtph2ps zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x13, 0x4a, 0x01], "vcvtph2ps zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x13, 0xca], "vcvtph2ps zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x14, 0x0a], "vprorvd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x14, 0x4a, 0x01], "vprorvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x14, 0xca], "vprorvd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x15, 0x0a], "vprolvd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x15, 0x4a, 0x01], "vprolvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x15, 0xca], "vprolvd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x16, 0x0a], "vpermps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x16, 0x4a, 0x01], "vpermps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x16, 0xca], "vpermps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x18, 0x0a], "vbroadcastss zmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x18, 0x4a, 0x01], "vbroadcastss zmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x18, 0xca], "vbroadcastss zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x19, 0x0a], "vbroadcastf32x2 zmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x19, 0x4a, 0x01], "vbroadcastf32x2 zmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x19, 0xca], "vbroadcastf32x2 zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1a, 0x0a], "vbroadcastf32x4 zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1b, 0x0a], "vbroadcastf32x8 zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1b, 0x4a, 0x01], "vbroadcastf32x8 zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1e, 0x0a], "vpabsd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1e, 0x4a, 0x01], "vpabsd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x1e, 0xca], "vpabsd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x25, 0x0a], "vpmovsxdq zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x25, 0x4a, 0x01], "vpmovsxdq zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x25, 0xca], "vpmovsxdq zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x26, 0x0a], "vptestmb k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x26, 0x4a, 0x01], "vptestmb k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x26, 0xca], "vptestmb k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x27, 0x0a], "vptestmd k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x27, 0x4a, 0x01], "vptestmd k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x27, 0xca], "vptestmd k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x0a], "vmovntdqa zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2a, 0x4a, 0x01], "vmovntdqa zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2b, 0x0a], "vpackusdw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2b, 0x4a, 0x01], "vpackusdw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2b, 0xca], "vpackusdw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2c, 0x0a], "vscalefps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2c, 0x4a, 0x01], "vscalefps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x2c, 0xca], "vscalefps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x35, 0x0a], "vpmovzxdq zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x35, 0x4a, 0x01], "vpmovzxdq zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x35, 0xca], "vpmovzxdq zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x36, 0x0a], "vpermd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x36, 0x4a, 0x01], "vpermd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x36, 0xca], "vpermd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x39, 0x0a], "vpminsd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x39, 0x4a, 0x01], "vpminsd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x39, 0xca], "vpminsd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3b, 0x0a], "vpminud zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3b, 0x4a, 0x01], "vpminud zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3b, 0xca], "vpminud zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3d, 0x0a], "vpmaxsd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3d, 0xca], "vpmaxsd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3f, 0x0a], "vpmaxud zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3f, 0x4a, 0x01], "vpmaxud zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x3f, 0xca], "vpmaxud zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x40, 0x0a], "vpmulld zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x40, 0x4a, 0x01], "vpmulld zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x40, 0xca], "vpmulld zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x42, 0x0a], "vgetexpps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x42, 0x4a, 0x01], "vgetexpps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x42, 0xca], "vgetexpps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x44, 0x0a], "vplzcntd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x44, 0x4a, 0x01], "vplzcntd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x44, 0xca], "vplzcntd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x45, 0x0a], "vpsrlvd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x45, 0x4a, 0x01], "vpsrlvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x45, 0xca], "vpsrlvd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x46, 0x0a], "vpsravd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x46, 0x4a, 0x01], "vpsravd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x46, 0xca], "vpsravd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x47, 0x0a], "vpsllvd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x47, 0x4a, 0x01], "vpsllvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x47, 0xca], "vpsllvd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x4c, 0x0a], "vrcp14ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x4c, 0xca], "vrcp14ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x4e, 0x0a], "vrsqrt14ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x4e, 0xca], "vrsqrt14ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x50, 0x0a], "vpdpbusd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x50, 0x4a, 0x01], "vpdpbusd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x50, 0xca], "vpdpbusd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x51, 0x0a], "vpdpbusds zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x51, 0x4a, 0x01], "vpdpbusds zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x51, 0xca], "vpdpbusds zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x52, 0x0a], "vpdpwssd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x52, 0x4a, 0x01], "vpdpwssd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x52, 0xca], "vpdpwssd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x53, 0x0a], "vpdpwssds zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x53, 0x4a, 0x01], "vpdpwssds zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x53, 0xca], "vpdpwssds zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x54, 0x0a], "vpopcntb zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x54, 0x4a, 0x01], "vpopcntb zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x54, 0xca], "vpopcntb zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x55, 0x0a], "vpopcntd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x55, 0x4a, 0x01], "vpopcntd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x55, 0xca], "vpopcntd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x58, 0x0a], "vpbroadcastd zmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x58, 0x4a, 0x01], "vpbroadcastd zmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x58, 0xca], "vpbroadcastd zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x59, 0x0a], "vbroadcasti32x2 zmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x59, 0x4a, 0x01], "vbroadcasti32x2 zmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x59, 0xca], "vbroadcasti32x2 zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x5a, 0x0a], "vbroadcasti32x4 zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x5b, 0x0a], "vbroadcasti32x8 zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x5b, 0x4a, 0x01], "vbroadcasti32x8 zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x62, 0x0a], "vpexpandb zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x62, 0x4a, 0x01], "vpexpandb zmm1, zmmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x62, 0xca], "vpexpandb zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x63, 0x0a], "vpcompressb zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x63, 0x4a, 0x01], "vpcompressb zmmword [bp + si * 1 + 0x1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x63, 0xca], "vpcompressb zmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x64, 0x0a], "vpblendmd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x64, 0x4a, 0x01], "vpblendmd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x64, 0xca], "vpblendmd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x65, 0x0a], "vblendmps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x65, 0x4a, 0x01], "vblendmps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x65, 0xca], "vblendmps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x66, 0x0a], "vpblendmb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x66, 0x4a, 0x01], "vpblendmb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x66, 0xca], "vpblendmb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x71, 0x0a], "vpshldvd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x71, 0x4a, 0x01], "vpshldvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x71, 0xca], "vpshldvd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x73, 0x0a], "vpshrdvd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x73, 0x4a, 0x01], "vpshrdvd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x73, 0xca], "vpshrdvd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x75, 0x0a], "vpermi2b zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x75, 0x4a, 0x01], "vpermi2b zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x75, 0xca], "vpermi2b zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x76, 0x0a], "vpermi2d zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x76, 0x4a, 0x01], "vpermi2d zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x76, 0xca], "vpermi2d zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x77, 0x0a], "vpermi2ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x77, 0x4a, 0x01], "vpermi2ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x77, 0xca], "vpermi2ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x78, 0x0a], "vpbroadcastb zmm1, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x78, 0x4a, 0x01], "vpbroadcastb zmm1, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x78, 0xca], "vpbroadcastb zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x79, 0x0a], "vpbroadcastw zmm1, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x79, 0x4a, 0x01], "vpbroadcastw zmm1, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x79, 0xca], "vpbroadcastw zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7a, 0xca], "vpbroadcastb zmm1, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7b, 0xca], "vpbroadcastw zmm1, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7d, 0x0a], "vpermt2b zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7d, 0x4a, 0x01], "vpermt2b zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7d, 0xca], "vpermt2b zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7e, 0x0a], "vpermt2d zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7e, 0x4a, 0x01], "vpermt2d zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7e, 0xca], "vpermt2d zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7f, 0x0a], "vpermt2ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x7f, 0xca], "vpermt2ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x88, 0x0a], "vexpandps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x88, 0x4a, 0x01], "vexpandps zmm1, zmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x88, 0xca], "vexpandps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x89, 0x0a], "vpexpandd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x89, 0x4a, 0x01], "vpexpandd zmm1, zmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x89, 0xca], "vpexpandd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8a, 0x0a], "vcompressps zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8a, 0x4a, 0x01], "vcompressps zmmword [bp + si * 1 + 0x4], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8a, 0xca], "vcompressps zmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8b, 0x0a], "vpcompressd zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8b, 0x4a, 0x01], "vpcompressd zmmword [bp + si * 1 + 0x4], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8b, 0xca], "vpcompressd zmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8d, 0x0a], "vpermb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8d, 0x4a, 0x01], "vpermb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8d, 0xca], "vpermb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8f, 0x0a], "vpshufbitqmb k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x8f, 0xca], "vpshufbitqmb k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x96, 0x0a], "vfmaddsub132ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x96, 0xca], "vfmaddsub132ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x97, 0x0a], "vfmsubadd132ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x97, 0xca], "vfmsubadd132ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x98, 0x0a], "vfmadd132ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x98, 0xca], "vfmadd132ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9a, 0x0a], "vfmsub132ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9a, 0xca], "vfmsub132ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9c, 0x0a], "vfnmadd132ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9c, 0xca], "vfnmadd132ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9e, 0x0a], "vfnmsub132ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0x9e, 0xca], "vfnmsub132ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa6, 0x0a], "vfmaddsub213ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa6, 0xca], "vfmaddsub213ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa7, 0x0a], "vfmsubadd213ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa7, 0xca], "vfmsubadd213ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa8, 0x0a], "vfmadd213ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xa8, 0xca], "vfmadd213ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xaa, 0x0a], "vfmsub213ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xaa, 0xca], "vfmsub213ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xac, 0x0a], "vfnmadd213ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xac, 0xca], "vfnmadd213ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xae, 0x0a], "vfnmsub213ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xae, 0xca], "vfnmsub213ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb6, 0x0a], "vfmaddsub231ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb6, 0xca], "vfmaddsub231ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb7, 0x0a], "vfmsubadd231ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb7, 0xca], "vfmsubadd231ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb8, 0x0a], "vfmadd231ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xb8, 0xca], "vfmadd231ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xba, 0x0a], "vfmsub231ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xba, 0xca], "vfmsub231ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xbc, 0x0a], "vfnmadd231ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xbc, 0xca], "vfnmadd231ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xbe, 0x0a], "vfnmsub231ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xbe, 0xca], "vfnmsub231ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xc4, 0x0a], "vpconflictd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xc4, 0x4a, 0x01], "vpconflictd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xc4, 0xca], "vpconflictd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xc8, 0x0a], "vexp2ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xc8, 0x4a, 0x01], "vexp2ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xc8, 0xca], "vexp2ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xca, 0x0a], "vrcp28ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xca, 0x4a, 0x01], "vrcp28ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xca, 0xca], "vrcp28ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xcc, 0x0a], "vrsqrt28ps zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xcc, 0xca], "vrsqrt28ps zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xcf, 0x0a], "vgf2p8mulb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xcf, 0x4a, 0x01], "vgf2p8mulb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x48, 0xcf, 0xca], "vgf2p8mulb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x0c, 0x0a], "vpermilps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x0c, 0xca], "vpermilps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x13, 0x0a], "vcvtph2ps zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x13, 0x4a, 0x01], "vcvtph2ps zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x13, 0xca], "vcvtph2ps zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x14, 0x0a], "vprorvd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x14, 0xca], "vprorvd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x15, 0x0a], "vprolvd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x15, 0xca], "vprolvd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x16, 0x0a], "vpermps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x16, 0xca], "vpermps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x18, 0x0a], "vbroadcastss zmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x18, 0x4a, 0x01], "vbroadcastss zmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x18, 0xca], "vbroadcastss zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x19, 0x0a], "vbroadcastf32x2 zmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x19, 0x4a, 0x01], "vbroadcastf32x2 zmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x19, 0xca], "vbroadcastf32x2 zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1a, 0x0a], "vbroadcastf32x4 zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1b, 0x0a], "vbroadcastf32x8 zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1b, 0x4a, 0x01], "vbroadcastf32x8 zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1e, 0x0a], "vpabsd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x1e, 0xca], "vpabsd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x25, 0x0a], "vpmovsxdq zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x25, 0x4a, 0x01], "vpmovsxdq zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x25, 0xca], "vpmovsxdq zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x26, 0x0a], "vptestmb k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x26, 0x4a, 0x01], "vptestmb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x26, 0xca], "vptestmb k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x27, 0x0a], "vptestmd k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x27, 0xca], "vptestmd k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x2b, 0x0a], "vpackusdw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x2b, 0xca], "vpackusdw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x2c, 0x0a], "vscalefps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x2c, 0xca], "vscalefps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x35, 0x0a], "vpmovzxdq zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x35, 0x4a, 0x01], "vpmovzxdq zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x35, 0xca], "vpmovzxdq zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x36, 0x0a], "vpermd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x36, 0xca], "vpermd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x39, 0x0a], "vpminsd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x39, 0xca], "vpminsd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3b, 0x0a], "vpminud zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3b, 0xca], "vpminud zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3d, 0x0a], "vpmaxsd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3d, 0xca], "vpmaxsd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3f, 0x0a], "vpmaxud zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x3f, 0xca], "vpmaxud zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x40, 0x0a], "vpmulld zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x40, 0xca], "vpmulld zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x42, 0x0a], "vgetexpps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x42, 0xca], "vgetexpps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x44, 0x0a], "vplzcntd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x44, 0xca], "vplzcntd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x45, 0x0a], "vpsrlvd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x45, 0xca], "vpsrlvd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x46, 0x0a], "vpsravd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x46, 0xca], "vpsravd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x47, 0x0a], "vpsllvd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x47, 0xca], "vpsllvd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x4c, 0x0a], "vrcp14ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x4c, 0xca], "vrcp14ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x4e, 0xca], "vrsqrt14ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x50, 0x0a], "vpdpbusd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x50, 0xca], "vpdpbusd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x51, 0x0a], "vpdpbusds zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x51, 0xca], "vpdpbusds zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x52, 0x0a], "vpdpwssd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x52, 0xca], "vpdpwssd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x53, 0x0a], "vpdpwssds zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x53, 0xca], "vpdpwssds zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x54, 0x0a], "vpopcntb zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x54, 0x4a, 0x01], "vpopcntb zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x54, 0xca], "vpopcntb zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x55, 0x0a], "vpopcntd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x55, 0xca], "vpopcntd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x58, 0x0a], "vpbroadcastd zmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x58, 0x4a, 0x01], "vpbroadcastd zmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x58, 0xca], "vpbroadcastd zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x59, 0x0a], "vbroadcasti32x2 zmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 zmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x59, 0xca], "vbroadcasti32x2 zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x5a, 0x0a], "vbroadcasti32x4 zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x5b, 0x0a], "vbroadcasti32x8 zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x5b, 0x4a, 0x01], "vbroadcasti32x8 zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x62, 0x0a], "vpexpandb zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x62, 0x4a, 0x01], "vpexpandb zmm1{k5}, zmmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x62, 0xca], "vpexpandb zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x63, 0x0a], "vpcompressb zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x63, 0x4a, 0x01], "vpcompressb zmmword [bp + si * 1 + 0x1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x63, 0xca], "vpcompressb zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x64, 0x0a], "vpblendmd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x64, 0xca], "vpblendmd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x65, 0x0a], "vblendmps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x65, 0xca], "vblendmps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x66, 0x0a], "vpblendmb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x66, 0x4a, 0x01], "vpblendmb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x66, 0xca], "vpblendmb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x71, 0x0a], "vpshldvd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x71, 0xca], "vpshldvd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x73, 0x0a], "vpshrdvd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x73, 0xca], "vpshrdvd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x75, 0x0a], "vpermi2b zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x75, 0x4a, 0x01], "vpermi2b zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x75, 0xca], "vpermi2b zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x76, 0x0a], "vpermi2d zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x76, 0xca], "vpermi2d zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x77, 0x0a], "vpermi2ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x77, 0xca], "vpermi2ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x78, 0x0a], "vpbroadcastb zmm1{k5}, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x78, 0x4a, 0x01], "vpbroadcastb zmm1{k5}, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x78, 0xca], "vpbroadcastb zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x79, 0x0a], "vpbroadcastw zmm1{k5}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x79, 0x4a, 0x01], "vpbroadcastw zmm1{k5}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x79, 0xca], "vpbroadcastw zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7a, 0xca], "vpbroadcastb zmm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7b, 0xca], "vpbroadcastw zmm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7d, 0x0a], "vpermt2b zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7d, 0x4a, 0x01], "vpermt2b zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7d, 0xca], "vpermt2b zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7e, 0x0a], "vpermt2d zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7e, 0xca], "vpermt2d zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7f, 0x0a], "vpermt2ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x7f, 0xca], "vpermt2ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x88, 0x0a], "vexpandps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x88, 0x4a, 0x01], "vexpandps zmm1{k5}, zmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x88, 0xca], "vexpandps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x89, 0x0a], "vpexpandd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x89, 0x4a, 0x01], "vpexpandd zmm1{k5}, zmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x89, 0xca], "vpexpandd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8a, 0x0a], "vcompressps zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8a, 0x4a, 0x01], "vcompressps zmmword [bp + si * 1 + 0x4]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8a, 0xca], "vcompressps zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8b, 0x0a], "vpcompressd zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8b, 0x4a, 0x01], "vpcompressd zmmword [bp + si * 1 + 0x4]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8b, 0xca], "vpcompressd zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8d, 0x0a], "vpermb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8d, 0x4a, 0x01], "vpermb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8d, 0xca], "vpermb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8f, 0x0a], "vpshufbitqmb k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8f, 0x4a, 0x01], "vpshufbitqmb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x8f, 0xca], "vpshufbitqmb k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x98, 0x0a], "vfmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x98, 0xca], "vfmadd132ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xba, 0x0a], "vfmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xba, 0xca], "vfmsub231ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xc4, 0x0a], "vpconflictd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xc4, 0xca], "vpconflictd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xc8, 0x0a], "vexp2ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xc8, 0xca], "vexp2ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xca, 0x0a], "vrcp28ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xca, 0xca], "vrcp28ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xcf, 0x0a], "vgf2p8mulb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xcf, 0x4a, 0x01], "vgf2p8mulb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x4d, 0xcf, 0xca], "vgf2p8mulb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x0c, 0x0a], "vpermilps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x0c, 0x4a, 0x01], "vpermilps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x14, 0x0a], "vprorvd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x14, 0x4a, 0x01], "vprorvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x15, 0x0a], "vprolvd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x15, 0x4a, 0x01], "vprolvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x16, 0x0a], "vpermps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x16, 0x4a, 0x01], "vpermps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x1e, 0x0a], "vpabsd zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x1e, 0x4a, 0x01], "vpabsd zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x27, 0x0a], "vptestmd k1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x27, 0x4a, 0x01], "vptestmd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x2b, 0x0a], "vpackusdw zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x2b, 0x4a, 0x01], "vpackusdw zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x2c, 0x0a], "vscalefps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x2c, 0x4a, 0x01], "vscalefps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x2c, 0xca], "vscalefps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x2d, 0xca], "vscalefss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x36, 0x0a], "vpermd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x36, 0x4a, 0x01], "vpermd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x39, 0x0a], "vpminsd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x39, 0x4a, 0x01], "vpminsd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x3b, 0x0a], "vpminud zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x3b, 0x4a, 0x01], "vpminud zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x3d, 0x0a], "vpmaxsd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x3f, 0x0a], "vpmaxud zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x3f, 0x4a, 0x01], "vpmaxud zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x40, 0x0a], "vpmulld zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x40, 0x4a, 0x01], "vpmulld zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x42, 0x0a], "vgetexpps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x42, 0x4a, 0x01], "vgetexpps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x44, 0x0a], "vplzcntd zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x44, 0x4a, 0x01], "vplzcntd zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x45, 0x0a], "vpsrlvd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x45, 0x4a, 0x01], "vpsrlvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x46, 0x0a], "vpsravd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x46, 0x4a, 0x01], "vpsravd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x47, 0x0a], "vpsllvd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x47, 0x4a, 0x01], "vpsllvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x4c, 0x0a], "vrcp14ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x4e, 0x0a], "vrsqrt14ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x50, 0x0a], "vpdpbusd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x50, 0x4a, 0x01], "vpdpbusd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x51, 0x0a], "vpdpbusds zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x51, 0x4a, 0x01], "vpdpbusds zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x52, 0x0a], "vpdpwssd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x52, 0x4a, 0x01], "vpdpwssd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x53, 0x0a], "vpdpwssds zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x53, 0x4a, 0x01], "vpdpwssds zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x55, 0x0a], "vpopcntd zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x55, 0x4a, 0x01], "vpopcntd zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x64, 0x0a], "vpblendmd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x64, 0x4a, 0x01], "vpblendmd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x65, 0x0a], "vblendmps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x65, 0x4a, 0x01], "vblendmps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x71, 0x0a], "vpshldvd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x71, 0x4a, 0x01], "vpshldvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x73, 0x0a], "vpshrdvd zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x73, 0x4a, 0x01], "vpshrdvd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x76, 0x0a], "vpermi2d zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x76, 0x4a, 0x01], "vpermi2d zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x77, 0x0a], "vpermi2ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x77, 0x4a, 0x01], "vpermi2ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x7e, 0x0a], "vpermt2d zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x7e, 0x4a, 0x01], "vpermt2d zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x7f, 0x0a], "vpermt2ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x96, 0x0a], "vfmaddsub132ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x96, 0xca], "vfmaddsub132ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x97, 0x0a], "vfmsubadd132ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x97, 0xca], "vfmsubadd132ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x98, 0x0a], "vfmadd132ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x98, 0xca], "vfmadd132ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x99, 0xca], "vfmadd132ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9a, 0x0a], "vfmsub132ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9a, 0xca], "vfmsub132ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9b, 0xca], "vfmsub132ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9c, 0x0a], "vfnmadd132ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9c, 0xca], "vfnmadd132ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9d, 0xca], "vfnmadd132ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9e, 0x0a], "vfnmsub132ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9e, 0xca], "vfnmsub132ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0x9f, 0xca], "vfnmsub132ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa6, 0x0a], "vfmaddsub213ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa6, 0xca], "vfmaddsub213ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa7, 0x0a], "vfmsubadd213ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa7, 0xca], "vfmsubadd213ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa8, 0x0a], "vfmadd213ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa8, 0xca], "vfmadd213ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xa9, 0xca], "vfmadd213ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xaa, 0x0a], "vfmsub213ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xaa, 0xca], "vfmsub213ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xab, 0xca], "vfmsub213ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xac, 0x0a], "vfnmadd213ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xac, 0xca], "vfnmadd213ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xad, 0xca], "vfnmadd213ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xae, 0x0a], "vfnmsub213ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xae, 0xca], "vfnmsub213ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xaf, 0xca], "vfnmsub213ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb6, 0x0a], "vfmaddsub231ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb6, 0xca], "vfmaddsub231ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb7, 0x0a], "vfmsubadd231ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb7, 0xca], "vfmsubadd231ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb8, 0x0a], "vfmadd231ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb8, 0xca], "vfmadd231ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xb9, 0xca], "vfmadd231ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xba, 0x0a], "vfmsub231ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xba, 0xca], "vfmsub231ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbb, 0xca], "vfmsub231ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbc, 0x0a], "vfnmadd231ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbc, 0xca], "vfnmadd231ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbd, 0xca], "vfnmadd231ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbe, 0x0a], "vfnmsub231ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbe, 0xca], "vfnmsub231ps zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xbf, 0xca], "vfnmsub231ss xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xc4, 0x0a], "vpconflictd zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xc4, 0x4a, 0x01], "vpconflictd zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xc8, 0x0a], "vexp2ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xc8, 0x4a, 0x01], "vexp2ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xca, 0x0a], "vrcp28ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xca, 0x4a, 0x01], "vrcp28ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xcc, 0x0a], "vrsqrt28ps zmm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x58, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x0c, 0x0a], "vpermilps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x14, 0x0a], "vprorvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x15, 0x0a], "vprolvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x16, 0x0a], "vpermps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x1e, 0x0a], "vpabsd zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x27, 0x0a], "vptestmd k1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x27, 0x4a, 0x01], "vptestmd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x2b, 0x0a], "vpackusdw zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x2c, 0x0a], "vscalefps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x2c, 0xca], "vscalefps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x2d, 0xca], "vscalefss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x36, 0x0a], "vpermd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x39, 0x0a], "vpminsd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x3b, 0x0a], "vpminud zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x3d, 0x0a], "vpmaxsd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x3f, 0x0a], "vpmaxud zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x40, 0x0a], "vpmulld zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x42, 0x0a], "vgetexpps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x44, 0x0a], "vplzcntd zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x45, 0x0a], "vpsrlvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x46, 0x0a], "vpsravd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x47, 0x0a], "vpsllvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x4c, 0x0a], "vrcp14ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x50, 0x0a], "vpdpbusd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x51, 0x0a], "vpdpbusds zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x52, 0x0a], "vpdpwssd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x53, 0x0a], "vpdpwssds zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x55, 0x0a], "vpopcntd zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x64, 0x0a], "vpblendmd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x65, 0x0a], "vblendmps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x71, 0x0a], "vpshldvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x73, 0x0a], "vpshrdvd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x76, 0x0a], "vpermi2d zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x77, 0x0a], "vpermi2ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x7e, 0x0a], "vpermt2d zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x7f, 0x0a], "vpermt2ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x98, 0x0a], "vfmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xba, 0x0a], "vfmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xc4, 0x0a], "vpconflictd zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xc8, 0x0a], "vexp2ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xca, 0x0a], "vrcp28ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x5d, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x13, 0xca], "vcvtph2ps zmm1{sae}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x2c, 0xca], "vscalefps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x2d, 0xca], "vscalefss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x42, 0xca], "vgetexpps zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x43, 0xca], "vgetexpss xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x96, 0xca], "vfmaddsub132ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x97, 0xca], "vfmsubadd132ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x98, 0xca], "vfmadd132ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x99, 0xca], "vfmadd132ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x9a, 0xca], "vfmsub132ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x9b, 0xca], "vfmsub132ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x9c, 0xca], "vfnmadd132ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x9d, 0xca], "vfnmadd132ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x9e, 0xca], "vfnmsub132ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0x9f, 0xca], "vfnmsub132ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xa6, 0xca], "vfmaddsub213ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xa7, 0xca], "vfmsubadd213ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xa8, 0xca], "vfmadd213ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xa9, 0xca], "vfmadd213ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xaa, 0xca], "vfmsub213ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xab, 0xca], "vfmsub213ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xac, 0xca], "vfnmadd213ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xad, 0xca], "vfnmadd213ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xae, 0xca], "vfnmsub213ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xaf, 0xca], "vfnmsub213ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xb6, 0xca], "vfmaddsub231ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xb7, 0xca], "vfmsubadd231ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xb8, 0xca], "vfmadd231ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xb9, 0xca], "vfmadd231ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xba, 0xca], "vfmsub231ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xbb, 0xca], "vfmsub231ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xbc, 0xca], "vfnmadd231ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xbd, 0xca], "vfnmadd231ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xbe, 0xca], "vfnmsub231ps zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xbf, 0xca], "vfnmsub231ss xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xc8, 0xca], "vexp2ps zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xca, 0xca], "vrcp28ps zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xcb, 0xca], "vrcp28ss xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xcc, 0xca], "vrsqrt28ps zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x78, 0xcd, 0xca], "vrsqrt28ss xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x13, 0xca], "vcvtph2ps zmm1{k5}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x2c, 0xca], "vscalefps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x2d, 0xca], "vscalefss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x42, 0xca], "vgetexpps zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x43, 0xca], "vgetexpss xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xc8, 0xca], "vexp2ps zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xca, 0xca], "vrcp28ps zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xcb, 0xca], "vrcp28ss xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x7d, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x0c, 0x0a], "vpermilps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x0c, 0xca], "vpermilps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x13, 0x0a], "vcvtph2ps xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x13, 0x4a, 0x01], "vcvtph2ps xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x13, 0xca], "vcvtph2ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x14, 0x0a], "vprorvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x14, 0xca], "vprorvd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x15, 0x0a], "vprolvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x15, 0xca], "vprolvd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x18, 0x0a], "vbroadcastss xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x18, 0x4a, 0x01], "vbroadcastss xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x18, 0xca], "vbroadcastss xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x1e, 0x0a], "vpabsd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x1e, 0xca], "vpabsd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x25, 0x0a], "vpmovsxdq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x25, 0x4a, 0x01], "vpmovsxdq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x25, 0xca], "vpmovsxdq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x2b, 0x0a], "vpackusdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x2b, 0xca], "vpackusdw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x2c, 0x0a], "vscalefps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x2c, 0xca], "vscalefps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x35, 0x0a], "vpmovzxdq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x35, 0x4a, 0x01], "vpmovzxdq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x35, 0xca], "vpmovzxdq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x39, 0x0a], "vpminsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x39, 0xca], "vpminsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3b, 0x0a], "vpminud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3b, 0xca], "vpminud xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3d, 0xca], "vpmaxsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3f, 0x0a], "vpmaxud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x3f, 0xca], "vpmaxud xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x40, 0x0a], "vpmulld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x40, 0xca], "vpmulld xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x42, 0x0a], "vgetexpps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x42, 0xca], "vgetexpps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x44, 0x0a], "vplzcntd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x44, 0xca], "vplzcntd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x45, 0x0a], "vpsrlvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x45, 0xca], "vpsrlvd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x46, 0x0a], "vpsravd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x46, 0xca], "vpsravd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x47, 0x0a], "vpsllvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x47, 0xca], "vpsllvd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x4c, 0xca], "vrcp14ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x4e, 0xca], "vrsqrt14ps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x50, 0x0a], "vpdpbusd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x50, 0xca], "vpdpbusd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x51, 0x0a], "vpdpbusds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x51, 0xca], "vpdpbusds xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x52, 0x0a], "vpdpwssd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x52, 0xca], "vpdpwssd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x53, 0x0a], "vpdpwssds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x53, 0xca], "vpdpwssds xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x54, 0x0a], "vpopcntb xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x54, 0x4a, 0x01], "vpopcntb xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x54, 0xca], "vpopcntb xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x55, 0x0a], "vpopcntd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x55, 0xca], "vpopcntd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x58, 0x0a], "vpbroadcastd xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x58, 0x4a, 0x01], "vpbroadcastd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x58, 0xca], "vpbroadcastd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x59, 0x0a], "vbroadcasti32x2 xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x59, 0x4a, 0x01], "vbroadcasti32x2 xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x59, 0xca], "vbroadcasti32x2 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x62, 0x0a], "vpexpandb xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x62, 0x4a, 0x01], "vpexpandb xmm1{k5}{z}, xmmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x62, 0xca], "vpexpandb xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x63, 0xca], "vpcompressb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x64, 0x0a], "vpblendmd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x64, 0xca], "vpblendmd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x65, 0x0a], "vblendmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x65, 0xca], "vblendmps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x66, 0x0a], "vpblendmb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x66, 0x4a, 0x01], "vpblendmb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x66, 0xca], "vpblendmb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x71, 0x0a], "vpshldvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x71, 0xca], "vpshldvd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x73, 0x0a], "vpshrdvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x73, 0xca], "vpshrdvd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x75, 0x0a], "vpermi2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x75, 0x4a, 0x01], "vpermi2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x75, 0xca], "vpermi2b xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x76, 0x0a], "vpermi2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x76, 0xca], "vpermi2d xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x77, 0x0a], "vpermi2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x77, 0xca], "vpermi2ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x78, 0x0a], "vpbroadcastb xmm1{k5}{z}, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x78, 0x4a, 0x01], "vpbroadcastb xmm1{k5}{z}, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x78, 0xca], "vpbroadcastb xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x79, 0x0a], "vpbroadcastw xmm1{k5}{z}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x79, 0x4a, 0x01], "vpbroadcastw xmm1{k5}{z}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x79, 0xca], "vpbroadcastw xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7a, 0xca], "vpbroadcastb xmm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7b, 0xca], "vpbroadcastw xmm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7d, 0x0a], "vpermt2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7d, 0x4a, 0x01], "vpermt2b xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7d, 0xca], "vpermt2b xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7e, 0x0a], "vpermt2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7e, 0xca], "vpermt2d xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x7f, 0xca], "vpermt2ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x88, 0x0a], "vexpandps xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x88, 0x4a, 0x01], "vexpandps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x88, 0xca], "vexpandps xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x89, 0x0a], "vpexpandd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x89, 0x4a, 0x01], "vpexpandd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x89, 0xca], "vpexpandd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x8a, 0xca], "vcompressps xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x8b, 0xca], "vpcompressd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x8d, 0x0a], "vpermb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x8d, 0x4a, 0x01], "vpermb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x8d, 0xca], "vpermb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x96, 0xca], "vfmaddsub132ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x97, 0xca], "vfmsubadd132ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x98, 0xca], "vfmadd132ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9a, 0xca], "vfmsub132ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9c, 0xca], "vfnmadd132ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0x9e, 0xca], "vfnmsub132ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa6, 0xca], "vfmaddsub213ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa7, 0xca], "vfmsubadd213ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xa8, 0xca], "vfmadd213ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xaa, 0xca], "vfmsub213ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xac, 0xca], "vfnmadd213ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xae, 0xca], "vfnmsub213ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb6, 0xca], "vfmaddsub231ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb7, 0xca], "vfmsubadd231ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xb8, 0xca], "vfmadd231ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xba, 0xca], "vfmsub231ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xbc, 0xca], "vfnmadd231ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xbe, 0xca], "vfnmsub231ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xc4, 0x0a], "vpconflictd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xc4, 0xca], "vpconflictd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xcf, 0x0a], "vgf2p8mulb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xcf, 0x4a, 0x01], "vgf2p8mulb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x8d, 0xcf, 0xca], "vgf2p8mulb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x0c, 0x0a], "vpermilps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x0c, 0x4a, 0x01], "vpermilps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x14, 0x0a], "vprorvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x14, 0x4a, 0x01], "vprorvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x15, 0x0a], "vprolvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x15, 0x4a, 0x01], "vprolvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x1e, 0x0a], "vpabsd xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x1e, 0x4a, 0x01], "vpabsd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x2b, 0x0a], "vpackusdw xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x2b, 0x4a, 0x01], "vpackusdw xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x2c, 0x0a], "vscalefps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x2c, 0x4a, 0x01], "vscalefps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x39, 0x0a], "vpminsd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x39, 0x4a, 0x01], "vpminsd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x3b, 0x0a], "vpminud xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x3b, 0x4a, 0x01], "vpminud xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x3d, 0x0a], "vpmaxsd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x3d, 0x4a, 0x01], "vpmaxsd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x3f, 0x0a], "vpmaxud xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x3f, 0x4a, 0x01], "vpmaxud xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x40, 0x0a], "vpmulld xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x40, 0x4a, 0x01], "vpmulld xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x42, 0x0a], "vgetexpps xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x42, 0x4a, 0x01], "vgetexpps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x44, 0x0a], "vplzcntd xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x44, 0x4a, 0x01], "vplzcntd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x45, 0x0a], "vpsrlvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x45, 0x4a, 0x01], "vpsrlvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x46, 0x0a], "vpsravd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x46, 0x4a, 0x01], "vpsravd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x47, 0x0a], "vpsllvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x47, 0x4a, 0x01], "vpsllvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x4c, 0x0a], "vrcp14ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x4c, 0x4a, 0x01], "vrcp14ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x4e, 0x0a], "vrsqrt14ps xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x4e, 0x4a, 0x01], "vrsqrt14ps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x50, 0x0a], "vpdpbusd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x50, 0x4a, 0x01], "vpdpbusd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x51, 0x0a], "vpdpbusds xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x51, 0x4a, 0x01], "vpdpbusds xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x52, 0x0a], "vpdpwssd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x52, 0x4a, 0x01], "vpdpwssd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x53, 0x0a], "vpdpwssds xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x53, 0x4a, 0x01], "vpdpwssds xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x55, 0x0a], "vpopcntd xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x55, 0x4a, 0x01], "vpopcntd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x64, 0x0a], "vpblendmd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x64, 0x4a, 0x01], "vpblendmd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x65, 0x0a], "vblendmps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x65, 0x4a, 0x01], "vblendmps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x71, 0x0a], "vpshldvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x71, 0x4a, 0x01], "vpshldvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x73, 0x0a], "vpshrdvd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x73, 0x4a, 0x01], "vpshrdvd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x76, 0x0a], "vpermi2d xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x76, 0x4a, 0x01], "vpermi2d xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x77, 0x0a], "vpermi2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x77, 0x4a, 0x01], "vpermi2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x7e, 0x0a], "vpermt2d xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x7e, 0x4a, 0x01], "vpermt2d xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x7f, 0x0a], "vpermt2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x7f, 0x4a, 0x01], "vpermt2ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x96, 0x0a], "vfmaddsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x96, 0x4a, 0x01], "vfmaddsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x97, 0x0a], "vfmsubadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x97, 0x4a, 0x01], "vfmsubadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x98, 0x0a], "vfmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x98, 0x4a, 0x01], "vfmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9a, 0x0a], "vfmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9a, 0x4a, 0x01], "vfmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9c, 0x0a], "vfnmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9c, 0x4a, 0x01], "vfnmadd132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9e, 0x0a], "vfnmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9e, 0x4a, 0x01], "vfnmsub132ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa6, 0x0a], "vfmaddsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa6, 0x4a, 0x01], "vfmaddsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa7, 0x0a], "vfmsubadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa7, 0x4a, 0x01], "vfmsubadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa8, 0x0a], "vfmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa8, 0x4a, 0x01], "vfmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xaa, 0x0a], "vfmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xaa, 0x4a, 0x01], "vfmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xac, 0x0a], "vfnmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xac, 0x4a, 0x01], "vfnmadd213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xae, 0x0a], "vfnmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xae, 0x4a, 0x01], "vfnmsub213ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb6, 0x0a], "vfmaddsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb6, 0x4a, 0x01], "vfmaddsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb7, 0x0a], "vfmsubadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb7, 0x4a, 0x01], "vfmsubadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb8, 0x0a], "vfmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb8, 0x4a, 0x01], "vfmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xba, 0x0a], "vfmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xba, 0x4a, 0x01], "vfmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbc, 0x0a], "vfnmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbc, 0x4a, 0x01], "vfnmadd231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbe, 0x0a], "vfnmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbe, 0x4a, 0x01], "vfnmsub231ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xc4, 0x0a], "vpconflictd xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0x9d, 0xc4, 0x4a, 0x01], "vpconflictd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x0c, 0x0a], "vpermilps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x0c, 0xca], "vpermilps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x13, 0x0a], "vcvtph2ps ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x13, 0x4a, 0x01], "vcvtph2ps ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x13, 0xca], "vcvtph2ps ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x14, 0x0a], "vprorvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x14, 0xca], "vprorvd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x15, 0x0a], "vprolvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x15, 0xca], "vprolvd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x16, 0x0a], "vpermps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x16, 0xca], "vpermps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x18, 0x0a], "vbroadcastss ymm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x18, 0x4a, 0x01], "vbroadcastss ymm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x18, 0xca], "vbroadcastss ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x19, 0x0a], "vbroadcastf32x2 ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x19, 0x4a, 0x01], "vbroadcastf32x2 ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x19, 0xca], "vbroadcastf32x2 ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x1a, 0x0a], "vbroadcastf32x4 ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x1e, 0x0a], "vpabsd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x1e, 0xca], "vpabsd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x25, 0x0a], "vpmovsxdq ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x25, 0x4a, 0x01], "vpmovsxdq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x25, 0xca], "vpmovsxdq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2b, 0x0a], "vpackusdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2b, 0xca], "vpackusdw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2c, 0x0a], "vscalefps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2c, 0xca], "vscalefps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2d, 0x0a], "vscalefss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2d, 0x4a, 0x01], "vscalefss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x2d, 0xca], "vscalefss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x35, 0x0a], "vpmovzxdq ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x35, 0x4a, 0x01], "vpmovzxdq ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x35, 0xca], "vpmovzxdq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x36, 0x0a], "vpermd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x36, 0xca], "vpermd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x39, 0x0a], "vpminsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x39, 0xca], "vpminsd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3b, 0x0a], "vpminud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3b, 0xca], "vpminud ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3d, 0x0a], "vpmaxsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3d, 0xca], "vpmaxsd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3f, 0x0a], "vpmaxud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x3f, 0xca], "vpmaxud ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x40, 0x0a], "vpmulld ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x40, 0xca], "vpmulld ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x42, 0x0a], "vgetexpps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x42, 0xca], "vgetexpps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x43, 0x0a], "vgetexpss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x43, 0x4a, 0x01], "vgetexpss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x43, 0xca], "vgetexpss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x44, 0x0a], "vplzcntd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x44, 0xca], "vplzcntd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x45, 0x0a], "vpsrlvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x45, 0xca], "vpsrlvd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x46, 0x0a], "vpsravd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x46, 0xca], "vpsravd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x47, 0x0a], "vpsllvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x47, 0xca], "vpsllvd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4c, 0x0a], "vrcp14ps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4c, 0xca], "vrcp14ps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4d, 0x0a], "vrcp14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4d, 0x4a, 0x01], "vrcp14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4d, 0xca], "vrcp14ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4e, 0xca], "vrsqrt14ps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4f, 0x0a], "vrsqrt14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4f, 0x4a, 0x01], "vrsqrt14ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x4f, 0xca], "vrsqrt14ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x50, 0x0a], "vpdpbusd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x50, 0xca], "vpdpbusd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x51, 0x0a], "vpdpbusds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x51, 0xca], "vpdpbusds ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x52, 0x0a], "vpdpwssd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x52, 0xca], "vpdpwssd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x53, 0x0a], "vpdpwssds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x53, 0xca], "vpdpwssds ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x54, 0x0a], "vpopcntb ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x54, 0x4a, 0x01], "vpopcntb ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x54, 0xca], "vpopcntb ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x55, 0x0a], "vpopcntd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x55, 0xca], "vpopcntd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x58, 0x0a], "vpbroadcastd ymm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x58, 0x4a, 0x01], "vpbroadcastd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x58, 0xca], "vpbroadcastd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x59, 0x0a], "vbroadcasti32x2 ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x59, 0x4a, 0x01], "vbroadcasti32x2 ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x59, 0xca], "vbroadcasti32x2 ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x5a, 0x0a], "vbroadcasti32x4 ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x62, 0x0a], "vpexpandb ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x62, 0x4a, 0x01], "vpexpandb ymm1{k5}{z}, ymmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x62, 0xca], "vpexpandb ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x63, 0xca], "vpcompressb ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x64, 0x0a], "vpblendmd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x64, 0xca], "vpblendmd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x65, 0x0a], "vblendmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x65, 0xca], "vblendmps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x66, 0x0a], "vpblendmb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x66, 0x4a, 0x01], "vpblendmb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x66, 0xca], "vpblendmb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x71, 0x0a], "vpshldvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x71, 0xca], "vpshldvd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x73, 0x0a], "vpshrdvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x73, 0xca], "vpshrdvd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x75, 0x0a], "vpermi2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x75, 0x4a, 0x01], "vpermi2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x75, 0xca], "vpermi2b ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x76, 0x0a], "vpermi2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x76, 0xca], "vpermi2d ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x77, 0x0a], "vpermi2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x77, 0xca], "vpermi2ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x78, 0x0a], "vpbroadcastb ymm1{k5}{z}, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x78, 0x4a, 0x01], "vpbroadcastb ymm1{k5}{z}, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x78, 0xca], "vpbroadcastb ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x79, 0x0a], "vpbroadcastw ymm1{k5}{z}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x79, 0x4a, 0x01], "vpbroadcastw ymm1{k5}{z}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x79, 0xca], "vpbroadcastw ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7a, 0xca], "vpbroadcastb ymm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7b, 0xca], "vpbroadcastw ymm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7d, 0x0a], "vpermt2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7d, 0x4a, 0x01], "vpermt2b ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7d, 0xca], "vpermt2b ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7e, 0x0a], "vpermt2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7e, 0xca], "vpermt2d ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7f, 0x0a], "vpermt2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x7f, 0xca], "vpermt2ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x88, 0x0a], "vexpandps ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x88, 0x4a, 0x01], "vexpandps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x88, 0xca], "vexpandps ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x89, 0x0a], "vpexpandd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x89, 0x4a, 0x01], "vpexpandd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x89, 0xca], "vpexpandd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x8a, 0xca], "vcompressps ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x8b, 0xca], "vpcompressd ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x8d, 0x0a], "vpermb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x8d, 0x4a, 0x01], "vpermb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x8d, 0xca], "vpermb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x96, 0xca], "vfmaddsub132ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x97, 0xca], "vfmsubadd132ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x98, 0x0a], "vfmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x98, 0xca], "vfmadd132ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x99, 0x0a], "vfmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x99, 0x4a, 0x01], "vfmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9a, 0xca], "vfmsub132ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9b, 0x0a], "vfmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9b, 0x4a, 0x01], "vfmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9c, 0xca], "vfnmadd132ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9d, 0x0a], "vfnmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9d, 0x4a, 0x01], "vfnmadd132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9e, 0xca], "vfnmsub132ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9f, 0x0a], "vfnmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9f, 0x4a, 0x01], "vfnmsub132ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa6, 0xca], "vfmaddsub213ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa7, 0xca], "vfmsubadd213ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa8, 0xca], "vfmadd213ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa9, 0x0a], "vfmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa9, 0x4a, 0x01], "vfmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xaa, 0xca], "vfmsub213ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xab, 0x0a], "vfmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xab, 0x4a, 0x01], "vfmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xac, 0xca], "vfnmadd213ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xad, 0x0a], "vfnmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xad, 0x4a, 0x01], "vfnmadd213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xae, 0xca], "vfnmsub213ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xaf, 0x0a], "vfnmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xaf, 0x4a, 0x01], "vfnmsub213ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb6, 0xca], "vfmaddsub231ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb7, 0xca], "vfmsubadd231ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb8, 0xca], "vfmadd231ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb9, 0x0a], "vfmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb9, 0x4a, 0x01], "vfmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xba, 0x0a], "vfmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xba, 0xca], "vfmsub231ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbb, 0x0a], "vfmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbb, 0x4a, 0x01], "vfmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbc, 0xca], "vfnmadd231ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbd, 0x0a], "vfnmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbd, 0x4a, 0x01], "vfnmadd231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbe, 0xca], "vfnmsub231ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbf, 0x0a], "vfnmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbf, 0x4a, 0x01], "vfnmsub231ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xc4, 0x0a], "vpconflictd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xc4, 0xca], "vpconflictd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcb, 0x0a], "vrcp28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcb, 0x4a, 0x01], "vrcp28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcb, 0xca], "vrcp28ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcd, 0x0a], "vrsqrt28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcd, 0x4a, 0x01], "vrsqrt28ss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcf, 0x0a], "vgf2p8mulb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcf, 0x4a, 0x01], "vgf2p8mulb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xad, 0xcf, 0xca], "vgf2p8mulb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x0c, 0x0a], "vpermilps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x0c, 0x4a, 0x01], "vpermilps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x14, 0x0a], "vprorvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x14, 0x4a, 0x01], "vprorvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x15, 0x0a], "vprolvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x15, 0x4a, 0x01], "vprolvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x16, 0x0a], "vpermps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x16, 0x4a, 0x01], "vpermps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x1e, 0x0a], "vpabsd ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x1e, 0x4a, 0x01], "vpabsd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x2b, 0x0a], "vpackusdw ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x2b, 0x4a, 0x01], "vpackusdw ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x2c, 0x0a], "vscalefps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x2c, 0x4a, 0x01], "vscalefps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x36, 0x0a], "vpermd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x36, 0x4a, 0x01], "vpermd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x39, 0x0a], "vpminsd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x39, 0x4a, 0x01], "vpminsd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x3b, 0x0a], "vpminud ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x3b, 0x4a, 0x01], "vpminud ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x3d, 0x0a], "vpmaxsd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x3d, 0x4a, 0x01], "vpmaxsd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x3f, 0x0a], "vpmaxud ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x3f, 0x4a, 0x01], "vpmaxud ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x40, 0x0a], "vpmulld ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x40, 0x4a, 0x01], "vpmulld ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x42, 0x0a], "vgetexpps ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x42, 0x4a, 0x01], "vgetexpps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x44, 0x0a], "vplzcntd ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x44, 0x4a, 0x01], "vplzcntd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x45, 0x0a], "vpsrlvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x45, 0x4a, 0x01], "vpsrlvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x46, 0x0a], "vpsravd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x46, 0x4a, 0x01], "vpsravd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x47, 0x0a], "vpsllvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x47, 0x4a, 0x01], "vpsllvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x4c, 0x0a], "vrcp14ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x4c, 0x4a, 0x01], "vrcp14ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x4e, 0x0a], "vrsqrt14ps ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x4e, 0x4a, 0x01], "vrsqrt14ps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x50, 0x0a], "vpdpbusd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x50, 0x4a, 0x01], "vpdpbusd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x51, 0x0a], "vpdpbusds ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x51, 0x4a, 0x01], "vpdpbusds ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x52, 0x0a], "vpdpwssd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x52, 0x4a, 0x01], "vpdpwssd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x53, 0x0a], "vpdpwssds ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x53, 0x4a, 0x01], "vpdpwssds ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x55, 0x0a], "vpopcntd ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x55, 0x4a, 0x01], "vpopcntd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x64, 0x0a], "vpblendmd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x64, 0x4a, 0x01], "vpblendmd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x65, 0x0a], "vblendmps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x65, 0x4a, 0x01], "vblendmps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x71, 0x0a], "vpshldvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x71, 0x4a, 0x01], "vpshldvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x73, 0x0a], "vpshrdvd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x73, 0x4a, 0x01], "vpshrdvd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x76, 0x0a], "vpermi2d ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x76, 0x4a, 0x01], "vpermi2d ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x77, 0x0a], "vpermi2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x77, 0x4a, 0x01], "vpermi2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x7e, 0x0a], "vpermt2d ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x7e, 0x4a, 0x01], "vpermt2d ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x7f, 0x0a], "vpermt2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x7f, 0x4a, 0x01], "vpermt2ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x96, 0x0a], "vfmaddsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x96, 0x4a, 0x01], "vfmaddsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x97, 0x0a], "vfmsubadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x97, 0x4a, 0x01], "vfmsubadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x98, 0x0a], "vfmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x98, 0x4a, 0x01], "vfmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9a, 0x0a], "vfmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9a, 0x4a, 0x01], "vfmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9c, 0x0a], "vfnmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9c, 0x4a, 0x01], "vfnmadd132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9e, 0x0a], "vfnmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9e, 0x4a, 0x01], "vfnmsub132ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa6, 0x0a], "vfmaddsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa6, 0x4a, 0x01], "vfmaddsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa7, 0x0a], "vfmsubadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa7, 0x4a, 0x01], "vfmsubadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa8, 0x0a], "vfmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa8, 0x4a, 0x01], "vfmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xaa, 0x0a], "vfmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xaa, 0x4a, 0x01], "vfmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xac, 0x0a], "vfnmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xac, 0x4a, 0x01], "vfnmadd213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xae, 0x0a], "vfnmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xae, 0x4a, 0x01], "vfnmsub213ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb6, 0x0a], "vfmaddsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb6, 0x4a, 0x01], "vfmaddsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb7, 0x0a], "vfmsubadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb7, 0x4a, 0x01], "vfmsubadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb8, 0x0a], "vfmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb8, 0x4a, 0x01], "vfmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xba, 0x0a], "vfmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xba, 0x4a, 0x01], "vfmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbc, 0x0a], "vfnmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbc, 0x4a, 0x01], "vfnmadd231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbe, 0x0a], "vfnmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbe, 0x4a, 0x01], "vfnmsub231ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xc4, 0x0a], "vpconflictd ymm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xbd, 0xc4, 0x4a, 0x01], "vpconflictd ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x0c, 0x0a], "vpermilps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x0c, 0xca], "vpermilps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x13, 0x0a], "vcvtph2ps zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x13, 0x4a, 0x01], "vcvtph2ps zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x13, 0xca], "vcvtph2ps zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x14, 0x0a], "vprorvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x14, 0xca], "vprorvd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x15, 0x0a], "vprolvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x15, 0xca], "vprolvd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x16, 0x0a], "vpermps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x16, 0xca], "vpermps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x18, 0x0a], "vbroadcastss zmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x18, 0x4a, 0x01], "vbroadcastss zmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x18, 0xca], "vbroadcastss zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x19, 0x0a], "vbroadcastf32x2 zmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x19, 0x4a, 0x01], "vbroadcastf32x2 zmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x19, 0xca], "vbroadcastf32x2 zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1a, 0x0a], "vbroadcastf32x4 zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1a, 0x4a, 0x01], "vbroadcastf32x4 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1b, 0x0a], "vbroadcastf32x8 zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1b, 0x4a, 0x01], "vbroadcastf32x8 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1e, 0x0a], "vpabsd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x1e, 0xca], "vpabsd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x25, 0x0a], "vpmovsxdq zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x25, 0x4a, 0x01], "vpmovsxdq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x25, 0xca], "vpmovsxdq zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x2b, 0x0a], "vpackusdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x2b, 0xca], "vpackusdw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x2c, 0x0a], "vscalefps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x35, 0x0a], "vpmovzxdq zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x35, 0x4a, 0x01], "vpmovzxdq zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x35, 0xca], "vpmovzxdq zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x36, 0x0a], "vpermd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x36, 0xca], "vpermd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x39, 0x0a], "vpminsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x39, 0xca], "vpminsd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3b, 0x0a], "vpminud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3b, 0xca], "vpminud zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3d, 0x0a], "vpmaxsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3d, 0xca], "vpmaxsd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3f, 0x0a], "vpmaxud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x3f, 0xca], "vpmaxud zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x40, 0x0a], "vpmulld zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x40, 0xca], "vpmulld zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x42, 0x0a], "vgetexpps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x42, 0xca], "vgetexpps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x44, 0x0a], "vplzcntd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x44, 0xca], "vplzcntd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x45, 0x0a], "vpsrlvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x45, 0xca], "vpsrlvd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x46, 0x0a], "vpsravd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x46, 0xca], "vpsravd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x47, 0x0a], "vpsllvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x47, 0xca], "vpsllvd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x4c, 0x0a], "vrcp14ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x4c, 0xca], "vrcp14ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x4e, 0xca], "vrsqrt14ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x50, 0x0a], "vpdpbusd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x50, 0xca], "vpdpbusd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x51, 0x0a], "vpdpbusds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x51, 0xca], "vpdpbusds zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x52, 0x0a], "vpdpwssd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x52, 0xca], "vpdpwssd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x53, 0x0a], "vpdpwssds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x53, 0xca], "vpdpwssds zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x54, 0x0a], "vpopcntb zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x54, 0x4a, 0x01], "vpopcntb zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x54, 0xca], "vpopcntb zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x55, 0x0a], "vpopcntd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x55, 0xca], "vpopcntd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x58, 0x0a], "vpbroadcastd zmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x58, 0x4a, 0x01], "vpbroadcastd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x58, 0xca], "vpbroadcastd zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x59, 0x0a], "vbroadcasti32x2 zmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x59, 0x4a, 0x01], "vbroadcasti32x2 zmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x59, 0xca], "vbroadcasti32x2 zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x5a, 0x0a], "vbroadcasti32x4 zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x5a, 0x4a, 0x01], "vbroadcasti32x4 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x5b, 0x0a], "vbroadcasti32x8 zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x5b, 0x4a, 0x01], "vbroadcasti32x8 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x62, 0x0a], "vpexpandb zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x62, 0x4a, 0x01], "vpexpandb zmm1{k5}{z}, zmmword [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x62, 0xca], "vpexpandb zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x63, 0xca], "vpcompressb zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x64, 0x0a], "vpblendmd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x64, 0xca], "vpblendmd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x65, 0x0a], "vblendmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x65, 0xca], "vblendmps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x66, 0x0a], "vpblendmb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x66, 0x4a, 0x01], "vpblendmb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x66, 0xca], "vpblendmb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x71, 0x0a], "vpshldvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x71, 0xca], "vpshldvd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x73, 0x0a], "vpshrdvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x73, 0xca], "vpshrdvd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x75, 0x0a], "vpermi2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x75, 0x4a, 0x01], "vpermi2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x75, 0xca], "vpermi2b zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x76, 0x0a], "vpermi2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x76, 0xca], "vpermi2d zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x77, 0x0a], "vpermi2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x77, 0xca], "vpermi2ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x78, 0x0a], "vpbroadcastb zmm1{k5}{z}, byte [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x78, 0x4a, 0x01], "vpbroadcastb zmm1{k5}{z}, byte [bp + si * 1 + 0x1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x78, 0xca], "vpbroadcastb zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x79, 0x0a], "vpbroadcastw zmm1{k5}{z}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x79, 0x4a, 0x01], "vpbroadcastw zmm1{k5}{z}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x79, 0xca], "vpbroadcastw zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7a, 0xca], "vpbroadcastb zmm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7b, 0xca], "vpbroadcastw zmm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7d, 0x0a], "vpermt2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7d, 0x4a, 0x01], "vpermt2b zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7d, 0xca], "vpermt2b zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7e, 0x0a], "vpermt2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7e, 0xca], "vpermt2d zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7f, 0x0a], "vpermt2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x7f, 0xca], "vpermt2ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x88, 0x0a], "vexpandps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x88, 0x4a, 0x01], "vexpandps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x88, 0xca], "vexpandps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x89, 0x0a], "vpexpandd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x89, 0x4a, 0x01], "vpexpandd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x89, 0xca], "vpexpandd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x8a, 0xca], "vcompressps zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x8b, 0xca], "vpcompressd zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x8d, 0x0a], "vpermb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x8d, 0x4a, 0x01], "vpermb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x8d, 0xca], "vpermb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x98, 0x0a], "vfmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xba, 0x0a], "vfmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xc4, 0x0a], "vpconflictd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xc4, 0xca], "vpconflictd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xc8, 0x0a], "vexp2ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xc8, 0xca], "vexp2ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xca, 0x0a], "vrcp28ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xca, 0xca], "vrcp28ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xcf, 0x0a], "vgf2p8mulb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xcf, 0x4a, 0x01], "vgf2p8mulb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xcd, 0xcf, 0xca], "vgf2p8mulb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x0c, 0x0a], "vpermilps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x0c, 0x4a, 0x01], "vpermilps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x14, 0x0a], "vprorvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x14, 0x4a, 0x01], "vprorvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x15, 0x0a], "vprolvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x15, 0x4a, 0x01], "vprolvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x16, 0x0a], "vpermps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x16, 0x4a, 0x01], "vpermps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x1e, 0x0a], "vpabsd zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x1e, 0x4a, 0x01], "vpabsd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x2b, 0x0a], "vpackusdw zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x2b, 0x4a, 0x01], "vpackusdw zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x2c, 0x0a], "vscalefps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x2c, 0x4a, 0x01], "vscalefps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x36, 0x0a], "vpermd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x36, 0x4a, 0x01], "vpermd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x39, 0x0a], "vpminsd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x39, 0x4a, 0x01], "vpminsd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x3b, 0x0a], "vpminud zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x3b, 0x4a, 0x01], "vpminud zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x3d, 0x0a], "vpmaxsd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x3d, 0x4a, 0x01], "vpmaxsd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x3f, 0x0a], "vpmaxud zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x3f, 0x4a, 0x01], "vpmaxud zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x40, 0x0a], "vpmulld zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x40, 0x4a, 0x01], "vpmulld zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x42, 0x0a], "vgetexpps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x42, 0x4a, 0x01], "vgetexpps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x44, 0x0a], "vplzcntd zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x44, 0x4a, 0x01], "vplzcntd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x45, 0x0a], "vpsrlvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x45, 0x4a, 0x01], "vpsrlvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x46, 0x0a], "vpsravd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x46, 0x4a, 0x01], "vpsravd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x47, 0x0a], "vpsllvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x47, 0x4a, 0x01], "vpsllvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x4c, 0x0a], "vrcp14ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x4c, 0x4a, 0x01], "vrcp14ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x4e, 0x0a], "vrsqrt14ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x4e, 0x4a, 0x01], "vrsqrt14ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x50, 0x0a], "vpdpbusd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x50, 0x4a, 0x01], "vpdpbusd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x51, 0x0a], "vpdpbusds zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x51, 0x4a, 0x01], "vpdpbusds zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x52, 0x0a], "vpdpwssd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x52, 0x4a, 0x01], "vpdpwssd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x53, 0x0a], "vpdpwssds zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x53, 0x4a, 0x01], "vpdpwssds zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x55, 0x0a], "vpopcntd zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x55, 0x4a, 0x01], "vpopcntd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x64, 0x0a], "vpblendmd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x64, 0x4a, 0x01], "vpblendmd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x65, 0x0a], "vblendmps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x65, 0x4a, 0x01], "vblendmps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x71, 0x0a], "vpshldvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x71, 0x4a, 0x01], "vpshldvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x73, 0x0a], "vpshrdvd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x73, 0x4a, 0x01], "vpshrdvd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x76, 0x0a], "vpermi2d zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x76, 0x4a, 0x01], "vpermi2d zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x77, 0x0a], "vpermi2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x77, 0x4a, 0x01], "vpermi2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x7e, 0x0a], "vpermt2d zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x7e, 0x4a, 0x01], "vpermt2d zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x7f, 0x0a], "vpermt2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x7f, 0x4a, 0x01], "vpermt2ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x96, 0x0a], "vfmaddsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x96, 0x4a, 0x01], "vfmaddsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x97, 0x0a], "vfmsubadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x97, 0x4a, 0x01], "vfmsubadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x98, 0x0a], "vfmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x98, 0x4a, 0x01], "vfmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9a, 0x0a], "vfmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9a, 0x4a, 0x01], "vfmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9c, 0x0a], "vfnmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9c, 0x4a, 0x01], "vfnmadd132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9e, 0x0a], "vfnmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9e, 0x4a, 0x01], "vfnmsub132ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa6, 0x0a], "vfmaddsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa6, 0x4a, 0x01], "vfmaddsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa7, 0x0a], "vfmsubadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa7, 0x4a, 0x01], "vfmsubadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa8, 0x0a], "vfmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa8, 0x4a, 0x01], "vfmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xaa, 0x0a], "vfmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xaa, 0x4a, 0x01], "vfmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xac, 0x0a], "vfnmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xac, 0x4a, 0x01], "vfnmadd213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xae, 0x0a], "vfnmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xae, 0x4a, 0x01], "vfnmsub213ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb6, 0x0a], "vfmaddsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb6, 0x4a, 0x01], "vfmaddsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb7, 0x0a], "vfmsubadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb7, 0x4a, 0x01], "vfmsubadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb8, 0x0a], "vfmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb8, 0x4a, 0x01], "vfmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xba, 0x0a], "vfmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xba, 0x4a, 0x01], "vfmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbc, 0x0a], "vfnmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbc, 0x4a, 0x01], "vfnmadd231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbe, 0x0a], "vfnmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbe, 0x4a, 0x01], "vfnmsub231ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xc4, 0x0a], "vpconflictd zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xc4, 0x4a, 0x01], "vpconflictd zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xc8, 0x0a], "vexp2ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xc8, 0x4a, 0x01], "vexp2ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xca, 0x0a], "vrcp28ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xca, 0x4a, 0x01], "vrcp28ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xcc, 0x0a], "vrsqrt28ps zmm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xdd, 0xcc, 0x4a, 0x01], "vrsqrt28ps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x13, 0xca], "vcvtph2ps zmm1{k5}{z}{sae}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x2c, 0xca], "vscalefps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x2d, 0xca], "vscalefss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x42, 0xca], "vgetexpps zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x43, 0xca], "vgetexpss xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x96, 0xca], "vfmaddsub132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x97, 0xca], "vfmsubadd132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x98, 0xca], "vfmadd132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x99, 0xca], "vfmadd132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x9a, 0xca], "vfmsub132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x9b, 0xca], "vfmsub132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x9c, 0xca], "vfnmadd132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x9d, 0xca], "vfnmadd132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x9e, 0xca], "vfnmsub132ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0x9f, 0xca], "vfnmsub132ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xa6, 0xca], "vfmaddsub213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xa7, 0xca], "vfmsubadd213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xa8, 0xca], "vfmadd213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xa9, 0xca], "vfmadd213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xaa, 0xca], "vfmsub213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xab, 0xca], "vfmsub213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xac, 0xca], "vfnmadd213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xad, 0xca], "vfnmadd213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xae, 0xca], "vfnmsub213ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xaf, 0xca], "vfnmsub213ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xb6, 0xca], "vfmaddsub231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xb7, 0xca], "vfmsubadd231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xb8, 0xca], "vfmadd231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xb9, 0xca], "vfmadd231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xba, 0xca], "vfmsub231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xbb, 0xca], "vfmsub231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xbc, 0xca], "vfnmadd231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xbd, 0xca], "vfnmadd231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xbe, 0xca], "vfnmsub231ps zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xbf, 0xca], "vfnmsub231ss xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xc8, 0xca], "vexp2ps zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xca, 0xca], "vrcp28ps zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xcb, 0xca], "vrcp28ss xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xcc, 0xca], "vrsqrt28ps zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7d, 0xfd, 0xcd, 0xca], "vrsqrt28ss xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x10, 0x0a], "vpmovuswb qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x10, 0x4a, 0x01], "vpmovuswb qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x10, 0xca], "vpmovuswb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x11, 0x0a], "vpmovusdb dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x11, 0x4a, 0x01], "vpmovusdb dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x11, 0xca], "vpmovusdb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x12, 0x0a], "vpmovusqb word [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x12, 0x4a, 0x01], "vpmovusqb word [bp + si * 1 + 0x2], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x12, 0xca], "vpmovusqb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x13, 0x0a], "vpmovusdw qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x13, 0x4a, 0x01], "vpmovusdw qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x13, 0xca], "vpmovusdw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x14, 0x0a], "vpmovusqw dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x14, 0x4a, 0x01], "vpmovusqw dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x14, 0xca], "vpmovusqw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x15, 0x0a], "vpmovusqd qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x15, 0x4a, 0x01], "vpmovusqd qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x15, 0xca], "vpmovusqd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x20, 0x0a], "vpmovswb qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x20, 0x4a, 0x01], "vpmovswb qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x20, 0xca], "vpmovswb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x21, 0x0a], "vpmovsdb dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x21, 0x4a, 0x01], "vpmovsdb dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x21, 0xca], "vpmovsdb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x22, 0x0a], "vpmovsqb word [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x22, 0x4a, 0x01], "vpmovsqb word [bp + si * 1 + 0x2], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x22, 0xca], "vpmovsqb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x23, 0x0a], "vpmovsdw qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x23, 0x4a, 0x01], "vpmovsdw qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x23, 0xca], "vpmovsdw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x24, 0x0a], "vpmovsqw dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x24, 0x4a, 0x01], "vpmovsqw dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x24, 0xca], "vpmovsqw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x25, 0x0a], "vpmovsqd qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x25, 0x4a, 0x01], "vpmovsqd qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x25, 0xca], "vpmovsqd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x26, 0x0a], "vptestnmb k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x26, 0x4a, 0x01], "vptestnmb k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x26, 0xca], "vptestnmb k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x27, 0x0a], "vptestnmd k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x27, 0x4a, 0x01], "vptestnmd k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x27, 0xca], "vptestnmd k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x28, 0xca], "vpmovm2b xmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x29, 0xca], "vpmovb2m k1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x30, 0x0a], "vpmovwb qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x30, 0x4a, 0x01], "vpmovwb qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x30, 0xca], "vpmovwb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x31, 0x0a], "vpmovdb dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x31, 0x4a, 0x01], "vpmovdb dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x31, 0xca], "vpmovdb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x32, 0x0a], "vpmovqb word [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x32, 0x4a, 0x01], "vpmovqb word [bp + si * 1 + 0x2], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x32, 0xca], "vpmovqb xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x33, 0x0a], "vpmovdw qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x33, 0x4a, 0x01], "vpmovdw qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x33, 0xca], "vpmovdw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x34, 0x0a], "vpmovqw dword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x34, 0x4a, 0x01], "vpmovqw dword [bp + si * 1 + 0x4], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x34, 0xca], "vpmovqw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x35, 0x0a], "vpmovqd qword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x35, 0x4a, 0x01], "vpmovqd qword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x35, 0xca], "vpmovqd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x38, 0xca], "vpmovm2d xmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x39, 0xca], "vpmovd2m k1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x3a, 0xca], "vpbroadcastmw2d xmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x52, 0x0a], "vdpbf16ps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x52, 0xca], "vdpbf16ps xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x72, 0x0a], "vcvtneps2bf16 xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x72, 0xca], "vcvtneps2bf16 xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x10, 0x0a], "vpmovuswb qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x10, 0x4a, 0x01], "vpmovuswb qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x10, 0xca], "vpmovuswb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x11, 0x0a], "vpmovusdb dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x11, 0x4a, 0x01], "vpmovusdb dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x11, 0xca], "vpmovusdb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x12, 0x0a], "vpmovusqb word [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x12, 0x4a, 0x01], "vpmovusqb word [bp + si * 1 + 0x2]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x12, 0xca], "vpmovusqb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x13, 0x0a], "vpmovusdw qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x13, 0x4a, 0x01], "vpmovusdw qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x13, 0xca], "vpmovusdw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x14, 0x0a], "vpmovusqw dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x14, 0x4a, 0x01], "vpmovusqw dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x14, 0xca], "vpmovusqw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x15, 0x0a], "vpmovusqd qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x15, 0x4a, 0x01], "vpmovusqd qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x15, 0xca], "vpmovusqd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x20, 0x0a], "vpmovswb qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x20, 0x4a, 0x01], "vpmovswb qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x20, 0xca], "vpmovswb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x21, 0x0a], "vpmovsdb dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x21, 0x4a, 0x01], "vpmovsdb dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x21, 0xca], "vpmovsdb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x22, 0x0a], "vpmovsqb word [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x22, 0x4a, 0x01], "vpmovsqb word [bp + si * 1 + 0x2]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x22, 0xca], "vpmovsqb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x23, 0x0a], "vpmovsdw qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x23, 0x4a, 0x01], "vpmovsdw qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x23, 0xca], "vpmovsdw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x24, 0x0a], "vpmovsqw dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x24, 0x4a, 0x01], "vpmovsqw dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x24, 0xca], "vpmovsqw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x25, 0x0a], "vpmovsqd qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x25, 0x4a, 0x01], "vpmovsqd qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x25, 0xca], "vpmovsqd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x26, 0x0a], "vptestnmb k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x26, 0x4a, 0x01], "vptestnmb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x26, 0xca], "vptestnmb k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x27, 0x0a], "vptestnmd k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x27, 0xca], "vptestnmd k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x30, 0x0a], "vpmovwb qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x30, 0x4a, 0x01], "vpmovwb qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x30, 0xca], "vpmovwb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x31, 0x0a], "vpmovdb dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x31, 0x4a, 0x01], "vpmovdb dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x31, 0xca], "vpmovdb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x32, 0x0a], "vpmovqb word [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x32, 0x4a, 0x01], "vpmovqb word [bp + si * 1 + 0x2]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x32, 0xca], "vpmovqb xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x33, 0x0a], "vpmovdw qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x33, 0x4a, 0x01], "vpmovdw qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x33, 0xca], "vpmovdw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x34, 0x0a], "vpmovqw dword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x34, 0x4a, 0x01], "vpmovqw dword [bp + si * 1 + 0x4]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x34, 0xca], "vpmovqw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x35, 0x0a], "vpmovqd qword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x35, 0x4a, 0x01], "vpmovqd qword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x35, 0xca], "vpmovqd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x52, 0xca], "vdpbf16ps xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x0d, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x18, 0x27, 0x0a], "vptestnmd k1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x18, 0x27, 0x4a, 0x01], "vptestnmd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x18, 0x52, 0x0a], "vdpbf16ps xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x18, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x18, 0x72, 0x0a], "vcvtneps2bf16 xmm1, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x18, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x1d, 0x27, 0x0a], "vptestnmd k1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x1d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x1d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x1d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x1d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x1d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x10, 0x0a], "vpmovuswb xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x10, 0x4a, 0x01], "vpmovuswb xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x10, 0xca], "vpmovuswb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x11, 0x0a], "vpmovusdb qword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x11, 0x4a, 0x01], "vpmovusdb qword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x11, 0xca], "vpmovusdb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x12, 0x0a], "vpmovusqb dword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x12, 0x4a, 0x01], "vpmovusqb dword [bp + si * 1 + 0x4], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x12, 0xca], "vpmovusqb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x13, 0x0a], "vpmovusdw xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x13, 0x4a, 0x01], "vpmovusdw xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x13, 0xca], "vpmovusdw xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x14, 0x0a], "vpmovusqw qword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x14, 0x4a, 0x01], "vpmovusqw qword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x14, 0xca], "vpmovusqw xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x15, 0x0a], "vpmovusqd xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x15, 0x4a, 0x01], "vpmovusqd xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x15, 0xca], "vpmovusqd xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x20, 0x0a], "vpmovswb xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x20, 0x4a, 0x01], "vpmovswb xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x20, 0xca], "vpmovswb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x21, 0x0a], "vpmovsdb qword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x21, 0x4a, 0x01], "vpmovsdb qword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x21, 0xca], "vpmovsdb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x22, 0x0a], "vpmovsqb dword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x22, 0x4a, 0x01], "vpmovsqb dword [bp + si * 1 + 0x4], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x22, 0xca], "vpmovsqb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x23, 0x0a], "vpmovsdw xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x23, 0x4a, 0x01], "vpmovsdw xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x23, 0xca], "vpmovsdw xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x24, 0x0a], "vpmovsqw qword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x24, 0x4a, 0x01], "vpmovsqw qword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x24, 0xca], "vpmovsqw xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x25, 0x0a], "vpmovsqd xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x25, 0x4a, 0x01], "vpmovsqd xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x25, 0xca], "vpmovsqd xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x26, 0x0a], "vptestnmb k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x26, 0x4a, 0x01], "vptestnmb k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x26, 0xca], "vptestnmb k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x27, 0x0a], "vptestnmd k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x27, 0x4a, 0x01], "vptestnmd k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x27, 0xca], "vptestnmd k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x28, 0xca], "vpmovm2b ymm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x29, 0xca], "vpmovb2m k1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x30, 0x0a], "vpmovwb xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x30, 0x4a, 0x01], "vpmovwb xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x30, 0xca], "vpmovwb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x31, 0x0a], "vpmovdb qword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x31, 0x4a, 0x01], "vpmovdb qword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x31, 0xca], "vpmovdb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x32, 0x0a], "vpmovqb dword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x32, 0x4a, 0x01], "vpmovqb dword [bp + si * 1 + 0x4], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x32, 0xca], "vpmovqb xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x33, 0x0a], "vpmovdw xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x33, 0x4a, 0x01], "vpmovdw xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x33, 0xca], "vpmovdw xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x34, 0x0a], "vpmovqw qword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x34, 0x4a, 0x01], "vpmovqw qword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x34, 0xca], "vpmovqw xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x35, 0x0a], "vpmovqd xmmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x35, 0x4a, 0x01], "vpmovqd xmmword [bp + si * 1 + 0x10], ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x35, 0xca], "vpmovqd xmm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x38, 0xca], "vpmovm2d ymm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x39, 0xca], "vpmovd2m k1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x3a, 0xca], "vpbroadcastmw2d ymm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x52, 0x0a], "vdpbf16ps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x52, 0xca], "vdpbf16ps ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x72, 0x0a], "vcvtneps2bf16 xmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x72, 0xca], "vcvtneps2bf16 xmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x10, 0x0a], "vpmovuswb xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x10, 0x4a, 0x01], "vpmovuswb xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x10, 0xca], "vpmovuswb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x11, 0x0a], "vpmovusdb qword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x11, 0x4a, 0x01], "vpmovusdb qword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x11, 0xca], "vpmovusdb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x12, 0x0a], "vpmovusqb dword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x12, 0x4a, 0x01], "vpmovusqb dword [bp + si * 1 + 0x4]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x12, 0xca], "vpmovusqb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x13, 0x0a], "vpmovusdw xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x13, 0x4a, 0x01], "vpmovusdw xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x13, 0xca], "vpmovusdw xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x14, 0x0a], "vpmovusqw qword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x14, 0x4a, 0x01], "vpmovusqw qword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x14, 0xca], "vpmovusqw xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x15, 0x0a], "vpmovusqd xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x15, 0x4a, 0x01], "vpmovusqd xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x15, 0xca], "vpmovusqd xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x20, 0x0a], "vpmovswb xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x20, 0x4a, 0x01], "vpmovswb xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x20, 0xca], "vpmovswb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x21, 0x0a], "vpmovsdb qword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x21, 0x4a, 0x01], "vpmovsdb qword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x21, 0xca], "vpmovsdb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x22, 0x0a], "vpmovsqb dword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x22, 0x4a, 0x01], "vpmovsqb dword [bp + si * 1 + 0x4]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x22, 0xca], "vpmovsqb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x23, 0x0a], "vpmovsdw xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x23, 0x4a, 0x01], "vpmovsdw xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x23, 0xca], "vpmovsdw xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x24, 0x0a], "vpmovsqw qword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x24, 0x4a, 0x01], "vpmovsqw qword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x24, 0xca], "vpmovsqw xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x25, 0x0a], "vpmovsqd xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x25, 0x4a, 0x01], "vpmovsqd xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x25, 0xca], "vpmovsqd xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x26, 0x0a], "vptestnmb k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x26, 0x4a, 0x01], "vptestnmb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x26, 0xca], "vptestnmb k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x27, 0x0a], "vptestnmd k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x27, 0xca], "vptestnmd k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x30, 0x0a], "vpmovwb xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x30, 0x4a, 0x01], "vpmovwb xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x30, 0xca], "vpmovwb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x31, 0x0a], "vpmovdb qword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x31, 0x4a, 0x01], "vpmovdb qword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x31, 0xca], "vpmovdb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x32, 0x0a], "vpmovqb dword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x32, 0x4a, 0x01], "vpmovqb dword [bp + si * 1 + 0x4]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x32, 0xca], "vpmovqb xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x33, 0x0a], "vpmovdw xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x33, 0x4a, 0x01], "vpmovdw xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x33, 0xca], "vpmovdw xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x34, 0x0a], "vpmovqw qword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x34, 0x4a, 0x01], "vpmovqw qword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x34, 0xca], "vpmovqw xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x35, 0x0a], "vpmovqd xmmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x35, 0x4a, 0x01], "vpmovqd xmmword [bp + si * 1 + 0x10]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x35, 0xca], "vpmovqd xmm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x52, 0x0a], "vdpbf16ps ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x52, 0xca], "vdpbf16ps ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x2d, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x38, 0x27, 0x0a], "vptestnmd k1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x38, 0x27, 0x4a, 0x01], "vptestnmd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x38, 0x52, 0x0a], "vdpbf16ps ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x38, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x38, 0x72, 0x0a], "vcvtneps2bf16 xmm1, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x38, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x3d, 0x27, 0x0a], "vptestnmd k1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x3d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x3d, 0x52, 0x0a], "vdpbf16ps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x3d, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x3d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x3d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x10, 0x0a], "vpmovuswb ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x10, 0x4a, 0x01], "vpmovuswb ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x10, 0xca], "vpmovuswb ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x11, 0x0a], "vpmovusdb xmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x11, 0x4a, 0x01], "vpmovusdb xmmword [bp + si * 1 + 0x10], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x11, 0xca], "vpmovusdb xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x12, 0x0a], "vpmovusqb qword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x12, 0x4a, 0x01], "vpmovusqb qword [bp + si * 1 + 0x8], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x12, 0xca], "vpmovusqb xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x13, 0x0a], "vpmovusdw ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x13, 0x4a, 0x01], "vpmovusdw ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x13, 0xca], "vpmovusdw ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x14, 0x0a], "vpmovusqw xmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x14, 0x4a, 0x01], "vpmovusqw xmmword [bp + si * 1 + 0x10], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x14, 0xca], "vpmovusqw xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x15, 0x0a], "vpmovusqd ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x15, 0x4a, 0x01], "vpmovusqd ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x15, 0xca], "vpmovusqd ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x20, 0x0a], "vpmovswb ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x20, 0x4a, 0x01], "vpmovswb ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x20, 0xca], "vpmovswb ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x21, 0x0a], "vpmovsdb xmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x21, 0x4a, 0x01], "vpmovsdb xmmword [bp + si * 1 + 0x10], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x21, 0xca], "vpmovsdb xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x22, 0x0a], "vpmovsqb qword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x22, 0x4a, 0x01], "vpmovsqb qword [bp + si * 1 + 0x8], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x22, 0xca], "vpmovsqb xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x23, 0x0a], "vpmovsdw ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x23, 0x4a, 0x01], "vpmovsdw ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x23, 0xca], "vpmovsdw ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x24, 0x0a], "vpmovsqw xmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x24, 0x4a, 0x01], "vpmovsqw xmmword [bp + si * 1 + 0x10], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x24, 0xca], "vpmovsqw xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x25, 0x0a], "vpmovsqd ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x25, 0x4a, 0x01], "vpmovsqd ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x25, 0xca], "vpmovsqd ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x26, 0x0a], "vptestnmb k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x26, 0x4a, 0x01], "vptestnmb k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x26, 0xca], "vptestnmb k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x27, 0x0a], "vptestnmd k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x27, 0x4a, 0x01], "vptestnmd k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x27, 0xca], "vptestnmd k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x28, 0xca], "vpmovm2b zmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x29, 0xca], "vpmovb2m k1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x30, 0x0a], "vpmovwb ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x30, 0x4a, 0x01], "vpmovwb ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x30, 0xca], "vpmovwb ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x31, 0x0a], "vpmovdb xmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x31, 0x4a, 0x01], "vpmovdb xmmword [bp + si * 1 + 0x10], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x31, 0xca], "vpmovdb xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x32, 0x0a], "vpmovqb qword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x32, 0x4a, 0x01], "vpmovqb qword [bp + si * 1 + 0x8], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x32, 0xca], "vpmovqb xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x33, 0x0a], "vpmovdw ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x33, 0x4a, 0x01], "vpmovdw ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x33, 0xca], "vpmovdw ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x34, 0x0a], "vpmovqw xmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x34, 0x4a, 0x01], "vpmovqw xmmword [bp + si * 1 + 0x10], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x34, 0xca], "vpmovqw xmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x35, 0x0a], "vpmovqd ymmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x35, 0x4a, 0x01], "vpmovqd ymmword [bp + si * 1 + 0x20], zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x35, 0xca], "vpmovqd ymm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x38, 0xca], "vpmovm2d zmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x39, 0xca], "vpmovd2m k1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x3a, 0xca], "vpbroadcastmw2d zmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x52, 0x0a], "vdpbf16ps zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x52, 0xca], "vdpbf16ps zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x72, 0x0a], "vcvtneps2bf16 ymm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x48, 0x72, 0xca], "vcvtneps2bf16 ymm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x10, 0x0a], "vpmovuswb ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x10, 0x4a, 0x01], "vpmovuswb ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x10, 0xca], "vpmovuswb ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x11, 0x0a], "vpmovusdb xmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x11, 0x4a, 0x01], "vpmovusdb xmmword [bp + si * 1 + 0x10]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x11, 0xca], "vpmovusdb xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x12, 0x0a], "vpmovusqb qword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x12, 0x4a, 0x01], "vpmovusqb qword [bp + si * 1 + 0x8]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x12, 0xca], "vpmovusqb xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x13, 0x0a], "vpmovusdw ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x13, 0x4a, 0x01], "vpmovusdw ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x13, 0xca], "vpmovusdw ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x14, 0x0a], "vpmovusqw xmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x14, 0x4a, 0x01], "vpmovusqw xmmword [bp + si * 1 + 0x10]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x14, 0xca], "vpmovusqw xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x15, 0x0a], "vpmovusqd ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x15, 0x4a, 0x01], "vpmovusqd ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x15, 0xca], "vpmovusqd ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x20, 0x0a], "vpmovswb ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x20, 0x4a, 0x01], "vpmovswb ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x20, 0xca], "vpmovswb ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x21, 0x0a], "vpmovsdb xmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x21, 0x4a, 0x01], "vpmovsdb xmmword [bp + si * 1 + 0x10]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x21, 0xca], "vpmovsdb xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x22, 0x0a], "vpmovsqb qword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x22, 0x4a, 0x01], "vpmovsqb qword [bp + si * 1 + 0x8]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x22, 0xca], "vpmovsqb xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x23, 0x0a], "vpmovsdw ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x23, 0x4a, 0x01], "vpmovsdw ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x23, 0xca], "vpmovsdw ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x24, 0x0a], "vpmovsqw xmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x24, 0x4a, 0x01], "vpmovsqw xmmword [bp + si * 1 + 0x10]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x24, 0xca], "vpmovsqw xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x25, 0x0a], "vpmovsqd ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x25, 0x4a, 0x01], "vpmovsqd ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x25, 0xca], "vpmovsqd ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x26, 0x0a], "vptestnmb k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x26, 0x4a, 0x01], "vptestnmb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x26, 0xca], "vptestnmb k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x27, 0x0a], "vptestnmd k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x27, 0xca], "vptestnmd k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x30, 0x0a], "vpmovwb ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x30, 0x4a, 0x01], "vpmovwb ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x30, 0xca], "vpmovwb ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x31, 0x0a], "vpmovdb xmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x31, 0x4a, 0x01], "vpmovdb xmmword [bp + si * 1 + 0x10]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x31, 0xca], "vpmovdb xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x32, 0x0a], "vpmovqb qword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x32, 0x4a, 0x01], "vpmovqb qword [bp + si * 1 + 0x8]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x32, 0xca], "vpmovqb xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x33, 0x0a], "vpmovdw ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x33, 0x4a, 0x01], "vpmovdw ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x33, 0xca], "vpmovdw ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x34, 0x0a], "vpmovqw xmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x34, 0x4a, 0x01], "vpmovqw xmmword [bp + si * 1 + 0x10]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x34, 0xca], "vpmovqw xmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x35, 0x0a], "vpmovqd ymmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x35, 0x4a, 0x01], "vpmovqd ymmword [bp + si * 1 + 0x20]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x35, 0xca], "vpmovqd ymm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x52, 0x0a], "vdpbf16ps zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x52, 0xca], "vdpbf16ps zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x4d, 0x72, 0xca], "vcvtneps2bf16 ymm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x58, 0x27, 0x0a], "vptestnmd k1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x58, 0x27, 0x4a, 0x01], "vptestnmd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x58, 0x52, 0x0a], "vdpbf16ps zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x58, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x58, 0x72, 0x0a], "vcvtneps2bf16 ymm1, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x58, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x5d, 0x27, 0x0a], "vptestnmd k1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x5d, 0x27, 0x4a, 0x01], "vptestnmd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x5d, 0x52, 0x0a], "vdpbf16ps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x5d, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x5d, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x5d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x10, 0xca], "vpmovuswb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x11, 0xca], "vpmovusdb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x12, 0xca], "vpmovusqb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x13, 0xca], "vpmovusdw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x14, 0xca], "vpmovusqw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x15, 0xca], "vpmovusqd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x20, 0xca], "vpmovswb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x21, 0xca], "vpmovsdb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x22, 0xca], "vpmovsqb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x23, 0xca], "vpmovsdw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x24, 0xca], "vpmovsqw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x25, 0xca], "vpmovsqd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x30, 0xca], "vpmovwb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x31, 0xca], "vpmovdb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x32, 0xca], "vpmovqb xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x33, 0xca], "vpmovdw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x34, 0xca], "vpmovqw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x35, 0xca], "vpmovqd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x52, 0xca], "vdpbf16ps xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x8d, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x9d, 0x52, 0x0a], "vdpbf16ps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x9d, 0x52, 0x4a, 0x01], "vdpbf16ps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x9d, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x9d, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x10, 0xca], "vpmovuswb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x11, 0xca], "vpmovusdb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x12, 0xca], "vpmovusqb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x13, 0xca], "vpmovusdw xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x14, 0xca], "vpmovusqw xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x15, 0xca], "vpmovusqd xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x20, 0xca], "vpmovswb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x21, 0xca], "vpmovsdb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x22, 0xca], "vpmovsqb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x23, 0xca], "vpmovsdw xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x24, 0xca], "vpmovsqw xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x25, 0xca], "vpmovsqd xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x30, 0xca], "vpmovwb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x31, 0xca], "vpmovdb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x32, 0xca], "vpmovqb xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x33, 0xca], "vpmovdw xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x34, 0xca], "vpmovqw xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x35, 0xca], "vpmovqd xmm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x52, 0x0a], "vdpbf16ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x52, 0xca], "vdpbf16ps ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xad, 0x72, 0xca], "vcvtneps2bf16 xmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xbd, 0x52, 0x0a], "vdpbf16ps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xbd, 0x52, 0x4a, 0x01], "vdpbf16ps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xbd, 0x72, 0x0a], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xbd, 0x72, 0x4a, 0x01], "vcvtneps2bf16 xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x10, 0xca], "vpmovuswb ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x11, 0xca], "vpmovusdb xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x12, 0xca], "vpmovusqb xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x13, 0xca], "vpmovusdw ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x14, 0xca], "vpmovusqw xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x15, 0xca], "vpmovusqd ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x20, 0xca], "vpmovswb ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x21, 0xca], "vpmovsdb xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x22, 0xca], "vpmovsqb xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x23, 0xca], "vpmovsdw ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x24, 0xca], "vpmovsqw xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x25, 0xca], "vpmovsqd ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x30, 0xca], "vpmovwb ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x31, 0xca], "vpmovdb xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x32, 0xca], "vpmovqb xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x33, 0xca], "vpmovdw ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x34, 0xca], "vpmovqw xmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x35, 0xca], "vpmovqd ymm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x52, 0x0a], "vdpbf16ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x52, 0xca], "vdpbf16ps zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xcd, 0x72, 0xca], "vcvtneps2bf16 ymm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xdd, 0x52, 0x0a], "vdpbf16ps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xdd, 0x52, 0x4a, 0x01], "vdpbf16ps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xdd, 0x72, 0x0a], "vcvtneps2bf16 ymm1{k5}{z}, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0xdd, 0x72, 0x4a, 0x01], "vcvtneps2bf16 ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0x0a], "vp2intersectd k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0x4a, 0x01], "vp2intersectd k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0xca], "vp2intersectd k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x72, 0xca], "vcvtne2ps2bf16 xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x0d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x0d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x0d, 0x72, 0xca], "vcvtne2ps2bf16 xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x18, 0x68, 0x0a], "vp2intersectd k1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x18, 0x68, 0x4a, 0x01], "vp2intersectd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x18, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x18, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x1d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x1d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x68, 0x0a], "vp2intersectd k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x68, 0x4a, 0x01], "vp2intersectd k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x68, 0xca], "vp2intersectd k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x72, 0xca], "vcvtne2ps2bf16 ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x9b, 0x0a], "v4fmaddss xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0x9b, 0x4a, 0x01], "v4fmaddss xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0xab, 0x0a], "v4fnmaddss xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x28, 0xab, 0x4a, 0x01], "v4fnmaddss xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0x72, 0xca], "vcvtne2ps2bf16 ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0x9b, 0x0a], "v4fmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0x9b, 0x4a, 0x01], "v4fmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0xab, 0x0a], "v4fnmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x2d, 0xab, 0x4a, 0x01], "v4fnmaddss xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x38, 0x68, 0x0a], "vp2intersectd k1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x38, 0x68, 0x4a, 0x01], "vp2intersectd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x38, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x38, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x3d, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x3d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x52, 0x0a], "vp4dpwssd zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x52, 0x4a, 0x01], "vp4dpwssd zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x53, 0x0a], "vp4dpwssds zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x53, 0x4a, 0x01], "vp4dpwssds zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x68, 0x0a], "vp2intersectd k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x68, 0x4a, 0x01], "vp2intersectd k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x68, 0xca], "vp2intersectd k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x72, 0xca], "vcvtne2ps2bf16 zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x9a, 0x0a], "v4fmaddps zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0x9a, 0x4a, 0x01], "v4fmaddps zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0xaa, 0x0a], "v4fnmaddps zmm1, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x48, 0xaa, 0x4a, 0x01], "v4fnmaddps zmm1, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x52, 0x0a], "vp4dpwssd zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x52, 0x4a, 0x01], "vp4dpwssd zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x53, 0x0a], "vp4dpwssds zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x53, 0x4a, 0x01], "vp4dpwssds zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x72, 0xca], "vcvtne2ps2bf16 zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x9a, 0x0a], "v4fmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0x9a, 0x4a, 0x01], "v4fmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0xaa, 0x0a], "v4fnmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x4d, 0xaa, 0x4a, 0x01], "v4fnmaddps zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x58, 0x68, 0x0a], "vp2intersectd k1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x58, 0x68, 0x4a, 0x01], "vp2intersectd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x58, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x58, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x5d, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x5d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x8d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x8d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x8d, 0x72, 0xca], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x9d, 0x72, 0x0a], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0x9d, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0x72, 0xca], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0x9b, 0x0a], "v4fmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0x9b, 0x4a, 0x01], "v4fmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0xab, 0x0a], "v4fnmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xad, 0xab, 0x4a, 0x01], "v4fnmaddss xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xbd, 0x72, 0x0a], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xbd, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x52, 0x0a], "vp4dpwssd zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x52, 0x4a, 0x01], "vp4dpwssd zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x53, 0x0a], "vp4dpwssds zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x53, 0x4a, 0x01], "vp4dpwssds zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x72, 0xca], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x9a, 0x0a], "v4fmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0x9a, 0x4a, 0x01], "v4fmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0xaa, 0x0a], "v4fnmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xcd, 0xaa, 0x4a, 0x01], "v4fnmaddps zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xdd, 0x72, 0x0a], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0x7f, 0xdd, 0x72, 0x4a, 0x01], "vcvtne2ps2bf16 zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x00, 0x0a], "vpshufb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x00, 0x4a, 0x01], "vpshufb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x00, 0xca], "vpshufb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x04, 0x0a], "vpmaddubsw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x04, 0x4a, 0x01], "vpmaddubsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x04, 0xca], "vpmaddubsw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x0b, 0x0a], "vpmulhrsw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x0b, 0x4a, 0x01], "vpmulhrsw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x0b, 0xca], "vpmulhrsw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x0d, 0x0a], "vpermilpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x0d, 0x4a, 0x01], "vpermilpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x0d, 0xca], "vpermilpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x10, 0x0a], "vpsrlvw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x10, 0x4a, 0x01], "vpsrlvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x10, 0xca], "vpsrlvw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x11, 0x0a], "vpsravw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x11, 0x4a, 0x01], "vpsravw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x11, 0xca], "vpsravw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x12, 0x0a], "vpsllvw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x12, 0x4a, 0x01], "vpsllvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x12, 0xca], "vpsllvw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x14, 0x0a], "vprorvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x14, 0x4a, 0x01], "vprorvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x14, 0xca], "vprorvq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x15, 0x0a], "vprolvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x15, 0x4a, 0x01], "vprolvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x15, 0xca], "vprolvq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1c, 0x0a], "vpabsb xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1c, 0x4a, 0x01], "vpabsb xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1c, 0xca], "vpabsb xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1d, 0x0a], "vpabsw xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1d, 0x4a, 0x01], "vpabsw xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1d, 0xca], "vpabsw xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1f, 0x0a], "vpabsq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1f, 0x4a, 0x01], "vpabsq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x1f, 0xca], "vpabsq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x20, 0x0a], "vpmovsxbw xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x20, 0x4a, 0x01], "vpmovsxbw xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x20, 0xca], "vpmovsxbw xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x21, 0x0a], "vpmovsxbd xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x21, 0x4a, 0x01], "vpmovsxbd xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x21, 0xca], "vpmovsxbd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x22, 0x0a], "vpmovsxbq xmm1, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x22, 0x4a, 0x01], "vpmovsxbq xmm1, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x22, 0xca], "vpmovsxbq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x23, 0x0a], "vpmovsxwd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x23, 0x4a, 0x01], "vpmovsxwd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x23, 0xca], "vpmovsxwd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x24, 0x0a], "vpmovsxwq xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x24, 0x4a, 0x01], "vpmovsxwq xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x24, 0xca], "vpmovsxwq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x26, 0x0a], "vptestmw k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x26, 0x4a, 0x01], "vptestmw k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x26, 0xca], "vptestmw k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x27, 0x0a], "vptestmq k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x27, 0x4a, 0x01], "vptestmq k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x27, 0xca], "vptestmq k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x28, 0x0a], "vpmuldq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x28, 0x4a, 0x01], "vpmuldq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x28, 0xca], "vpmuldq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x29, 0x0a], "vpcmpeqq k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x29, 0x4a, 0x01], "vpcmpeqq k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x29, 0xca], "vpcmpeqq k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x2c, 0x0a], "vscalefpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x2c, 0x4a, 0x01], "vscalefpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x2c, 0xca], "vscalefpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x30, 0x0a], "vpmovzxbw xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x30, 0x4a, 0x01], "vpmovzxbw xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x30, 0xca], "vpmovzxbw xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x31, 0x0a], "vpmovzxbd xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x31, 0x4a, 0x01], "vpmovzxbd xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x31, 0xca], "vpmovzxbd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x32, 0x0a], "vpmovzxbq xmm1, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x32, 0x4a, 0x01], "vpmovzxbq xmm1, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x32, 0xca], "vpmovzxbq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x33, 0x0a], "vpmovzxwd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x33, 0x4a, 0x01], "vpmovzxwd xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x33, 0xca], "vpmovzxwd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x34, 0x0a], "vpmovzxwq xmm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x34, 0x4a, 0x01], "vpmovzxwq xmm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x34, 0xca], "vpmovzxwq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x37, 0x0a], "vpcmpgtq k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x37, 0x4a, 0x01], "vpcmpgtq k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x37, 0xca], "vpcmpgtq k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x38, 0x0a], "vpminsb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x38, 0x4a, 0x01], "vpminsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x38, 0xca], "vpminsb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x39, 0x0a], "vpminsq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x39, 0x4a, 0x01], "vpminsq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x39, 0xca], "vpminsq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3a, 0x0a], "vpminuw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3a, 0x4a, 0x01], "vpminuw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3a, 0xca], "vpminuw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3b, 0x0a], "vpminuq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3b, 0x4a, 0x01], "vpminuq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3b, 0xca], "vpminuq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3c, 0x0a], "vpmaxsb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3c, 0x4a, 0x01], "vpmaxsb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3c, 0xca], "vpmaxsb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3d, 0x0a], "vpmaxsq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3d, 0xca], "vpmaxsq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3e, 0x0a], "vpmaxuw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3e, 0x4a, 0x01], "vpmaxuw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3e, 0xca], "vpmaxuw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3f, 0x0a], "vpmaxuq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x3f, 0xca], "vpmaxuq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x40, 0x0a], "vpmullq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x40, 0x4a, 0x01], "vpmullq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x40, 0xca], "vpmullq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x42, 0x0a], "vgetexppd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x42, 0x4a, 0x01], "vgetexppd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x42, 0xca], "vgetexppd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x44, 0x0a], "vplzcntq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x44, 0x4a, 0x01], "vplzcntq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x44, 0xca], "vplzcntq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x45, 0x0a], "vpsrlvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x45, 0x4a, 0x01], "vpsrlvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x45, 0xca], "vpsrlvq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x46, 0x0a], "vpsravq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x46, 0x4a, 0x01], "vpsravq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x46, 0xca], "vpsravq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x47, 0x0a], "vpsllvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x47, 0x4a, 0x01], "vpsllvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x47, 0xca], "vpsllvq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x4c, 0x0a], "vrcp14pd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x4c, 0xca], "vrcp14pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x4e, 0x0a], "vrsqrt14pd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x4e, 0xca], "vrsqrt14pd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x54, 0x0a], "vpopcntw xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x54, 0x4a, 0x01], "vpopcntw xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x54, 0xca], "vpopcntw xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x55, 0x0a], "vpopcntq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x55, 0x4a, 0x01], "vpopcntq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x55, 0xca], "vpopcntq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x59, 0x0a], "vpbroadcastq xmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x59, 0x4a, 0x01], "vpbroadcastq xmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x59, 0xca], "vpbroadcastq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x62, 0x0a], "vpexpandw xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x62, 0x4a, 0x01], "vpexpandw xmm1, xmmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x62, 0xca], "vpexpandw xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x63, 0x0a], "vpcompressw xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x63, 0x4a, 0x01], "vpcompressw xmmword [bp + si * 1 + 0x2], xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x63, 0xca], "vpcompressw xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x64, 0x0a], "vpblendmq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x64, 0x4a, 0x01], "vpblendmq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x64, 0xca], "vpblendmq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x65, 0x0a], "vblendmpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x65, 0x4a, 0x01], "vblendmpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x65, 0xca], "vblendmpd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x66, 0x0a], "vpblendmw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x66, 0x4a, 0x01], "vpblendmw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x66, 0xca], "vpblendmw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x70, 0x0a], "vpshldvw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x70, 0x4a, 0x01], "vpshldvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x70, 0xca], "vpshldvw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x71, 0x0a], "vpshldvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x71, 0x4a, 0x01], "vpshldvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x71, 0xca], "vpshldvq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x72, 0x0a], "vpshrdvw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x72, 0x4a, 0x01], "vpshrdvw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x72, 0xca], "vpshrdvw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x73, 0x0a], "vpshrdvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x73, 0x4a, 0x01], "vpshrdvq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x73, 0xca], "vpshrdvq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x75, 0x0a], "vpermi2w xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x75, 0x4a, 0x01], "vpermi2w xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x75, 0xca], "vpermi2w xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x76, 0x0a], "vpermi2q xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x76, 0x4a, 0x01], "vpermi2q xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x76, 0xca], "vpermi2q xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x77, 0x0a], "vpermi2pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x77, 0x4a, 0x01], "vpermi2pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x77, 0xca], "vpermi2pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7c, 0xca], "vpbroadcastd xmm1, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7d, 0x0a], "vpermt2w xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7d, 0x4a, 0x01], "vpermt2w xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7d, 0xca], "vpermt2w xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7e, 0x0a], "vpermt2q xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7e, 0x4a, 0x01], "vpermt2q xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7e, 0xca], "vpermt2q xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7f, 0x0a], "vpermt2pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x7f, 0xca], "vpermt2pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x83, 0x0a], "vpmultishiftqb xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x83, 0xca], "vpmultishiftqb xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x88, 0x0a], "vexpandpd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x88, 0x4a, 0x01], "vexpandpd xmm1, xmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x88, 0xca], "vexpandpd xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x89, 0x0a], "vpexpandq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x89, 0x4a, 0x01], "vpexpandq xmm1, xmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x89, 0xca], "vpexpandq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8a, 0x0a], "vcompresspd xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8a, 0x4a, 0x01], "vcompresspd xmmword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8a, 0xca], "vcompresspd xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8b, 0x0a], "vpcompressq xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8b, 0x4a, 0x01], "vpcompressq xmmword [bp + si * 1 + 0x8], xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8b, 0xca], "vpcompressq xmm2, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8d, 0x0a], "vpermw xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8d, 0x4a, 0x01], "vpermw xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x8d, 0xca], "vpermw xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x96, 0x0a], "vfmaddsub132pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x96, 0xca], "vfmaddsub132pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x97, 0x0a], "vfmsubadd132pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x97, 0xca], "vfmsubadd132pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x98, 0x0a], "vfmadd132pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x98, 0xca], "vfmadd132pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9a, 0x0a], "vfmsub132pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9a, 0xca], "vfmsub132pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9c, 0x0a], "vfnmadd132pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9c, 0xca], "vfnmadd132pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9e, 0x0a], "vfnmsub132pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0x9e, 0xca], "vfnmsub132pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa6, 0x0a], "vfmaddsub213pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa6, 0xca], "vfmaddsub213pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa7, 0x0a], "vfmsubadd213pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa7, 0xca], "vfmsubadd213pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa8, 0x0a], "vfmadd213pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xa8, 0xca], "vfmadd213pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xaa, 0x0a], "vfmsub213pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xaa, 0xca], "vfmsub213pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xac, 0x0a], "vfnmadd213pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xac, 0xca], "vfnmadd213pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xae, 0x0a], "vfnmsub213pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xae, 0xca], "vfnmsub213pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb4, 0x0a], "vpmadd52luq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb4, 0xca], "vpmadd52luq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb5, 0x0a], "vpmadd52huq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb5, 0xca], "vpmadd52huq xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb6, 0x0a], "vfmaddsub231pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb6, 0xca], "vfmaddsub231pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb7, 0x0a], "vfmsubadd231pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb7, 0xca], "vfmsubadd231pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb8, 0x0a], "vfmadd231pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xb8, 0xca], "vfmadd231pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xba, 0x0a], "vfmsub231pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xba, 0xca], "vfmsub231pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xbc, 0x0a], "vfnmadd231pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xbc, 0xca], "vfnmadd231pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xbe, 0x0a], "vfnmsub231pd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xbe, 0xca], "vfnmsub231pd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xc4, 0x0a], "vpconflictq xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xc4, 0x4a, 0x01], "vpconflictq xmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xc4, 0xca], "vpconflictq xmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdc, 0x0a], "vaesenc xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdc, 0x4a, 0x01], "vaesenc xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdc, 0xca], "vaesenc xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdd, 0x0a], "vaesenclast xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdd, 0x4a, 0x01], "vaesenclast xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdd, 0xca], "vaesenclast xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xde, 0x0a], "vaesdec xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xde, 0x4a, 0x01], "vaesdec xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xde, 0xca], "vaesdec xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdf, 0x0a], "vaesdeclast xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdf, 0x4a, 0x01], "vaesdeclast xmm1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x08, 0xdf, 0xca], "vaesdeclast xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x00, 0x0a], "vpshufb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x00, 0x4a, 0x01], "vpshufb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x00, 0xca], "vpshufb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x04, 0x0a], "vpmaddubsw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x04, 0x4a, 0x01], "vpmaddubsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x04, 0xca], "vpmaddubsw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x0b, 0x0a], "vpmulhrsw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x0b, 0x4a, 0x01], "vpmulhrsw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x0b, 0xca], "vpmulhrsw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x0d, 0x0a], "vpermilpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x0d, 0xca], "vpermilpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x10, 0x0a], "vpsrlvw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x10, 0x4a, 0x01], "vpsrlvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x10, 0xca], "vpsrlvw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x11, 0x0a], "vpsravw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x11, 0x4a, 0x01], "vpsravw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x11, 0xca], "vpsravw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x12, 0x0a], "vpsllvw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x12, 0x4a, 0x01], "vpsllvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x12, 0xca], "vpsllvw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x14, 0x0a], "vprorvq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x14, 0xca], "vprorvq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x15, 0x0a], "vprolvq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x15, 0xca], "vprolvq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1c, 0x0a], "vpabsb xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1c, 0x4a, 0x01], "vpabsb xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1c, 0xca], "vpabsb xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1d, 0x0a], "vpabsw xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1d, 0x4a, 0x01], "vpabsw xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1d, 0xca], "vpabsw xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1f, 0x0a], "vpabsq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x1f, 0xca], "vpabsq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x20, 0x0a], "vpmovsxbw xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x20, 0x4a, 0x01], "vpmovsxbw xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x20, 0xca], "vpmovsxbw xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x21, 0x0a], "vpmovsxbd xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x21, 0x4a, 0x01], "vpmovsxbd xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x21, 0xca], "vpmovsxbd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x22, 0x0a], "vpmovsxbq xmm1{k5}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x22, 0x4a, 0x01], "vpmovsxbq xmm1{k5}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x22, 0xca], "vpmovsxbq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x23, 0x0a], "vpmovsxwd xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x23, 0x4a, 0x01], "vpmovsxwd xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x23, 0xca], "vpmovsxwd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x24, 0x0a], "vpmovsxwq xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x24, 0x4a, 0x01], "vpmovsxwq xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x24, 0xca], "vpmovsxwq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x26, 0x0a], "vptestmw k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x26, 0x4a, 0x01], "vptestmw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x26, 0xca], "vptestmw k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x27, 0x0a], "vptestmq k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x27, 0xca], "vptestmq k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x28, 0x0a], "vpmuldq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x28, 0xca], "vpmuldq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x29, 0x0a], "vpcmpeqq k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x29, 0xca], "vpcmpeqq k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x2c, 0x0a], "vscalefpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x2c, 0xca], "vscalefpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x30, 0x0a], "vpmovzxbw xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x30, 0x4a, 0x01], "vpmovzxbw xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x30, 0xca], "vpmovzxbw xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x31, 0x0a], "vpmovzxbd xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x31, 0x4a, 0x01], "vpmovzxbd xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x31, 0xca], "vpmovzxbd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x32, 0x0a], "vpmovzxbq xmm1{k5}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x32, 0x4a, 0x01], "vpmovzxbq xmm1{k5}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x32, 0xca], "vpmovzxbq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x33, 0x0a], "vpmovzxwd xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x33, 0x4a, 0x01], "vpmovzxwd xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x33, 0xca], "vpmovzxwd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x34, 0x0a], "vpmovzxwq xmm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x34, 0x4a, 0x01], "vpmovzxwq xmm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x34, 0xca], "vpmovzxwq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x37, 0x0a], "vpcmpgtq k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x37, 0xca], "vpcmpgtq k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x38, 0x0a], "vpminsb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x38, 0x4a, 0x01], "vpminsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x38, 0xca], "vpminsb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x39, 0x0a], "vpminsq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x39, 0xca], "vpminsq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3a, 0x0a], "vpminuw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3a, 0x4a, 0x01], "vpminuw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3a, 0xca], "vpminuw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3b, 0x0a], "vpminuq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3b, 0xca], "vpminuq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3c, 0x0a], "vpmaxsb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3c, 0x4a, 0x01], "vpmaxsb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3c, 0xca], "vpmaxsb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3d, 0xca], "vpmaxsq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3e, 0x0a], "vpmaxuw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3e, 0x4a, 0x01], "vpmaxuw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3e, 0xca], "vpmaxuw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x3f, 0xca], "vpmaxuq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x40, 0x0a], "vpmullq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x40, 0xca], "vpmullq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x42, 0x0a], "vgetexppd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x42, 0xca], "vgetexppd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x44, 0x0a], "vplzcntq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x44, 0xca], "vplzcntq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x45, 0x0a], "vpsrlvq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x45, 0xca], "vpsrlvq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x46, 0x0a], "vpsravq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x46, 0xca], "vpsravq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x47, 0x0a], "vpsllvq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x47, 0xca], "vpsllvq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x4c, 0xca], "vrcp14pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x4e, 0xca], "vrsqrt14pd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x54, 0x0a], "vpopcntw xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x54, 0x4a, 0x01], "vpopcntw xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x54, 0xca], "vpopcntw xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x55, 0x0a], "vpopcntq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x55, 0xca], "vpopcntq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x59, 0x0a], "vpbroadcastq xmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x59, 0x4a, 0x01], "vpbroadcastq xmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x59, 0xca], "vpbroadcastq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x62, 0x0a], "vpexpandw xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x62, 0x4a, 0x01], "vpexpandw xmm1{k5}, xmmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x62, 0xca], "vpexpandw xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x63, 0x0a], "vpcompressw xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x63, 0x4a, 0x01], "vpcompressw xmmword [bp + si * 1 + 0x2]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x63, 0xca], "vpcompressw xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x64, 0x0a], "vpblendmq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x64, 0xca], "vpblendmq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x65, 0x0a], "vblendmpd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x65, 0xca], "vblendmpd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x66, 0x0a], "vpblendmw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x66, 0x4a, 0x01], "vpblendmw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x66, 0xca], "vpblendmw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x70, 0x0a], "vpshldvw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x70, 0x4a, 0x01], "vpshldvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x70, 0xca], "vpshldvw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x71, 0x0a], "vpshldvq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x71, 0xca], "vpshldvq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x72, 0x0a], "vpshrdvw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x72, 0x4a, 0x01], "vpshrdvw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x72, 0xca], "vpshrdvw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x73, 0x0a], "vpshrdvq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x73, 0xca], "vpshrdvq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x75, 0x0a], "vpermi2w xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x75, 0x4a, 0x01], "vpermi2w xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x75, 0xca], "vpermi2w xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x76, 0x0a], "vpermi2q xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x76, 0xca], "vpermi2q xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x77, 0x0a], "vpermi2pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x77, 0xca], "vpermi2pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7c, 0xca], "vpbroadcastd xmm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7d, 0x0a], "vpermt2w xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7d, 0x4a, 0x01], "vpermt2w xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7d, 0xca], "vpermt2w xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7e, 0x0a], "vpermt2q xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7e, 0xca], "vpermt2q xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x7f, 0xca], "vpermt2pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x83, 0xca], "vpmultishiftqb xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x88, 0x0a], "vexpandpd xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x88, 0x4a, 0x01], "vexpandpd xmm1{k5}, xmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x88, 0xca], "vexpandpd xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x89, 0x0a], "vpexpandq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x89, 0x4a, 0x01], "vpexpandq xmm1{k5}, xmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x89, 0xca], "vpexpandq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8a, 0x0a], "vcompresspd xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8a, 0x4a, 0x01], "vcompresspd xmmword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8a, 0xca], "vcompresspd xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8b, 0x0a], "vpcompressq xmmword [bp + si * 1]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8b, 0x4a, 0x01], "vpcompressq xmmword [bp + si * 1 + 0x8]{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8b, 0xca], "vpcompressq xmm2{k5}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8d, 0x0a], "vpermw xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8d, 0x4a, 0x01], "vpermw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x8d, 0xca], "vpermw xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x96, 0xca], "vfmaddsub132pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x97, 0xca], "vfmsubadd132pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x98, 0xca], "vfmadd132pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9a, 0xca], "vfmsub132pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9c, 0xca], "vfnmadd132pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0x9e, 0xca], "vfnmsub132pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa6, 0xca], "vfmaddsub213pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa7, 0xca], "vfmsubadd213pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xa8, 0xca], "vfmadd213pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xaa, 0xca], "vfmsub213pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xac, 0xca], "vfnmadd213pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xae, 0xca], "vfnmsub213pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb4, 0xca], "vpmadd52luq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb5, 0xca], "vpmadd52huq xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb6, 0xca], "vfmaddsub231pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb7, 0xca], "vfmsubadd231pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xb8, 0xca], "vfmadd231pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xba, 0xca], "vfmsub231pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xbc, 0xca], "vfnmadd231pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xbe, 0xca], "vfnmsub231pd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xc4, 0x0a], "vpconflictq xmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0d, 0xc4, 0xca], "vpconflictq xmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x0d, 0x0a], "vpermilpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x0d, 0x4a, 0x01], "vpermilpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x14, 0x0a], "vprorvq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x14, 0x4a, 0x01], "vprorvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x15, 0x0a], "vprolvq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x15, 0x4a, 0x01], "vprolvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x1f, 0x0a], "vpabsq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x1f, 0x4a, 0x01], "vpabsq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x27, 0x0a], "vptestmq k1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x27, 0x4a, 0x01], "vptestmq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x28, 0x0a], "vpmuldq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x28, 0x4a, 0x01], "vpmuldq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x29, 0x0a], "vpcmpeqq k1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x29, 0x4a, 0x01], "vpcmpeqq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x2c, 0x0a], "vscalefpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x2c, 0x4a, 0x01], "vscalefpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x2c, 0xca], "vscalefpd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x2d, 0xca], "vscalefsd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x37, 0x0a], "vpcmpgtq k1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x37, 0x4a, 0x01], "vpcmpgtq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x39, 0x0a], "vpminsq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x39, 0x4a, 0x01], "vpminsq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x3b, 0x0a], "vpminuq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x3b, 0x4a, 0x01], "vpminuq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x3d, 0x0a], "vpmaxsq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x3f, 0x0a], "vpmaxuq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x40, 0x0a], "vpmullq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x40, 0x4a, 0x01], "vpmullq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x42, 0x0a], "vgetexppd xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x42, 0x4a, 0x01], "vgetexppd xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x44, 0x0a], "vplzcntq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x44, 0x4a, 0x01], "vplzcntq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x45, 0x0a], "vpsrlvq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x45, 0x4a, 0x01], "vpsrlvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x46, 0x0a], "vpsravq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x46, 0x4a, 0x01], "vpsravq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x47, 0x0a], "vpsllvq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x47, 0x4a, 0x01], "vpsllvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x4c, 0x0a], "vrcp14pd xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x4e, 0x0a], "vrsqrt14pd xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x55, 0x0a], "vpopcntq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x55, 0x4a, 0x01], "vpopcntq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x64, 0x0a], "vpblendmq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x64, 0x4a, 0x01], "vpblendmq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x65, 0x0a], "vblendmpd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x65, 0x4a, 0x01], "vblendmpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x71, 0x0a], "vpshldvq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x71, 0x4a, 0x01], "vpshldvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x73, 0x0a], "vpshrdvq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x73, 0x4a, 0x01], "vpshrdvq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x76, 0x0a], "vpermi2q xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x76, 0x4a, 0x01], "vpermi2q xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x77, 0x0a], "vpermi2pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x77, 0x4a, 0x01], "vpermi2pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x7e, 0x0a], "vpermt2q xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x7e, 0x4a, 0x01], "vpermt2q xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x7f, 0x0a], "vpermt2pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x83, 0x0a], "vpmultishiftqb xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x96, 0x0a], "vfmaddsub132pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x96, 0xca], "vfmaddsub132pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x97, 0x0a], "vfmsubadd132pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x97, 0xca], "vfmsubadd132pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x98, 0x0a], "vfmadd132pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x98, 0xca], "vfmadd132pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x99, 0xca], "vfmadd132sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9a, 0x0a], "vfmsub132pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9a, 0xca], "vfmsub132pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9b, 0xca], "vfmsub132sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9c, 0x0a], "vfnmadd132pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9c, 0xca], "vfnmadd132pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9d, 0xca], "vfnmadd132sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9e, 0x0a], "vfnmsub132pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9e, 0xca], "vfnmsub132pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0x9f, 0xca], "vfnmsub132sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa6, 0x0a], "vfmaddsub213pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa6, 0xca], "vfmaddsub213pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa7, 0x0a], "vfmsubadd213pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa7, 0xca], "vfmsubadd213pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa8, 0x0a], "vfmadd213pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa8, 0xca], "vfmadd213pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xa9, 0xca], "vfmadd213sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xaa, 0x0a], "vfmsub213pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xaa, 0xca], "vfmsub213pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xab, 0xca], "vfmsub213sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xac, 0x0a], "vfnmadd213pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xac, 0xca], "vfnmadd213pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xad, 0xca], "vfnmadd213sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xae, 0x0a], "vfnmsub213pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xae, 0xca], "vfnmsub213pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xaf, 0xca], "vfnmsub213sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb4, 0x0a], "vpmadd52luq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb5, 0x0a], "vpmadd52huq xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb6, 0x0a], "vfmaddsub231pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb6, 0xca], "vfmaddsub231pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb7, 0x0a], "vfmsubadd231pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb7, 0xca], "vfmsubadd231pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb8, 0x0a], "vfmadd231pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb8, 0xca], "vfmadd231pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xb9, 0xca], "vfmadd231sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xba, 0x0a], "vfmsub231pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xba, 0xca], "vfmsub231pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbb, 0xca], "vfmsub231sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbc, 0x0a], "vfnmadd231pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbc, 0xca], "vfnmadd231pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbd, 0xca], "vfnmadd231sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbe, 0x0a], "vfnmsub231pd xmm1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbe, 0xca], "vfnmsub231pd zmm1{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xbf, 0xca], "vfnmsub231sd xmm1{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xc4, 0x0a], "vpconflictq xmm1, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x18, 0xc4, 0x4a, 0x01], "vpconflictq xmm1, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x0d, 0x0a], "vpermilpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x14, 0x0a], "vprorvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x15, 0x0a], "vprolvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x1f, 0x0a], "vpabsq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x27, 0x0a], "vptestmq k1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x28, 0x0a], "vpmuldq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x29, 0x0a], "vpcmpeqq k1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x2c, 0x0a], "vscalefpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x2c, 0xca], "vscalefpd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x2d, 0xca], "vscalefsd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x37, 0x0a], "vpcmpgtq k1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x39, 0x0a], "vpminsq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x3b, 0x0a], "vpminuq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x40, 0x0a], "vpmullq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x42, 0x0a], "vgetexppd xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x44, 0x0a], "vplzcntq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x45, 0x0a], "vpsrlvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x46, 0x0a], "vpsravq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x47, 0x0a], "vpsllvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x55, 0x0a], "vpopcntq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x64, 0x0a], "vpblendmq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x65, 0x0a], "vblendmpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x71, 0x0a], "vpshldvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x73, 0x0a], "vpshrdvq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x76, 0x0a], "vpermi2q xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x77, 0x0a], "vpermi2pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x7e, 0x0a], "vpermt2q xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xc4, 0x0a], "vpconflictq xmm1{k5}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x1d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x00, 0x0a], "vpshufb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x00, 0x4a, 0x01], "vpshufb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x00, 0xca], "vpshufb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x04, 0x0a], "vpmaddubsw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x04, 0x4a, 0x01], "vpmaddubsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x04, 0xca], "vpmaddubsw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x0b, 0x0a], "vpmulhrsw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x0b, 0x4a, 0x01], "vpmulhrsw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x0b, 0xca], "vpmulhrsw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x0d, 0x0a], "vpermilpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x0d, 0x4a, 0x01], "vpermilpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x0d, 0xca], "vpermilpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x10, 0x0a], "vpsrlvw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x10, 0x4a, 0x01], "vpsrlvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x10, 0xca], "vpsrlvw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x11, 0x0a], "vpsravw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x11, 0x4a, 0x01], "vpsravw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x11, 0xca], "vpsravw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x12, 0x0a], "vpsllvw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x12, 0x4a, 0x01], "vpsllvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x12, 0xca], "vpsllvw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x14, 0x0a], "vprorvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x14, 0x4a, 0x01], "vprorvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x14, 0xca], "vprorvq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x15, 0x0a], "vprolvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x15, 0x4a, 0x01], "vprolvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x15, 0xca], "vprolvq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x16, 0x0a], "vpermpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x16, 0x4a, 0x01], "vpermpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x16, 0xca], "vpermpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x19, 0x0a], "vbroadcastsd ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x19, 0x4a, 0x01], "vbroadcastsd ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x19, 0xca], "vbroadcastsd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1a, 0x0a], "vbroadcastf64x2 ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1c, 0x0a], "vpabsb ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1c, 0x4a, 0x01], "vpabsb ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1c, 0xca], "vpabsb ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1d, 0x0a], "vpabsw ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1d, 0x4a, 0x01], "vpabsw ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1d, 0xca], "vpabsw ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1f, 0x0a], "vpabsq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1f, 0x4a, 0x01], "vpabsq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x1f, 0xca], "vpabsq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x20, 0x0a], "vpmovsxbw ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x20, 0x4a, 0x01], "vpmovsxbw ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x20, 0xca], "vpmovsxbw ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x21, 0x0a], "vpmovsxbd ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x21, 0x4a, 0x01], "vpmovsxbd ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x21, 0xca], "vpmovsxbd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x22, 0x0a], "vpmovsxbq ymm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x22, 0x4a, 0x01], "vpmovsxbq ymm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x22, 0xca], "vpmovsxbq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x23, 0x0a], "vpmovsxwd ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x23, 0x4a, 0x01], "vpmovsxwd ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x23, 0xca], "vpmovsxwd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x24, 0x0a], "vpmovsxwq ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x24, 0x4a, 0x01], "vpmovsxwq ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x24, 0xca], "vpmovsxwq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x26, 0x0a], "vptestmw k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x26, 0x4a, 0x01], "vptestmw k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x26, 0xca], "vptestmw k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x27, 0x0a], "vptestmq k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x27, 0x4a, 0x01], "vptestmq k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x27, 0xca], "vptestmq k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x28, 0x0a], "vpmuldq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x28, 0x4a, 0x01], "vpmuldq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x28, 0xca], "vpmuldq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x29, 0x0a], "vpcmpeqq k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x29, 0x4a, 0x01], "vpcmpeqq k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x29, 0xca], "vpcmpeqq k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x2c, 0x0a], "vscalefpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x2c, 0x4a, 0x01], "vscalefpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x2c, 0xca], "vscalefpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x2d, 0x0a], "vscalefsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x2d, 0x4a, 0x01], "vscalefsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x2d, 0xca], "vscalefsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x30, 0x0a], "vpmovzxbw ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x30, 0x4a, 0x01], "vpmovzxbw ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x30, 0xca], "vpmovzxbw ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x31, 0x0a], "vpmovzxbd ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x31, 0x4a, 0x01], "vpmovzxbd ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x31, 0xca], "vpmovzxbd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x32, 0x0a], "vpmovzxbq ymm1, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x32, 0x4a, 0x01], "vpmovzxbq ymm1, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x32, 0xca], "vpmovzxbq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x33, 0x0a], "vpmovzxwd ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x33, 0x4a, 0x01], "vpmovzxwd ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x33, 0xca], "vpmovzxwd ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x34, 0x0a], "vpmovzxwq ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x34, 0x4a, 0x01], "vpmovzxwq ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x34, 0xca], "vpmovzxwq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x36, 0x0a], "vpermq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x36, 0x4a, 0x01], "vpermq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x36, 0xca], "vpermq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x37, 0x0a], "vpcmpgtq k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x37, 0x4a, 0x01], "vpcmpgtq k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x37, 0xca], "vpcmpgtq k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x38, 0x0a], "vpminsb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x38, 0x4a, 0x01], "vpminsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x38, 0xca], "vpminsb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x39, 0x0a], "vpminsq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x39, 0x4a, 0x01], "vpminsq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x39, 0xca], "vpminsq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3a, 0x0a], "vpminuw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3a, 0x4a, 0x01], "vpminuw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3a, 0xca], "vpminuw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3b, 0x0a], "vpminuq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3b, 0x4a, 0x01], "vpminuq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3b, 0xca], "vpminuq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3c, 0x0a], "vpmaxsb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3c, 0x4a, 0x01], "vpmaxsb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3c, 0xca], "vpmaxsb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3d, 0x0a], "vpmaxsq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3d, 0xca], "vpmaxsq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3e, 0x0a], "vpmaxuw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3e, 0x4a, 0x01], "vpmaxuw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3e, 0xca], "vpmaxuw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3f, 0x0a], "vpmaxuq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x3f, 0xca], "vpmaxuq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x40, 0x0a], "vpmullq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x40, 0x4a, 0x01], "vpmullq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x40, 0xca], "vpmullq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x42, 0x0a], "vgetexppd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x42, 0x4a, 0x01], "vgetexppd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x42, 0xca], "vgetexppd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x43, 0x0a], "vgetexpsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x43, 0x4a, 0x01], "vgetexpsd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x43, 0xca], "vgetexpsd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x44, 0x0a], "vplzcntq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x44, 0x4a, 0x01], "vplzcntq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x44, 0xca], "vplzcntq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x45, 0x0a], "vpsrlvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x45, 0x4a, 0x01], "vpsrlvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x45, 0xca], "vpsrlvq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x46, 0x0a], "vpsravq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x46, 0x4a, 0x01], "vpsravq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x46, 0xca], "vpsravq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x47, 0x0a], "vpsllvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x47, 0x4a, 0x01], "vpsllvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x47, 0xca], "vpsllvq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4c, 0x0a], "vrcp14pd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4c, 0xca], "vrcp14pd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4d, 0x0a], "vrcp14sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4d, 0x4a, 0x01], "vrcp14sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4d, 0xca], "vrcp14sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4e, 0x0a], "vrsqrt14pd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4e, 0xca], "vrsqrt14pd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4f, 0x0a], "vrsqrt14sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4f, 0x4a, 0x01], "vrsqrt14sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x4f, 0xca], "vrsqrt14sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x54, 0x0a], "vpopcntw ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x54, 0x4a, 0x01], "vpopcntw ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x54, 0xca], "vpopcntw ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x55, 0x0a], "vpopcntq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x55, 0x4a, 0x01], "vpopcntq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x55, 0xca], "vpopcntq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x59, 0x0a], "vpbroadcastq ymm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x59, 0x4a, 0x01], "vpbroadcastq ymm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x59, 0xca], "vpbroadcastq ymm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x5a, 0x0a], "vbroadcasti64x2 ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 ymm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x62, 0x0a], "vpexpandw ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x62, 0x4a, 0x01], "vpexpandw ymm1, ymmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x62, 0xca], "vpexpandw ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x63, 0x0a], "vpcompressw ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x63, 0x4a, 0x01], "vpcompressw ymmword [bp + si * 1 + 0x2], ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x63, 0xca], "vpcompressw ymm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x64, 0x0a], "vpblendmq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x64, 0x4a, 0x01], "vpblendmq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x64, 0xca], "vpblendmq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x65, 0x0a], "vblendmpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x65, 0x4a, 0x01], "vblendmpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x65, 0xca], "vblendmpd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x66, 0x0a], "vpblendmw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x66, 0x4a, 0x01], "vpblendmw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x66, 0xca], "vpblendmw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x70, 0x0a], "vpshldvw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x70, 0x4a, 0x01], "vpshldvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x70, 0xca], "vpshldvw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x71, 0x0a], "vpshldvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x71, 0x4a, 0x01], "vpshldvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x71, 0xca], "vpshldvq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x72, 0x0a], "vpshrdvw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x72, 0x4a, 0x01], "vpshrdvw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x72, 0xca], "vpshrdvw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x73, 0x0a], "vpshrdvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x73, 0x4a, 0x01], "vpshrdvq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x73, 0xca], "vpshrdvq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x75, 0x0a], "vpermi2w ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x75, 0x4a, 0x01], "vpermi2w ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x75, 0xca], "vpermi2w ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x76, 0x0a], "vpermi2q ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x76, 0x4a, 0x01], "vpermi2q ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x76, 0xca], "vpermi2q ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x77, 0x0a], "vpermi2pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x77, 0x4a, 0x01], "vpermi2pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x77, 0xca], "vpermi2pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7c, 0xca], "vpbroadcastd ymm1, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7d, 0x0a], "vpermt2w ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7d, 0x4a, 0x01], "vpermt2w ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7d, 0xca], "vpermt2w ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7e, 0x0a], "vpermt2q ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7e, 0x4a, 0x01], "vpermt2q ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7e, 0xca], "vpermt2q ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7f, 0x0a], "vpermt2pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x7f, 0xca], "vpermt2pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x83, 0x0a], "vpmultishiftqb ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x83, 0xca], "vpmultishiftqb ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x88, 0x0a], "vexpandpd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x88, 0x4a, 0x01], "vexpandpd ymm1, ymmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x88, 0xca], "vexpandpd ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x89, 0x0a], "vpexpandq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x89, 0x4a, 0x01], "vpexpandq ymm1, ymmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x89, 0xca], "vpexpandq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8a, 0x0a], "vcompresspd ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8a, 0x4a, 0x01], "vcompresspd ymmword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8a, 0xca], "vcompresspd ymm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8b, 0x0a], "vpcompressq ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8b, 0x4a, 0x01], "vpcompressq ymmword [bp + si * 1 + 0x8], ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8b, 0xca], "vpcompressq ymm2, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8d, 0x0a], "vpermw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8d, 0x4a, 0x01], "vpermw ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x8d, 0xca], "vpermw ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x96, 0x0a], "vfmaddsub132pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x96, 0xca], "vfmaddsub132pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x97, 0x0a], "vfmsubadd132pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x97, 0xca], "vfmsubadd132pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x98, 0x0a], "vfmadd132pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x98, 0xca], "vfmadd132pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x99, 0x0a], "vfmadd132sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x99, 0x4a, 0x01], "vfmadd132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x99, 0xca], "vfmadd132sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9a, 0x0a], "vfmsub132pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9a, 0xca], "vfmsub132pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9b, 0x0a], "vfmsub132sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9b, 0x4a, 0x01], "vfmsub132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9b, 0xca], "vfmsub132sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9c, 0x0a], "vfnmadd132pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9c, 0xca], "vfnmadd132pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9d, 0x0a], "vfnmadd132sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9d, 0x4a, 0x01], "vfnmadd132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9d, 0xca], "vfnmadd132sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9e, 0x0a], "vfnmsub132pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9e, 0xca], "vfnmsub132pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9f, 0x0a], "vfnmsub132sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9f, 0x4a, 0x01], "vfnmsub132sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0x9f, 0xca], "vfnmsub132sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa6, 0x0a], "vfmaddsub213pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa6, 0xca], "vfmaddsub213pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa7, 0x0a], "vfmsubadd213pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa7, 0xca], "vfmsubadd213pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa8, 0x0a], "vfmadd213pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa8, 0xca], "vfmadd213pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa9, 0x0a], "vfmadd213sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa9, 0x4a, 0x01], "vfmadd213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xa9, 0xca], "vfmadd213sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xaa, 0x0a], "vfmsub213pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xaa, 0xca], "vfmsub213pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xab, 0x0a], "vfmsub213sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xab, 0x4a, 0x01], "vfmsub213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xab, 0xca], "vfmsub213sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xac, 0x0a], "vfnmadd213pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xac, 0xca], "vfnmadd213pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xad, 0x0a], "vfnmadd213sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xad, 0x4a, 0x01], "vfnmadd213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xad, 0xca], "vfnmadd213sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xae, 0x0a], "vfnmsub213pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xae, 0xca], "vfnmsub213pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xaf, 0x0a], "vfnmsub213sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xaf, 0x4a, 0x01], "vfnmsub213sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xaf, 0xca], "vfnmsub213sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb4, 0x0a], "vpmadd52luq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb4, 0xca], "vpmadd52luq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb5, 0x0a], "vpmadd52huq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb5, 0xca], "vpmadd52huq ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb6, 0x0a], "vfmaddsub231pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb6, 0xca], "vfmaddsub231pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb7, 0x0a], "vfmsubadd231pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb7, 0xca], "vfmsubadd231pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb8, 0x0a], "vfmadd231pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb8, 0xca], "vfmadd231pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb9, 0x0a], "vfmadd231sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb9, 0x4a, 0x01], "vfmadd231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xb9, 0xca], "vfmadd231sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xba, 0x0a], "vfmsub231pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xba, 0xca], "vfmsub231pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbb, 0x0a], "vfmsub231sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbb, 0x4a, 0x01], "vfmsub231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbb, 0xca], "vfmsub231sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbc, 0x0a], "vfnmadd231pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbc, 0xca], "vfnmadd231pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbd, 0x0a], "vfnmadd231sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbd, 0x4a, 0x01], "vfnmadd231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbd, 0xca], "vfnmadd231sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbe, 0x0a], "vfnmsub231pd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbe, 0xca], "vfnmsub231pd ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbf, 0x0a], "vfnmsub231sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbf, 0x4a, 0x01], "vfnmsub231sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xbf, 0xca], "vfnmsub231sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xc4, 0x0a], "vpconflictq ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xc4, 0x4a, 0x01], "vpconflictq ymm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xc4, 0xca], "vpconflictq ymm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xcb, 0x0a], "vrcp28sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xcb, 0x4a, 0x01], "vrcp28sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xcb, 0xca], "vrcp28sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xcd, 0x0a], "vrsqrt28sd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xcd, 0x4a, 0x01], "vrsqrt28sd xmm1, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xcd, 0xca], "vrsqrt28sd xmm1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdc, 0x0a], "vaesenc ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdc, 0x4a, 0x01], "vaesenc ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdc, 0xca], "vaesenc ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdd, 0x0a], "vaesenclast ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdd, 0x4a, 0x01], "vaesenclast ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdd, 0xca], "vaesenclast ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xde, 0x0a], "vaesdec ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xde, 0x4a, 0x01], "vaesdec ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xde, 0xca], "vaesdec ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdf, 0x0a], "vaesdeclast ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdf, 0x4a, 0x01], "vaesdeclast ymm1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x28, 0xdf, 0xca], "vaesdeclast ymm1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x00, 0x0a], "vpshufb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x00, 0x4a, 0x01], "vpshufb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x00, 0xca], "vpshufb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x04, 0x0a], "vpmaddubsw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x04, 0x4a, 0x01], "vpmaddubsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x04, 0xca], "vpmaddubsw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x0b, 0x0a], "vpmulhrsw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x0b, 0x4a, 0x01], "vpmulhrsw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x0b, 0xca], "vpmulhrsw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x0d, 0x0a], "vpermilpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x0d, 0xca], "vpermilpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x10, 0x0a], "vpsrlvw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x10, 0x4a, 0x01], "vpsrlvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x10, 0xca], "vpsrlvw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x11, 0x0a], "vpsravw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x11, 0x4a, 0x01], "vpsravw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x11, 0xca], "vpsravw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x12, 0x0a], "vpsllvw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x12, 0x4a, 0x01], "vpsllvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x12, 0xca], "vpsllvw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x14, 0x0a], "vprorvq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x14, 0xca], "vprorvq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x15, 0x0a], "vprolvq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x15, 0xca], "vprolvq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x16, 0x0a], "vpermpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x16, 0xca], "vpermpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x19, 0x0a], "vbroadcastsd ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x19, 0x4a, 0x01], "vbroadcastsd ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x19, 0xca], "vbroadcastsd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1a, 0x0a], "vbroadcastf64x2 ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1c, 0x0a], "vpabsb ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1c, 0x4a, 0x01], "vpabsb ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1c, 0xca], "vpabsb ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1d, 0x0a], "vpabsw ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1d, 0x4a, 0x01], "vpabsw ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1d, 0xca], "vpabsw ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1f, 0x0a], "vpabsq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x1f, 0xca], "vpabsq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x20, 0x0a], "vpmovsxbw ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x20, 0x4a, 0x01], "vpmovsxbw ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x20, 0xca], "vpmovsxbw ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x21, 0x0a], "vpmovsxbd ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x21, 0x4a, 0x01], "vpmovsxbd ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x21, 0xca], "vpmovsxbd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x22, 0x0a], "vpmovsxbq ymm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x22, 0x4a, 0x01], "vpmovsxbq ymm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x22, 0xca], "vpmovsxbq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x23, 0x0a], "vpmovsxwd ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x23, 0x4a, 0x01], "vpmovsxwd ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x23, 0xca], "vpmovsxwd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x24, 0x0a], "vpmovsxwq ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x24, 0x4a, 0x01], "vpmovsxwq ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x24, 0xca], "vpmovsxwq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x26, 0x0a], "vptestmw k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x26, 0x4a, 0x01], "vptestmw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x26, 0xca], "vptestmw k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x27, 0x0a], "vptestmq k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x27, 0xca], "vptestmq k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x28, 0x0a], "vpmuldq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x28, 0xca], "vpmuldq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x29, 0x0a], "vpcmpeqq k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x29, 0xca], "vpcmpeqq k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x2c, 0x0a], "vscalefpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x2c, 0xca], "vscalefpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x2d, 0x0a], "vscalefsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x2d, 0x4a, 0x01], "vscalefsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x2d, 0xca], "vscalefsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x30, 0x0a], "vpmovzxbw ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x30, 0x4a, 0x01], "vpmovzxbw ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x30, 0xca], "vpmovzxbw ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x31, 0x0a], "vpmovzxbd ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x31, 0x4a, 0x01], "vpmovzxbd ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x31, 0xca], "vpmovzxbd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x32, 0x0a], "vpmovzxbq ymm1{k5}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x32, 0x4a, 0x01], "vpmovzxbq ymm1{k5}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x32, 0xca], "vpmovzxbq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x33, 0x0a], "vpmovzxwd ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x33, 0x4a, 0x01], "vpmovzxwd ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x33, 0xca], "vpmovzxwd ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x34, 0x0a], "vpmovzxwq ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x34, 0x4a, 0x01], "vpmovzxwq ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x34, 0xca], "vpmovzxwq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x36, 0x0a], "vpermq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x36, 0xca], "vpermq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x37, 0x0a], "vpcmpgtq k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x37, 0xca], "vpcmpgtq k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x38, 0x0a], "vpminsb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x38, 0x4a, 0x01], "vpminsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x38, 0xca], "vpminsb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x39, 0x0a], "vpminsq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x39, 0xca], "vpminsq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3a, 0x0a], "vpminuw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3a, 0x4a, 0x01], "vpminuw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3a, 0xca], "vpminuw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3b, 0x0a], "vpminuq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3b, 0xca], "vpminuq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3c, 0x0a], "vpmaxsb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3c, 0x4a, 0x01], "vpmaxsb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3c, 0xca], "vpmaxsb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3d, 0x0a], "vpmaxsq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3d, 0xca], "vpmaxsq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3e, 0x0a], "vpmaxuw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3e, 0x4a, 0x01], "vpmaxuw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3e, 0xca], "vpmaxuw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3f, 0x0a], "vpmaxuq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x3f, 0xca], "vpmaxuq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x40, 0x0a], "vpmullq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x40, 0xca], "vpmullq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x42, 0x0a], "vgetexppd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x42, 0xca], "vgetexppd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x43, 0x0a], "vgetexpsd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x43, 0x4a, 0x01], "vgetexpsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x43, 0xca], "vgetexpsd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x44, 0x0a], "vplzcntq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x44, 0xca], "vplzcntq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x45, 0x0a], "vpsrlvq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x45, 0xca], "vpsrlvq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x46, 0x0a], "vpsravq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x46, 0xca], "vpsravq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x47, 0x0a], "vpsllvq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x47, 0xca], "vpsllvq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4c, 0x0a], "vrcp14pd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4c, 0xca], "vrcp14pd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4d, 0x0a], "vrcp14sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4d, 0x4a, 0x01], "vrcp14sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4d, 0xca], "vrcp14sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4e, 0xca], "vrsqrt14pd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4f, 0x0a], "vrsqrt14sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4f, 0x4a, 0x01], "vrsqrt14sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x4f, 0xca], "vrsqrt14sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x54, 0x0a], "vpopcntw ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x54, 0x4a, 0x01], "vpopcntw ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x54, 0xca], "vpopcntw ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x55, 0x0a], "vpopcntq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x55, 0xca], "vpopcntq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x59, 0x0a], "vpbroadcastq ymm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x59, 0x4a, 0x01], "vpbroadcastq ymm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x59, 0xca], "vpbroadcastq ymm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x5a, 0x0a], "vbroadcasti64x2 ymm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 ymm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x62, 0x0a], "vpexpandw ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x62, 0x4a, 0x01], "vpexpandw ymm1{k5}, ymmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x62, 0xca], "vpexpandw ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x63, 0x0a], "vpcompressw ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x63, 0x4a, 0x01], "vpcompressw ymmword [bp + si * 1 + 0x2]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x63, 0xca], "vpcompressw ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x64, 0x0a], "vpblendmq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x64, 0xca], "vpblendmq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x65, 0x0a], "vblendmpd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x65, 0xca], "vblendmpd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x66, 0x0a], "vpblendmw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x66, 0x4a, 0x01], "vpblendmw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x66, 0xca], "vpblendmw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x70, 0x0a], "vpshldvw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x70, 0x4a, 0x01], "vpshldvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x70, 0xca], "vpshldvw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x71, 0x0a], "vpshldvq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x71, 0xca], "vpshldvq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x72, 0x0a], "vpshrdvw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x72, 0x4a, 0x01], "vpshrdvw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x72, 0xca], "vpshrdvw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x73, 0x0a], "vpshrdvq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x73, 0xca], "vpshrdvq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x75, 0x0a], "vpermi2w ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x75, 0x4a, 0x01], "vpermi2w ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x75, 0xca], "vpermi2w ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x76, 0x0a], "vpermi2q ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x76, 0xca], "vpermi2q ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x77, 0x0a], "vpermi2pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x77, 0xca], "vpermi2pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7c, 0xca], "vpbroadcastd ymm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7d, 0x0a], "vpermt2w ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7d, 0x4a, 0x01], "vpermt2w ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7d, 0xca], "vpermt2w ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7e, 0x0a], "vpermt2q ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7e, 0xca], "vpermt2q ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7f, 0x0a], "vpermt2pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x7f, 0xca], "vpermt2pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x83, 0xca], "vpmultishiftqb ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x88, 0x0a], "vexpandpd ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x88, 0x4a, 0x01], "vexpandpd ymm1{k5}, ymmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x88, 0xca], "vexpandpd ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x89, 0x0a], "vpexpandq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x89, 0x4a, 0x01], "vpexpandq ymm1{k5}, ymmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x89, 0xca], "vpexpandq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8a, 0x0a], "vcompresspd ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8a, 0x4a, 0x01], "vcompresspd ymmword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8a, 0xca], "vcompresspd ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8b, 0x0a], "vpcompressq ymmword [bp + si * 1]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8b, 0x4a, 0x01], "vpcompressq ymmword [bp + si * 1 + 0x8]{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8b, 0xca], "vpcompressq ymm2{k5}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8d, 0x0a], "vpermw ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8d, 0x4a, 0x01], "vpermw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x8d, 0xca], "vpermw ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x96, 0xca], "vfmaddsub132pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x97, 0xca], "vfmsubadd132pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x98, 0x0a], "vfmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x98, 0xca], "vfmadd132pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x99, 0x0a], "vfmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x99, 0x4a, 0x01], "vfmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x99, 0xca], "vfmadd132sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9a, 0xca], "vfmsub132pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9b, 0x0a], "vfmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9b, 0x4a, 0x01], "vfmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9c, 0xca], "vfnmadd132pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9d, 0x0a], "vfnmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9d, 0x4a, 0x01], "vfnmadd132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9e, 0xca], "vfnmsub132pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9f, 0x0a], "vfnmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9f, 0x4a, 0x01], "vfnmsub132sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa6, 0xca], "vfmaddsub213pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa7, 0xca], "vfmsubadd213pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa8, 0xca], "vfmadd213pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa9, 0x0a], "vfmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa9, 0x4a, 0x01], "vfmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xaa, 0xca], "vfmsub213pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xab, 0x0a], "vfmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xab, 0x4a, 0x01], "vfmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xab, 0xca], "vfmsub213sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xac, 0xca], "vfnmadd213pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xad, 0x0a], "vfnmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xad, 0x4a, 0x01], "vfnmadd213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xae, 0xca], "vfnmsub213pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xaf, 0x0a], "vfnmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xaf, 0x4a, 0x01], "vfnmsub213sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb4, 0xca], "vpmadd52luq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb5, 0xca], "vpmadd52huq ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb6, 0xca], "vfmaddsub231pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb7, 0xca], "vfmsubadd231pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb8, 0xca], "vfmadd231pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb9, 0x0a], "vfmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb9, 0x4a, 0x01], "vfmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xba, 0x0a], "vfmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xba, 0xca], "vfmsub231pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbb, 0x0a], "vfmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbb, 0x4a, 0x01], "vfmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbc, 0xca], "vfnmadd231pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbd, 0x0a], "vfnmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbd, 0x4a, 0x01], "vfnmadd231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbe, 0xca], "vfnmsub231pd ymm1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbf, 0x0a], "vfnmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbf, 0x4a, 0x01], "vfnmsub231sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xc4, 0x0a], "vpconflictq ymm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xc4, 0xca], "vpconflictq ymm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xcb, 0x0a], "vrcp28sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xcb, 0x4a, 0x01], "vrcp28sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xcb, 0xca], "vrcp28sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xcd, 0x0a], "vrsqrt28sd xmm1{k5}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xcd, 0x4a, 0x01], "vrsqrt28sd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x2d, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x0d, 0x0a], "vpermilpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x0d, 0x4a, 0x01], "vpermilpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x14, 0x0a], "vprorvq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x14, 0x4a, 0x01], "vprorvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x15, 0x0a], "vprolvq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x15, 0x4a, 0x01], "vprolvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x16, 0x0a], "vpermpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x16, 0x4a, 0x01], "vpermpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x1f, 0x0a], "vpabsq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x1f, 0x4a, 0x01], "vpabsq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x27, 0x0a], "vptestmq k1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x27, 0x4a, 0x01], "vptestmq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x28, 0x0a], "vpmuldq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x28, 0x4a, 0x01], "vpmuldq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x29, 0x0a], "vpcmpeqq k1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x29, 0x4a, 0x01], "vpcmpeqq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x2c, 0x0a], "vscalefpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x2c, 0x4a, 0x01], "vscalefpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x2c, 0xca], "vscalefpd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x2d, 0xca], "vscalefsd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x36, 0x0a], "vpermq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x36, 0x4a, 0x01], "vpermq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x37, 0x0a], "vpcmpgtq k1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x37, 0x4a, 0x01], "vpcmpgtq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x39, 0x0a], "vpminsq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x39, 0x4a, 0x01], "vpminsq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x3b, 0x0a], "vpminuq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x3b, 0x4a, 0x01], "vpminuq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x3d, 0x0a], "vpmaxsq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x3f, 0x0a], "vpmaxuq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x40, 0x0a], "vpmullq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x40, 0x4a, 0x01], "vpmullq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x42, 0x0a], "vgetexppd ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x42, 0x4a, 0x01], "vgetexppd ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x44, 0x0a], "vplzcntq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x44, 0x4a, 0x01], "vplzcntq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x45, 0x0a], "vpsrlvq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x45, 0x4a, 0x01], "vpsrlvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x46, 0x0a], "vpsravq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x46, 0x4a, 0x01], "vpsravq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x47, 0x0a], "vpsllvq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x47, 0x4a, 0x01], "vpsllvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x4c, 0x0a], "vrcp14pd ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x4e, 0x0a], "vrsqrt14pd ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x55, 0x0a], "vpopcntq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x55, 0x4a, 0x01], "vpopcntq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x64, 0x0a], "vpblendmq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x64, 0x4a, 0x01], "vpblendmq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x65, 0x0a], "vblendmpd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x65, 0x4a, 0x01], "vblendmpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x71, 0x0a], "vpshldvq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x71, 0x4a, 0x01], "vpshldvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x73, 0x0a], "vpshrdvq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x73, 0x4a, 0x01], "vpshrdvq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x76, 0x0a], "vpermi2q ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x76, 0x4a, 0x01], "vpermi2q ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x77, 0x0a], "vpermi2pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x77, 0x4a, 0x01], "vpermi2pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x7e, 0x0a], "vpermt2q ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x7e, 0x4a, 0x01], "vpermt2q ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x7f, 0x0a], "vpermt2pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x83, 0x0a], "vpmultishiftqb ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x96, 0x0a], "vfmaddsub132pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x96, 0xca], "vfmaddsub132pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x97, 0x0a], "vfmsubadd132pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x97, 0xca], "vfmsubadd132pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x98, 0x0a], "vfmadd132pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x98, 0xca], "vfmadd132pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x99, 0xca], "vfmadd132sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9a, 0x0a], "vfmsub132pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9a, 0xca], "vfmsub132pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9b, 0xca], "vfmsub132sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9c, 0x0a], "vfnmadd132pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9c, 0xca], "vfnmadd132pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9d, 0xca], "vfnmadd132sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9e, 0x0a], "vfnmsub132pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9e, 0xca], "vfnmsub132pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0x9f, 0xca], "vfnmsub132sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa6, 0x0a], "vfmaddsub213pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa6, 0xca], "vfmaddsub213pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa7, 0x0a], "vfmsubadd213pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa7, 0xca], "vfmsubadd213pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa8, 0x0a], "vfmadd213pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa8, 0xca], "vfmadd213pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xa9, 0xca], "vfmadd213sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xaa, 0x0a], "vfmsub213pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xaa, 0xca], "vfmsub213pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xab, 0xca], "vfmsub213sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xac, 0x0a], "vfnmadd213pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xac, 0xca], "vfnmadd213pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xad, 0xca], "vfnmadd213sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xae, 0x0a], "vfnmsub213pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xae, 0xca], "vfnmsub213pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xaf, 0xca], "vfnmsub213sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb4, 0x0a], "vpmadd52luq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb5, 0x0a], "vpmadd52huq ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb6, 0x0a], "vfmaddsub231pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb6, 0xca], "vfmaddsub231pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb7, 0x0a], "vfmsubadd231pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb7, 0xca], "vfmsubadd231pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb8, 0x0a], "vfmadd231pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb8, 0xca], "vfmadd231pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xb9, 0xca], "vfmadd231sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xba, 0x0a], "vfmsub231pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xba, 0xca], "vfmsub231pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbb, 0xca], "vfmsub231sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbc, 0x0a], "vfnmadd231pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbc, 0xca], "vfnmadd231pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbd, 0xca], "vfnmadd231sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbe, 0x0a], "vfnmsub231pd ymm1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbe, 0xca], "vfnmsub231pd zmm1{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xbf, 0xca], "vfnmsub231sd xmm1{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xc4, 0x0a], "vpconflictq ymm1, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x38, 0xc4, 0x4a, 0x01], "vpconflictq ymm1, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x0d, 0x0a], "vpermilpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x14, 0x0a], "vprorvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x15, 0x0a], "vprolvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x16, 0x0a], "vpermpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x1f, 0x0a], "vpabsq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x27, 0x0a], "vptestmq k1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x28, 0x0a], "vpmuldq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x29, 0x0a], "vpcmpeqq k1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x2c, 0x0a], "vscalefpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x2c, 0xca], "vscalefpd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x2d, 0xca], "vscalefsd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x36, 0x0a], "vpermq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x37, 0x0a], "vpcmpgtq k1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x39, 0x0a], "vpminsq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x3b, 0x0a], "vpminuq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x3d, 0x0a], "vpmaxsq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x3f, 0x0a], "vpmaxuq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x40, 0x0a], "vpmullq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x42, 0x0a], "vgetexppd ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x44, 0x0a], "vplzcntq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x45, 0x0a], "vpsrlvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x46, 0x0a], "vpsravq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x47, 0x0a], "vpsllvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x4c, 0x0a], "vrcp14pd ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x55, 0x0a], "vpopcntq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x64, 0x0a], "vpblendmq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x65, 0x0a], "vblendmpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x71, 0x0a], "vpshldvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x73, 0x0a], "vpshrdvq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x76, 0x0a], "vpermi2q ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x77, 0x0a], "vpermi2pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x7e, 0x0a], "vpermt2q ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x7f, 0x0a], "vpermt2pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x98, 0x0a], "vfmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xba, 0x0a], "vfmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xc4, 0x0a], "vpconflictq ymm1{k5}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x3d, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x00, 0x0a], "vpshufb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x00, 0x4a, 0x01], "vpshufb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x00, 0xca], "vpshufb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x04, 0x0a], "vpmaddubsw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x04, 0x4a, 0x01], "vpmaddubsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x04, 0xca], "vpmaddubsw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x0b, 0x0a], "vpmulhrsw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x0b, 0x4a, 0x01], "vpmulhrsw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x0b, 0xca], "vpmulhrsw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x0d, 0x0a], "vpermilpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x0d, 0x4a, 0x01], "vpermilpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x0d, 0xca], "vpermilpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x10, 0x0a], "vpsrlvw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x10, 0x4a, 0x01], "vpsrlvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x10, 0xca], "vpsrlvw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x11, 0x0a], "vpsravw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x11, 0x4a, 0x01], "vpsravw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x11, 0xca], "vpsravw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x12, 0x0a], "vpsllvw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x12, 0x4a, 0x01], "vpsllvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x12, 0xca], "vpsllvw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x14, 0x0a], "vprorvq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x14, 0x4a, 0x01], "vprorvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x14, 0xca], "vprorvq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x15, 0x0a], "vprolvq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x15, 0x4a, 0x01], "vprolvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x15, 0xca], "vprolvq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x16, 0x0a], "vpermpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x16, 0x4a, 0x01], "vpermpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x16, 0xca], "vpermpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x19, 0x0a], "vbroadcastsd zmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x19, 0x4a, 0x01], "vbroadcastsd zmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x19, 0xca], "vbroadcastsd zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1a, 0x0a], "vbroadcastf64x2 zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1b, 0x0a], "vbroadcastf64x4 zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1b, 0x4a, 0x01], "vbroadcastf64x4 zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1c, 0x0a], "vpabsb zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1c, 0x4a, 0x01], "vpabsb zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1c, 0xca], "vpabsb zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1d, 0x0a], "vpabsw zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1d, 0x4a, 0x01], "vpabsw zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1d, 0xca], "vpabsw zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1f, 0x0a], "vpabsq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1f, 0x4a, 0x01], "vpabsq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x1f, 0xca], "vpabsq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x20, 0x0a], "vpmovsxbw zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x20, 0x4a, 0x01], "vpmovsxbw zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x20, 0xca], "vpmovsxbw zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x21, 0x0a], "vpmovsxbd zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x21, 0x4a, 0x01], "vpmovsxbd zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x21, 0xca], "vpmovsxbd zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x22, 0x0a], "vpmovsxbq zmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x22, 0x4a, 0x01], "vpmovsxbq zmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x22, 0xca], "vpmovsxbq zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x23, 0x0a], "vpmovsxwd zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x23, 0x4a, 0x01], "vpmovsxwd zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x23, 0xca], "vpmovsxwd zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x24, 0x0a], "vpmovsxwq zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x24, 0x4a, 0x01], "vpmovsxwq zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x24, 0xca], "vpmovsxwq zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x26, 0x0a], "vptestmw k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x26, 0x4a, 0x01], "vptestmw k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x26, 0xca], "vptestmw k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x27, 0x0a], "vptestmq k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x27, 0x4a, 0x01], "vptestmq k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x27, 0xca], "vptestmq k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x28, 0x0a], "vpmuldq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x28, 0x4a, 0x01], "vpmuldq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x28, 0xca], "vpmuldq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x29, 0x0a], "vpcmpeqq k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x29, 0x4a, 0x01], "vpcmpeqq k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x29, 0xca], "vpcmpeqq k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x2c, 0x0a], "vscalefpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x2c, 0x4a, 0x01], "vscalefpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x2c, 0xca], "vscalefpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x30, 0x0a], "vpmovzxbw zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x30, 0x4a, 0x01], "vpmovzxbw zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x30, 0xca], "vpmovzxbw zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x31, 0x0a], "vpmovzxbd zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x31, 0x4a, 0x01], "vpmovzxbd zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x31, 0xca], "vpmovzxbd zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x32, 0x0a], "vpmovzxbq zmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x32, 0x4a, 0x01], "vpmovzxbq zmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x32, 0xca], "vpmovzxbq zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x33, 0x0a], "vpmovzxwd zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x33, 0x4a, 0x01], "vpmovzxwd zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x33, 0xca], "vpmovzxwd zmm1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x34, 0x0a], "vpmovzxwq zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x34, 0x4a, 0x01], "vpmovzxwq zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x34, 0xca], "vpmovzxwq zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x36, 0x0a], "vpermq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x36, 0x4a, 0x01], "vpermq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x36, 0xca], "vpermq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x37, 0x0a], "vpcmpgtq k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x37, 0x4a, 0x01], "vpcmpgtq k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x37, 0xca], "vpcmpgtq k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x38, 0x0a], "vpminsb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x38, 0x4a, 0x01], "vpminsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x38, 0xca], "vpminsb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x39, 0x0a], "vpminsq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x39, 0x4a, 0x01], "vpminsq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x39, 0xca], "vpminsq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3a, 0x0a], "vpminuw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3a, 0x4a, 0x01], "vpminuw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3a, 0xca], "vpminuw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3b, 0x0a], "vpminuq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3b, 0x4a, 0x01], "vpminuq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3b, 0xca], "vpminuq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3c, 0x0a], "vpmaxsb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3c, 0x4a, 0x01], "vpmaxsb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3c, 0xca], "vpmaxsb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3d, 0x0a], "vpmaxsq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3d, 0xca], "vpmaxsq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3e, 0x0a], "vpmaxuw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3e, 0x4a, 0x01], "vpmaxuw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3e, 0xca], "vpmaxuw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3f, 0x0a], "vpmaxuq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x3f, 0xca], "vpmaxuq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x40, 0x0a], "vpmullq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x40, 0x4a, 0x01], "vpmullq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x40, 0xca], "vpmullq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x42, 0x0a], "vgetexppd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x42, 0x4a, 0x01], "vgetexppd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x42, 0xca], "vgetexppd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x44, 0x0a], "vplzcntq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x44, 0x4a, 0x01], "vplzcntq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x44, 0xca], "vplzcntq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x45, 0x0a], "vpsrlvq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x45, 0x4a, 0x01], "vpsrlvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x45, 0xca], "vpsrlvq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x46, 0x0a], "vpsravq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x46, 0x4a, 0x01], "vpsravq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x46, 0xca], "vpsravq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x47, 0x0a], "vpsllvq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x47, 0x4a, 0x01], "vpsllvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x47, 0xca], "vpsllvq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x4c, 0x0a], "vrcp14pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x4c, 0xca], "vrcp14pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x4e, 0x0a], "vrsqrt14pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x4e, 0xca], "vrsqrt14pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x54, 0x0a], "vpopcntw zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x54, 0x4a, 0x01], "vpopcntw zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x54, 0xca], "vpopcntw zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x55, 0x0a], "vpopcntq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x55, 0x4a, 0x01], "vpopcntq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x55, 0xca], "vpopcntq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x59, 0x0a], "vpbroadcastq zmm1, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x59, 0x4a, 0x01], "vpbroadcastq zmm1, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x59, 0xca], "vpbroadcastq zmm1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x5a, 0x0a], "vbroadcasti64x2 zmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 zmm1, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x5b, 0x0a], "vbroadcasti64x4 zmm1, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x5b, 0x4a, 0x01], "vbroadcasti64x4 zmm1, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x62, 0x0a], "vpexpandw zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x62, 0x4a, 0x01], "vpexpandw zmm1, zmmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x62, 0xca], "vpexpandw zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x63, 0x0a], "vpcompressw zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x63, 0x4a, 0x01], "vpcompressw zmmword [bp + si * 1 + 0x2], zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x63, 0xca], "vpcompressw zmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x64, 0x0a], "vpblendmq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x64, 0x4a, 0x01], "vpblendmq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x64, 0xca], "vpblendmq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x65, 0x0a], "vblendmpd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x65, 0x4a, 0x01], "vblendmpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x65, 0xca], "vblendmpd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x66, 0x0a], "vpblendmw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x66, 0x4a, 0x01], "vpblendmw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x66, 0xca], "vpblendmw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x70, 0x0a], "vpshldvw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x70, 0x4a, 0x01], "vpshldvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x70, 0xca], "vpshldvw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x71, 0x0a], "vpshldvq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x71, 0x4a, 0x01], "vpshldvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x71, 0xca], "vpshldvq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x72, 0x0a], "vpshrdvw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x72, 0x4a, 0x01], "vpshrdvw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x72, 0xca], "vpshrdvw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x73, 0x0a], "vpshrdvq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x73, 0x4a, 0x01], "vpshrdvq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x73, 0xca], "vpshrdvq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x75, 0x0a], "vpermi2w zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x75, 0x4a, 0x01], "vpermi2w zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x75, 0xca], "vpermi2w zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x76, 0x0a], "vpermi2q zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x76, 0x4a, 0x01], "vpermi2q zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x76, 0xca], "vpermi2q zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x77, 0x0a], "vpermi2pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x77, 0x4a, 0x01], "vpermi2pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x77, 0xca], "vpermi2pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7c, 0xca], "vpbroadcastd zmm1, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7d, 0x0a], "vpermt2w zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7d, 0x4a, 0x01], "vpermt2w zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7d, 0xca], "vpermt2w zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7e, 0x0a], "vpermt2q zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7e, 0x4a, 0x01], "vpermt2q zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7e, 0xca], "vpermt2q zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7f, 0x0a], "vpermt2pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x7f, 0xca], "vpermt2pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x83, 0x0a], "vpmultishiftqb zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x83, 0xca], "vpmultishiftqb zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x88, 0x0a], "vexpandpd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x88, 0x4a, 0x01], "vexpandpd zmm1, zmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x88, 0xca], "vexpandpd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x89, 0x0a], "vpexpandq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x89, 0x4a, 0x01], "vpexpandq zmm1, zmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x89, 0xca], "vpexpandq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8a, 0x0a], "vcompresspd zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8a, 0x4a, 0x01], "vcompresspd zmmword [bp + si * 1 + 0x8], zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8a, 0xca], "vcompresspd zmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8b, 0x0a], "vpcompressq zmmword [bp + si * 1], zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8b, 0x4a, 0x01], "vpcompressq zmmword [bp + si * 1 + 0x8], zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8b, 0xca], "vpcompressq zmm2, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8d, 0x0a], "vpermw zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8d, 0x4a, 0x01], "vpermw zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x8d, 0xca], "vpermw zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x96, 0x0a], "vfmaddsub132pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x96, 0xca], "vfmaddsub132pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x97, 0x0a], "vfmsubadd132pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x97, 0xca], "vfmsubadd132pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x98, 0x0a], "vfmadd132pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x98, 0xca], "vfmadd132pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9a, 0x0a], "vfmsub132pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9a, 0xca], "vfmsub132pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9c, 0x0a], "vfnmadd132pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9c, 0xca], "vfnmadd132pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9e, 0x0a], "vfnmsub132pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0x9e, 0xca], "vfnmsub132pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa6, 0x0a], "vfmaddsub213pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa6, 0xca], "vfmaddsub213pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa7, 0x0a], "vfmsubadd213pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa7, 0xca], "vfmsubadd213pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa8, 0x0a], "vfmadd213pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xa8, 0xca], "vfmadd213pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xaa, 0x0a], "vfmsub213pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xaa, 0xca], "vfmsub213pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xac, 0x0a], "vfnmadd213pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xac, 0xca], "vfnmadd213pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xae, 0x0a], "vfnmsub213pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xae, 0xca], "vfnmsub213pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb4, 0x0a], "vpmadd52luq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb4, 0xca], "vpmadd52luq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb5, 0x0a], "vpmadd52huq zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb5, 0xca], "vpmadd52huq zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb6, 0x0a], "vfmaddsub231pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb6, 0xca], "vfmaddsub231pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb7, 0x0a], "vfmsubadd231pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb7, 0xca], "vfmsubadd231pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb8, 0x0a], "vfmadd231pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xb8, 0xca], "vfmadd231pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xba, 0x0a], "vfmsub231pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xba, 0xca], "vfmsub231pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xbc, 0x0a], "vfnmadd231pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xbc, 0xca], "vfnmadd231pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xbe, 0x0a], "vfnmsub231pd zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xbe, 0xca], "vfnmsub231pd zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xc4, 0x0a], "vpconflictq zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xc4, 0x4a, 0x01], "vpconflictq zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xc4, 0xca], "vpconflictq zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xc8, 0x0a], "vexp2pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xc8, 0x4a, 0x01], "vexp2pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xc8, 0xca], "vexp2pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xca, 0x0a], "vrcp28pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xca, 0x4a, 0x01], "vrcp28pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xca, 0xca], "vrcp28pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xcc, 0x0a], "vrsqrt28pd zmm1, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xcc, 0xca], "vrsqrt28pd zmm1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdc, 0x0a], "vaesenc zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdc, 0x4a, 0x01], "vaesenc zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdc, 0xca], "vaesenc zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdd, 0x0a], "vaesenclast zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdd, 0x4a, 0x01], "vaesenclast zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdd, 0xca], "vaesenclast zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xde, 0x0a], "vaesdec zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xde, 0x4a, 0x01], "vaesdec zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xde, 0xca], "vaesdec zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdf, 0x0a], "vaesdeclast zmm1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdf, 0x4a, 0x01], "vaesdeclast zmm1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x48, 0xdf, 0xca], "vaesdeclast zmm1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x00, 0x0a], "vpshufb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x00, 0x4a, 0x01], "vpshufb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x00, 0xca], "vpshufb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x04, 0x0a], "vpmaddubsw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x04, 0x4a, 0x01], "vpmaddubsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x04, 0xca], "vpmaddubsw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x0b, 0x0a], "vpmulhrsw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x0b, 0x4a, 0x01], "vpmulhrsw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x0b, 0xca], "vpmulhrsw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x0d, 0x0a], "vpermilpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x0d, 0xca], "vpermilpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x10, 0x0a], "vpsrlvw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x10, 0x4a, 0x01], "vpsrlvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x10, 0xca], "vpsrlvw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x11, 0x0a], "vpsravw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x11, 0x4a, 0x01], "vpsravw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x11, 0xca], "vpsravw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x12, 0x0a], "vpsllvw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x12, 0x4a, 0x01], "vpsllvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x12, 0xca], "vpsllvw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x14, 0x0a], "vprorvq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x14, 0xca], "vprorvq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x15, 0x0a], "vprolvq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x15, 0xca], "vprolvq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x16, 0x0a], "vpermpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x16, 0xca], "vpermpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x19, 0x0a], "vbroadcastsd zmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x19, 0x4a, 0x01], "vbroadcastsd zmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x19, 0xca], "vbroadcastsd zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1a, 0x0a], "vbroadcastf64x2 zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1b, 0x0a], "vbroadcastf64x4 zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1b, 0x4a, 0x01], "vbroadcastf64x4 zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1c, 0x0a], "vpabsb zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1c, 0x4a, 0x01], "vpabsb zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1c, 0xca], "vpabsb zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1d, 0x0a], "vpabsw zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1d, 0x4a, 0x01], "vpabsw zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1d, 0xca], "vpabsw zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1f, 0x0a], "vpabsq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x1f, 0xca], "vpabsq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x20, 0x0a], "vpmovsxbw zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x20, 0x4a, 0x01], "vpmovsxbw zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x20, 0xca], "vpmovsxbw zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x21, 0x0a], "vpmovsxbd zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x21, 0x4a, 0x01], "vpmovsxbd zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x21, 0xca], "vpmovsxbd zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x22, 0x0a], "vpmovsxbq zmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x22, 0x4a, 0x01], "vpmovsxbq zmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x22, 0xca], "vpmovsxbq zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x23, 0x0a], "vpmovsxwd zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x23, 0x4a, 0x01], "vpmovsxwd zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x23, 0xca], "vpmovsxwd zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x24, 0x0a], "vpmovsxwq zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x24, 0x4a, 0x01], "vpmovsxwq zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x24, 0xca], "vpmovsxwq zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x26, 0x0a], "vptestmw k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x26, 0x4a, 0x01], "vptestmw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x26, 0xca], "vptestmw k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x27, 0x0a], "vptestmq k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x27, 0xca], "vptestmq k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x28, 0x0a], "vpmuldq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x28, 0xca], "vpmuldq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x29, 0x0a], "vpcmpeqq k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x29, 0xca], "vpcmpeqq k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x2c, 0x0a], "vscalefpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x2c, 0xca], "vscalefpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x30, 0x0a], "vpmovzxbw zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x30, 0x4a, 0x01], "vpmovzxbw zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x30, 0xca], "vpmovzxbw zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x31, 0x0a], "vpmovzxbd zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x31, 0x4a, 0x01], "vpmovzxbd zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x31, 0xca], "vpmovzxbd zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x32, 0x0a], "vpmovzxbq zmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x32, 0x4a, 0x01], "vpmovzxbq zmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x32, 0xca], "vpmovzxbq zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x33, 0x0a], "vpmovzxwd zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x33, 0x4a, 0x01], "vpmovzxwd zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x33, 0xca], "vpmovzxwd zmm1{k5}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x34, 0x0a], "vpmovzxwq zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x34, 0x4a, 0x01], "vpmovzxwq zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x34, 0xca], "vpmovzxwq zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x36, 0x0a], "vpermq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x36, 0xca], "vpermq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x37, 0x0a], "vpcmpgtq k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x37, 0xca], "vpcmpgtq k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x38, 0x0a], "vpminsb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x38, 0x4a, 0x01], "vpminsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x38, 0xca], "vpminsb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x39, 0x0a], "vpminsq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x39, 0xca], "vpminsq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3a, 0x0a], "vpminuw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3a, 0x4a, 0x01], "vpminuw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3a, 0xca], "vpminuw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3b, 0x0a], "vpminuq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3b, 0xca], "vpminuq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3c, 0x0a], "vpmaxsb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3c, 0x4a, 0x01], "vpmaxsb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3c, 0xca], "vpmaxsb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3d, 0x0a], "vpmaxsq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3d, 0xca], "vpmaxsq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3e, 0x0a], "vpmaxuw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3e, 0x4a, 0x01], "vpmaxuw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3e, 0xca], "vpmaxuw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3f, 0x0a], "vpmaxuq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x3f, 0xca], "vpmaxuq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x40, 0x0a], "vpmullq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x40, 0xca], "vpmullq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x42, 0x0a], "vgetexppd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x42, 0xca], "vgetexppd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x44, 0x0a], "vplzcntq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x44, 0xca], "vplzcntq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x45, 0x0a], "vpsrlvq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x45, 0xca], "vpsrlvq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x46, 0x0a], "vpsravq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x46, 0xca], "vpsravq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x47, 0x0a], "vpsllvq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x47, 0xca], "vpsllvq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x4c, 0x0a], "vrcp14pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x4c, 0xca], "vrcp14pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x4e, 0xca], "vrsqrt14pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x54, 0x0a], "vpopcntw zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x54, 0x4a, 0x01], "vpopcntw zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x54, 0xca], "vpopcntw zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x55, 0x0a], "vpopcntq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x55, 0xca], "vpopcntq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x59, 0x0a], "vpbroadcastq zmm1{k5}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x59, 0x4a, 0x01], "vpbroadcastq zmm1{k5}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x59, 0xca], "vpbroadcastq zmm1{k5}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x5a, 0x0a], "vbroadcasti64x2 zmm1{k5}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 zmm1{k5}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x5b, 0x0a], "vbroadcasti64x4 zmm1{k5}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x5b, 0x4a, 0x01], "vbroadcasti64x4 zmm1{k5}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x62, 0x0a], "vpexpandw zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x62, 0x4a, 0x01], "vpexpandw zmm1{k5}, zmmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x62, 0xca], "vpexpandw zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x63, 0x0a], "vpcompressw zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x63, 0x4a, 0x01], "vpcompressw zmmword [bp + si * 1 + 0x2]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x63, 0xca], "vpcompressw zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x64, 0x0a], "vpblendmq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x64, 0xca], "vpblendmq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x65, 0x0a], "vblendmpd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x65, 0xca], "vblendmpd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x66, 0x0a], "vpblendmw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x66, 0x4a, 0x01], "vpblendmw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x66, 0xca], "vpblendmw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x70, 0x0a], "vpshldvw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x70, 0x4a, 0x01], "vpshldvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x70, 0xca], "vpshldvw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x71, 0x0a], "vpshldvq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x71, 0xca], "vpshldvq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x72, 0x0a], "vpshrdvw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x72, 0x4a, 0x01], "vpshrdvw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x72, 0xca], "vpshrdvw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x73, 0x0a], "vpshrdvq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x73, 0xca], "vpshrdvq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x75, 0x0a], "vpermi2w zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x75, 0x4a, 0x01], "vpermi2w zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x75, 0xca], "vpermi2w zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x76, 0x0a], "vpermi2q zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x76, 0xca], "vpermi2q zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x77, 0x0a], "vpermi2pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x77, 0xca], "vpermi2pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7c, 0xca], "vpbroadcastd zmm1{k5}, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7d, 0x0a], "vpermt2w zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7d, 0x4a, 0x01], "vpermt2w zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7d, 0xca], "vpermt2w zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7e, 0x0a], "vpermt2q zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7e, 0xca], "vpermt2q zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7f, 0x0a], "vpermt2pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x7f, 0xca], "vpermt2pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x83, 0xca], "vpmultishiftqb zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x88, 0x0a], "vexpandpd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x88, 0x4a, 0x01], "vexpandpd zmm1{k5}, zmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x88, 0xca], "vexpandpd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x89, 0x0a], "vpexpandq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x89, 0x4a, 0x01], "vpexpandq zmm1{k5}, zmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x89, 0xca], "vpexpandq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8a, 0x0a], "vcompresspd zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8a, 0x4a, 0x01], "vcompresspd zmmword [bp + si * 1 + 0x8]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8a, 0xca], "vcompresspd zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8b, 0x0a], "vpcompressq zmmword [bp + si * 1]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8b, 0x4a, 0x01], "vpcompressq zmmword [bp + si * 1 + 0x8]{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8b, 0xca], "vpcompressq zmm2{k5}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8d, 0x0a], "vpermw zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8d, 0x4a, 0x01], "vpermw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x8d, 0xca], "vpermw zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x98, 0x0a], "vfmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x98, 0xca], "vfmadd132pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb4, 0xca], "vpmadd52luq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb5, 0xca], "vpmadd52huq zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xba, 0x0a], "vfmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xba, 0xca], "vfmsub231pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xc4, 0x0a], "vpconflictq zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xc4, 0xca], "vpconflictq zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xc8, 0x0a], "vexp2pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xc8, 0xca], "vexp2pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xca, 0x0a], "vrcp28pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xca, 0xca], "vrcp28pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x4d, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x0d, 0x0a], "vpermilpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x0d, 0x4a, 0x01], "vpermilpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x14, 0x0a], "vprorvq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x14, 0x4a, 0x01], "vprorvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x15, 0x0a], "vprolvq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x15, 0x4a, 0x01], "vprolvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x16, 0x0a], "vpermpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x16, 0x4a, 0x01], "vpermpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x1f, 0x0a], "vpabsq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x1f, 0x4a, 0x01], "vpabsq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x27, 0x0a], "vptestmq k1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x27, 0x4a, 0x01], "vptestmq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x28, 0x0a], "vpmuldq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x28, 0x4a, 0x01], "vpmuldq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x29, 0x0a], "vpcmpeqq k1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x29, 0x4a, 0x01], "vpcmpeqq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x2c, 0x0a], "vscalefpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x2c, 0x4a, 0x01], "vscalefpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x2c, 0xca], "vscalefpd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x2d, 0xca], "vscalefsd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x36, 0x0a], "vpermq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x36, 0x4a, 0x01], "vpermq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x37, 0x0a], "vpcmpgtq k1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x37, 0x4a, 0x01], "vpcmpgtq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x39, 0x0a], "vpminsq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x39, 0x4a, 0x01], "vpminsq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x3b, 0x0a], "vpminuq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x3b, 0x4a, 0x01], "vpminuq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x3d, 0x0a], "vpmaxsq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x3f, 0x0a], "vpmaxuq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x40, 0x0a], "vpmullq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x40, 0x4a, 0x01], "vpmullq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x42, 0x0a], "vgetexppd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x42, 0x4a, 0x01], "vgetexppd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x44, 0x0a], "vplzcntq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x44, 0x4a, 0x01], "vplzcntq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x45, 0x0a], "vpsrlvq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x45, 0x4a, 0x01], "vpsrlvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x46, 0x0a], "vpsravq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x46, 0x4a, 0x01], "vpsravq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x47, 0x0a], "vpsllvq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x47, 0x4a, 0x01], "vpsllvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x4c, 0x0a], "vrcp14pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x4e, 0x0a], "vrsqrt14pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x55, 0x0a], "vpopcntq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x55, 0x4a, 0x01], "vpopcntq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x64, 0x0a], "vpblendmq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x64, 0x4a, 0x01], "vpblendmq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x65, 0x0a], "vblendmpd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x65, 0x4a, 0x01], "vblendmpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x71, 0x0a], "vpshldvq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x71, 0x4a, 0x01], "vpshldvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x73, 0x0a], "vpshrdvq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x73, 0x4a, 0x01], "vpshrdvq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x76, 0x0a], "vpermi2q zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x76, 0x4a, 0x01], "vpermi2q zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x77, 0x0a], "vpermi2pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x77, 0x4a, 0x01], "vpermi2pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x7e, 0x0a], "vpermt2q zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x7e, 0x4a, 0x01], "vpermt2q zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x7f, 0x0a], "vpermt2pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x83, 0x0a], "vpmultishiftqb zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x96, 0x0a], "vfmaddsub132pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x96, 0xca], "vfmaddsub132pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x97, 0x0a], "vfmsubadd132pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x97, 0xca], "vfmsubadd132pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x98, 0x0a], "vfmadd132pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x98, 0xca], "vfmadd132pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x99, 0xca], "vfmadd132sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9a, 0x0a], "vfmsub132pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9a, 0xca], "vfmsub132pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9b, 0xca], "vfmsub132sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9c, 0x0a], "vfnmadd132pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9c, 0xca], "vfnmadd132pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9d, 0xca], "vfnmadd132sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9e, 0x0a], "vfnmsub132pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9e, 0xca], "vfnmsub132pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0x9f, 0xca], "vfnmsub132sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa6, 0x0a], "vfmaddsub213pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa6, 0xca], "vfmaddsub213pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa7, 0x0a], "vfmsubadd213pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa7, 0xca], "vfmsubadd213pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa8, 0x0a], "vfmadd213pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa8, 0xca], "vfmadd213pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xa9, 0xca], "vfmadd213sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xaa, 0x0a], "vfmsub213pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xaa, 0xca], "vfmsub213pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xab, 0xca], "vfmsub213sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xac, 0x0a], "vfnmadd213pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xac, 0xca], "vfnmadd213pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xad, 0xca], "vfnmadd213sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xae, 0x0a], "vfnmsub213pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xae, 0xca], "vfnmsub213pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xaf, 0xca], "vfnmsub213sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb4, 0x0a], "vpmadd52luq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb5, 0x0a], "vpmadd52huq zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb6, 0x0a], "vfmaddsub231pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb6, 0xca], "vfmaddsub231pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb7, 0x0a], "vfmsubadd231pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb7, 0xca], "vfmsubadd231pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb8, 0x0a], "vfmadd231pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb8, 0xca], "vfmadd231pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xb9, 0xca], "vfmadd231sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xba, 0x0a], "vfmsub231pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xba, 0xca], "vfmsub231pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbb, 0xca], "vfmsub231sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbc, 0x0a], "vfnmadd231pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbc, 0xca], "vfnmadd231pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbd, 0xca], "vfnmadd231sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbe, 0x0a], "vfnmsub231pd zmm1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbe, 0xca], "vfnmsub231pd zmm1{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xbf, 0xca], "vfnmsub231sd xmm1{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xc4, 0x0a], "vpconflictq zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xc4, 0x4a, 0x01], "vpconflictq zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xc8, 0x0a], "vexp2pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xc8, 0x4a, 0x01], "vexp2pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xca, 0x0a], "vrcp28pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xca, 0x4a, 0x01], "vrcp28pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xcc, 0x0a], "vrsqrt28pd zmm1, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x58, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x0d, 0x0a], "vpermilpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x14, 0x0a], "vprorvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x15, 0x0a], "vprolvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x16, 0x0a], "vpermpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x1f, 0x0a], "vpabsq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x27, 0x0a], "vptestmq k1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x27, 0x4a, 0x01], "vptestmq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x28, 0x0a], "vpmuldq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x29, 0x0a], "vpcmpeqq k1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x29, 0x4a, 0x01], "vpcmpeqq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x2c, 0x0a], "vscalefpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x2c, 0xca], "vscalefpd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x2d, 0xca], "vscalefsd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x36, 0x0a], "vpermq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x37, 0x0a], "vpcmpgtq k1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x37, 0x4a, 0x01], "vpcmpgtq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x39, 0x0a], "vpminsq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x3b, 0x0a], "vpminuq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x3d, 0x0a], "vpmaxsq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x3f, 0x0a], "vpmaxuq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x40, 0x0a], "vpmullq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x42, 0x0a], "vgetexppd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x44, 0x0a], "vplzcntq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x45, 0x0a], "vpsrlvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x46, 0x0a], "vpsravq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x47, 0x0a], "vpsllvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x4c, 0x0a], "vrcp14pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x55, 0x0a], "vpopcntq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x64, 0x0a], "vpblendmq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x65, 0x0a], "vblendmpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x71, 0x0a], "vpshldvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x73, 0x0a], "vpshrdvq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x76, 0x0a], "vpermi2q zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x77, 0x0a], "vpermi2pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x7e, 0x0a], "vpermt2q zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x7f, 0x0a], "vpermt2pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x98, 0x0a], "vfmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xba, 0x0a], "vfmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xc4, 0x0a], "vpconflictq zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xc8, 0x0a], "vexp2pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xca, 0x0a], "vrcp28pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x5d, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x2c, 0xca], "vscalefpd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x2d, 0xca], "vscalefsd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x42, 0xca], "vgetexppd zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x43, 0xca], "vgetexpsd xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x96, 0xca], "vfmaddsub132pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x97, 0xca], "vfmsubadd132pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x98, 0xca], "vfmadd132pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x99, 0xca], "vfmadd132sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x9a, 0xca], "vfmsub132pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x9b, 0xca], "vfmsub132sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x9c, 0xca], "vfnmadd132pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x9d, 0xca], "vfnmadd132sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x9e, 0xca], "vfnmsub132pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0x9f, 0xca], "vfnmsub132sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xa6, 0xca], "vfmaddsub213pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xa7, 0xca], "vfmsubadd213pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xa8, 0xca], "vfmadd213pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xa9, 0xca], "vfmadd213sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xaa, 0xca], "vfmsub213pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xab, 0xca], "vfmsub213sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xac, 0xca], "vfnmadd213pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xad, 0xca], "vfnmadd213sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xae, 0xca], "vfnmsub213pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xaf, 0xca], "vfnmsub213sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xb6, 0xca], "vfmaddsub231pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xb7, 0xca], "vfmsubadd231pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xb8, 0xca], "vfmadd231pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xb9, 0xca], "vfmadd231sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xba, 0xca], "vfmsub231pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xbb, 0xca], "vfmsub231sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xbc, 0xca], "vfnmadd231pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xbd, 0xca], "vfnmadd231sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xbe, 0xca], "vfnmsub231pd zmm1{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xbf, 0xca], "vfnmsub231sd xmm1{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xc8, 0xca], "vexp2pd zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xca, 0xca], "vrcp28pd zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xcb, 0xca], "vrcp28sd xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xcc, 0xca], "vrsqrt28pd zmm1{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x78, 0xcd, 0xca], "vrsqrt28sd xmm1{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x2c, 0xca], "vscalefpd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x2d, 0xca], "vscalefsd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x42, 0xca], "vgetexppd zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x43, 0xca], "vgetexpsd xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xc8, 0xca], "vexp2pd zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xca, 0xca], "vrcp28pd zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xcb, 0xca], "vrcp28sd xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x7d, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x00, 0x0a], "vpshufb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x00, 0x4a, 0x01], "vpshufb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x00, 0xca], "vpshufb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x04, 0x0a], "vpmaddubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x04, 0x4a, 0x01], "vpmaddubsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x04, 0xca], "vpmaddubsw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x0b, 0x0a], "vpmulhrsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x0b, 0x4a, 0x01], "vpmulhrsw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x0b, 0xca], "vpmulhrsw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x0d, 0x0a], "vpermilpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x0d, 0xca], "vpermilpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x10, 0x0a], "vpsrlvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x10, 0x4a, 0x01], "vpsrlvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x10, 0xca], "vpsrlvw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x11, 0x0a], "vpsravw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x11, 0x4a, 0x01], "vpsravw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x11, 0xca], "vpsravw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x12, 0x0a], "vpsllvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x12, 0x4a, 0x01], "vpsllvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x12, 0xca], "vpsllvw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x14, 0x0a], "vprorvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x14, 0xca], "vprorvq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x15, 0x0a], "vprolvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x15, 0xca], "vprolvq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1c, 0x0a], "vpabsb xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1c, 0x4a, 0x01], "vpabsb xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1c, 0xca], "vpabsb xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1d, 0x0a], "vpabsw xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1d, 0x4a, 0x01], "vpabsw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1d, 0xca], "vpabsw xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1f, 0x0a], "vpabsq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x1f, 0xca], "vpabsq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x20, 0x0a], "vpmovsxbw xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x20, 0x4a, 0x01], "vpmovsxbw xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x20, 0xca], "vpmovsxbw xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x21, 0x0a], "vpmovsxbd xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x21, 0x4a, 0x01], "vpmovsxbd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x21, 0xca], "vpmovsxbd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x22, 0x0a], "vpmovsxbq xmm1{k5}{z}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x22, 0x4a, 0x01], "vpmovsxbq xmm1{k5}{z}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x22, 0xca], "vpmovsxbq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x23, 0x0a], "vpmovsxwd xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x23, 0x4a, 0x01], "vpmovsxwd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x23, 0xca], "vpmovsxwd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x24, 0x0a], "vpmovsxwq xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x24, 0x4a, 0x01], "vpmovsxwq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x24, 0xca], "vpmovsxwq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x28, 0x0a], "vpmuldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x28, 0xca], "vpmuldq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x2c, 0x0a], "vscalefpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x2c, 0xca], "vscalefpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x30, 0x0a], "vpmovzxbw xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x30, 0x4a, 0x01], "vpmovzxbw xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x30, 0xca], "vpmovzxbw xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x31, 0x0a], "vpmovzxbd xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x31, 0x4a, 0x01], "vpmovzxbd xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x31, 0xca], "vpmovzxbd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x32, 0x0a], "vpmovzxbq xmm1{k5}{z}, word [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x32, 0x4a, 0x01], "vpmovzxbq xmm1{k5}{z}, word [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x32, 0xca], "vpmovzxbq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x33, 0x0a], "vpmovzxwd xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x33, 0x4a, 0x01], "vpmovzxwd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x33, 0xca], "vpmovzxwd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x34, 0x0a], "vpmovzxwq xmm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x34, 0x4a, 0x01], "vpmovzxwq xmm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x34, 0xca], "vpmovzxwq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x38, 0x0a], "vpminsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x38, 0x4a, 0x01], "vpminsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x38, 0xca], "vpminsb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x39, 0x0a], "vpminsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x39, 0xca], "vpminsq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3a, 0x0a], "vpminuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3a, 0x4a, 0x01], "vpminuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3a, 0xca], "vpminuw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3b, 0x0a], "vpminuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3b, 0xca], "vpminuq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3c, 0x0a], "vpmaxsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3c, 0x4a, 0x01], "vpmaxsb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3c, 0xca], "vpmaxsb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3d, 0xca], "vpmaxsq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3e, 0x0a], "vpmaxuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3e, 0x4a, 0x01], "vpmaxuw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3e, 0xca], "vpmaxuw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x3f, 0xca], "vpmaxuq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x40, 0x0a], "vpmullq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x40, 0xca], "vpmullq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x42, 0x0a], "vgetexppd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x42, 0xca], "vgetexppd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x44, 0x0a], "vplzcntq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x44, 0xca], "vplzcntq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x45, 0x0a], "vpsrlvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x45, 0xca], "vpsrlvq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x46, 0x0a], "vpsravq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x46, 0xca], "vpsravq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x47, 0x0a], "vpsllvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x47, 0xca], "vpsllvq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x4c, 0xca], "vrcp14pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x4e, 0xca], "vrsqrt14pd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x54, 0x0a], "vpopcntw xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x54, 0x4a, 0x01], "vpopcntw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x54, 0xca], "vpopcntw xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x55, 0x0a], "vpopcntq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x55, 0xca], "vpopcntq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x59, 0x0a], "vpbroadcastq xmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x59, 0x4a, 0x01], "vpbroadcastq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x59, 0xca], "vpbroadcastq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x62, 0x0a], "vpexpandw xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x62, 0x4a, 0x01], "vpexpandw xmm1{k5}{z}, xmmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x62, 0xca], "vpexpandw xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x63, 0xca], "vpcompressw xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x64, 0x0a], "vpblendmq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x64, 0xca], "vpblendmq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x65, 0x0a], "vblendmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x65, 0xca], "vblendmpd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x66, 0x0a], "vpblendmw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x66, 0x4a, 0x01], "vpblendmw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x66, 0xca], "vpblendmw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x70, 0x0a], "vpshldvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x70, 0x4a, 0x01], "vpshldvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x70, 0xca], "vpshldvw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x71, 0x0a], "vpshldvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x71, 0xca], "vpshldvq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x72, 0x0a], "vpshrdvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x72, 0x4a, 0x01], "vpshrdvw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x72, 0xca], "vpshrdvw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x73, 0x0a], "vpshrdvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x73, 0xca], "vpshrdvq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x75, 0x0a], "vpermi2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x75, 0x4a, 0x01], "vpermi2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x75, 0xca], "vpermi2w xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x76, 0x0a], "vpermi2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x76, 0xca], "vpermi2q xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x77, 0x0a], "vpermi2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x77, 0xca], "vpermi2pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7c, 0xca], "vpbroadcastd xmm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7d, 0x0a], "vpermt2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7d, 0x4a, 0x01], "vpermt2w xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7d, 0xca], "vpermt2w xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7e, 0x0a], "vpermt2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7e, 0xca], "vpermt2q xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x7f, 0xca], "vpermt2pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x83, 0xca], "vpmultishiftqb xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x88, 0x0a], "vexpandpd xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x88, 0x4a, 0x01], "vexpandpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x88, 0xca], "vexpandpd xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x89, 0x0a], "vpexpandq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x89, 0x4a, 0x01], "vpexpandq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x89, 0xca], "vpexpandq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x8a, 0xca], "vcompresspd xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x8b, 0xca], "vpcompressq xmm2{k5}{z}, xmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x8d, 0x0a], "vpermw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x8d, 0x4a, 0x01], "vpermw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x8d, 0xca], "vpermw xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x96, 0xca], "vfmaddsub132pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x97, 0xca], "vfmsubadd132pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x98, 0xca], "vfmadd132pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9a, 0xca], "vfmsub132pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9c, 0xca], "vfnmadd132pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0x9e, 0xca], "vfnmsub132pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa6, 0xca], "vfmaddsub213pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa7, 0xca], "vfmsubadd213pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xa8, 0xca], "vfmadd213pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xaa, 0xca], "vfmsub213pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xac, 0xca], "vfnmadd213pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xae, 0xca], "vfnmsub213pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb4, 0xca], "vpmadd52luq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb5, 0xca], "vpmadd52huq xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb6, 0xca], "vfmaddsub231pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb7, 0xca], "vfmsubadd231pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xb8, 0xca], "vfmadd231pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xba, 0xca], "vfmsub231pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xbc, 0xca], "vfnmadd231pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xbe, 0xca], "vfnmsub231pd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xc4, 0x0a], "vpconflictq xmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x8d, 0xc4, 0xca], "vpconflictq xmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x0d, 0x0a], "vpermilpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x0d, 0x4a, 0x01], "vpermilpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x14, 0x0a], "vprorvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x14, 0x4a, 0x01], "vprorvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x15, 0x0a], "vprolvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x15, 0x4a, 0x01], "vprolvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x1f, 0x0a], "vpabsq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x1f, 0x4a, 0x01], "vpabsq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x28, 0x0a], "vpmuldq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x28, 0x4a, 0x01], "vpmuldq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x2c, 0x0a], "vscalefpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x2c, 0x4a, 0x01], "vscalefpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x39, 0x0a], "vpminsq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x39, 0x4a, 0x01], "vpminsq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x3b, 0x0a], "vpminuq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x3b, 0x4a, 0x01], "vpminuq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x3d, 0x0a], "vpmaxsq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x3d, 0x4a, 0x01], "vpmaxsq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x3f, 0x0a], "vpmaxuq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x3f, 0x4a, 0x01], "vpmaxuq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x40, 0x0a], "vpmullq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x40, 0x4a, 0x01], "vpmullq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x42, 0x0a], "vgetexppd xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x42, 0x4a, 0x01], "vgetexppd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x44, 0x0a], "vplzcntq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x44, 0x4a, 0x01], "vplzcntq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x45, 0x0a], "vpsrlvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x45, 0x4a, 0x01], "vpsrlvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x46, 0x0a], "vpsravq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x46, 0x4a, 0x01], "vpsravq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x47, 0x0a], "vpsllvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x47, 0x4a, 0x01], "vpsllvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x4c, 0x0a], "vrcp14pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x4c, 0x4a, 0x01], "vrcp14pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x4e, 0x0a], "vrsqrt14pd xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x4e, 0x4a, 0x01], "vrsqrt14pd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x55, 0x0a], "vpopcntq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x55, 0x4a, 0x01], "vpopcntq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x64, 0x0a], "vpblendmq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x64, 0x4a, 0x01], "vpblendmq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x65, 0x0a], "vblendmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x65, 0x4a, 0x01], "vblendmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x71, 0x0a], "vpshldvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x71, 0x4a, 0x01], "vpshldvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x73, 0x0a], "vpshrdvq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x73, 0x4a, 0x01], "vpshrdvq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x76, 0x0a], "vpermi2q xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x76, 0x4a, 0x01], "vpermi2q xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x77, 0x0a], "vpermi2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x77, 0x4a, 0x01], "vpermi2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x7e, 0x0a], "vpermt2q xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x7e, 0x4a, 0x01], "vpermt2q xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x7f, 0x0a], "vpermt2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x7f, 0x4a, 0x01], "vpermt2pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x83, 0x0a], "vpmultishiftqb xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x83, 0x4a, 0x01], "vpmultishiftqb xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x96, 0x0a], "vfmaddsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x96, 0x4a, 0x01], "vfmaddsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x97, 0x0a], "vfmsubadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x97, 0x4a, 0x01], "vfmsubadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x98, 0x0a], "vfmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x98, 0x4a, 0x01], "vfmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9a, 0x0a], "vfmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9a, 0x4a, 0x01], "vfmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9c, 0x0a], "vfnmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9c, 0x4a, 0x01], "vfnmadd132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9e, 0x0a], "vfnmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9e, 0x4a, 0x01], "vfnmsub132pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa6, 0x0a], "vfmaddsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa6, 0x4a, 0x01], "vfmaddsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa7, 0x0a], "vfmsubadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa7, 0x4a, 0x01], "vfmsubadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa8, 0x0a], "vfmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa8, 0x4a, 0x01], "vfmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xaa, 0x0a], "vfmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xaa, 0x4a, 0x01], "vfmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xac, 0x0a], "vfnmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xac, 0x4a, 0x01], "vfnmadd213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xae, 0x0a], "vfnmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xae, 0x4a, 0x01], "vfnmsub213pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb4, 0x0a], "vpmadd52luq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb4, 0x4a, 0x01], "vpmadd52luq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb5, 0x0a], "vpmadd52huq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb5, 0x4a, 0x01], "vpmadd52huq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb6, 0x0a], "vfmaddsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb6, 0x4a, 0x01], "vfmaddsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb7, 0x0a], "vfmsubadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb7, 0x4a, 0x01], "vfmsubadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb8, 0x0a], "vfmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb8, 0x4a, 0x01], "vfmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xba, 0x0a], "vfmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xba, 0x4a, 0x01], "vfmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbc, 0x0a], "vfnmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbc, 0x4a, 0x01], "vfnmadd231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbe, 0x0a], "vfnmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbe, 0x4a, 0x01], "vfnmsub231pd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{rn-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{rn-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xc4, 0x0a], "vpconflictq xmm1{k5}{z}, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x9d, 0xc4, 0x4a, 0x01], "vpconflictq xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x00, 0x0a], "vpshufb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x00, 0x4a, 0x01], "vpshufb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x00, 0xca], "vpshufb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x04, 0x0a], "vpmaddubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x04, 0x4a, 0x01], "vpmaddubsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x04, 0xca], "vpmaddubsw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x0b, 0x0a], "vpmulhrsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x0b, 0x4a, 0x01], "vpmulhrsw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x0b, 0xca], "vpmulhrsw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x0d, 0x0a], "vpermilpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x0d, 0xca], "vpermilpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x10, 0x0a], "vpsrlvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x10, 0x4a, 0x01], "vpsrlvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x10, 0xca], "vpsrlvw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x11, 0x0a], "vpsravw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x11, 0x4a, 0x01], "vpsravw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x11, 0xca], "vpsravw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x12, 0x0a], "vpsllvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x12, 0x4a, 0x01], "vpsllvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x12, 0xca], "vpsllvw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x14, 0x0a], "vprorvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x14, 0xca], "vprorvq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x15, 0x0a], "vprolvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x15, 0xca], "vprolvq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x16, 0x0a], "vpermpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x16, 0xca], "vpermpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x19, 0x0a], "vbroadcastsd ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x19, 0x4a, 0x01], "vbroadcastsd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x19, 0xca], "vbroadcastsd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1a, 0x0a], "vbroadcastf64x2 ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1c, 0x0a], "vpabsb ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1c, 0x4a, 0x01], "vpabsb ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1c, 0xca], "vpabsb ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1d, 0x0a], "vpabsw ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1d, 0x4a, 0x01], "vpabsw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1d, 0xca], "vpabsw ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1f, 0x0a], "vpabsq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x1f, 0xca], "vpabsq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x20, 0x0a], "vpmovsxbw ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x20, 0x4a, 0x01], "vpmovsxbw ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x20, 0xca], "vpmovsxbw ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x21, 0x0a], "vpmovsxbd ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x21, 0x4a, 0x01], "vpmovsxbd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x21, 0xca], "vpmovsxbd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x22, 0x0a], "vpmovsxbq ymm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x22, 0x4a, 0x01], "vpmovsxbq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x22, 0xca], "vpmovsxbq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x23, 0x0a], "vpmovsxwd ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x23, 0x4a, 0x01], "vpmovsxwd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x23, 0xca], "vpmovsxwd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x24, 0x0a], "vpmovsxwq ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x24, 0x4a, 0x01], "vpmovsxwq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x24, 0xca], "vpmovsxwq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x28, 0x0a], "vpmuldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x28, 0xca], "vpmuldq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x2c, 0x0a], "vscalefpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x2c, 0xca], "vscalefpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x2d, 0x0a], "vscalefsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x2d, 0x4a, 0x01], "vscalefsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x30, 0x0a], "vpmovzxbw ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x30, 0x4a, 0x01], "vpmovzxbw ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x30, 0xca], "vpmovzxbw ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x31, 0x0a], "vpmovzxbd ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x31, 0x4a, 0x01], "vpmovzxbd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x31, 0xca], "vpmovzxbd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x32, 0x0a], "vpmovzxbq ymm1{k5}{z}, dword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x32, 0x4a, 0x01], "vpmovzxbq ymm1{k5}{z}, dword [bp + si * 1 + 0x4]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x32, 0xca], "vpmovzxbq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x33, 0x0a], "vpmovzxwd ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x33, 0x4a, 0x01], "vpmovzxwd ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x33, 0xca], "vpmovzxwd ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x34, 0x0a], "vpmovzxwq ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x34, 0x4a, 0x01], "vpmovzxwq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x34, 0xca], "vpmovzxwq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x36, 0x0a], "vpermq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x36, 0xca], "vpermq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x38, 0x0a], "vpminsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x38, 0x4a, 0x01], "vpminsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x38, 0xca], "vpminsb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x39, 0x0a], "vpminsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x39, 0xca], "vpminsq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3a, 0x0a], "vpminuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3a, 0x4a, 0x01], "vpminuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3a, 0xca], "vpminuw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3b, 0x0a], "vpminuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3b, 0xca], "vpminuq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3c, 0x0a], "vpmaxsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3c, 0x4a, 0x01], "vpmaxsb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3c, 0xca], "vpmaxsb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3d, 0x0a], "vpmaxsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3d, 0xca], "vpmaxsq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3e, 0x0a], "vpmaxuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3e, 0x4a, 0x01], "vpmaxuw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3e, 0xca], "vpmaxuw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3f, 0x0a], "vpmaxuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x3f, 0xca], "vpmaxuq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x40, 0x0a], "vpmullq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x40, 0xca], "vpmullq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x42, 0x0a], "vgetexppd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x42, 0xca], "vgetexppd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x43, 0x0a], "vgetexpsd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x43, 0x4a, 0x01], "vgetexpsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x43, 0xca], "vgetexpsd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x44, 0x0a], "vplzcntq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x44, 0xca], "vplzcntq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x45, 0x0a], "vpsrlvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x45, 0xca], "vpsrlvq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x46, 0x0a], "vpsravq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x46, 0xca], "vpsravq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x47, 0x0a], "vpsllvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x47, 0xca], "vpsllvq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4c, 0x0a], "vrcp14pd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4c, 0xca], "vrcp14pd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4d, 0x0a], "vrcp14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4d, 0x4a, 0x01], "vrcp14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4d, 0xca], "vrcp14sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4e, 0xca], "vrsqrt14pd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4f, 0x0a], "vrsqrt14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4f, 0x4a, 0x01], "vrsqrt14sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x4f, 0xca], "vrsqrt14sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x54, 0x0a], "vpopcntw ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x54, 0x4a, 0x01], "vpopcntw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x54, 0xca], "vpopcntw ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x55, 0x0a], "vpopcntq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x55, 0xca], "vpopcntq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x59, 0x0a], "vpbroadcastq ymm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x59, 0x4a, 0x01], "vpbroadcastq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x59, 0xca], "vpbroadcastq ymm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x5a, 0x0a], "vbroadcasti64x2 ymm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 ymm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x62, 0x0a], "vpexpandw ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x62, 0x4a, 0x01], "vpexpandw ymm1{k5}{z}, ymmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x62, 0xca], "vpexpandw ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x63, 0xca], "vpcompressw ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x64, 0x0a], "vpblendmq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x64, 0xca], "vpblendmq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x65, 0x0a], "vblendmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x65, 0xca], "vblendmpd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x66, 0x0a], "vpblendmw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x66, 0x4a, 0x01], "vpblendmw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x66, 0xca], "vpblendmw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x70, 0x0a], "vpshldvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x70, 0x4a, 0x01], "vpshldvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x70, 0xca], "vpshldvw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x71, 0x0a], "vpshldvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x71, 0xca], "vpshldvq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x72, 0x0a], "vpshrdvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x72, 0x4a, 0x01], "vpshrdvw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x72, 0xca], "vpshrdvw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x73, 0x0a], "vpshrdvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x73, 0xca], "vpshrdvq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x75, 0x0a], "vpermi2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x75, 0x4a, 0x01], "vpermi2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x75, 0xca], "vpermi2w ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x76, 0x0a], "vpermi2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x76, 0xca], "vpermi2q ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x77, 0x0a], "vpermi2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x77, 0xca], "vpermi2pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7c, 0xca], "vpbroadcastd ymm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7d, 0x0a], "vpermt2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7d, 0x4a, 0x01], "vpermt2w ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7d, 0xca], "vpermt2w ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7e, 0x0a], "vpermt2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7e, 0xca], "vpermt2q ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7f, 0x0a], "vpermt2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x7f, 0xca], "vpermt2pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x83, 0xca], "vpmultishiftqb ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x88, 0x0a], "vexpandpd ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x88, 0x4a, 0x01], "vexpandpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x88, 0xca], "vexpandpd ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x89, 0x0a], "vpexpandq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x89, 0x4a, 0x01], "vpexpandq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x89, 0xca], "vpexpandq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x8a, 0xca], "vcompresspd ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x8b, 0xca], "vpcompressq ymm2{k5}{z}, ymm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x8d, 0x0a], "vpermw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x8d, 0x4a, 0x01], "vpermw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x8d, 0xca], "vpermw ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x96, 0xca], "vfmaddsub132pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x97, 0xca], "vfmsubadd132pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x98, 0x0a], "vfmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x98, 0xca], "vfmadd132pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x99, 0x0a], "vfmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x99, 0x4a, 0x01], "vfmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9a, 0xca], "vfmsub132pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9b, 0x0a], "vfmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9b, 0x4a, 0x01], "vfmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9c, 0xca], "vfnmadd132pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9d, 0x0a], "vfnmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9d, 0x4a, 0x01], "vfnmadd132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9e, 0xca], "vfnmsub132pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9f, 0x0a], "vfnmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9f, 0x4a, 0x01], "vfnmsub132sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa6, 0xca], "vfmaddsub213pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa7, 0xca], "vfmsubadd213pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa8, 0xca], "vfmadd213pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa9, 0x0a], "vfmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa9, 0x4a, 0x01], "vfmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xaa, 0xca], "vfmsub213pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xab, 0x0a], "vfmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xab, 0x4a, 0x01], "vfmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xac, 0xca], "vfnmadd213pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xad, 0x0a], "vfnmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xad, 0x4a, 0x01], "vfnmadd213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xae, 0xca], "vfnmsub213pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xaf, 0x0a], "vfnmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xaf, 0x4a, 0x01], "vfnmsub213sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb4, 0xca], "vpmadd52luq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb5, 0xca], "vpmadd52huq ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb6, 0xca], "vfmaddsub231pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb7, 0xca], "vfmsubadd231pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb8, 0xca], "vfmadd231pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb9, 0x0a], "vfmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb9, 0x4a, 0x01], "vfmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xba, 0x0a], "vfmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xba, 0xca], "vfmsub231pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbb, 0x0a], "vfmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbb, 0x4a, 0x01], "vfmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbc, 0xca], "vfnmadd231pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbd, 0x0a], "vfnmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbd, 0x4a, 0x01], "vfnmadd231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbe, 0xca], "vfnmsub231pd ymm1{k5}{z}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbf, 0x0a], "vfnmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbf, 0x4a, 0x01], "vfnmsub231sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xc4, 0x0a], "vpconflictq ymm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xc4, 0xca], "vpconflictq ymm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xcb, 0x0a], "vrcp28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xcb, 0x4a, 0x01], "vrcp28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xcb, 0xca], "vrcp28sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xcd, 0x0a], "vrsqrt28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xcd, 0x4a, 0x01], "vrsqrt28sd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xad, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}{z}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x0d, 0x0a], "vpermilpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x0d, 0x4a, 0x01], "vpermilpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x14, 0x0a], "vprorvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x14, 0x4a, 0x01], "vprorvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x15, 0x0a], "vprolvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x15, 0x4a, 0x01], "vprolvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x16, 0x0a], "vpermpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x16, 0x4a, 0x01], "vpermpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x1f, 0x0a], "vpabsq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x1f, 0x4a, 0x01], "vpabsq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x28, 0x0a], "vpmuldq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x28, 0x4a, 0x01], "vpmuldq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x2c, 0x0a], "vscalefpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x2c, 0x4a, 0x01], "vscalefpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x36, 0x0a], "vpermq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x36, 0x4a, 0x01], "vpermq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x39, 0x0a], "vpminsq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x39, 0x4a, 0x01], "vpminsq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x3b, 0x0a], "vpminuq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x3b, 0x4a, 0x01], "vpminuq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x3d, 0x0a], "vpmaxsq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x3d, 0x4a, 0x01], "vpmaxsq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x3f, 0x0a], "vpmaxuq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x3f, 0x4a, 0x01], "vpmaxuq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x40, 0x0a], "vpmullq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x40, 0x4a, 0x01], "vpmullq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x42, 0x0a], "vgetexppd ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x42, 0x4a, 0x01], "vgetexppd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x44, 0x0a], "vplzcntq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x44, 0x4a, 0x01], "vplzcntq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x45, 0x0a], "vpsrlvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x45, 0x4a, 0x01], "vpsrlvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x46, 0x0a], "vpsravq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x46, 0x4a, 0x01], "vpsravq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x47, 0x0a], "vpsllvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x47, 0x4a, 0x01], "vpsllvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x4c, 0x0a], "vrcp14pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x4c, 0x4a, 0x01], "vrcp14pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x4e, 0x0a], "vrsqrt14pd ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x4e, 0x4a, 0x01], "vrsqrt14pd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x55, 0x0a], "vpopcntq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x55, 0x4a, 0x01], "vpopcntq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x64, 0x0a], "vpblendmq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x64, 0x4a, 0x01], "vpblendmq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x65, 0x0a], "vblendmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x65, 0x4a, 0x01], "vblendmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x71, 0x0a], "vpshldvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x71, 0x4a, 0x01], "vpshldvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x73, 0x0a], "vpshrdvq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x73, 0x4a, 0x01], "vpshrdvq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x76, 0x0a], "vpermi2q ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x76, 0x4a, 0x01], "vpermi2q ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x77, 0x0a], "vpermi2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x77, 0x4a, 0x01], "vpermi2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x7e, 0x0a], "vpermt2q ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x7e, 0x4a, 0x01], "vpermt2q ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x7f, 0x0a], "vpermt2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x7f, 0x4a, 0x01], "vpermt2pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x83, 0x0a], "vpmultishiftqb ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x83, 0x4a, 0x01], "vpmultishiftqb ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x96, 0x0a], "vfmaddsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x96, 0x4a, 0x01], "vfmaddsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x97, 0x0a], "vfmsubadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x97, 0x4a, 0x01], "vfmsubadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x98, 0x0a], "vfmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x98, 0x4a, 0x01], "vfmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9a, 0x0a], "vfmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9a, 0x4a, 0x01], "vfmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9c, 0x0a], "vfnmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9c, 0x4a, 0x01], "vfnmadd132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9e, 0x0a], "vfnmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9e, 0x4a, 0x01], "vfnmsub132pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa6, 0x0a], "vfmaddsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa6, 0x4a, 0x01], "vfmaddsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa7, 0x0a], "vfmsubadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa7, 0x4a, 0x01], "vfmsubadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa8, 0x0a], "vfmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa8, 0x4a, 0x01], "vfmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xaa, 0x0a], "vfmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xaa, 0x4a, 0x01], "vfmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xac, 0x0a], "vfnmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xac, 0x4a, 0x01], "vfnmadd213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xae, 0x0a], "vfnmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xae, 0x4a, 0x01], "vfnmsub213pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb4, 0x0a], "vpmadd52luq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb4, 0x4a, 0x01], "vpmadd52luq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb5, 0x0a], "vpmadd52huq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb5, 0x4a, 0x01], "vpmadd52huq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb6, 0x0a], "vfmaddsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb6, 0x4a, 0x01], "vfmaddsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb7, 0x0a], "vfmsubadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb7, 0x4a, 0x01], "vfmsubadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb8, 0x0a], "vfmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb8, 0x4a, 0x01], "vfmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xba, 0x0a], "vfmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xba, 0x4a, 0x01], "vfmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbc, 0x0a], "vfnmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbc, 0x4a, 0x01], "vfnmadd231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbe, 0x0a], "vfnmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbe, 0x4a, 0x01], "vfnmsub231pd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{rd-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{rd-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xc4, 0x0a], "vpconflictq ymm1{k5}{z}, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xbd, 0xc4, 0x4a, 0x01], "vpconflictq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x00, 0x0a], "vpshufb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x00, 0x4a, 0x01], "vpshufb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x00, 0xca], "vpshufb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x04, 0x0a], "vpmaddubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x04, 0x4a, 0x01], "vpmaddubsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x04, 0xca], "vpmaddubsw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x0b, 0x0a], "vpmulhrsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x0b, 0x4a, 0x01], "vpmulhrsw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x0b, 0xca], "vpmulhrsw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x0d, 0x0a], "vpermilpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x0d, 0xca], "vpermilpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x10, 0x0a], "vpsrlvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x10, 0x4a, 0x01], "vpsrlvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x10, 0xca], "vpsrlvw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x11, 0x0a], "vpsravw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x11, 0x4a, 0x01], "vpsravw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x11, 0xca], "vpsravw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x12, 0x0a], "vpsllvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x12, 0x4a, 0x01], "vpsllvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x12, 0xca], "vpsllvw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x14, 0x0a], "vprorvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x14, 0xca], "vprorvq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x15, 0x0a], "vprolvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x15, 0xca], "vprolvq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x16, 0x0a], "vpermpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x16, 0xca], "vpermpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x19, 0x0a], "vbroadcastsd zmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x19, 0x4a, 0x01], "vbroadcastsd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x19, 0xca], "vbroadcastsd zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1a, 0x0a], "vbroadcastf64x2 zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1a, 0x4a, 0x01], "vbroadcastf64x2 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1b, 0x0a], "vbroadcastf64x4 zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1b, 0x4a, 0x01], "vbroadcastf64x4 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1c, 0x0a], "vpabsb zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1c, 0x4a, 0x01], "vpabsb zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1c, 0xca], "vpabsb zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1d, 0x0a], "vpabsw zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1d, 0x4a, 0x01], "vpabsw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1d, 0xca], "vpabsw zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1f, 0x0a], "vpabsq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x1f, 0xca], "vpabsq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x20, 0x0a], "vpmovsxbw zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x20, 0x4a, 0x01], "vpmovsxbw zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x20, 0xca], "vpmovsxbw zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x21, 0x0a], "vpmovsxbd zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x21, 0x4a, 0x01], "vpmovsxbd zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x21, 0xca], "vpmovsxbd zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x22, 0x0a], "vpmovsxbq zmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x22, 0x4a, 0x01], "vpmovsxbq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x22, 0xca], "vpmovsxbq zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x23, 0x0a], "vpmovsxwd zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x23, 0x4a, 0x01], "vpmovsxwd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x23, 0xca], "vpmovsxwd zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x24, 0x0a], "vpmovsxwq zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x24, 0x4a, 0x01], "vpmovsxwq zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x24, 0xca], "vpmovsxwq zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x28, 0x0a], "vpmuldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x28, 0xca], "vpmuldq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x2c, 0x0a], "vscalefpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x30, 0x0a], "vpmovzxbw zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x30, 0x4a, 0x01], "vpmovzxbw zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x30, 0xca], "vpmovzxbw zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x31, 0x0a], "vpmovzxbd zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x31, 0x4a, 0x01], "vpmovzxbd zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x31, 0xca], "vpmovzxbd zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x32, 0x0a], "vpmovzxbq zmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x32, 0x4a, 0x01], "vpmovzxbq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x32, 0xca], "vpmovzxbq zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x33, 0x0a], "vpmovzxwd zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x33, 0x4a, 0x01], "vpmovzxwd zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x33, 0xca], "vpmovzxwd zmm1{k5}{z}, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x34, 0x0a], "vpmovzxwq zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x34, 0x4a, 0x01], "vpmovzxwq zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x34, 0xca], "vpmovzxwq zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x36, 0x0a], "vpermq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x36, 0xca], "vpermq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x38, 0x0a], "vpminsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x38, 0x4a, 0x01], "vpminsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x38, 0xca], "vpminsb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x39, 0x0a], "vpminsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x39, 0xca], "vpminsq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3a, 0x0a], "vpminuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3a, 0x4a, 0x01], "vpminuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3a, 0xca], "vpminuw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3b, 0x0a], "vpminuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3b, 0xca], "vpminuq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3c, 0x0a], "vpmaxsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3c, 0x4a, 0x01], "vpmaxsb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3c, 0xca], "vpmaxsb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3d, 0x0a], "vpmaxsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3d, 0xca], "vpmaxsq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3e, 0x0a], "vpmaxuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3e, 0x4a, 0x01], "vpmaxuw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3e, 0xca], "vpmaxuw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3f, 0x0a], "vpmaxuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x3f, 0xca], "vpmaxuq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x40, 0x0a], "vpmullq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x40, 0xca], "vpmullq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x42, 0x0a], "vgetexppd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x42, 0xca], "vgetexppd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x44, 0x0a], "vplzcntq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x44, 0xca], "vplzcntq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x45, 0x0a], "vpsrlvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x45, 0xca], "vpsrlvq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x46, 0x0a], "vpsravq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x46, 0xca], "vpsravq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x47, 0x0a], "vpsllvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x47, 0xca], "vpsllvq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x4c, 0x0a], "vrcp14pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x4c, 0xca], "vrcp14pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x4e, 0xca], "vrsqrt14pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x54, 0x0a], "vpopcntw zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x54, 0x4a, 0x01], "vpopcntw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x54, 0xca], "vpopcntw zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x55, 0x0a], "vpopcntq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x55, 0xca], "vpopcntq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x59, 0x0a], "vpbroadcastq zmm1{k5}{z}, qword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x59, 0x4a, 0x01], "vpbroadcastq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x59, 0xca], "vpbroadcastq zmm1{k5}{z}, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x5a, 0x0a], "vbroadcasti64x2 zmm1{k5}{z}, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x5a, 0x4a, 0x01], "vbroadcasti64x2 zmm1{k5}{z}, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x5b, 0x0a], "vbroadcasti64x4 zmm1{k5}{z}, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x5b, 0x4a, 0x01], "vbroadcasti64x4 zmm1{k5}{z}, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x62, 0x0a], "vpexpandw zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x62, 0x4a, 0x01], "vpexpandw zmm1{k5}{z}, zmmword [bp + si * 1 + 0x2]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x62, 0xca], "vpexpandw zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x63, 0xca], "vpcompressw zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x64, 0x0a], "vpblendmq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x64, 0xca], "vpblendmq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x65, 0x0a], "vblendmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x65, 0xca], "vblendmpd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x66, 0x0a], "vpblendmw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x66, 0x4a, 0x01], "vpblendmw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x66, 0xca], "vpblendmw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x70, 0x0a], "vpshldvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x70, 0x4a, 0x01], "vpshldvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x70, 0xca], "vpshldvw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x71, 0x0a], "vpshldvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x71, 0xca], "vpshldvq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x72, 0x0a], "vpshrdvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x72, 0x4a, 0x01], "vpshrdvw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x72, 0xca], "vpshrdvw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x73, 0x0a], "vpshrdvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x73, 0xca], "vpshrdvq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x75, 0x0a], "vpermi2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x75, 0x4a, 0x01], "vpermi2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x75, 0xca], "vpermi2w zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x76, 0x0a], "vpermi2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x76, 0xca], "vpermi2q zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x77, 0x0a], "vpermi2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x77, 0xca], "vpermi2pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7c, 0xca], "vpbroadcastd zmm1{k5}{z}, edx"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7d, 0x0a], "vpermt2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7d, 0x4a, 0x01], "vpermt2w zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7d, 0xca], "vpermt2w zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7e, 0x0a], "vpermt2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7e, 0xca], "vpermt2q zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7f, 0x0a], "vpermt2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x7f, 0xca], "vpermt2pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x83, 0xca], "vpmultishiftqb zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x88, 0x0a], "vexpandpd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x88, 0x4a, 0x01], "vexpandpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x88, 0xca], "vexpandpd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x89, 0x0a], "vpexpandq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x89, 0x4a, 0x01], "vpexpandq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x8]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x89, 0xca], "vpexpandq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x8a, 0xca], "vcompresspd zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x8b, 0xca], "vpcompressq zmm2{k5}{z}, zmm1"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x8d, 0x0a], "vpermw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x8d, 0x4a, 0x01], "vpermw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x8d, 0xca], "vpermw zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x98, 0x0a], "vfmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb4, 0xca], "vpmadd52luq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb5, 0xca], "vpmadd52huq zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xba, 0x0a], "vfmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xc4, 0x0a], "vpconflictq zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xc4, 0xca], "vpconflictq zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xc8, 0x0a], "vexp2pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xc8, 0xca], "vexp2pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xca, 0x0a], "vrcp28pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xca, 0xca], "vrcp28pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}{z}, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xcd, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}{z}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x0d, 0x0a], "vpermilpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x0d, 0x4a, 0x01], "vpermilpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x14, 0x0a], "vprorvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x14, 0x4a, 0x01], "vprorvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x15, 0x0a], "vprolvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x15, 0x4a, 0x01], "vprolvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x16, 0x0a], "vpermpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x16, 0x4a, 0x01], "vpermpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x1f, 0x0a], "vpabsq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x1f, 0x4a, 0x01], "vpabsq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x28, 0x0a], "vpmuldq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x28, 0x4a, 0x01], "vpmuldq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x2c, 0x0a], "vscalefpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x2c, 0x4a, 0x01], "vscalefpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x36, 0x0a], "vpermq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x36, 0x4a, 0x01], "vpermq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x39, 0x0a], "vpminsq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x39, 0x4a, 0x01], "vpminsq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x3b, 0x0a], "vpminuq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x3b, 0x4a, 0x01], "vpminuq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x3d, 0x0a], "vpmaxsq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x3d, 0x4a, 0x01], "vpmaxsq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x3f, 0x0a], "vpmaxuq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x3f, 0x4a, 0x01], "vpmaxuq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x40, 0x0a], "vpmullq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x40, 0x4a, 0x01], "vpmullq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x42, 0x0a], "vgetexppd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x42, 0x4a, 0x01], "vgetexppd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x44, 0x0a], "vplzcntq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x44, 0x4a, 0x01], "vplzcntq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x45, 0x0a], "vpsrlvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x45, 0x4a, 0x01], "vpsrlvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x46, 0x0a], "vpsravq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x46, 0x4a, 0x01], "vpsravq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x47, 0x0a], "vpsllvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x47, 0x4a, 0x01], "vpsllvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x4c, 0x0a], "vrcp14pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x4c, 0x4a, 0x01], "vrcp14pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x4e, 0x0a], "vrsqrt14pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x4e, 0x4a, 0x01], "vrsqrt14pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x55, 0x0a], "vpopcntq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x55, 0x4a, 0x01], "vpopcntq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x64, 0x0a], "vpblendmq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x64, 0x4a, 0x01], "vpblendmq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x65, 0x0a], "vblendmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x65, 0x4a, 0x01], "vblendmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x71, 0x0a], "vpshldvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x71, 0x4a, 0x01], "vpshldvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x73, 0x0a], "vpshrdvq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x73, 0x4a, 0x01], "vpshrdvq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x76, 0x0a], "vpermi2q zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x76, 0x4a, 0x01], "vpermi2q zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x77, 0x0a], "vpermi2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x77, 0x4a, 0x01], "vpermi2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x7e, 0x0a], "vpermt2q zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x7e, 0x4a, 0x01], "vpermt2q zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x7f, 0x0a], "vpermt2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x7f, 0x4a, 0x01], "vpermt2pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x83, 0x0a], "vpmultishiftqb zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x83, 0x4a, 0x01], "vpmultishiftqb zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x96, 0x0a], "vfmaddsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x96, 0x4a, 0x01], "vfmaddsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x97, 0x0a], "vfmsubadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x97, 0x4a, 0x01], "vfmsubadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x98, 0x0a], "vfmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x98, 0x4a, 0x01], "vfmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9a, 0x0a], "vfmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9a, 0x4a, 0x01], "vfmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9c, 0x0a], "vfnmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9c, 0x4a, 0x01], "vfnmadd132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9e, 0x0a], "vfnmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9e, 0x4a, 0x01], "vfnmsub132pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa6, 0x0a], "vfmaddsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa6, 0x4a, 0x01], "vfmaddsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa7, 0x0a], "vfmsubadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa7, 0x4a, 0x01], "vfmsubadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa8, 0x0a], "vfmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa8, 0x4a, 0x01], "vfmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xaa, 0x0a], "vfmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xaa, 0x4a, 0x01], "vfmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xac, 0x0a], "vfnmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xac, 0x4a, 0x01], "vfnmadd213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xae, 0x0a], "vfnmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xae, 0x4a, 0x01], "vfnmsub213pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb4, 0x0a], "vpmadd52luq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb4, 0x4a, 0x01], "vpmadd52luq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb5, 0x0a], "vpmadd52huq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb5, 0x4a, 0x01], "vpmadd52huq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb6, 0x0a], "vfmaddsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb6, 0x4a, 0x01], "vfmaddsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb7, 0x0a], "vfmsubadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb7, 0x4a, 0x01], "vfmsubadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb8, 0x0a], "vfmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb8, 0x4a, 0x01], "vfmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xba, 0x0a], "vfmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xba, 0x4a, 0x01], "vfmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbc, 0x0a], "vfnmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbc, 0x4a, 0x01], "vfnmadd231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbe, 0x0a], "vfnmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbe, 0x4a, 0x01], "vfnmsub231pd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{ru-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{ru-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xc4, 0x0a], "vpconflictq zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xc4, 0x4a, 0x01], "vpconflictq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xc8, 0x0a], "vexp2pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xc8, 0x4a, 0x01], "vexp2pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xca, 0x0a], "vrcp28pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xca, 0x4a, 0x01], "vrcp28pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xcc, 0x0a], "vrsqrt28pd zmm1{k5}{z}, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xdd, 0xcc, 0x4a, 0x01], "vrsqrt28pd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x2c, 0xca], "vscalefpd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x2d, 0xca], "vscalefsd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x42, 0xca], "vgetexppd zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x43, 0xca], "vgetexpsd xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x96, 0xca], "vfmaddsub132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x97, 0xca], "vfmsubadd132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x98, 0xca], "vfmadd132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x99, 0xca], "vfmadd132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x9a, 0xca], "vfmsub132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x9b, 0xca], "vfmsub132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x9c, 0xca], "vfnmadd132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x9d, 0xca], "vfnmadd132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x9e, 0xca], "vfnmsub132pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0x9f, 0xca], "vfnmsub132sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xa6, 0xca], "vfmaddsub213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xa7, 0xca], "vfmsubadd213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xa8, 0xca], "vfmadd213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xa9, 0xca], "vfmadd213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xaa, 0xca], "vfmsub213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xab, 0xca], "vfmsub213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xac, 0xca], "vfnmadd213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xad, 0xca], "vfnmadd213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xae, 0xca], "vfnmsub213pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xaf, 0xca], "vfnmsub213sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xb6, 0xca], "vfmaddsub231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xb7, 0xca], "vfmsubadd231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xb8, 0xca], "vfmadd231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xb9, 0xca], "vfmadd231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xba, 0xca], "vfmsub231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xbb, 0xca], "vfmsub231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xbc, 0xca], "vfnmadd231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xbd, 0xca], "vfnmadd231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xbe, 0xca], "vfnmsub231pd zmm1{k5}{z}{rz-sae}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xbf, 0xca], "vfnmsub231sd xmm1{k5}{z}{rz-sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xc8, 0xca], "vexp2pd zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xca, 0xca], "vrcp28pd zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xcb, 0xca], "vrcp28sd xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xcc, 0xca], "vrsqrt28pd zmm1{k5}{z}{sae}, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0xfd, 0xcd, 0xca], "vrsqrt28sd xmm1{k5}{z}{sae}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x26, 0x0a], "vptestnmw k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x26, 0x4a, 0x01], "vptestnmw k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x26, 0xca], "vptestnmw k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x27, 0x0a], "vptestnmq k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x27, 0x4a, 0x01], "vptestnmq k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x27, 0xca], "vptestnmq k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x28, 0xca], "vpmovm2w xmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x29, 0xca], "vpmovw2m k1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x2a, 0xca], "vpbroadcastmb2q xmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x38, 0xca], "vpmovm2q xmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x08, 0x39, 0xca], "vpmovq2m k1, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x0d, 0x26, 0x0a], "vptestnmw k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x0d, 0x26, 0x4a, 0x01], "vptestnmw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x0d, 0x26, 0xca], "vptestnmw k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x0d, 0x27, 0x0a], "vptestnmq k1{k5}, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x0d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x0d, 0x27, 0xca], "vptestnmq k1{k5}, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x18, 0x27, 0x0a], "vptestnmq k1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x18, 0x27, 0x4a, 0x01], "vptestnmq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x1d, 0x27, 0x0a], "vptestnmq k1{k5}, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x1d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x26, 0x0a], "vptestnmw k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x26, 0x4a, 0x01], "vptestnmw k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x26, 0xca], "vptestnmw k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x27, 0x0a], "vptestnmq k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x27, 0x4a, 0x01], "vptestnmq k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x27, 0xca], "vptestnmq k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x28, 0xca], "vpmovm2w ymm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x29, 0xca], "vpmovw2m k1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x2a, 0xca], "vpbroadcastmb2q ymm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x38, 0xca], "vpmovm2q ymm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x28, 0x39, 0xca], "vpmovq2m k1, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x2d, 0x26, 0x0a], "vptestnmw k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x2d, 0x26, 0x4a, 0x01], "vptestnmw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x2d, 0x26, 0xca], "vptestnmw k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x2d, 0x27, 0x0a], "vptestnmq k1{k5}, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x2d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x2d, 0x27, 0xca], "vptestnmq k1{k5}, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x38, 0x27, 0x0a], "vptestnmq k1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x38, 0x27, 0x4a, 0x01], "vptestnmq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x3d, 0x27, 0x0a], "vptestnmq k1{k5}, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x3d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x26, 0x0a], "vptestnmw k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x26, 0x4a, 0x01], "vptestnmw k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x26, 0xca], "vptestnmw k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x27, 0x0a], "vptestnmq k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x27, 0x4a, 0x01], "vptestnmq k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x27, 0xca], "vptestnmq k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x28, 0xca], "vpmovm2w zmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x29, 0xca], "vpmovw2m k1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x2a, 0xca], "vpbroadcastmb2q zmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x38, 0xca], "vpmovm2q zmm1, k2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x48, 0x39, 0xca], "vpmovq2m k1, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x4d, 0x26, 0x0a], "vptestnmw k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x4d, 0x26, 0x4a, 0x01], "vptestnmw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x4d, 0x26, 0xca], "vptestnmw k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x4d, 0x27, 0x0a], "vptestnmq k1{k5}, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x4d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x4d, 0x27, 0xca], "vptestnmq k1{k5}, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x58, 0x27, 0x0a], "vptestnmq k1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x58, 0x27, 0x4a, 0x01], "vptestnmq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x5d, 0x27, 0x0a], "vptestnmq k1{k5}, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xfe, 0x5d, 0x27, 0x4a, 0x01], "vptestnmq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x08, 0x68, 0x0a], "vp2intersectq k1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x08, 0x68, 0x4a, 0x01], "vp2intersectq k1, xmm0, xmmword [bp + si * 1 + 0x10]"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x08, 0x68, 0xca], "vp2intersectq k1, xmm0, xmm2"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x18, 0x68, 0x0a], "vp2intersectq k1, xmm0, qword [bp + si * 1]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x18, 0x68, 0x4a, 0x01], "vp2intersectq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x28, 0x68, 0x0a], "vp2intersectq k1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x28, 0x68, 0x4a, 0x01], "vp2intersectq k1, ymm0, ymmword [bp + si * 1 + 0x20]"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x28, 0x68, 0xca], "vp2intersectq k1, ymm0, ymm2"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x38, 0x68, 0x0a], "vp2intersectq k1, ymm0, qword [bp + si * 1]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x38, 0x68, 0x4a, 0x01], "vp2intersectq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x48, 0x68, 0x0a], "vp2intersectq k1, zmm0, zmmword [bp + si * 1]"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x48, 0x68, 0x4a, 0x01], "vp2intersectq k1, zmm0, zmmword [bp + si * 1 + 0x40]"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x48, 0x68, 0xca], "vp2intersectq k1, zmm0, zmm2"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x58, 0x68, 0x0a], "vp2intersectq k1, zmm0, qword [bp + si * 1]{1to8}"),
+        testcase!(&[0x62, 0xf2, 0xff, 0x58, 0x68, 0x4a, 0x01], "vp2intersectq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x03, 0x0a, 0xcc], "valignd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x03, 0xca, 0xcc], "valignd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x04, 0x0a, 0xcc], "vpermilps xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x04, 0xca, 0xcc], "vpermilps xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x08, 0xca, 0xcc], "vrndscaleps xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1d, 0x0a, 0xcc], "vcvtps2ph qword [bp + si * 1], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph qword [bp + si * 1 + 0x8], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1e, 0x0a, 0xcc], "vpcmpud k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1e, 0xca, 0xcc], "vpcmpud k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1f, 0x0a, 0xcc], "vpcmpd k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x1f, 0xca, 0xcc], "vpcmpd k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x21, 0x0a, 0xcc], "vinsertps xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x21, 0x4a, 0x01, 0xcc], "vinsertps xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x21, 0xca, 0xcc], "vinsertps xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x25, 0x0a, 0xcc], "vpternlogd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x25, 0xca, 0xcc], "vpternlogd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x26, 0x0a, 0xcc], "vgetmantps xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x26, 0xca, 0xcc], "vgetmantps xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x3e, 0x0a, 0xcc], "vpcmpub k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x3e, 0xca, 0xcc], "vpcmpub k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x3f, 0x0a, 0xcc], "vpcmpb k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x3f, 0xca, 0xcc], "vpcmpb k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x42, 0x0a, 0xcc], "vdbpsadbw xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x42, 0xca, 0xcc], "vdbpsadbw xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x50, 0x0a, 0xcc], "vrangeps xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x50, 0xca, 0xcc], "vrangeps xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x54, 0xca, 0xcc], "vfixupimmps xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x56, 0x0a, 0xcc], "vreduceps xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x56, 0xca, 0xcc], "vreduceps xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x66, 0x0a, 0xcc], "vfpclassps k1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x66, 0xca, 0xcc], "vfpclassps k1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x71, 0x0a, 0xcc], "vpshldd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x71, 0xca, 0xcc], "vpshldd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x73, 0x0a, 0xcc], "vpshrdd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x08, 0x73, 0xca, 0xcc], "vpshrdd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x03, 0xca, 0xcc], "valignd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x04, 0xca, 0xcc], "vpermilps xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x08, 0xca, 0xcc], "vrndscaleps xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1d, 0x0a, 0xcc], "vcvtps2ph qword [bp + si * 1]{k5}, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph qword [bp + si * 1 + 0x8]{k5}, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1e, 0xca, 0xcc], "vpcmpud k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x1f, 0xca, 0xcc], "vpcmpd k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x25, 0xca, 0xcc], "vpternlogd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x26, 0xca, 0xcc], "vgetmantps xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x3e, 0x0a, 0xcc], "vpcmpub k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x3e, 0xca, 0xcc], "vpcmpub k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x3f, 0x0a, 0xcc], "vpcmpb k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x3f, 0xca, 0xcc], "vpcmpb k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x42, 0x0a, 0xcc], "vdbpsadbw xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x42, 0xca, 0xcc], "vdbpsadbw xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x50, 0xca, 0xcc], "vrangeps xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x54, 0xca, 0xcc], "vfixupimmps xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x56, 0xca, 0xcc], "vreduceps xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x66, 0xca, 0xcc], "vfpclassps k1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x71, 0xca, 0xcc], "vpshldd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x0d, 0x73, 0xca, 0xcc], "vpshrdd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x03, 0x0a, 0xcc], "valignd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x04, 0x0a, 0xcc], "vpermilps xmm1, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x1e, 0x0a, 0xcc], "vpcmpud k1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x1f, 0x0a, 0xcc], "vpcmpd k1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x25, 0x0a, 0xcc], "vpternlogd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x26, 0x0a, 0xcc], "vgetmantps xmm1, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x50, 0x0a, 0xcc], "vrangeps xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x56, 0x0a, 0xcc], "vreduceps xmm1, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x66, 0x0a, 0xcc], "vfpclassps k1, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x71, 0x0a, 0xcc], "vpshldd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x73, 0x0a, 0xcc], "vpshrdd xmm1, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x18, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x1d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x03, 0x0a, 0xcc], "valignd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x03, 0xca, 0xcc], "valignd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x04, 0x0a, 0xcc], "vpermilps ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x04, 0xca, 0xcc], "vpermilps ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x08, 0xca, 0xcc], "vrndscaleps ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x0a, 0x0a, 0xcc], "vrndscaless xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x0a, 0x4a, 0x01, 0xcc], "vrndscaless xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x0a, 0xca, 0xcc], "vrndscaless xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x18, 0x0a, 0xcc], "vinsertf32x4 ymm1, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x18, 0xca, 0xcc], "vinsertf32x4 ymm1, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1d, 0x0a, 0xcc], "vcvtps2ph xmmword [bp + si * 1], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph xmmword [bp + si * 1 + 0x10], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1e, 0x0a, 0xcc], "vpcmpud k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1e, 0xca, 0xcc], "vpcmpud k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1f, 0x0a, 0xcc], "vpcmpd k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x1f, 0xca, 0xcc], "vpcmpd k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x23, 0xca, 0xcc], "vshuff32x4 ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x25, 0x0a, 0xcc], "vpternlogd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x25, 0xca, 0xcc], "vpternlogd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x26, 0x0a, 0xcc], "vgetmantps ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x26, 0xca, 0xcc], "vgetmantps ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x27, 0x0a, 0xcc], "vgetmantss xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x27, 0x4a, 0x01, 0xcc], "vgetmantss xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x27, 0xca, 0xcc], "vgetmantss xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x38, 0x0a, 0xcc], "vinserti32x4 ymm1, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x38, 0xca, 0xcc], "vinserti32x4 ymm1, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x3e, 0x0a, 0xcc], "vpcmpub k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x3e, 0xca, 0xcc], "vpcmpub k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x3f, 0x0a, 0xcc], "vpcmpb k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x3f, 0xca, 0xcc], "vpcmpb k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x42, 0x0a, 0xcc], "vdbpsadbw ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x42, 0xca, 0xcc], "vdbpsadbw ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x43, 0xca, 0xcc], "vshufi32x4 ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x50, 0x0a, 0xcc], "vrangeps ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x50, 0xca, 0xcc], "vrangeps ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x51, 0x0a, 0xcc], "vrangess xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x51, 0x4a, 0x01, 0xcc], "vrangess xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x51, 0xca, 0xcc], "vrangess xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x54, 0xca, 0xcc], "vfixupimmps ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x55, 0x0a, 0xcc], "vfixupimmss xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmss xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x55, 0xca, 0xcc], "vfixupimmss xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x56, 0x0a, 0xcc], "vreduceps ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x56, 0xca, 0xcc], "vreduceps ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x57, 0x0a, 0xcc], "vreducess xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x57, 0x4a, 0x01, 0xcc], "vreducess xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x57, 0xca, 0xcc], "vreducess xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x66, 0x0a, 0xcc], "vfpclassps k1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x66, 0xca, 0xcc], "vfpclassps k1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x67, 0x0a, 0xcc], "vfpclassss k1, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x67, 0x4a, 0x01, 0xcc], "vfpclassss k1, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x67, 0xca, 0xcc], "vfpclassss k1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x71, 0x0a, 0xcc], "vpshldd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x71, 0xca, 0xcc], "vpshldd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x73, 0x0a, 0xcc], "vpshrdd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x28, 0x73, 0xca, 0xcc], "vpshrdd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x03, 0xca, 0xcc], "valignd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x04, 0xca, 0xcc], "vpermilps ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x08, 0xca, 0xcc], "vrndscaleps ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x0a, 0x0a, 0xcc], "vrndscaless xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x0a, 0x4a, 0x01, 0xcc], "vrndscaless xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x18, 0x0a, 0xcc], "vinsertf32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x18, 0xca, 0xcc], "vinsertf32x4 ymm1{k5}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1d, 0x0a, 0xcc], "vcvtps2ph xmmword [bp + si * 1]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1e, 0xca, 0xcc], "vpcmpud k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x1f, 0xca, 0xcc], "vpcmpd k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x23, 0xca, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x25, 0xca, 0xcc], "vpternlogd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x26, 0xca, 0xcc], "vgetmantps ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x27, 0x0a, 0xcc], "vgetmantss xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x27, 0x4a, 0x01, 0xcc], "vgetmantss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x38, 0x0a, 0xcc], "vinserti32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x38, 0xca, 0xcc], "vinserti32x4 ymm1{k5}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x3e, 0x0a, 0xcc], "vpcmpub k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x3e, 0xca, 0xcc], "vpcmpub k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x3f, 0x0a, 0xcc], "vpcmpb k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x3f, 0xca, 0xcc], "vpcmpb k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x42, 0x0a, 0xcc], "vdbpsadbw ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x42, 0xca, 0xcc], "vdbpsadbw ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x43, 0xca, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x50, 0xca, 0xcc], "vrangeps ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x51, 0x0a, 0xcc], "vrangess xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x51, 0x4a, 0x01, 0xcc], "vrangess xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x54, 0xca, 0xcc], "vfixupimmps ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x55, 0x0a, 0xcc], "vfixupimmss xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmss xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x56, 0xca, 0xcc], "vreduceps ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x57, 0x0a, 0xcc], "vreducess xmm1{k5}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x57, 0x4a, 0x01, 0xcc], "vreducess xmm1{k5}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x66, 0xca, 0xcc], "vfpclassps k1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x67, 0x0a, 0xcc], "vfpclassss k1{k5}, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x67, 0x4a, 0x01, 0xcc], "vfpclassss k1{k5}, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x67, 0xca, 0xcc], "vfpclassss k1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x71, 0xca, 0xcc], "vpshldd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x2d, 0x73, 0xca, 0xcc], "vpshrdd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x03, 0x0a, 0xcc], "valignd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x04, 0x0a, 0xcc], "vpermilps ymm1, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x1e, 0x0a, 0xcc], "vpcmpud k1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x1f, 0x0a, 0xcc], "vpcmpd k1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x25, 0x0a, 0xcc], "vpternlogd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x26, 0x0a, 0xcc], "vgetmantps ymm1, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x50, 0x0a, 0xcc], "vrangeps ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x56, 0x0a, 0xcc], "vreduceps ymm1, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x66, 0x0a, 0xcc], "vfpclassps k1, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x71, 0x0a, 0xcc], "vpshldd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x73, 0x0a, 0xcc], "vpshrdd ymm1, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x38, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x3d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x03, 0x0a, 0xcc], "valignd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x03, 0xca, 0xcc], "valignd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x04, 0x0a, 0xcc], "vpermilps zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x04, 0xca, 0xcc], "vpermilps zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x08, 0xca, 0xcc], "vrndscaleps zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x18, 0x0a, 0xcc], "vinsertf32x4 zmm1, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x18, 0xca, 0xcc], "vinsertf32x4 zmm1, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1a, 0x0a, 0xcc], "vinsertf32x8 zmm1, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf32x8 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1a, 0xca, 0xcc], "vinsertf32x8 zmm1, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1b, 0x0a, 0xcc], "vextractf32x8 ymmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1b, 0x4a, 0x01, 0xcc], "vextractf32x8 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1b, 0xca, 0xcc], "vextractf32x8 ymm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1d, 0x0a, 0xcc], "vcvtps2ph ymmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph ymmword [bp + si * 1 + 0x20], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1e, 0x0a, 0xcc], "vpcmpud k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1e, 0xca, 0xcc], "vpcmpud k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1f, 0x0a, 0xcc], "vpcmpd k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x1f, 0xca, 0xcc], "vpcmpd k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x23, 0xca, 0xcc], "vshuff32x4 zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x25, 0x0a, 0xcc], "vpternlogd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x25, 0xca, 0xcc], "vpternlogd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x26, 0x0a, 0xcc], "vgetmantps zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x26, 0xca, 0xcc], "vgetmantps zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x38, 0x0a, 0xcc], "vinserti32x4 zmm1, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x38, 0xca, 0xcc], "vinserti32x4 zmm1, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3a, 0x0a, 0xcc], "vinserti32x8 zmm1, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3a, 0x4a, 0x01, 0xcc], "vinserti32x8 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3a, 0xca, 0xcc], "vinserti32x8 zmm1, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3b, 0x0a, 0xcc], "vextracti32x8 ymmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3b, 0x4a, 0x01, 0xcc], "vextracti32x8 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3b, 0xca, 0xcc], "vextracti32x8 ymm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3e, 0x0a, 0xcc], "vpcmpub k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3e, 0xca, 0xcc], "vpcmpub k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3f, 0x0a, 0xcc], "vpcmpb k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x3f, 0xca, 0xcc], "vpcmpb k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x42, 0x0a, 0xcc], "vdbpsadbw zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x42, 0xca, 0xcc], "vdbpsadbw zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x43, 0xca, 0xcc], "vshufi32x4 zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x50, 0x0a, 0xcc], "vrangeps zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x50, 0xca, 0xcc], "vrangeps zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x54, 0xca, 0xcc], "vfixupimmps zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x56, 0x0a, 0xcc], "vreduceps zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x56, 0xca, 0xcc], "vreduceps zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x66, 0x0a, 0xcc], "vfpclassps k1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x66, 0xca, 0xcc], "vfpclassps k1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x71, 0x0a, 0xcc], "vpshldd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x71, 0xca, 0xcc], "vpshldd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x73, 0x0a, 0xcc], "vpshrdd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x48, 0x73, 0xca, 0xcc], "vpshrdd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x03, 0xca, 0xcc], "valignd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x04, 0xca, 0xcc], "vpermilps zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x18, 0x0a, 0xcc], "vinsertf32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x18, 0xca, 0xcc], "vinsertf32x4 zmm1{k5}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x19, 0x0a, 0xcc], "vextractf32x4 xmmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x19, 0x4a, 0x01, 0xcc], "vextractf32x4 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1a, 0x0a, 0xcc], "vinsertf32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1a, 0xca, 0xcc], "vinsertf32x8 zmm1{k5}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1b, 0x0a, 0xcc], "vextractf32x8 ymmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1b, 0x4a, 0x01, 0xcc], "vextractf32x8 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1b, 0xca, 0xcc], "vextractf32x8 ymm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0x0a, 0xcc], "vcvtps2ph ymmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0x4a, 0x01, 0xcc], "vcvtps2ph ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1e, 0xca, 0xcc], "vpcmpud k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x1f, 0xca, 0xcc], "vpcmpd k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x23, 0xca, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x25, 0xca, 0xcc], "vpternlogd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x38, 0x0a, 0xcc], "vinserti32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x38, 0xca, 0xcc], "vinserti32x4 zmm1{k5}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x39, 0x0a, 0xcc], "vextracti32x4 xmmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x39, 0x4a, 0x01, 0xcc], "vextracti32x4 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3a, 0x0a, 0xcc], "vinserti32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3a, 0x4a, 0x01, 0xcc], "vinserti32x8 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3a, 0xca, 0xcc], "vinserti32x8 zmm1{k5}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3b, 0x0a, 0xcc], "vextracti32x8 ymmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3b, 0x4a, 0x01, 0xcc], "vextracti32x8 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3b, 0xca, 0xcc], "vextracti32x8 ymm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3e, 0x0a, 0xcc], "vpcmpub k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpub k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3e, 0xca, 0xcc], "vpcmpub k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3f, 0x0a, 0xcc], "vpcmpb k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpb k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x3f, 0xca, 0xcc], "vpcmpb k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x42, 0x0a, 0xcc], "vdbpsadbw zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x42, 0xca, 0xcc], "vdbpsadbw zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x43, 0xca, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x66, 0xca, 0xcc], "vfpclassps k1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x71, 0xca, 0xcc], "vpshldd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x4d, 0x73, 0xca, 0xcc], "vpshrdd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x03, 0x0a, 0xcc], "valignd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x04, 0x0a, 0xcc], "vpermilps zmm1, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x1e, 0x0a, 0xcc], "vpcmpud k1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x1f, 0x0a, 0xcc], "vpcmpd k1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x25, 0x0a, 0xcc], "vpternlogd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x26, 0x0a, 0xcc], "vgetmantps zmm1, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x50, 0x0a, 0xcc], "vrangeps zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x56, 0x0a, 0xcc], "vreduceps zmm1, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x66, 0x0a, 0xcc], "vfpclassps k1, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x71, 0x0a, 0xcc], "vpshldd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x73, 0x0a, 0xcc], "vpshrdd zmm1, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x58, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x1e, 0x0a, 0xcc], "vpcmpud k1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpud k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x1f, 0x0a, 0xcc], "vpcmpd k1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpd k1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x66, 0x0a, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x66, 0x4a, 0x01, 0xcc], "vfpclassps k1{k5}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x5d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{sae}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x26, 0xca, 0xcc], "vgetmantps zmm1{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x27, 0xca, 0xcc], "vgetmantss xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x50, 0xca, 0xcc], "vrangeps zmm1{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x51, 0xca, 0xcc], "vrangess xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x56, 0xca, 0xcc], "vreduceps zmm1{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x78, 0x57, 0xca, 0xcc], "vreducess xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}{sae}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x7d, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x03, 0xca, 0xcc], "valignd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x04, 0xca, 0xcc], "vpermilps xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x08, 0xca, 0xcc], "vrndscaleps xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}{z}, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x25, 0xca, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x26, 0xca, 0xcc], "vgetmantps xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x42, 0x0a, 0xcc], "vdbpsadbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x42, 0xca, 0xcc], "vdbpsadbw xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x50, 0xca, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x54, 0xca, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x56, 0xca, 0xcc], "vreduceps xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x71, 0xca, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x8d, 0x73, 0xca, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x03, 0x0a, 0xcc], "valignd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x03, 0x4a, 0x01, 0xcc], "valignd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x04, 0x0a, 0xcc], "vpermilps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x04, 0x4a, 0x01, 0xcc], "vpermilps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x08, 0x0a, 0xcc], "vrndscaleps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x25, 0x0a, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x26, 0x0a, 0xcc], "vgetmantps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x50, 0x0a, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x50, 0x4a, 0x01, 0xcc], "vrangeps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x54, 0x0a, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x56, 0x0a, 0xcc], "vreduceps xmm1{k5}{z}, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x56, 0x4a, 0x01, 0xcc], "vreduceps xmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x71, 0x0a, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x71, 0x4a, 0x01, 0xcc], "vpshldd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x73, 0x0a, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, dword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0x9d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x03, 0xca, 0xcc], "valignd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x04, 0xca, 0xcc], "vpermilps ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x08, 0xca, 0xcc], "vrndscaleps ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x0a, 0x0a, 0xcc], "vrndscaless xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x0a, 0x4a, 0x01, 0xcc], "vrndscaless xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x18, 0x0a, 0xcc], "vinsertf32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x18, 0xca, 0xcc], "vinsertf32x4 ymm1{k5}{z}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}{z}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x1d, 0xca, 0xcc], "vcvtps2ph xmm2{k5}{z}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x23, 0xca, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x25, 0xca, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x26, 0xca, 0xcc], "vgetmantps ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x27, 0x0a, 0xcc], "vgetmantss xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x27, 0x4a, 0x01, 0xcc], "vgetmantss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x38, 0x0a, 0xcc], "vinserti32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x38, 0xca, 0xcc], "vinserti32x4 ymm1{k5}{z}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}{z}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x42, 0x0a, 0xcc], "vdbpsadbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x42, 0xca, 0xcc], "vdbpsadbw ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x43, 0xca, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x50, 0xca, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x51, 0x0a, 0xcc], "vrangess xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x51, 0x4a, 0x01, 0xcc], "vrangess xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x54, 0xca, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x55, 0x0a, 0xcc], "vfixupimmss xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmss xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x56, 0xca, 0xcc], "vreduceps ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x57, 0x0a, 0xcc], "vreducess xmm1{k5}{z}, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x57, 0x4a, 0x01, 0xcc], "vreducess xmm1{k5}{z}, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x71, 0xca, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xad, 0x73, 0xca, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x03, 0x0a, 0xcc], "valignd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x03, 0x4a, 0x01, 0xcc], "valignd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x04, 0x0a, 0xcc], "vpermilps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x04, 0x4a, 0x01, 0xcc], "vpermilps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x08, 0x0a, 0xcc], "vrndscaleps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x23, 0x0a, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x25, 0x0a, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x26, 0x0a, 0xcc], "vgetmantps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x43, 0x0a, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x50, 0x0a, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x50, 0x4a, 0x01, 0xcc], "vrangeps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x54, 0x0a, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x56, 0x0a, 0xcc], "vreduceps ymm1{k5}{z}, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x56, 0x4a, 0x01, 0xcc], "vreduceps ymm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x71, 0x0a, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x71, 0x4a, 0x01, 0xcc], "vpshldd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x73, 0x0a, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, dword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xbd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd ymm1{k5}{z}, ymm0, dword [bp + si * 1 + 0x4]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x03, 0xca, 0xcc], "valignd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x04, 0xca, 0xcc], "vpermilps zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x18, 0x0a, 0xcc], "vinsertf32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x18, 0x4a, 0x01, 0xcc], "vinsertf32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x18, 0xca, 0xcc], "vinsertf32x4 zmm1{k5}{z}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x19, 0xca, 0xcc], "vextractf32x4 xmm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x1a, 0x0a, 0xcc], "vinsertf32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x1a, 0xca, 0xcc], "vinsertf32x8 zmm1{k5}{z}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x1b, 0xca, 0xcc], "vextractf32x8 ymm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x23, 0xca, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x25, 0xca, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x38, 0x0a, 0xcc], "vinserti32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x38, 0x4a, 0x01, 0xcc], "vinserti32x4 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x38, 0xca, 0xcc], "vinserti32x4 zmm1{k5}{z}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x39, 0xca, 0xcc], "vextracti32x4 xmm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x3a, 0x0a, 0xcc], "vinserti32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x3a, 0x4a, 0x01, 0xcc], "vinserti32x8 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x3a, 0xca, 0xcc], "vinserti32x8 zmm1{k5}{z}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x3b, 0xca, 0xcc], "vextracti32x8 ymm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x42, 0x0a, 0xcc], "vdbpsadbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x42, 0x4a, 0x01, 0xcc], "vdbpsadbw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x42, 0xca, 0xcc], "vdbpsadbw zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x43, 0xca, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x71, 0xca, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xcd, 0x73, 0xca, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x03, 0x0a, 0xcc], "valignd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x03, 0x4a, 0x01, 0xcc], "valignd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x04, 0x0a, 0xcc], "vpermilps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x04, 0x4a, 0x01, 0xcc], "vpermilps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x08, 0x0a, 0xcc], "vrndscaleps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x08, 0x4a, 0x01, 0xcc], "vrndscaleps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x23, 0x0a, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x23, 0x4a, 0x01, 0xcc], "vshuff32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x25, 0x0a, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x26, 0x0a, 0xcc], "vgetmantps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x43, 0x0a, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x43, 0x4a, 0x01, 0xcc], "vshufi32x4 zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x50, 0x0a, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x50, 0x4a, 0x01, 0xcc], "vrangeps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x54, 0x0a, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmps zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x56, 0x0a, 0xcc], "vreduceps zmm1{k5}{z}, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x56, 0x4a, 0x01, 0xcc], "vreduceps zmm1{k5}{z}, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x71, 0x0a, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x71, 0x4a, 0x01, 0xcc], "vpshldd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x73, 0x0a, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, dword [bp + si * 1]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xdd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdd zmm1{k5}{z}, zmm0, dword [bp + si * 1 + 0x4]{1to16}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x08, 0xca, 0xcc], "vrndscaleps zmm1{k5}{z}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x0a, 0xca, 0xcc], "vrndscaless xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x1d, 0xca, 0xcc], "vcvtps2ph ymm2{k5}{z}{sae}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x26, 0xca, 0xcc], "vgetmantps zmm1{k5}{z}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x27, 0xca, 0xcc], "vgetmantss xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x50, 0xca, 0xcc], "vrangeps zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x51, 0xca, 0xcc], "vrangess xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x54, 0xca, 0xcc], "vfixupimmps zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x55, 0xca, 0xcc], "vfixupimmss xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x56, 0xca, 0xcc], "vreduceps zmm1{k5}{z}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0x7d, 0xfd, 0x57, 0xca, 0xcc], "vreducess xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x03, 0x0a, 0xcc], "valignq xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x03, 0xca, 0xcc], "valignq xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x05, 0x0a, 0xcc], "vpermilpd xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x05, 0xca, 0xcc], "vpermilpd xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x09, 0xca, 0xcc], "vrndscalepd xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x0f, 0x0a, 0xcc], "vpalignr xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x0f, 0xca, 0xcc], "vpalignr xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x14, 0x0a, 0xcc], "vpextrb byte [bp + si * 1], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x14, 0x4a, 0x01, 0xcc], "vpextrb byte [bp + si * 1 + 0x1], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x14, 0xca, 0xcc], "vpextrb edx, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x15, 0x0a, 0xcc], "vpextrw word [bp + si * 1], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x15, 0x4a, 0x01, 0xcc], "vpextrw word [bp + si * 1 + 0x2], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x15, 0xca, 0xcc], "vpextrw edx, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x16, 0x0a, 0xcc], "vpextrd dword [bp + si * 1], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x16, 0x4a, 0x01, 0xcc], "vpextrd dword [bp + si * 1 + 0x4], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x16, 0xca, 0xcc], "vpextrd edx, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x17, 0x0a, 0xcc], "vextractps dword [bp + si * 1], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x17, 0x4a, 0x01, 0xcc], "vextractps dword [bp + si * 1 + 0x4], xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x17, 0xca, 0xcc], "vextractps edx, xmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x1e, 0xca, 0xcc], "vpcmpuq k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x1f, 0x0a, 0xcc], "vpcmpq k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x1f, 0xca, 0xcc], "vpcmpq k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x20, 0x0a, 0xcc], "vpinsrb xmm1, xmm0, byte [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x20, 0x4a, 0x01, 0xcc], "vpinsrb xmm1, xmm0, byte [bp + si * 1 + 0x1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x20, 0xca, 0xcc], "vpinsrb xmm1, xmm0, edx, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x22, 0x0a, 0xcc], "vpinsrd xmm1, xmm0, dword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x22, 0x4a, 0x01, 0xcc], "vpinsrd xmm1, xmm0, dword [bp + si * 1 + 0x4], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x22, 0xca, 0xcc], "vpinsrd xmm1, xmm0, edx, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x25, 0x0a, 0xcc], "vpternlogq xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x25, 0xca, 0xcc], "vpternlogq xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x26, 0xca, 0xcc], "vgetmantpd xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x3e, 0x0a, 0xcc], "vpcmpuw k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x3e, 0xca, 0xcc], "vpcmpuw k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x3f, 0x0a, 0xcc], "vpcmpw k1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x3f, 0xca, 0xcc], "vpcmpw k1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x44, 0x0a, 0xcc], "vpclmulqdq xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x44, 0x4a, 0x01, 0xcc], "vpclmulqdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x44, 0xca, 0xcc], "vpclmulqdq xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x50, 0x0a, 0xcc], "vrangepd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x50, 0xca, 0xcc], "vrangepd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x54, 0xca, 0xcc], "vfixupimmpd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x56, 0x0a, 0xcc], "vreducepd xmm1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x56, 0xca, 0xcc], "vreducepd xmm1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x66, 0x0a, 0xcc], "vfpclasspd k1, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x66, 0xca, 0xcc], "vfpclasspd k1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x70, 0x0a, 0xcc], "vpshldw xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x70, 0x4a, 0x01, 0xcc], "vpshldw xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x70, 0xca, 0xcc], "vpshldw xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x71, 0x0a, 0xcc], "vpshldq xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x71, 0xca, 0xcc], "vpshldq xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x72, 0x0a, 0xcc], "vpshrdw xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x72, 0xca, 0xcc], "vpshrdw xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x73, 0x0a, 0xcc], "vpshrdq xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0x73, 0xca, 0xcc], "vpshrdq xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0xce, 0xca, 0xcc], "vgf2p8affineqb xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x08, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x03, 0xca, 0xcc], "valignq xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x05, 0xca, 0xcc], "vpermilpd xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x09, 0xca, 0xcc], "vrndscalepd xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x0f, 0x0a, 0xcc], "vpalignr xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x0f, 0xca, 0xcc], "vpalignr xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x1e, 0xca, 0xcc], "vpcmpuq k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x1f, 0xca, 0xcc], "vpcmpq k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x25, 0xca, 0xcc], "vpternlogq xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x26, 0xca, 0xcc], "vgetmantpd xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x3e, 0x0a, 0xcc], "vpcmpuw k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x3e, 0xca, 0xcc], "vpcmpuw k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x3f, 0x0a, 0xcc], "vpcmpw k1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x3f, 0xca, 0xcc], "vpcmpw k1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x50, 0xca, 0xcc], "vrangepd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x54, 0xca, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x56, 0xca, 0xcc], "vreducepd xmm1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x66, 0xca, 0xcc], "vfpclasspd k1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x70, 0x0a, 0xcc], "vpshldw xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x70, 0xca, 0xcc], "vpshldw xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x71, 0xca, 0xcc], "vpshldq xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x72, 0x0a, 0xcc], "vpshrdw xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x72, 0xca, 0xcc], "vpshrdw xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0x73, 0xca, 0xcc], "vpshrdq xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0xce, 0xca, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x0d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x03, 0x0a, 0xcc], "valignq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x05, 0x0a, 0xcc], "vpermilpd xmm1, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x1f, 0x0a, 0xcc], "vpcmpq k1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x25, 0x0a, 0xcc], "vpternlogq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x50, 0x0a, 0xcc], "vrangepd xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x56, 0x0a, 0xcc], "vreducepd xmm1, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x66, 0x0a, 0xcc], "vfpclasspd k1, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x71, 0x0a, 0xcc], "vpshldq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x73, 0x0a, 0xcc], "vpshrdq xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x18, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x1d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x00, 0x0a, 0xcc], "vpermq ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x00, 0xca, 0xcc], "vpermq ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x01, 0x0a, 0xcc], "vpermpd ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x01, 0xca, 0xcc], "vpermpd ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x03, 0x0a, 0xcc], "valignq ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x03, 0xca, 0xcc], "valignq ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x05, 0x0a, 0xcc], "vpermilpd ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x05, 0xca, 0xcc], "vpermilpd ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x09, 0xca, 0xcc], "vrndscalepd ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x0b, 0x0a, 0xcc], "vrndscalesd xmm1, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x0b, 0x4a, 0x01, 0xcc], "vrndscalesd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x0f, 0x0a, 0xcc], "vpalignr ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x0f, 0xca, 0xcc], "vpalignr ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x18, 0x0a, 0xcc], "vinsertf64x2 ymm1, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x18, 0xca, 0xcc], "vinsertf64x2 ymm1, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x1e, 0xca, 0xcc], "vpcmpuq k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x1f, 0x0a, 0xcc], "vpcmpq k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x1f, 0xca, 0xcc], "vpcmpq k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x23, 0xca, 0xcc], "vshuff64x2 ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x25, 0x0a, 0xcc], "vpternlogq ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x25, 0xca, 0xcc], "vpternlogq ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x26, 0xca, 0xcc], "vgetmantpd ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x27, 0x0a, 0xcc], "vgetmantsd xmm1, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x27, 0x4a, 0x01, 0xcc], "vgetmantsd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x27, 0xca, 0xcc], "vgetmantsd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x38, 0x0a, 0xcc], "vinserti64x2 ymm1, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 ymm1, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x38, 0xca, 0xcc], "vinserti64x2 ymm1, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10], ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x3e, 0x0a, 0xcc], "vpcmpuw k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x3e, 0xca, 0xcc], "vpcmpuw k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x3f, 0x0a, 0xcc], "vpcmpw k1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x3f, 0xca, 0xcc], "vpcmpw k1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x43, 0xca, 0xcc], "vshufi64x2 ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x44, 0x0a, 0xcc], "vpclmulqdq ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x44, 0x4a, 0x01, 0xcc], "vpclmulqdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x44, 0xca, 0xcc], "vpclmulqdq ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x50, 0x0a, 0xcc], "vrangepd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x50, 0xca, 0xcc], "vrangepd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x51, 0x0a, 0xcc], "vrangesd xmm1, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x51, 0x4a, 0x01, 0xcc], "vrangesd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x51, 0xca, 0xcc], "vrangesd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x54, 0xca, 0xcc], "vfixupimmpd ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x55, 0x0a, 0xcc], "vfixupimmsd xmm1, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmsd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x56, 0x0a, 0xcc], "vreducepd ymm1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x56, 0xca, 0xcc], "vreducepd ymm1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x57, 0x0a, 0xcc], "vreducesd xmm1, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x57, 0x4a, 0x01, 0xcc], "vreducesd xmm1, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x57, 0xca, 0xcc], "vreducesd xmm1, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x66, 0x0a, 0xcc], "vfpclasspd k1, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x66, 0xca, 0xcc], "vfpclasspd k1, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x67, 0x0a, 0xcc], "vfpclasssd k1, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x67, 0x4a, 0x01, 0xcc], "vfpclasssd k1, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x67, 0xca, 0xcc], "vfpclasssd k1, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x70, 0x0a, 0xcc], "vpshldw ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x70, 0x4a, 0x01, 0xcc], "vpshldw ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x70, 0xca, 0xcc], "vpshldw ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x71, 0x0a, 0xcc], "vpshldq ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x71, 0xca, 0xcc], "vpshldq ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x72, 0x0a, 0xcc], "vpshrdw ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x72, 0xca, 0xcc], "vpshrdw ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x73, 0x0a, 0xcc], "vpshrdq ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0x73, 0xca, 0xcc], "vpshrdq ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0xce, 0xca, 0xcc], "vgf2p8affineqb ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x28, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x00, 0xca, 0xcc], "vpermq ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x01, 0xca, 0xcc], "vpermpd ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x03, 0xca, 0xcc], "valignq ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x05, 0xca, 0xcc], "vpermilpd ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x09, 0xca, 0xcc], "vrndscalepd ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x0b, 0x0a, 0xcc], "vrndscalesd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x0b, 0x4a, 0x01, 0xcc], "vrndscalesd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x0f, 0x0a, 0xcc], "vpalignr ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x0f, 0xca, 0xcc], "vpalignr ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x18, 0x0a, 0xcc], "vinsertf64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x18, 0xca, 0xcc], "vinsertf64x2 ymm1{k5}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x1e, 0xca, 0xcc], "vpcmpuq k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x1f, 0xca, 0xcc], "vpcmpq k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x23, 0xca, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x25, 0xca, 0xcc], "vpternlogq ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x26, 0xca, 0xcc], "vgetmantpd ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x27, 0x0a, 0xcc], "vgetmantsd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x27, 0x4a, 0x01, 0xcc], "vgetmantsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x38, 0x0a, 0xcc], "vinserti64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 ymm1{k5}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x38, 0xca, 0xcc], "vinserti64x2 ymm1{k5}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10]{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x3e, 0x0a, 0xcc], "vpcmpuw k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x3e, 0xca, 0xcc], "vpcmpuw k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x3f, 0x0a, 0xcc], "vpcmpw k1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x3f, 0xca, 0xcc], "vpcmpw k1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x43, 0xca, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x50, 0xca, 0xcc], "vrangepd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x51, 0x0a, 0xcc], "vrangesd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x51, 0x4a, 0x01, 0xcc], "vrangesd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x54, 0xca, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x55, 0x0a, 0xcc], "vfixupimmsd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmsd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x56, 0xca, 0xcc], "vreducepd ymm1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x57, 0x0a, 0xcc], "vreducesd xmm1{k5}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x57, 0x4a, 0x01, 0xcc], "vreducesd xmm1{k5}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x66, 0xca, 0xcc], "vfpclasspd k1{k5}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x67, 0x0a, 0xcc], "vfpclasssd k1{k5}, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x67, 0x4a, 0x01, 0xcc], "vfpclasssd k1{k5}, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x67, 0xca, 0xcc], "vfpclasssd k1{k5}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x70, 0x0a, 0xcc], "vpshldw ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x70, 0xca, 0xcc], "vpshldw ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x71, 0xca, 0xcc], "vpshldq ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x72, 0x0a, 0xcc], "vpshrdw ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x72, 0xca, 0xcc], "vpshrdw ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0x73, 0xca, 0xcc], "vpshrdq ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0xce, 0xca, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x2d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x00, 0x0a, 0xcc], "vpermq ymm1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x01, 0x0a, 0xcc], "vpermpd ymm1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x03, 0x0a, 0xcc], "valignq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x05, 0x0a, 0xcc], "vpermilpd ymm1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x1f, 0x0a, 0xcc], "vpcmpq k1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x25, 0x0a, 0xcc], "vpternlogq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x50, 0x0a, 0xcc], "vrangepd ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x56, 0x0a, 0xcc], "vreducepd ymm1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x66, 0x0a, 0xcc], "vfpclasspd k1, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x71, 0x0a, 0xcc], "vpshldq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x73, 0x0a, 0xcc], "vpshrdq ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x38, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x3d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x00, 0x0a, 0xcc], "vpermq zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x00, 0xca, 0xcc], "vpermq zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x01, 0x0a, 0xcc], "vpermpd zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x01, 0xca, 0xcc], "vpermpd zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x03, 0x0a, 0xcc], "valignq zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x03, 0xca, 0xcc], "valignq zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x05, 0x0a, 0xcc], "vpermilpd zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x05, 0xca, 0xcc], "vpermilpd zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x09, 0xca, 0xcc], "vrndscalepd zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x0f, 0x0a, 0xcc], "vpalignr zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x0f, 0xca, 0xcc], "vpalignr zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x18, 0x0a, 0xcc], "vinsertf64x2 zmm1, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x18, 0xca, 0xcc], "vinsertf64x2 zmm1, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1a, 0x0a, 0xcc], "vinsertf64x4 zmm1, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf64x4 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1a, 0xca, 0xcc], "vinsertf64x4 zmm1, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1b, 0x0a, 0xcc], "vextractf64x4 ymmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1b, 0x4a, 0x01, 0xcc], "vextractf64x4 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1b, 0xca, 0xcc], "vextractf64x4 ymm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1e, 0xca, 0xcc], "vpcmpuq k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1f, 0x0a, 0xcc], "vpcmpq k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x1f, 0xca, 0xcc], "vpcmpq k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x23, 0xca, 0xcc], "vshuff64x2 zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x25, 0x0a, 0xcc], "vpternlogq zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x25, 0xca, 0xcc], "vpternlogq zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x26, 0xca, 0xcc], "vgetmantpd zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x38, 0x0a, 0xcc], "vinserti64x2 zmm1, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 zmm1, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x38, 0xca, 0xcc], "vinserti64x2 zmm1, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3a, 0x0a, 0xcc], "vinserti64x4 zmm1, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3a, 0x4a, 0x01, 0xcc], "vinserti64x4 zmm1, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3a, 0xca, 0xcc], "vinserti64x4 zmm1, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3b, 0x0a, 0xcc], "vextracti64x4 ymmword [bp + si * 1], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3b, 0x4a, 0x01, 0xcc], "vextracti64x4 ymmword [bp + si * 1 + 0x20], zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3b, 0xca, 0xcc], "vextracti64x4 ymm2, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3e, 0x0a, 0xcc], "vpcmpuw k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3e, 0xca, 0xcc], "vpcmpuw k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3f, 0x0a, 0xcc], "vpcmpw k1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x3f, 0xca, 0xcc], "vpcmpw k1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x43, 0xca, 0xcc], "vshufi64x2 zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x44, 0x0a, 0xcc], "vpclmulqdq zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x44, 0x4a, 0x01, 0xcc], "vpclmulqdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x44, 0xca, 0xcc], "vpclmulqdq zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x50, 0x0a, 0xcc], "vrangepd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x50, 0xca, 0xcc], "vrangepd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x56, 0x0a, 0xcc], "vreducepd zmm1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x56, 0xca, 0xcc], "vreducepd zmm1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x66, 0x0a, 0xcc], "vfpclasspd k1, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x66, 0xca, 0xcc], "vfpclasspd k1, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x70, 0x0a, 0xcc], "vpshldw zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x70, 0x4a, 0x01, 0xcc], "vpshldw zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x70, 0xca, 0xcc], "vpshldw zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x71, 0x0a, 0xcc], "vpshldq zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x71, 0xca, 0xcc], "vpshldq zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x72, 0x0a, 0xcc], "vpshrdw zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x72, 0xca, 0xcc], "vpshrdw zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x73, 0x0a, 0xcc], "vpshrdq zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0x73, 0xca, 0xcc], "vpshrdq zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0xce, 0xca, 0xcc], "vgf2p8affineqb zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x48, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x00, 0xca, 0xcc], "vpermq zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x01, 0xca, 0xcc], "vpermpd zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x03, 0xca, 0xcc], "valignq zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x05, 0xca, 0xcc], "vpermilpd zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x0f, 0x0a, 0xcc], "vpalignr zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x0f, 0xca, 0xcc], "vpalignr zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x18, 0x0a, 0xcc], "vinsertf64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x18, 0xca, 0xcc], "vinsertf64x2 zmm1{k5}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x19, 0x0a, 0xcc], "vextractf64x2 xmmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x19, 0x4a, 0x01, 0xcc], "vextractf64x2 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1a, 0x0a, 0xcc], "vinsertf64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1a, 0xca, 0xcc], "vinsertf64x4 zmm1{k5}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1b, 0x0a, 0xcc], "vextractf64x4 ymmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1b, 0x4a, 0x01, 0xcc], "vextractf64x4 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1b, 0xca, 0xcc], "vextractf64x4 ymm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1e, 0xca, 0xcc], "vpcmpuq k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x1f, 0xca, 0xcc], "vpcmpq k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x23, 0xca, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x25, 0xca, 0xcc], "vpternlogq zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x38, 0x0a, 0xcc], "vinserti64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 zmm1{k5}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x38, 0xca, 0xcc], "vinserti64x2 zmm1{k5}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x39, 0x0a, 0xcc], "vextracti64x2 xmmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x39, 0x4a, 0x01, 0xcc], "vextracti64x2 xmmword [bp + si * 1 + 0x10]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3a, 0x0a, 0xcc], "vinserti64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3a, 0x4a, 0x01, 0xcc], "vinserti64x4 zmm1{k5}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3a, 0xca, 0xcc], "vinserti64x4 zmm1{k5}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3b, 0x0a, 0xcc], "vextracti64x4 ymmword [bp + si * 1]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3b, 0x4a, 0x01, 0xcc], "vextracti64x4 ymmword [bp + si * 1 + 0x20]{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3b, 0xca, 0xcc], "vextracti64x4 ymm2{k5}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3e, 0x0a, 0xcc], "vpcmpuw k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3e, 0x4a, 0x01, 0xcc], "vpcmpuw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3e, 0xca, 0xcc], "vpcmpuw k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3f, 0x0a, 0xcc], "vpcmpw k1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3f, 0x4a, 0x01, 0xcc], "vpcmpw k1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x3f, 0xca, 0xcc], "vpcmpw k1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x43, 0xca, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x66, 0xca, 0xcc], "vfpclasspd k1{k5}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x70, 0x0a, 0xcc], "vpshldw zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x70, 0xca, 0xcc], "vpshldw zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x71, 0xca, 0xcc], "vpshldq zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x72, 0x0a, 0xcc], "vpshrdw zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x72, 0xca, 0xcc], "vpshrdw zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0x73, 0xca, 0xcc], "vpshrdq zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0xce, 0xca, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x4d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x00, 0x0a, 0xcc], "vpermq zmm1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x01, 0x0a, 0xcc], "vpermpd zmm1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x03, 0x0a, 0xcc], "valignq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x05, 0x0a, 0xcc], "vpermilpd zmm1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x1e, 0x0a, 0xcc], "vpcmpuq k1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x1f, 0x0a, 0xcc], "vpcmpq k1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x25, 0x0a, 0xcc], "vpternlogq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x50, 0x0a, 0xcc], "vrangepd zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x56, 0x0a, 0xcc], "vreducepd zmm1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x66, 0x0a, 0xcc], "vfpclasspd k1, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x71, 0x0a, 0xcc], "vpshldq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x73, 0x0a, 0xcc], "vpshrdq zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x58, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x1e, 0x0a, 0xcc], "vpcmpuq k1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x1e, 0x4a, 0x01, 0xcc], "vpcmpuq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x1f, 0x0a, 0xcc], "vpcmpq k1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x1f, 0x4a, 0x01, 0xcc], "vpcmpq k1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x66, 0x0a, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x66, 0x4a, 0x01, 0xcc], "vfpclasspd k1{k5}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x5d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x50, 0xca, 0xcc], "vrangepd zmm1{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x51, 0xca, 0xcc], "vrangesd xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x56, 0xca, 0xcc], "vreducepd zmm1{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x78, 0x57, 0xca, 0xcc], "vreducesd xmm1{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x7d, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x03, 0xca, 0xcc], "valignq xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x05, 0xca, 0xcc], "vpermilpd xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x09, 0xca, 0xcc], "vrndscalepd xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x0f, 0x0a, 0xcc], "vpalignr xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x0f, 0xca, 0xcc], "vpalignr xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x25, 0xca, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x26, 0xca, 0xcc], "vgetmantpd xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x50, 0xca, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x54, 0xca, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}{z}, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}{z}, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x56, 0xca, 0xcc], "vreducepd xmm1{k5}{z}, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x70, 0x0a, 0xcc], "vpshldw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x70, 0x4a, 0x01, 0xcc], "vpshldw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x70, 0xca, 0xcc], "vpshldw xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x71, 0xca, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x72, 0x0a, 0xcc], "vpshrdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x72, 0xca, 0xcc], "vpshrdw xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0x73, 0xca, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0xce, 0xca, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x8d, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x03, 0x0a, 0xcc], "valignq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x03, 0x4a, 0x01, 0xcc], "valignq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x05, 0x0a, 0xcc], "vpermilpd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x09, 0x0a, 0xcc], "vrndscalepd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x25, 0x0a, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x26, 0x0a, 0xcc], "vgetmantpd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x50, 0x0a, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x50, 0x4a, 0x01, 0xcc], "vrangepd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x54, 0x0a, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x56, 0x0a, 0xcc], "vreducepd xmm1{k5}{z}, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x56, 0x4a, 0x01, 0xcc], "vreducepd xmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x71, 0x0a, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x71, 0x4a, 0x01, 0xcc], "vpshldq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x73, 0x0a, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0xce, 0x0a, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, qword [bp + si * 1]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0x9d, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8]{1to2}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x00, 0xca, 0xcc], "vpermq ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x01, 0xca, 0xcc], "vpermpd ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x03, 0xca, 0xcc], "valignq ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x05, 0xca, 0xcc], "vpermilpd ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x09, 0xca, 0xcc], "vrndscalepd ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x0b, 0x0a, 0xcc], "vrndscalesd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x0b, 0x4a, 0x01, 0xcc], "vrndscalesd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x0f, 0x0a, 0xcc], "vpalignr ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x0f, 0xca, 0xcc], "vpalignr ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x18, 0x0a, 0xcc], "vinsertf64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x18, 0xca, 0xcc], "vinsertf64x2 ymm1{k5}{z}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}{z}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x23, 0xca, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x25, 0xca, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x26, 0xca, 0xcc], "vgetmantpd ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x27, 0x0a, 0xcc], "vgetmantsd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x27, 0x4a, 0x01, 0xcc], "vgetmantsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x38, 0x0a, 0xcc], "vinserti64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 ymm1{k5}{z}, ymm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x38, 0xca, 0xcc], "vinserti64x2 ymm1{k5}{z}, ymm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}{z}, ymm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x43, 0xca, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x50, 0xca, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x51, 0x0a, 0xcc], "vrangesd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x51, 0x4a, 0x01, 0xcc], "vrangesd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x54, 0xca, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x55, 0x0a, 0xcc], "vfixupimmsd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x55, 0x4a, 0x01, 0xcc], "vfixupimmsd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}{z}, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}{z}, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x56, 0xca, 0xcc], "vreducepd ymm1{k5}{z}, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x57, 0x0a, 0xcc], "vreducesd xmm1{k5}{z}, xmm0, qword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x57, 0x4a, 0x01, 0xcc], "vreducesd xmm1{k5}{z}, xmm0, qword [bp + si * 1 + 0x8], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}{z}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x70, 0x0a, 0xcc], "vpshldw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x70, 0x4a, 0x01, 0xcc], "vpshldw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x70, 0xca, 0xcc], "vpshldw ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x71, 0xca, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x72, 0x0a, 0xcc], "vpshrdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x72, 0xca, 0xcc], "vpshrdw ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0x73, 0xca, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0xce, 0xca, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xad, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x00, 0x0a, 0xcc], "vpermq ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x00, 0x4a, 0x01, 0xcc], "vpermq ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x01, 0x0a, 0xcc], "vpermpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x01, 0x4a, 0x01, 0xcc], "vpermpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x03, 0x0a, 0xcc], "valignq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x03, 0x4a, 0x01, 0xcc], "valignq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x05, 0x0a, 0xcc], "vpermilpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x09, 0x0a, 0xcc], "vrndscalepd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x23, 0x0a, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x25, 0x0a, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x26, 0x0a, 0xcc], "vgetmantpd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x43, 0x0a, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x50, 0x0a, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x50, 0x4a, 0x01, 0xcc], "vrangepd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x54, 0x0a, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x56, 0x0a, 0xcc], "vreducepd ymm1{k5}{z}, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x56, 0x4a, 0x01, 0xcc], "vreducepd ymm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x71, 0x0a, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x71, 0x4a, 0x01, 0xcc], "vpshldq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x73, 0x0a, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0xce, 0x0a, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, qword [bp + si * 1]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xbd, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb ymm1{k5}{z}, ymm0, qword [bp + si * 1 + 0x8]{1to4}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x00, 0xca, 0xcc], "vpermq zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x01, 0xca, 0xcc], "vpermpd zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x03, 0xca, 0xcc], "valignq zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x05, 0xca, 0xcc], "vpermilpd zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x0f, 0x0a, 0xcc], "vpalignr zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x0f, 0x4a, 0x01, 0xcc], "vpalignr zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x0f, 0xca, 0xcc], "vpalignr zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x18, 0x0a, 0xcc], "vinsertf64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x18, 0x4a, 0x01, 0xcc], "vinsertf64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x18, 0xca, 0xcc], "vinsertf64x2 zmm1{k5}{z}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x19, 0xca, 0xcc], "vextractf64x2 xmm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x1a, 0x0a, 0xcc], "vinsertf64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x1a, 0x4a, 0x01, 0xcc], "vinsertf64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x1a, 0xca, 0xcc], "vinsertf64x4 zmm1{k5}{z}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x1b, 0xca, 0xcc], "vextractf64x4 ymm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x23, 0xca, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x25, 0xca, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x38, 0x0a, 0xcc], "vinserti64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x38, 0x4a, 0x01, 0xcc], "vinserti64x2 zmm1{k5}{z}, zmm0, xmmword [bp + si * 1 + 0x10], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x38, 0xca, 0xcc], "vinserti64x2 zmm1{k5}{z}, zmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x39, 0xca, 0xcc], "vextracti64x2 xmm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x3a, 0x0a, 0xcc], "vinserti64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x3a, 0x4a, 0x01, 0xcc], "vinserti64x4 zmm1{k5}{z}, zmm0, ymmword [bp + si * 1 + 0x20], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x3a, 0xca, 0xcc], "vinserti64x4 zmm1{k5}{z}, zmm0, ymm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x3b, 0xca, 0xcc], "vextracti64x4 ymm2{k5}{z}, zmm1, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x43, 0xca, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}{z}, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}{z}, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}{z}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x70, 0x0a, 0xcc], "vpshldw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x70, 0x4a, 0x01, 0xcc], "vpshldw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x70, 0xca, 0xcc], "vpshldw zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x71, 0xca, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x72, 0x0a, 0xcc], "vpshrdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x72, 0x4a, 0x01, 0xcc], "vpshrdw zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x72, 0xca, 0xcc], "vpshrdw zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0x73, 0xca, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0xce, 0xca, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, zmmword [bp + si * 1 + 0x40], 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xcd, 0xcf, 0xca, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x00, 0x0a, 0xcc], "vpermq zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x00, 0x4a, 0x01, 0xcc], "vpermq zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x01, 0x0a, 0xcc], "vpermpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x01, 0x4a, 0x01, 0xcc], "vpermpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x03, 0x0a, 0xcc], "valignq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x03, 0x4a, 0x01, 0xcc], "valignq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x05, 0x0a, 0xcc], "vpermilpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x05, 0x4a, 0x01, 0xcc], "vpermilpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x09, 0x0a, 0xcc], "vrndscalepd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x09, 0x4a, 0x01, 0xcc], "vrndscalepd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x23, 0x0a, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x23, 0x4a, 0x01, 0xcc], "vshuff64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x25, 0x0a, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x25, 0x4a, 0x01, 0xcc], "vpternlogq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x26, 0x0a, 0xcc], "vgetmantpd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x26, 0x4a, 0x01, 0xcc], "vgetmantpd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x43, 0x0a, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x43, 0x4a, 0x01, 0xcc], "vshufi64x2 zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x50, 0x0a, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x50, 0x4a, 0x01, 0xcc], "vrangepd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x54, 0x0a, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x54, 0x4a, 0x01, 0xcc], "vfixupimmpd zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x56, 0x0a, 0xcc], "vreducepd zmm1{k5}{z}, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x56, 0x4a, 0x01, 0xcc], "vreducepd zmm1{k5}{z}, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x71, 0x0a, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x71, 0x4a, 0x01, 0xcc], "vpshldq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x73, 0x0a, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0x73, 0x4a, 0x01, 0xcc], "vpshrdq zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0xce, 0x0a, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0xce, 0x4a, 0x01, 0xcc], "vgf2p8affineqb zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0xcf, 0x0a, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, qword [bp + si * 1]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xdd, 0xcf, 0x4a, 0x01, 0xcc], "vgf2p8affineinvqb zmm1{k5}{z}, zmm0, qword [bp + si * 1 + 0x8]{1to8}, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x09, 0xca, 0xcc], "vrndscalepd zmm1{k5}{z}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x0b, 0xca, 0xcc], "vrndscalesd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x26, 0xca, 0xcc], "vgetmantpd zmm1{k5}{z}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x27, 0xca, 0xcc], "vgetmantsd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x50, 0xca, 0xcc], "vrangepd zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x51, 0xca, 0xcc], "vrangesd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x54, 0xca, 0xcc], "vfixupimmpd zmm1{k5}{z}{sae}, zmm0, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x55, 0xca, 0xcc], "vfixupimmsd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x56, 0xca, 0xcc], "vreducepd zmm1{k5}{z}{sae}, zmm2, 0xcc"),
+        testcase!(&[0x62, 0xf3, 0xfd, 0xfd, 0x57, 0xca, 0xcc], "vreducesd xmm1{k5}{z}{sae}, xmm0, xmm2, 0xcc"),
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x8d, 0x11, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x18, 0x12, 0xca]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x18, 0x16, 0xca]), //
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0xbd, 0x28, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x9d, 0x29, 0xca]), // no sae/er support on movaps
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x38, 0x2b, 0x0a]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0xa8, 0x2b, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xfc, 0x28, 0x2b, 0x0a]), // no W=1
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x18, 0x2e, 0x0a]), // no broadcast from memory
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x68, 0x2e, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x88, 0x2e, 0x0a]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0xfc, 0xfd, 0x51, 0xca]), // requires W=0
+        testcase!(invalid: &[0x62, 0xf1, 0xfc, 0x78, 0x5a, 0xca]), // W=0
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0xb8, 0xc2, 0x0a, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7c, 0x3d, 0xc6, 0xca, 0xcc]), // no broadcast from register source
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0xdd, 0x10, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0xbd, 0x14, 0xca]), // no broadcast in reg-reg
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0xbd, 0x15, 0xca]), // no broadcast in reg-reg
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x38, 0x28, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x18, 0x2b, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x88, 0x2b, 0x0a]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x08, 0x2b, 0x0a]), // no W=-
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x79, 0x2e, 0xca]), // mask reg must be 000
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x18, 0x2e, 0x0a]), // no broadcast from memory
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x68, 0x2e, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x88, 0x2e, 0x0a]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x28, 0x5b, 0xca]), // no W=1
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x3d, 0x66, 0xca]), // no broadcast on reg operand (no sae)
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x88, 0x6e, 0xca]), //no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x88, 0x6e, 0xca]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x88, 0x7e, 0xca]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0xbd, 0xc2, 0x0a, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x78, 0xe6, 0xca]), // requires W=1
+        testcase!(invalid: &[0x62, 0xf1, 0x7d, 0x28, 0xe7, 0xca]), // no reg-reg encoding
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0x38, 0xf6, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xfd, 0xa8, 0xf6, 0x0a]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x6d, 0x10, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x6f, 0x10, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x38, 0x10, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x3d, 0x11, 0xca]),
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0xad, 0x11, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x29, 0x2a, 0xca]), // mask reg must be 000
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x38, 0x2a, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x68, 0x2a, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x29, 0x2c, 0xca]), // mask register must be 000
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x38, 0x2c, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x38, 0x2c, 0x0a]), // no broadcast, regardless of W
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x68, 0x2c, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x29, 0x2d, 0xca]), // mask register must be 000
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x38, 0x2d, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x68, 0x2d, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x78, 0x5a, 0x0a]), // no broadcast with memory source
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x68, 0x7b, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xfe, 0x88, 0x7e, 0xca]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf1, 0x7e, 0x6d, 0xc2, 0xca, 0xcc]), // do not allow L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x6d, 0x10, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x6f, 0x10, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x3d, 0x11, 0xca]),
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0xad, 0x11, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0xbd, 0x12, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x38, 0x51, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x68, 0x51, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0xbd, 0x5a, 0x0a]), // no L'L=11 unless for sae
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x6f, 0x5a, 0x0a]), // no L'L=11 unless for sae
+        testcase!(invalid: &[0x62, 0xf1, 0x7f, 0x78, 0x5f, 0xca]), // requires W=1
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x68, 0x7b, 0x0a]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf1, 0xff, 0x6d, 0xc2, 0x0a, 0xcc]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0x78, 0x13, 0x0a]), // W=0
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xbd, 0x14, 0xca]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xad, 0x25, 0xca]), // W must be 1
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xcd, 0x25, 0xca]),
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xad, 0x26, 0x0a]), // no zero-merge
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xad, 0x26, 0x0a]), // no zero-merge
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xdd, 0x27, 0x0a]), // no zero-merge
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x3d, 0x27, 0xca]), // no invalid broadcast mode
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xdd, 0x27, 0x0a]), // no zero-merge
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xbd, 0x28, 0xca]), // no broadcast on register source
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xad, 0x29, 0xca]), // no zero-merge
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0x3d, 0x29, 0xca]), // no zero-merge
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x28, 0x2a, 0xca]), // no register source
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xa8, 0x2a, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xfd, 0x2d, 0x0a]), // sae is indicated by evex.b, with memory source evex.b implies broadcast as well. vscalefss does not broadcast, so reject.
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xbd, 0x43, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x3d, 0x4d, 0xca]), // no sae
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x6d, 0x4d, 0xca]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x3d, 0x4e, 0xca]), // no sae
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x68, 0x4f, 0xca]), // no L'L=11
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0xad, 0x63, 0x0a]), // no zero-merge on memory operands
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x38, 0x78, 0xca]), // deny evex.b
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x38, 0x7a, 0xca]), // still no evex.b
+        testcase!(invalid: &[0x62, 0xf2, 0x7d, 0x38, 0x7c, 0xca]), // no broadcast here either
+        testcase!(&[0x62, 0xf2, 0x7d, 0x68, 0x99, 0xca], "vfmadd132ss xmm1, xmm0, xmm2"), // no L'L==0 when not sae
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0x38, 0xdc, 0x0a]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf2, 0xfd, 0xa8, 0xdc, 0x0a]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf2, 0x7e, 0xad, 0x10, 0x0a]), // cannot set evex.z on stores.
+        testcase!(invalid: &[0x62, 0xf2, 0x7e, 0xcd, 0x12, 0x0a]),
+        testcase!(invalid: &[0x62, 0xf2, 0x7e, 0x88, 0x28, 0xca]), //
+        testcase!(invalid: &[0x62, 0xf2, 0x7e, 0xa8, 0x39, 0xca]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf2, 0x7e, 0x88, 0x3a, 0xca]), // no zero "mask merge", no masking at all
+        testcase!(invalid: &[0x62, 0xf2, 0x7e, 0xbd, 0x72, 0xca]), // no register-register broadcast
+        testcase!(&[0x62, 0xf2, 0x7f, 0x08, 0x68, 0xca], "vp2intersectd k1, xmm0, xmm2"), // VP2INTERSECTD_MASKmskw_XMMu32_XMMu32_AVX512, extension: AVX512EVEX
+        testcase!(invalid: &[0x62, 0xf2, 0x7f, 0x09, 0x68, 0xca]), // requires mask reg to be 000
+        testcase!(invalid: &[0x62, 0xf2, 0xff, 0x09, 0x68, 0xca]), // requires mask reg to be 000
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0xbd, 0x00, 0xca, 0xcc]), // no broadcast on reg-reg ops
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0xbd, 0x04, 0xca, 0xcc]), // no broadcast on reg sources
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x5d, 0x0a, 0x0a, 0xcc]), // no broadcast with memory source
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x6d, 0x0a, 0x0a, 0xcc]), // no broadcast with memory source
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0xa8, 0x0b, 0xca, 0xcc]), // no zero-merge without mask reg
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x38, 0x0b, 0x0a, 0xcc]), // no broadcast on memory source
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x68, 0x0b, 0x0a, 0xcc]), // L'L==11 requires sae
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x3d, 0x0f, 0xca, 0xcc]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x38, 0x0f, 0x0a, 0xcc]), // still no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x88, 0x14, 0xca, 0xcc]), // no zero mask-merge, no masking!
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x18, 0x14, 0xca, 0xcc]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x18, 0x15, 0xca, 0xcc]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x88, 0x15, 0xca, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x18, 0x16, 0xca, 0xcc]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x88, 0x16, 0xca, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x18, 0x17, 0xca, 0xcc]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x88, 0x17, 0xca, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x3d, 0x19, 0x0a, 0xcc]), // no zero-merge with memmory dest
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0xcd, 0x1b, 0x0a, 0xcc]), // no zero-merge into memory
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x3d, 0x1d, 0x0a, 0xcc]), // no zero-merge into memory
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x6d, 0x1d, 0x0a, 0xcc]), // no L'L==11 for non-sae
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x18, 0x20, 0xca, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x88, 0x20, 0xca, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x18, 0x21, 0xca, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x88, 0x21, 0xca, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x18, 0x22, 0xca, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x88, 0x22, 0xca, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0xad, 0x3e, 0xca, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x62, 0xf3, 0x7d, 0x38, 0x42, 0x0a, 0xcc]), // no broadcast
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x29, 0x44, 0xca, 0xcc]), // mask reg must be 000
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x18, 0x44, 0x0a, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0x88, 0x44, 0x0a, 0xcc]), //
+        testcase!(invalid: &[0x62, 0xf3, 0xfd, 0xbd, 0x66, 0x0a, 0xcc]), // no zero mask-merge
+        testcase!(invalid: &[0x63, 0xc1]), // no arpl in real mode
+        testcase!(&[0x65, 0x66, 0x0f, 0x01, 0xdc], "stgi"),
+        testcase!(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword fs:[bx]"),
+        testcase!(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms"),
+        testcase!(&[0x65, 0x89, 0x04], "mov word gs:[si], ax"),
+        testcase!(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg word gs:[bx], cx"),
+        testcase!(&[0x66, 0x0f, 0x01, 0xd8], "vmrun ax"),
+        testcase!(&[0x66, 0x0f, 0x02, 0x01], "lar eax, word [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x02, 0xc1], "lar eax, ecx"),
+        testcase!(&[0x66, 0x0f, 0x03, 0x01], "lsl eax, word [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x03, 0xc1], "lsl eax, ecx"),
+        testcase!(&[0x66, 0x0f, 0x05], "syscall"),
+        testcase!(&[0x66, 0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6"),
+        testcase!(&[0x66, 0x0f, 0x10, 0xc0], "movupd xmm0, xmm0"),
+        testcase!(&[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, qword [bp + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x13, 0x03], "movlpd qword [bp + di * 1], xmm0"),
+        testcase!(&[0x66, 0x0f, 0x14, 0x03], "unpcklpd xmm0, xmmword [bp + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x14, 0xc3], "unpcklpd xmm0, xmm3"),
+        testcase!(&[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, xmmword [bp + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x15, 0xc3], "unpckhpd xmm0, xmm3"),
+        testcase!(&[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, qword [bp + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x17, 0x03], "movhpd qword [bp + di * 1], xmm0"),
+        testcase!(&[0x66, 0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [bx + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0"),
+        testcase!(&[0x66, 0x0f, 0x28, 0xd0], "movapd xmm2, xmm0"),
+        testcase!(&[0x66, 0x0f, 0x29, 0x00], "movapd xmmword [bx + si * 1], xmm0"),
+        testcase!(&[0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [bx + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0x2a, 0x0f], "cvtpi2pd xmm1, qword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"),
+        testcase!(&[0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7"),
+        testcase!(&[0x66, 0x0f, 0x2b, 0x0f], "movntpd xmmword [bx], xmm1"),
+        testcase!(&[0x66, 0x0f, 0x2c, 0x0f], "cvttpd2pi mm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x2c, 0xcf], "cvttpd2pi mm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x2d, 0x0f], "cvtpd2pi mm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x2d, 0xcf], "cvtpd2pi mm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x2e, 0x0f], "ucomisd xmm1, qword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x2e, 0xcf], "ucomisd xmm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x2f, 0x0f], "comisd xmm1, qword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x2f, 0xcf], "comisd xmm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x00, 0xda], "pshufb xmm3, xmm2"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x37, 0x03], "pcmpgtq xmm0, xmmword [bp + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x37, 0xc3], "pcmpgtq xmm0, xmm3"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x80, 0x01], "invept eax, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x81, 0x01], "invvpid eax, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xcf, 0x1c], "gf2p8mulb xmm3, xmmword [si]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss dword [bx - 0x17], eax"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xf6, 0x01], "adcx eax, dword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x38, 0xf6, 0xc1], "adcx eax, ecx"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, xmmword [bx + di * 1], 0x22"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x0c, 0xc1, 0x22], "blendps xmm0, xmm1, 0x22"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, xmmword [bx + di * 1], 0x22"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x0d, 0xc1, 0x22], "blendpd xmm0, xmm1, 0x22"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x14, 0x01, 0x31], "pextrb byte [bx + di * 1], xmm0, 0x31"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x15, 0x01, 0x31], "pextrw word [bx + di * 1], xmm0, 0x31"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x16, 0x01, 0x31], "pextrd dword [bx + di * 1], xmm0, 0x31"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x17, 0x01, 0x31], "extractps dword [bx + di * 1], xmm0, 0x31"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x60, 0xc6, 0x54], "pcmpestrm xmm0, xmm6, 0x54"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x61, 0xc6, 0x54], "pcmpestri xmm0, xmm6, 0x54"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x62, 0xc6, 0x54], "pcmpistrm xmm0, xmm6, 0x54"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0x63, 0xc6, 0x54], "pcmpistri xmm0, xmm6, 0x54"),
+        testcase!(&[0x66, 0x0f, 0x3a, 0xdf, 0x0f, 0xaa], "aeskeygenassist xmm1, xmmword [bx], 0xaa"),
+        testcase!(&[0x66, 0x0f, 0x50, 0xc1], "movmskpd eax, xmm1"),
+        testcase!(&[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x57, 0x01], "xorpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x58, 0x01], "addpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x59, 0x01], "mulpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x5a, 0x01], "cvtpd2ps xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x5b, 0x01], "cvtps2dq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x5c, 0x01], "subpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x5d, 0x01], "minpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x5e, 0x01], "divpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x5f, 0x01], "maxpd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0x6e, 0xc0], "movd xmm0, eax"),
+        testcase!(&[0x66, 0x0f, 0x70, 0xc0, 0x4e], "pshufd xmm0, xmm0, 0x4e"),
+        testcase!(&[0x66, 0x0f, 0x71, 0xd0, 0x8f], "psrlw xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x71, 0xe0, 0x8f], "psraw xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x71, 0xf0, 0x8f], "psllw xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x72, 0xd0, 0x8f], "psrld xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x72, 0xe0, 0x8f], "psrad xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x72, 0xf0, 0x8f], "pslld xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x73, 0xd0, 0x8f], "psrlq xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x73, 0xd8, 0x8f], "psrldq xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm0, 0x8f"),
+        testcase!(&[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0x74, 0xc1], "pcmpeqb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0x78, 0xc1, 0x4e, 0x76], "extrq xmm1, 0x4e, 0x76"),
+        testcase!(&[0x66, 0x0f, 0x79, 0xcf], "extrq xmm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x7c, 0x0f], "haddpd xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x7c, 0xcf], "haddpd xmm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x7d, 0x0f], "hsubpd xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0x7d, 0xcf], "hsubpd xmm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0x7e, 0x01], "movd dword [bx + di * 1], xmm0"),
+        testcase!(&[0x66, 0x0f, 0x7e, 0xc1], "movd ecx, xmm0"),
+        testcase!(&[0x66, 0x0f, 0xa4, 0xcf, 0x11], "shld edi, ecx, 0x11"),
+        testcase!(&[0x66, 0x0f, 0xac, 0xcf, 0x11], "shrd edi, ecx, 0x11"),
+        testcase!(&[0x66, 0x0f, 0xae, 0x37], "clwb zmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt zmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0xae, 0xf1], "tpause ecx"),
+        testcase!(&[0x66, 0x0f, 0xae, 0xf7], "tpause edi"),
+        testcase!(&[0x66, 0x0f, 0xaf, 0xd1], "imul edx, ecx"),
+        testcase!(&[0x66, 0x0f, 0xb3, 0xc0], "btr eax, eax"),
+        testcase!(&[0x66, 0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0x66, 0x0f, 0xc1, 0xcc], "xadd esp, ecx"),
+        testcase!(&[0x66, 0x0f, 0xc2, 0x03, 0x08], "cmppd xmm0, xmmword [bp + di * 1], 0x8"),
+        testcase!(&[0x66, 0x0f, 0xc2, 0xc3, 0x08], "cmppd xmm0, xmm3, 0x8"),
+        testcase!(&[0x66, 0x0f, 0xc4, 0x03, 0x08], "pinsrw xmm0, word [bp + di * 1], 0x8"),
+        testcase!(&[0x66, 0x0f, 0xc4, 0xc3, 0x08], "pinsrw xmm0, ebx, 0x8"),
+        testcase!(&[0x66, 0x0f, 0xc5, 0xd8, 0xff], "pextrw ebx, xmm0, 0xff"),
+        testcase!(&[0x66, 0x0f, 0xc6, 0x03, 0x08], "shufpd xmm0, xmmword [bp + di * 1], 0x8"),
+        testcase!(&[0x66, 0x0f, 0xc6, 0xc3, 0x08], "shufpd xmm0, xmm3, 0x8"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x33], "vmclear qword [bp + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0x37], "vmclear qword [bx]"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0xf5], "rdrand ebp"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0xf7], "rdrand edi"),
+        testcase!(&[0x66, 0x0f, 0xc7, 0xfd], "rdseed ebp"),
+        testcase!(&[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, xmmword [bx]"),
+        testcase!(&[0x66, 0x0f, 0xd0, 0xcf], "addsubpd xmm1, xmm7"),
+        testcase!(&[0x66, 0x0f, 0xd1, 0x01], "psrlw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd1, 0xc1], "psrlw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd2, 0x01], "psrld xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd2, 0xc1], "psrld xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd3, 0x01], "psrlq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd3, 0xc1], "psrlq xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd4, 0x01], "paddq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd4, 0xc1], "paddq xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd5, 0x01], "pmullw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd5, 0xc1], "pmullw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd6, 0x01], "movq qword [bx + di * 1], xmm0"),
+        testcase!(&[0x66, 0x0f, 0xd6, 0xc1], "movq xmm1, xmm0"),
+        testcase!(&[0x66, 0x0f, 0xd7, 0xc1], "pmovmskb eax, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd8, 0x01], "psubusb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd8, 0xc1], "psubusb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xd9, 0x01], "psubusw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xd9, 0xc1], "psubusw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xda, 0x01], "pminub xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xda, 0xc1], "pminub xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xdb, 0x01], "pand xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xdb, 0xc1], "pand xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xdc, 0x01], "paddusb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xdc, 0xc1], "paddusb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xdd, 0x01], "paddusw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xdd, 0xc1], "paddusw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xde, 0x01], "pmaxub xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xde, 0xc1], "pmaxub xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xdf, 0x01], "pandn xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xdf, 0xc1], "pandn xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe0, 0x01], "pavgb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe0, 0xc1], "pavgb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe1, 0x01], "psraw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe1, 0xc1], "psraw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe2, 0x01], "psrad xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe2, 0xc1], "psrad xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe3, 0x01], "pavgw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe3, 0xc1], "pavgw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe4, 0x01], "pmulhuw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe4, 0xc1], "pmulhuw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe5, 0x01], "pmulhw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe5, 0xc1], "pmulhw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe6, 0x01], "cvttpd2dq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe6, 0xc1], "cvttpd2dq xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe7, 0x01], "movntdq xmmword [bx + di * 1], xmm0"),
+        testcase!(&[0x66, 0x0f, 0xe8, 0x01], "psubsb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe8, 0xc1], "psubsb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xe9, 0x01], "psubsw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xe9, 0xc1], "psubsw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xea, 0x01], "pminsw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xea, 0xc1], "pminsw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xeb, 0x01], "por xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xeb, 0x12], "por xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0xeb, 0xc1], "por xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xeb, 0xc3], "por xmm0, xmm3"),
+        testcase!(&[0x66, 0x0f, 0xeb, 0xc4], "por xmm0, xmm4"),
+        testcase!(&[0x66, 0x0f, 0xeb, 0xd3], "por xmm2, xmm3"),
+        testcase!(&[0x66, 0x0f, 0xec, 0x01], "paddsb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xec, 0xc1], "paddsb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xed, 0x01], "paddsw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xed, 0xc1], "paddsw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xee, 0x01], "pmaxsw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xee, 0xc1], "pmaxsw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xef, 0x01], "pxor xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xef, 0xc0], "pxor xmm0, xmm0"),
+        testcase!(&[0x66, 0x0f, 0xef, 0xc1], "pxor xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf1, 0x01], "psllw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf1, 0xc1], "psllw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf2, 0x01], "pslld xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf2, 0xc1], "pslld xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf3, 0x01], "psllq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf3, 0xc1], "psllq xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf4, 0x01], "pmuludq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf4, 0xc1], "pmuludq xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf5, 0x01], "pmaddwd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf5, 0xc1], "pmaddwd xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf6, 0x01], "psadbw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf6, 0xc1], "psadbw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf7, 0xc1], "maskmovdqu xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf8, 0x01], "psubb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf8, 0x12], "psubb xmm2, xmmword [bp + si * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf8, 0xc1], "psubb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xf8, 0xc8], "psubb xmm1, xmm0"),
+        testcase!(&[0x66, 0x0f, 0xf8, 0xd0], "psubb xmm2, xmm0"),
+        testcase!(&[0x66, 0x0f, 0xf9, 0x01], "psubw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xf9, 0xc1], "psubw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xfa, 0x01], "psubd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xfa, 0xc1], "psubd xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xfb, 0x01], "psubq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xfb, 0xc1], "psubq xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xfc, 0x01], "paddb xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xfc, 0xc1], "paddb xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xfd, 0xc1], "paddw xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xfe, 0xc1], "paddd xmm0, xmm1"),
+        testcase!(&[0x66, 0x0f, 0xff, 0x01], "ud0 eax, dword [bx + di * 1]"),
+        testcase!(&[0x66, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"),
+        testcase!(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "xacquire lock btc dword cs:[bp + di * 1], edx"),
+        testcase!(&[0x66, 0x31, 0xc0], "xor eax, eax"),
+        testcase!(&[0x66, 0x32, 0xc0], "xor al, al"),
+        testcase!(&[0x66, 0x32, 0xc5], "xor al, ch"),
+        testcase!(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b], "movntdqa xmm5, xmmword cs:[bp + di * 1]"),
+        testcase!(&[0x66, 0x50], "push eax"),
+        testcase!(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f], "pmovsxwd xmm3, qword [di + 0xf69]"),
+        testcase!(&[0x66, 0x8f, 0x00], "pop dword [bx + si * 1]"),
+        testcase!(&[0x66, 0x91], "xchg eax, ecx"),
+        testcase!(&[0x66, 0x99], "cdq"),
+        testcase!(&[0x66, 0xc5, 0x78, 0x10], "lds edi, far [bx + si * 1 + 0x10]"),
+        testcase!(&[0x66, 0xcf], "iretd"),
+        testcase!(&[0x66, 0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, esi"),
+        testcase!(&[0x66, 0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7"),
+        testcase!(&[0x66, 0xf3, 0x0f, 0x01, 0xe8], "setssbsy"),
+        testcase!(&[0x66, 0xf3, 0x0f, 0x01, 0xea], "saveprevssp"),
+        testcase!(&[0x66, 0xf3, 0x0f, 0xbd, 0xc1], "lzcnt eax, ecx"),
+        testcase!(&[0x66, 0xff, 0xd0], "call eax"),
+        testcase!(&[0x66, 0xff, 0xe0], "jmp eax"),
+        testcase!(&[0x67, 0x0f, 0x5b, 0x01], "cvtdq2ps xmm0, xmmword [ecx]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, xmmword [eax]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, xmmword [edi]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x38, 0xdc, 0x0f], "aesenc xmm1, xmmword [edi]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x38, 0xdd, 0x0f], "aesenclast xmm1, xmmword [edi]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x38, 0xde, 0x0f], "aesdec xmm1, xmmword [edi]"),
+        testcase!(&[0x67, 0x66, 0x0f, 0x38, 0xdf, 0x0f], "aesdeclast xmm1, xmmword [edi]"),
+        testcase!(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1"),
+        testcase!(&[0x67, 0xe5, 0x99], "in ax, 0x99"),
+        testcase!(&[0x67, 0xff, 0xd0], "call ax"),
+        testcase!(&[0x67, 0xff, 0xe0], "jmp ax"),
+        testcase!(&[0x68, 0x7f, 0x63], "push 0x637f"),
+        testcase!(&[0x6b, 0x43, 0x6f, 0x6d], "imul ax, word [bp + di * 1 + 0x6f], 0x6d"),
+        testcase!(&[0x72, 0x5a], "jb $+0x5a"),
+        testcase!(&[0x72, 0xf0], "jb $-0x10"),
+        testcase!(&[0x73, 0x31], "jnb $+0x31"),
+        testcase!(&[0x74, 0x47], "jz $+0x47"),
+        testcase!(&[0x81, 0xec, 0x10, 0x03], "sub sp, 0x310"),
+        testcase!(&[0x66, 0x81, 0xec, 0x10, 0x03, 0x00, 0x00], "sub esp, 0x310"),
+        testcase!(&[0x83, 0xf8, 0xff], "cmp ax, -0x1"),
+        testcase!(&[0x66, 0x83, 0xf8, 0xff], "cmp eax, -0x1"),
+        testcase!(&[0x89, 0x43, 0x18], "mov word [bp + di * 1 + 0x18], ax"),
+        testcase!(&[0x89, 0x46, 0x10], "mov word [bp + 0x10], ax"),
+        testcase!(&[0x89, 0x4e, 0x08], "mov word [bp + 0x8], cx"),
+        testcase!(&[0x89, 0x55, 0x94], "mov word [di - 0x6c], dx"),
+        testcase!(&[0x8b, 0x32], "mov si, word [bp + si * 1]"),
+        testcase!(&[0x8b, 0x4c, 0x10], "mov cx, word [si + 0x10]"),
+        testcase!(&[0x8d, 0x53, 0x08], "lea dx, word [bp + di * 1 + 0x8]"),
+        testcase!(&[0x8e, 0x00], "mov es, word [bx + si * 1]"),
+        testcase!(&[0x8e, 0xc0], "mov es, ax"),
+        testcase!(&[0x8c, 0xc0], "mov ax, es"),
+        testcase!(&[0x8e, 0x10], "mov ss, word [bx + si * 1]"),
+        testcase!(&[0x8e, 0xd0], "mov ss, ax"),
+        testcase!(&[0x8c, 0xd0], "mov ax, ss"),
+        testcase!(&[0x8e, 0x18], "mov ds, word [bx + si * 1]"),
+        testcase!(&[0x8e, 0xd8], "mov ds, ax"),
+        testcase!(&[0x8c, 0xd8], "mov ax, ds"),
+        testcase!(&[0x8e, 0x20], "mov fs, word [bx + si * 1]"),
+        testcase!(&[0x8e, 0x28], "mov gs, word [bx + si * 1]"),
+        testcase!(&[0x8f, 0x00], "pop word [bx + si * 1]"),
+        testcase!(&[0x90], "nop"),
+        testcase!(&[0x91], "xchg ax, cx"),
+        testcase!(&[0x98], "cbw"),
+        testcase!(&[0x9c], "pushf"),
+        testcase!(&[0xa0, 0x93, 0x62], "mov al, byte [0x6293]"),
+        testcase!(&[0xa1, 0x93, 0x62], "mov ax, word [0x6293]"),
+        testcase!(&[0xa2, 0x93, 0x62], "mov byte [0x6293], al"),
+        testcase!(&[0xa3, 0x93, 0x62], "mov word [0x6293], ax"),
+        testcase!(&[0xba, 0x01, 0x00], "mov dx, 0x1"),
+        testcase!(&[0xc3], "ret"),
+        testcase!(&[0xc4, 0x02], "les ax, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x38, 0x14, 0x0a], "vunpcklps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x38, 0x15, 0x0a], "vunpckhps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x38, 0xc6, 0xca, 0x77], "vshufps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x14, 0x0a], "vunpcklpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x15, 0x0a], "vunpckhpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x60, 0xca], "vpunpcklbw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x61, 0xca], "vpunpcklwd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x62, 0xca], "vpunpckldq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x63, 0xca], "vpacksswb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x64, 0xca], "vpcmpgtb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x65, 0xca], "vpcmpgtw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x66, 0xca], "vpcmpgtd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x67, 0xca], "vpackuswb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x68, 0xca], "vpunpckhbw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x69, 0xca], "vpunpckhwd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x6a, 0xca], "vpunpckhdq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0x6b, 0xca], "vpackssdw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xc6, 0xca, 0x77], "vshufpd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xd5, 0xca], "vpmullw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xda, 0xca], "vpminub xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xde, 0xca], "vpmaxub xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xea, 0xca], "vpminsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xeb, 0xca], "vpor xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xec, 0xca], "vpaddsb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xed, 0xca], "vpaddsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xee, 0xca], "vpmaxsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x39, 0xef, 0xca], "vpxor xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x3a, 0x5c, 0x0a], "vsubss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3b, 0x51, 0x0a], "vsqrtsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3b, 0x5c, 0x0a], "vsubsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3c, 0x14, 0x0a], "vunpcklps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3c, 0x15, 0x0a], "vunpckhps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3c, 0xc6, 0xca, 0x77], "vshufps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x14, 0x0a], "vunpcklpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x15, 0x0a], "vunpckhpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x60, 0xca], "vpunpcklbw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x61, 0xca], "vpunpcklwd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x62, 0xca], "vpunpckldq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x63, 0xca], "vpacksswb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x64, 0xca], "vpcmpgtb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x65, 0xca], "vpcmpgtw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x66, 0xca], "vpcmpgtd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x67, 0xca], "vpackuswb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x68, 0xca], "vpunpckhbw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x69, 0xca], "vpunpckhwd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x6a, 0xca], "vpunpckhdq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0x6b, 0xca], "vpackssdw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xc6, 0xca, 0x77], "vshufpd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xd5, 0xca], "vpmullw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xda, 0xca], "vpminub ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xde, 0xca], "vpmaxub ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xea, 0xca], "vpminsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xeb, 0xca], "vpor ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xec, 0xca], "vpaddsb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xed, 0xca], "vpaddsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xee, 0xca], "vpmaxsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3d, 0xef, 0xca], "vpxor ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x3e, 0x5c, 0x0a], "vsubss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3f, 0x51, 0x0a], "vsqrtsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x3f, 0x5c, 0x0a], "vsubsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x78, 0x28, 0xca], "vmovaps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x78, 0x29, 0xca], "vmovaps xmm2, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x78, 0x2b, 0x0a], "vmovntps xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x78, 0x5c, 0x0a], "vsubps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x78, 0xae, 0x11], "vldmxcsr dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x78, 0xae, 0x19], "vstmxcsr dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x28, 0xca], "vmovapd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x29, 0xca], "vmovapd xmm2, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x2b, 0x0a], "vmovntpd xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x2e, 0x0a], "vucomisd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x2e, 0xca], "vucomisd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x2f, 0x0a], "vcomisd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x2f, 0xca], "vcomisd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x50, 0xca], "vmovmskpd ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x51, 0x0a], "vsqrtpd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x5c, 0x0a], "vsubpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x6f, 0xca], "vmovdqa xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x7e, 0xca], "vmovd edx, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0x7f, 0xca], "vmovdqa xmm2, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0xc5, 0xca, 0x77], "vpextrw ecx, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0x79, 0xd7, 0xca], "vpmovmskb ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x12, 0x0a], "vmovsldup xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x2a, 0x0a], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x2c, 0xca], "vcvttss2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x2d, 0xca], "vcvtss2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x6f, 0xca], "vmovdqu xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7a, 0x7f, 0xca], "vmovdqu xmm2, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0x7b, 0x12, 0x0a], "vmovddup xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7b, 0x2a, 0x0a], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7b, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(&[0xc4, 0xc1, 0x7b, 0x2c, 0xca], "vcvttsd2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7b, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7b, 0x2d, 0xca], "vcvtsd2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7c, 0x5c, 0x0a], "vsubps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x2e, 0x0a], "vucomisd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x2e, 0xca], "vucomisd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x2f, 0x0a], "vcomisd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x2f, 0xca], "vcomisd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x50, 0xca], "vmovmskpd ecx, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x51, 0x0a], "vsqrtpd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x5c, 0x0a], "vsubpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x6f, 0xca], "vmovdqa ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0x7f, 0xca], "vmovdqa ymm2, ymm1"),
+        testcase!(&[0xc4, 0xc1, 0x7d, 0xd7, 0xca], "vpmovmskb ecx, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x7e, 0x12, 0x0a], "vmovsldup ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7e, 0x2c, 0xca], "vcvttss2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7e, 0x2d, 0x0a], "vcvtss2si ecx, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7e, 0x2d, 0xca], "vcvtss2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7e, 0x6f, 0xca], "vmovdqu ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0x7e, 0x7f, 0xca], "vmovdqu ymm2, ymm1"),
+        testcase!(&[0xc4, 0xc1, 0x7f, 0x12, 0x0a], "vmovddup ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7f, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(&[0xc4, 0xc1, 0x7f, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7f, 0x2c, 0xca], "vcvttsd2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0x7f, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0x7f, 0x2d, 0xca], "vcvtsd2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x12, 0x0a], "vmovlps xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x12, 0xca], "vmovhlps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x16, 0x0a], "vmovhps xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x54, 0xca], "vandps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x55, 0xca], "vandnps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x56, 0x0a], "vorps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x57, 0xca], "vxorps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x58, 0xca], "vaddps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x59, 0x0a], "vmulps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x5d, 0x0a], "vminps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x5e, 0x0a], "vdivps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0x5f, 0x0a], "vmaxps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb8, 0xc2, 0xca, 0x77], "vcmpps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x12, 0x0a], "vmovlpd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x16, 0x0a], "vmovhpd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x54, 0x0a], "vandpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x55, 0x0a], "vandnpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x56, 0x0a], "vorpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x57, 0xca], "vxorpd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x58, 0x0a], "vaddpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x59, 0x0a], "vmulpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x5d, 0x0a], "vminpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x5e, 0x0a], "vdivpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x5f, 0x0a], "vmaxpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x71, 0xd2, 0x77], "vpsrlw xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x74, 0xca], "vpcmpeqb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x75, 0xca], "vpcmpeqw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x76, 0xca], "vpcmpeqd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x7c, 0xca], "vhaddpd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0x7d, 0xca], "vhsubpd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xc2, 0xca, 0x77], "vcmppd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xc4, 0xca, 0x77], "vpinsrw xmm1, xmm0, edx, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd0, 0xca], "vaddsubpd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd1, 0xca], "vpsrlw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd2, 0xca], "vpsrld xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd3, 0xca], "vpsrlq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd4, 0xca], "vpaddq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd8, 0xca], "vpsubusb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xd9, 0xca], "vpsubusw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xdb, 0xca], "vpand xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xdc, 0xca], "vpaddusb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xdd, 0xca], "vpaddusw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xdf, 0xca], "vpandn xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe0, 0xca], "vpavgb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe1, 0xca], "vpsraw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe2, 0xca], "vpsrad xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe3, 0xca], "vpavgw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe4, 0xca], "vpmulhuw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe5, 0xca], "vpmulhw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe8, 0xca], "vpsubsb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xe9, 0xca], "vpsubsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xf1, 0xca], "vpsllw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xf2, 0xca], "vpslld xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xf3, 0xca], "vpsllq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xf4, 0xca], "vpmuludq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xf8, 0xca], "vpsubb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xf9, 0xca], "vpsubw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xfa, 0xca], "vpsubd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xfb, 0xca], "vpsubq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xfc, 0xca], "vpaddb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xfd, 0xca], "vpaddw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xb9, 0xfe, 0xca], "vpaddd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xba, 0x58, 0x0a], "vaddss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xba, 0x58, 0xca], "vaddss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xba, 0x59, 0x0a], "vmulss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xba, 0x5d, 0x0a], "vminss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xba, 0x5e, 0x0a], "vdivss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xba, 0x5f, 0x0a], "vmaxss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x11, 0xca], "vmovsd xmm2, xmm0, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x58, 0x0a], "vaddsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x59, 0x0a], "vmulsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x5d, 0x0a], "vminsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x5e, 0x0a], "vdivsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x5f, 0x0a], "vmaxsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x7c, 0xca], "vhaddps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0x7d, 0xca], "vhsubps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0xc2, 0xca, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xbb, 0xd0, 0xca], "vaddsubps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x54, 0xca], "vandps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x55, 0xca], "vandnps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x56, 0x0a], "vorps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x57, 0xca], "vxorps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x58, 0xca], "vaddps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x59, 0x0a], "vmulps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x5d, 0x0a], "vminps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x5e, 0x0a], "vdivps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0x5f, 0x0a], "vmaxps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbc, 0xc2, 0xca, 0x77], "vcmpps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x54, 0x0a], "vandpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x55, 0x0a], "vandnpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x56, 0x0a], "vorpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x57, 0xca], "vxorpd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x58, 0x0a], "vaddpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x59, 0x0a], "vmulpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x5d, 0x0a], "vminpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x5e, 0x0a], "vdivpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x5f, 0x0a], "vmaxpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x74, 0xca], "vpcmpeqb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x75, 0xca], "vpcmpeqw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x76, 0xca], "vpcmpeqd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x7c, 0xca], "vhaddpd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0x7d, 0xca], "vhsubpd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xc2, 0xca, 0x77], "vcmppd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd0, 0xca], "vaddsubpd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd1, 0x0a], "vpsrlw ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd1, 0xca], "vpsrlw ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd2, 0x0a], "vpsrld ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd2, 0xca], "vpsrld ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd3, 0x0a], "vpsrlq ymm1, ymm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd3, 0xca], "vpsrlq ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd4, 0xca], "vpaddq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd8, 0xca], "vpsubusb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xd9, 0xca], "vpsubusw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xdb, 0xca], "vpand ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xdc, 0xca], "vpaddusb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xdd, 0xca], "vpaddusw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xdf, 0xca], "vpandn ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe0, 0xca], "vpavgb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe1, 0xca], "vpsraw ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe2, 0xca], "vpsrad ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe3, 0xca], "vpavgw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe4, 0xca], "vpmulhuw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe5, 0xca], "vpmulhw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe8, 0xca], "vpsubsb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xe9, 0xca], "vpsubsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xf1, 0xca], "vpsllw ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xf2, 0xca], "vpslld ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xf3, 0xca], "vpsllq ymm1, ymm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xf4, 0xca], "vpmuludq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xf8, 0xca], "vpsubb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xf9, 0xca], "vpsubw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xfa, 0xca], "vpsubd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xfb, 0xca], "vpsubq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xfc, 0xca], "vpaddb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xfd, 0xca], "vpaddw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbd, 0xfe, 0xca], "vpaddd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbe, 0x58, 0x0a], "vaddss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbe, 0x58, 0xca], "vaddss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xbe, 0x59, 0x0a], "vmulss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbe, 0x5d, 0x0a], "vminss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbe, 0x5e, 0x0a], "vdivss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbe, 0x5f, 0x0a], "vmaxss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x11, 0xca], "vmovsd xmm2, xmm0, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x58, 0x0a], "vaddsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x59, 0x0a], "vmulsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x5d, 0x0a], "vminsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x5e, 0x0a], "vdivsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x5f, 0x0a], "vmaxsd xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x7c, 0xca], "vhaddps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0x7d, 0xca], "vhsubps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0xc2, 0xca, 0x77], "vcmpsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xbf, 0xd0, 0xca], "vaddsubps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x10, 0x0a], "vmovups xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x11, 0x0a], "vmovups xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x17, 0x0a], "vmovhps qword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x50, 0xca], "vmovmskps ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x51, 0x0a], "vsqrtps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x52, 0xca], "vrsqrtps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x53, 0xca], "vrcpps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x5a, 0x0a], "vcvtps2pd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x5a, 0xca], "vcvtps2pd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x5b, 0x0a], "vcvtdq2ps xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xf8, 0x5b, 0xca], "vcvtdq2ps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x10, 0x0a], "vmovupd xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x13, 0x0a], "vmovlpd qword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x17, 0x0a], "vmovhpd qword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x50, 0xca], "vmovmskpd ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x5a, 0xca], "vcvtpd2ps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x5b, 0xca], "vcvtps2dq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x6c, 0xca], "vpunpcklqdq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x6d, 0xca], "vpunpckhqdq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x6e, 0x0a], "vmovd xmm1, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x6e, 0xca], "vmovd xmm1, edx"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x70, 0xca, 0x77], "vpshufd xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x71, 0xd2, 0x77], "vpsrlw xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x71, 0xe2, 0x77], "vpsraw xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x71, 0xf2, 0x77], "vpsllw xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x72, 0xd2, 0x77], "vpsrld xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x72, 0xe2, 0x77], "vpsrad xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x72, 0xf2, 0x77], "vpslld xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x73, 0xd2, 0x77], "vpsrlq xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x73, 0xda, 0x77], "vpsrldq xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x73, 0xf2, 0x77], "vpsllq xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x73, 0xfa, 0x77], "vpslldq xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0x7e, 0xca], "vmovd edx, xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0xe6, 0xca], "vcvttpd2dq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0xe7, 0x0a], "vmovntdq xmmword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0xf5, 0xca], "vpmaddwd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0xf6, 0xca], "vpsadbw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xf9, 0xf7, 0xca], "vmaskmovdqu xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x10, 0x0a], "vmovss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x11, 0x0a], "vmovss dword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x12, 0x0a], "vmovsldup xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x16, 0xca], "vmovshdup xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x2a, 0x0a], "vcvtsi2ss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x51, 0x0a], "vsqrtss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x52, 0xca], "vrsqrtss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x53, 0xca], "vrcpss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x5a, 0x0a], "vcvtss2sd xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x5a, 0xca], "vcvtss2sd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x5b, 0xca], "vcvttps2dq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0x70, 0xca, 0x77], "vpshufhw xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfa, 0xe6, 0xca], "vcvtdq2pd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x10, 0x0a], "vmovsd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x11, 0x0a], "vmovsd qword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x2a, 0x0a], "vcvtsi2sd xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x2d, 0x0a], "vcvtsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x5a, 0x0a], "vcvtsd2ss xmm1, xmm0, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x5a, 0xca], "vcvtsd2ss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0x70, 0xca, 0x77], "vpshuflw xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0xe6, 0xca], "vcvtpd2dq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfb, 0xf0, 0x0a], "vlddqu xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x10, 0x0a], "vmovups ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x11, 0x0a], "vmovups ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x28, 0xca], "vmovaps ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x29, 0xca], "vmovaps ymm2, ymm1"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x2b, 0x0a], "vmovntps ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x50, 0xca], "vmovmskps ecx, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x51, 0x0a], "vsqrtps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x52, 0xca], "vrsqrtps ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x53, 0xca], "vrcpps ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x5a, 0x0a], "vcvtps2pd ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x5a, 0xca], "vcvtps2pd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x5b, 0x0a], "vcvtdq2ps ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfc, 0x5b, 0xca], "vcvtdq2ps ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x10, 0x0a], "vmovupd ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x28, 0xca], "vmovapd ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x29, 0xca], "vmovapd ymm2, ymm1"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x2b, 0x0a], "vmovntpd ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x50, 0xca], "vmovmskpd ecx, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x5a, 0xca], "vcvtpd2ps xmm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x5b, 0xca], "vcvtps2dq ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x6c, 0xca], "vpunpcklqdq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x6d, 0xca], "vpunpckhqdq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x70, 0xca, 0x77], "vpshufd ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x71, 0xd2, 0x77], "vpsrlw ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x71, 0xe2, 0x77], "vpsraw ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x71, 0xf2, 0x77], "vpsllw ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x72, 0xd2, 0x77], "vpsrld ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x72, 0xe2, 0x77], "vpsrad ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x72, 0xf2, 0x77], "vpslld ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x73, 0xd2, 0x77], "vpsrlq ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x73, 0xda, 0x77], "vpsrldq ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x73, 0xf2, 0x77], "vpsllq ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0x73, 0xfa, 0x77], "vpslldq ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0xe6, 0xca], "vcvttpd2dq xmm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0xe7, 0x0a], "vmovntdq ymmword [bp + si * 1], ymm1"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0xf5, 0xca], "vpmaddwd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfd, 0xf6, 0xca], "vpsadbw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x10, 0x0a], "vmovss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x11, 0x0a], "vmovss dword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x12, 0x0a], "vmovsldup ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x16, 0xca], "vmovshdup ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x2a, 0xca], "vcvtsi2ss xmm1, xmm0, edx"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x2c, 0xca], "vcvttss2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x2d, 0x0a], "vcvtss2si ecx, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x51, 0x0a], "vsqrtss xmm1, xmm0, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x52, 0xca], "vrsqrtss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x53, 0xca], "vrcpss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x5a, 0xca], "vcvtss2sd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x5b, 0xca], "vcvttps2dq ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0x70, 0xca, 0x77], "vpshufhw ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xfe, 0xe6, 0xca], "vcvtdq2pd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x10, 0x0a], "vmovsd xmm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x11, 0x0a], "vmovsd qword [bp + si * 1], xmm1"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x2c, 0xca], "vcvttsd2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x2d, 0xca], "vcvtsd2si ecx, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x5a, 0xca], "vcvtsd2ss xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0x70, 0xca, 0x77], "vpshuflw ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0xe6, 0xca], "vcvtpd2dq xmm1, ymm2"),
+        testcase!(&[0xc4, 0xc1, 0xff, 0xf0, 0x0a], "vlddqu ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x0c, 0xca], "vpermilps xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x0d, 0xca], "vpermilpd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x28, 0xca], "vpmuldq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x29, 0xca], "vpcmpeqq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x2b, 0xca], "vpackusdw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x2c, 0x0a], "vmaskmovps xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x2d, 0x0a], "vmaskmovpd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x2e, 0x0a], "vmaskmovps xmmword [bp + si * 1], xmm0, xmm1"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x2f, 0x0a], "vmaskmovpd xmmword [bp + si * 1], xmm0, xmm1"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x37, 0xca], "vpcmpgtq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x38, 0xca], "vpminsb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x39, 0xca], "vpminsd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x3a, 0xca], "vpminuw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x3b, 0xca], "vpminud xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x3c, 0xca], "vpmaxsb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x3d, 0xca], "vpmaxsd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x3e, 0xca], "vpmaxuw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x3f, 0xca], "vpmaxud xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x39, 0x40, 0xca], "vpmulld xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x0c, 0xca], "vpermilps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x0d, 0xca], "vpermilpd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x28, 0xca], "vpmuldq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x29, 0xca], "vpcmpeqq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x2b, 0x0a], "vpackusdw ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x2b, 0xca], "vpackusdw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x2c, 0x0a], "vmaskmovps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x2d, 0x0a], "vmaskmovpd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x2e, 0x0a], "vmaskmovps ymmword [bp + si * 1], ymm0, ymm1"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x2f, 0x0a], "vmaskmovpd ymmword [bp + si * 1], ymm0, ymm1"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x36, 0xca], "vpermd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x37, 0xca], "vpcmpgtq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x38, 0xca], "vpminsb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x39, 0xca], "vpminsd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x3a, 0xca], "vpminuw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x3b, 0xca], "vpminud ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x3c, 0xca], "vpmaxsb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x3d, 0xca], "vpmaxsd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x3e, 0xca], "vpmaxuw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x3f, 0xca], "vpmaxud ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x3d, 0x40, 0xca], "vpmulld ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x00, 0xca], "vpshufb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x01, 0xca], "vphaddw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x02, 0xca], "vphaddd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x03, 0xca], "vphaddsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x04, 0xca], "vpmaddubsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x05, 0xca], "vphsubw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x06, 0xca], "vphsubd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x07, 0xca], "vphsubsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x08, 0xca], "vpsignb xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x09, 0xca], "vpsignw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x0a, 0xca], "vpsignd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x0b, 0xca], "vpmulhrsw xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x0e, 0xca], "vtestps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x0f, 0xca], "vtestpd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x17, 0xca], "vptest xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x18, 0x0a], "vbroadcastss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x18, 0xca], "vbroadcastss xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x1c, 0xca], "vpabsb xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x1d, 0xca], "vpabsw xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x1e, 0xca], "vpabsd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x20, 0xca], "vpmovsxbw xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x21, 0xca], "vpmovsxbd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x22, 0xca], "vpmovsxbq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x23, 0xca], "vpmovsxwd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x24, 0xca], "vpmovsxwq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x25, 0xca], "vpmovsxdq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x2a, 0x0a], "vmovntdqa xmm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x30, 0xca], "vpmovzxbw xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x31, 0xca], "vpmovzxbd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x32, 0xca], "vpmovzxbq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x33, 0xca], "vpmovzxwd xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x34, 0xca], "vpmovzxwq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x35, 0xca], "vpmovzxdq xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x41, 0xca], "vphminposuw xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x45, 0x0a], "vpsrlvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x45, 0xca], "vpsrlvd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x46, 0x0a], "vpsravd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x47, 0x0a], "vpsllvd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x47, 0xca], "vpsllvd xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x8c, 0x0a], "vpmaskmovd xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0x8e, 0x0a], "vpmaskmovd xmmword [bp + si * 1], xmm0, xmm1"),
+        testcase!(&[0xc4, 0xc2, 0x79, 0xdb, 0xca], "vaesimc xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x00, 0xca], "vpshufb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x01, 0xca], "vphaddw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x02, 0xca], "vphaddd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x03, 0xca], "vphaddsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x04, 0xca], "vpmaddubsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x05, 0xca], "vphsubw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x06, 0xca], "vphsubd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x07, 0xca], "vphsubsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x08, 0xca], "vpsignb ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x09, 0xca], "vpsignw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x0a, 0xca], "vpsignd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x0b, 0xca], "vpmulhrsw ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x0e, 0xca], "vtestps ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x0f, 0xca], "vtestpd ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x16, 0x0a], "vpermps ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x16, 0xca], "vpermps ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x17, 0xca], "vptest ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x18, 0x0a], "vbroadcastss ymm1, dword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x18, 0xca], "vbroadcastss ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x19, 0x0a], "vbroadcastsd ymm1, qword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x19, 0xca], "vbroadcastsd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x1a, 0x0a], "vbroadcastf128 ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x1c, 0xca], "vpabsb ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x1d, 0xca], "vpabsw ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x1e, 0xca], "vpabsd ymm1, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x20, 0xca], "vpmovsxbw ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x21, 0xca], "vpmovsxbd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x22, 0xca], "vpmovsxbq ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x23, 0xca], "vpmovsxwd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x24, 0xca], "vpmovsxwq ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x25, 0xca], "vpmovsxdq ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x2a, 0x0a], "vmovntdqa ymm1, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x30, 0xca], "vpmovzxbw ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x31, 0xca], "vpmovzxbd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x32, 0xca], "vpmovzxbq ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x33, 0xca], "vpmovzxwd ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x34, 0xca], "vpmovzxwq ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x35, 0xca], "vpmovzxdq ymm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x45, 0x0a], "vpsrlvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xe2, 0x79, 0x13, 0xca], "vcvtph2ps xmm1, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x45, 0xca], "vpsrlvd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x46, 0x0a], "vpsravd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x47, 0x0a], "vpsllvd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x47, 0xca], "vpsllvd ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x5a, 0x0a], "vbroadcasti128 ymm1, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x8c, 0x0a], "vpmaskmovd ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0x7d, 0x8e, 0x0a], "vpmaskmovd ymmword [bp + si * 1], ymm0, ymm1"),
+        testcase!(&[0xc4, 0xc2, 0xb9, 0xdc, 0xca], "vaesenc xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0xb9, 0xdd, 0xca], "vaesenclast xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0xb9, 0xde, 0xca], "vaesdec xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0xb9, 0xdf, 0xca], "vaesdeclast xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0xbd, 0xdc, 0xca], "vaesenc ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0xbd, 0xdd, 0xca], "vaesenclast ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0xbd, 0xde, 0xca], "vaesdec ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0xbd, 0xdf, 0xca], "vaesdeclast ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0xf9, 0x45, 0x0a], "vpsrlvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0xf9, 0x45, 0xca], "vpsrlvq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0xf9, 0x47, 0x0a], "vpsllvq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0xf9, 0x47, 0xca], "vpsllvq xmm1, xmm0, xmm2"),
+        testcase!(&[0xc4, 0xc2, 0xf9, 0x8c, 0x0a], "vpmaskmovq xmm1, xmm0, xmmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0xf9, 0x8e, 0x0a], "vpmaskmovq xmmword [bp + si * 1], xmm0, xmm1"),
+        testcase!(&[0xc4, 0xc2, 0xfd, 0x45, 0x0a], "vpsrlvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0xfd, 0x45, 0xca], "vpsrlvq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0xfd, 0x47, 0x0a], "vpsllvq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0xfd, 0x47, 0xca], "vpsllvq ymm1, ymm0, ymm2"),
+        testcase!(&[0xc4, 0xc2, 0xfd, 0x8c, 0x0a], "vpmaskmovq ymm1, ymm0, ymmword [bp + si * 1]"),
+        testcase!(&[0xc4, 0xc2, 0xfd, 0x8e, 0x0a], "vpmaskmovq ymmword [bp + si * 1], ymm0, ymm1"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x0a, 0xca, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x0b, 0xca, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x0c, 0xca, 0x77], "vblendps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x0d, 0xca, 0x77], "vblendpd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x0e, 0xca, 0x77], "vpblendw xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x20, 0x0a, 0x77], "vpinsrb xmm1, xmm0, byte [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x20, 0xca, 0x77], "vpinsrb xmm1, xmm0, edx, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x21, 0xca, 0x77], "vinsertps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x22, 0x0a, 0x77], "vpinsrd xmm1, xmm0, dword [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x22, 0xca, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x40, 0xca, 0x77], "vdpps xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x41, 0xca, 0x77], "vdppd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x42, 0xca, 0x77], "vmpsadbw xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x39, 0x4c, 0xca, 0x77], "vpblendvb xmm1, xmm0, xmm2, xmm7"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x0a, 0xca, 0x77], "vroundss xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x0b, 0xca, 0x77], "vroundsd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x0c, 0xca, 0x77], "vblendps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x0d, 0xca, 0x77], "vblendpd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x0e, 0xca, 0x77], "vpblendw ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x18, 0xca, 0x77], "vinsertf128 ymm1, ymm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x38, 0xca, 0x77], "vinserti128 ymm1, ymm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x40, 0xca, 0x77], "vdpps ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x42, 0xca, 0x77], "vmpsadbw ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x3d, 0x4c, 0xca, 0x77], "vpblendvb ymm1, ymm0, ymm2, ymm7"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x02, 0x0a, 0x77], "vpblendd xmm1, xmm0, xmmword [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x02, 0xca, 0x77], "vpblendd xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x04, 0xca, 0x77], "vpermilps xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x05, 0xca, 0x77], "vpermilpd xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x08, 0xca, 0x77], "vroundps xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x09, 0xca, 0x77], "vroundpd xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x14, 0x0a, 0x77], "vpextrb byte [bp + si * 1], xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x14, 0xca, 0x77], "vpextrb edx, xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x15, 0x0a, 0x77], "vpextrw word [bp + si * 1], xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x15, 0xca, 0x77], "vpextrw edx, xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x16, 0x0a, 0x77], "vpextrd dword [bp + si * 1], xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x16, 0xca, 0x77], "vpextrd edx, xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x17, 0x0a, 0x77], "vextractps dword [bp + si * 1], xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x17, 0xca, 0x77], "vextractps edx, xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x60, 0xca, 0x77], "vpcmpestrm xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x61, 0xca, 0x77], "vpcmpestri xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x62, 0xca, 0x77], "vpcmpistrm xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x79, 0x63, 0xca, 0x77], "vpcmpistri xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x02, 0x0a, 0x77], "vpblendd ymm1, ymm0, ymmword [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x02, 0xca, 0x77], "vpblendd ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x04, 0xca, 0x77], "vpermilps ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x05, 0xca, 0x77], "vpermilpd ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x06, 0x0a, 0x77], "vperm2f128 ymm1, ymm0, ymmword [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x06, 0xca, 0x77], "vperm2f128 ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x08, 0xca, 0x77], "vroundps ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x09, 0xca, 0x77], "vroundpd ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x19, 0xca, 0x77], "vextractf128 xmm2, ymm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x1d, 0xca, 0x77], "vcvtps2ph xmm2, ymm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x39, 0xca, 0x77], "vextracti128 xmm2, ymm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x46, 0x0a, 0x77], "vperm2i128 ymm1, ymm0, ymmword [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0x7d, 0x46, 0xca, 0x77], "vperm2i128 ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xb9, 0x0f, 0xca, 0x77], "vpalignr xmm1, xmm0, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xb9, 0x22, 0x0a, 0x77], "vpinsrd xmm1, xmm0, dword [bp + si * 1], 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xb9, 0x22, 0xca, 0x77], "vpinsrd xmm1, xmm0, edx, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xbd, 0x0f, 0xca, 0x77], "vpalignr ymm1, ymm0, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xf9, 0x16, 0x0a, 0x77], "vpextrd dword [bp + si * 1], xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xf9, 0x16, 0xca, 0x77], "vpextrd edx, xmm1, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xf9, 0xdf, 0xca, 0x77], "vaeskeygenassist xmm1, xmm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xfd, 0x00, 0xca, 0x77], "vpermq ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xc3, 0xfd, 0x01, 0xca, 0x77], "vpermpd ymm1, ymm2, 0x77"),
+        testcase!(&[0xc4, 0xe2, 0x60, 0xf2, 0x01], "andn eax, ebx, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0x60, 0xf5, 0x07], "bzhi eax, dword [bx], ebx"),
+        testcase!(&[0xc4, 0xe2, 0x60, 0xf7, 0x01], "bextr eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0x61, 0xf7, 0x01], "shlx eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0x62, 0xf5, 0x07], "pext eax, ebx, dword [bx]"),
+        testcase!(&[0xc4, 0xe2, 0x62, 0xf7, 0x01], "sarx eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0x63, 0xf5, 0x07], "pdep eax, ebx, dword [bx]"),
+        testcase!(&[0xc4, 0xe2, 0x63, 0xf6, 0x07], "mulx eax, ebx, dword [bx]"),
+        testcase!(&[0xc4, 0xe2, 0x63, 0xf7, 0x01], "shrx eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0x78, 0xf3, 0x09], "blsr eax, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0x78, 0xf3, 0x11], "blsmsk eax, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0x78, 0xf3, 0x19], "blsi eax, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0x79, 0x58, 0xc1], "vpbroadcastd xmm0, xmm1"),
+        testcase!(&[0xc4, 0xe2, 0x79, 0x59, 0xc1], "vpbroadcastq xmm0, xmm1"),
+        testcase!(&[0xc4, 0xe2, 0x79, 0x78, 0xc1], "vpbroadcastb xmm0, xmm1"),
+        testcase!(&[0xc4, 0xe2, 0x79, 0x79, 0xc1], "vpbroadcastw xmm0, xmm1"),
+        testcase!(&[0xc4, 0xe2, 0x7d, 0x58, 0xc1], "vpbroadcastd ymm0, ymm1"),
+        testcase!(&[0xc4, 0xe2, 0x7d, 0x59, 0xc1], "vpbroadcastq ymm0, ymm1"),
+        testcase!(&[0xc4, 0xe2, 0x7d, 0x78, 0xc1], "vpbroadcastb ymm0, ymm1"),
+        testcase!(&[0xc4, 0xe2, 0x7d, 0x79, 0xc1], "vpbroadcastw ymm0, ymm1"),
+        testcase!(&[0xc4, 0xe2, 0xe0, 0xf2, 0x01], "andn eax, ebx, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0xe0, 0xf5, 0x07], "bzhi eax, dword [bx], ebx"),
+        testcase!(&[0xc4, 0xe2, 0xe0, 0xf7, 0x01], "bextr eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0xe1, 0xf7, 0x01], "shlx eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0xe2, 0xf5, 0x07], "pext eax, ebx, dword [bx]"),
+        testcase!(&[0xc4, 0xe2, 0xe2, 0xf7, 0x01], "sarx eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0xe3, 0xf5, 0x07], "pdep eax, ebx, dword [bx]"),
+        testcase!(&[0xc4, 0xe2, 0xe3, 0xf6, 0x07], "mulx eax, ebx, dword [bx]"),
+        testcase!(&[0xc4, 0xe2, 0xe3, 0xf7, 0x01], "shrx eax, dword [bx + di * 1], ebx"),
+        testcase!(&[0xc4, 0xe2, 0xf8, 0xf3, 0x09], "blsr eax, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0xf8, 0xf3, 0x11], "blsmsk eax, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe2, 0xf8, 0xf3, 0x19], "blsi eax, dword [bx + di * 1]"),
+        testcase!(&[0xc4, 0xe3, 0x7b, 0xf0, 0x01, 0x05], "rorx eax, dword [bx + di * 1], 0x5"),
+        testcase!(&[0xc4, 0xe3, 0x7d, 0x1d, 0xca, 0x77], "vcvtps2ph xmm2, ymm1, 0x77"),
+        testcase!(&[0xc4, 0xe3, 0xfb, 0xf0, 0x01, 0x05], "rorx eax, dword [bx + di * 1], 0x5"),
+        testcase!(&[0xc5, 0x78, 0x10], "lds di, dword [bx + si * 1 + 0x10]"),
+        testcase!(&[0xc5, 0xf8, 0x10, 0x00], "vmovups xmm0, xmmword [bx + si * 1]"),
+        testcase!(&[0xc5, 0xf8, 0x10, 0x01], "vmovups xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0xc5, 0xf8, 0x2e, 0xca], "vucomiss xmm1, xmm2"),
+        testcase!(&[0xc5, 0xf8, 0x2f, 0xca], "vcomiss xmm1, xmm2"),
+        testcase!(&[0xc5, 0xfa, 0x2c, 0x0a], "vcvttss2si ecx, dword [bp + si * 1]"),
+        testcase!(&[0xc5, 0xfa, 0x2c, 0xca], "vcvttss2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xfa, 0x2d, 0xca], "vcvtss2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xfb, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(&[0xc5, 0xfb, 0x2c, 0xca], "vcvttsd2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xfb, 0x2d, 0xca], "vcvtsd2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xfc, 0x2e, 0x0a], "vucomiss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0xc5, 0xfc, 0x2f, 0x0a], "vcomiss xmm1, dword [bp + si * 1]"),
+        testcase!(&[0xc5, 0xfe, 0x2c, 0xca], "vcvttss2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xfe, 0x2d, 0xca], "vcvtss2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xff, 0x2a, 0xca], "vcvtsi2sd xmm1, xmm0, edx"),
+        testcase!(&[0xc5, 0xff, 0x2c, 0x0a], "vcvttsd2si ecx, qword [bp + si * 1]"),
+        testcase!(&[0xc5, 0xff, 0x2c, 0xca], "vcvttsd2si ecx, xmm2"),
+        testcase!(&[0xc5, 0xff, 0x2d, 0xca], "vcvtsd2si ecx, xmm2"),
+        testcase!(&[0xc6, 0xf8, 0x10], "xabort 0x10"),
+        testcase!(&[0xc7, 0x43, 0x10, 0x00, 0x00], "mov word [bp + di * 1 + 0x10], 0x0"),
+        testcase!(&[0xc7, 0xf8, 0x10, 0x12], "xbegin $+0x1210"),
+        testcase!(&[0xc8, 0x01, 0x02, 0x03], "enter 0x201, 0x3"),
+        testcase!(&[0xc9], "leave"),
+        testcase!(&[0xca, 0x12, 0x34], "retf 0x3412"),
+        testcase!(&[0xcb], "retf"),
+        testcase!(&[0xcd, 0x00], "int 0x0"),
+        testcase!(&[0xcd, 0xff], "int 0xff"),
+        testcase!(&[0xce], "into"),
+        testcase!(&[0xcf], "iret"),
+        testcase!(&[0xd2, 0xe0], "shl al, cl"),
+        testcase!(&[0xd4, 0x01], "aam 0x1"),
+        testcase!(&[0xd4, 0x0a], "aam 0xa"),
+        testcase!(&[0xd5, 0x01], "aad 0x1"),
+        testcase!(&[0xd5, 0x0a], "aad 0xa"),
+        testcase!(&[0xd8, 0x03], "fadd st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x0b], "fmul st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x13], "fcom st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x1b], "fcomp st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x23], "fsub st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x2b], "fsubr st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x33], "fdiv st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0x3b], "fdivr st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd8, 0xc3], "fadd st(0), st(3)"),
+        testcase!(&[0xd8, 0xcb], "fmul st(0), st(3)"),
+        testcase!(&[0xd8, 0xd3], "fcom st(0), st(3)"),
+        testcase!(&[0xd8, 0xdb], "fcomp st(0), st(3)"),
+        testcase!(&[0xd8, 0xe3], "fsub st(0), st(3)"),
+        testcase!(&[0xd8, 0xeb], "fsubr st(0), st(3)"),
+        testcase!(&[0xd8, 0xf3], "fdiv st(0), st(3)"),
+        testcase!(&[0xd8, 0xfb], "fdivr st(0), st(3)"),
+        testcase!(&[0xd9, 0x03], "fld st(0), dword [bp + di * 1]"),
+        testcase!(&[0xd9, 0x13], "fst dword [bp + di * 1], st(0)"),
+        testcase!(&[0xd9, 0x1b], "fstp dword [bp + di * 1], st(0)"),
+        testcase!(&[0xd9, 0x23], "fldenv ptr [bp + di * 1]"),
+        testcase!(&[0xd9, 0x2b], "fldcw word [bp + di * 1]"),
+        testcase!(&[0xd9, 0x33], "fnstenv ptr [bp + di * 1]"),
+        testcase!(&[0xd9, 0x3b], "fnstcw word [bp + di * 1]"),
+        testcase!(&[0xd9, 0xc3], "fld st(0), st(3)"),
+        testcase!(&[0xd9, 0xcb], "fxch st(0), st(3)"),
+        testcase!(&[0xd9, 0xd0], "fnop"),
+        testcase!(&[0xd9, 0xdb], "fstpnce st(3), st(0)"),
+        testcase!(&[0xd9, 0xe0], "fchs"),
+        testcase!(&[0xd9, 0xe1], "fabs"),
+        testcase!(&[0xd9, 0xe4], "ftst"),
+        testcase!(&[0xd9, 0xe5], "fxam"),
+        testcase!(&[0xd9, 0xe8], "fld1"),
+        testcase!(&[0xd9, 0xe9], "fldl2t"),
+        testcase!(&[0xd9, 0xea], "fldl2e"),
+        testcase!(&[0xd9, 0xeb], "fldpi"),
+        testcase!(&[0xd9, 0xec], "fldlg2"),
+        testcase!(&[0xd9, 0xed], "fldln2"),
+        testcase!(&[0xd9, 0xee], "fldz"),
+        testcase!(&[0xd9, 0xf0], "f2xm1"),
+        testcase!(&[0xd9, 0xf1], "fyl2x"),
+        testcase!(&[0xd9, 0xf2], "fptan"),
+        testcase!(&[0xd9, 0xf3], "fpatan"),
+        testcase!(&[0xd9, 0xf4], "fxtract"),
+        testcase!(&[0xd9, 0xf5], "fprem1"),
+        testcase!(&[0xd9, 0xf6], "fdecstp"),
+        testcase!(&[0xd9, 0xf7], "fincstp"),
+        testcase!(&[0xd9, 0xf8], "fprem"),
+        testcase!(&[0xd9, 0xf9], "fyl2xp1"),
+        testcase!(&[0xd9, 0xfa], "fsqrt"),
+        testcase!(&[0xd9, 0xfb], "fsincos"),
+        testcase!(&[0xd9, 0xfc], "frndint"),
+        testcase!(&[0xd9, 0xfd], "fscale"),
+        testcase!(&[0xd9, 0xfe], "fsin"),
+        testcase!(&[0xd9, 0xff], "fcos"),
+        testcase!(&[0xda, 0x03], "fiadd st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x0b], "fimul st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x13], "ficom st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x1b], "ficomp st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x23], "fisub st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x2b], "fisubr st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x33], "fidiv st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0x3b], "fidivr st(0), dword [bp + di * 1]"),
+        testcase!(&[0xda, 0xc3], "fcmovb st(0), st(3)"),
+        testcase!(&[0xda, 0xcb], "fcmove st(0), st(3)"),
+        testcase!(&[0xda, 0xd3], "fcmovbe st(0), st(3)"),
+        testcase!(&[0xda, 0xdb], "fcmovu st(0), st(3)"),
+        testcase!(&[0xda, 0xe9], "fucompp"),
+        testcase!(&[0xdb, 0x03], "fild st(0), dword [bp + di * 1]"),
+        testcase!(&[0xdb, 0x0b], "fisttp dword [bp + di * 1], st(0)"),
+        testcase!(&[0xdb, 0x13], "fist dword [bp + di * 1], st(0)"),
+        testcase!(&[0xdb, 0x1b], "fistp dword [bp + di * 1], st(0)"),
+        testcase!(&[0xdb, 0x2b], "fld st(0), mword [bp + di * 1]"),
+        testcase!(&[0xdb, 0x3b], "fstp mword [bp + di * 1], st(0)"),
+        testcase!(&[0xdb, 0xc3], "fcmovnb st(0), st(3)"),
+        testcase!(&[0xdb, 0xcb], "fcmovne st(0), st(3)"),
+        testcase!(&[0xdb, 0xd3], "fcmovnbe st(0), st(3)"),
+        testcase!(&[0xdb, 0xdb], "fcmovnu st(0), st(3)"),
+        testcase!(&[0xdb, 0xe0], "feni8087_nop"),
+        testcase!(&[0xdb, 0xe1], "fdisi8087_nop"),
+        testcase!(&[0xdb, 0xe2], "fnclex"),
+        testcase!(&[0xdb, 0xe3], "fninit"),
+        testcase!(&[0xdb, 0xe4], "fsetpm287_nop"),
+        testcase!(&[0xdb, 0xeb], "fucomi st(0), st(3)"),
+        testcase!(&[0xdb, 0xf3], "fcomi st(0), st(3)"),
+        testcase!(&[0xdc, 0x03], "fadd st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x0b], "fmul st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x13], "fcom st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x1b], "fcomp st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x23], "fsub st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x2b], "fsubr st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x33], "fdiv st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0x3b], "fdivr st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdc, 0xc3], "fadd st(3), st(0)"),
+        testcase!(&[0xdc, 0xcb], "fmul st(3), st(0)"),
+        testcase!(&[0xdc, 0xd3], "fcom st(0), st(3)"),
+        testcase!(&[0xdc, 0xdb], "fcomp st(0), st(3)"),
+        testcase!(&[0xdc, 0xe3], "fsubr st(3), st(0)"),
+        testcase!(&[0xdc, 0xeb], "fsub st(3), st(0)"),
+        testcase!(&[0xdc, 0xf3], "fdivr st(3), st(0)"),
+        testcase!(&[0xdc, 0xfb], "fdiv st(3), st(0)"),
+        testcase!(&[0xdd, 0x03], "fld st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdd, 0x0b], "fisttp qword [bp + di * 1], st(0)"),
+        testcase!(&[0xdd, 0x13], "fst qword [bp + di * 1], st(0)"),
+        testcase!(&[0xdd, 0x1b], "fstp qword [bp + di * 1], st(0)"),
+        testcase!(&[0xdd, 0x23], "frstor ptr [bp + di * 1]"),
+        testcase!(&[0xdd, 0x33], "fnsave ptr [bp + di * 1]"),
+        testcase!(&[0xdd, 0x3b], "fnstsw word [bp + di * 1]"),
+        testcase!(&[0xdd, 0xc3], "ffree st(3)"),
+        testcase!(&[0xdd, 0xcb], "fxch st(0), st(3)"),
+        testcase!(&[0xdd, 0xd3], "fst st(3), st(0)"),
+        testcase!(&[0xdd, 0xdb], "fstp st(3), st(0)"),
+        testcase!(&[0xdd, 0xe3], "fucom st(0), st(3)"),
+        testcase!(&[0xdd, 0xeb], "fucomp st(0), st(3)"),
+        testcase!(&[0xde, 0x03], "fiadd st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x0b], "fimul st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x13], "ficom st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x1b], "ficomp st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x23], "fisub st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x2b], "fisubr st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x33], "fidiv st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0x3b], "fidivr st(0), word [bp + di * 1]"),
+        testcase!(&[0xde, 0xc3], "faddp st(3), st(0)"),
+        testcase!(&[0xde, 0xcb], "fmulp st(3), st(0)"),
+        testcase!(&[0xde, 0xd3], "fcomp st(0), st(3)"),
+        testcase!(&[0xde, 0xd9], "fcompp"),
+        testcase!(&[0xde, 0xe3], "fsubrp st(3), st(0)"),
+        testcase!(&[0xde, 0xeb], "fsubp st(3), st(0)"),
+        testcase!(&[0xde, 0xf3], "fdivrp st(3), st(0)"),
+        testcase!(&[0xde, 0xfb], "fdivp st(3), st(0)"),
+        testcase!(&[0xdf, 0x03], "fild st(0), word [bp + di * 1]"),
+        testcase!(&[0xdf, 0x0b], "fisttp word [bp + di * 1], st(0)"),
+        testcase!(&[0xdf, 0x13], "fist word [bp + di * 1], st(0)"),
+        testcase!(&[0xdf, 0x1b], "fistp word [bp + di * 1], st(0)"),
+        testcase!(&[0xdf, 0x23], "fbld st(0), mword [bp + di * 1]"),
+        testcase!(&[0xdf, 0x2b], "fild st(0), qword [bp + di * 1]"),
+        testcase!(&[0xdf, 0x33], "fbstp mword [bp + di * 1], st(0)"),
+        testcase!(&[0xdf, 0x3b], "fistp qword [bp + di * 1], st(0)"),
+        testcase!(&[0xdf, 0xc3], "ffreep st(3)"),
+        testcase!(&[0xdf, 0xcb], "fxch st(0), st(3)"),
+        testcase!(&[0xdf, 0xd3], "fstp st(3), st(0)"),
+        testcase!(&[0xdf, 0xdb], "fstp st(3), st(0)"),
+        testcase!(&[0xdf, 0xe0], "fnstsw ax"),
+        testcase!(&[0xdf, 0xeb], "fucomip st(0), st(3)"),
+        testcase!(&[0xdf, 0xf3], "fcomip st(0), st(3)"),
+        testcase!(&[0xe0, 0x12], "loopnz $+0x12"),
+        testcase!(&[0xe1, 0x12], "loopz $+0x12"),
+        testcase!(&[0xe2, 0x12], "loop $+0x12"),
+        testcase!(&[0xe3, 0x12], "jcxz $+0x12"),
+        testcase!(&[0xe3, 0xf0], "jcxz $-0x10"),
+        testcase!(&[0x67, 0xe3, 0x12], "jecxz $+0x12"),
+        testcase!(&[0x67, 0xe3, 0xf0], "jecxz $-0x10"),
+        testcase!(&[0xe4, 0x99], "in al, 0x99"),
+        testcase!(&[0xe5, 0x99], "in ax, 0x99"),
+        testcase!(&[0xe6, 0x99], "out 0x99, al"),
+        testcase!(&[0xe7, 0x99], "out 0x99, ax"),
+        testcase!(&[0xec], "in al, dx"),
+        testcase!(&[0xed], "in ax, dx"),
+        testcase!(&[0xee], "out dx, al"),
+        testcase!(&[0xef], "out dx, ax"),
+        testcase!(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc word [bx], dx"),
+        testcase!(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc word [bx], dx"),
+        testcase!(&[0xf0, 0x31, 0x00], "lock xor word [bx + si * 1], ax"),
+        testcase!(&[0xf0, 0x80, 0x30, 0x00], "lock xor byte [bx + si * 1], 0x0"),
+        testcase!(&[0xf1], "int 0x1"),
+        testcase!(&[0xf2, 0x0f, 0x06], "clts"),
+        testcase!(&[0xf2, 0x0f, 0x07], "sysret"),
+        testcase!(&[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, qword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, dword [bx + si * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x2a, 0x0f], "cvtsi2sd xmm1, dword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi"),
+        testcase!(&[0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi"),
+        testcase!(&[0xf2, 0x0f, 0x2c, 0x0f], "cvttsd2si ecx, qword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0x2c, 0xcf], "cvttsd2si ecx, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0x2d, 0x0f], "cvtsd2si ecx, qword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0x2d, 0xcf], "cvtsd2si ecx, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0x38, 0xf0, 0xc1], "crc32 eax, cl"),
+        testcase!(&[0xf2, 0x0f, 0x38, 0xf0, 0xc6], "crc32 eax, dh"),
+        testcase!(&[0xf2, 0x0f, 0x38, 0xf1, 0xc1], "crc32 eax, cx"),
+        testcase!(&[0xf2, 0x0f, 0x38, 0xf1, 0xc6], "crc32 eax, si"),
+        testcase!(&[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x58, 0x01], "addsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x59, 0x01], "mulsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x59, 0xc8], "mulsd xmm1, xmm0"),
+        testcase!(&[0xf2, 0x0f, 0x5a, 0x01], "cvtsd2ss xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x5c, 0x01], "subsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x5d, 0x01], "minsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x5e, 0x01], "divsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x5f, 0x01], "maxsd xmm0, qword [bx + di * 1]"),
+        testcase!(&[0xf2, 0x0f, 0x70, 0xc0, 0x4e], "pshuflw xmm0, xmm0, 0x4e"),
+        testcase!(&[0xf2, 0x0f, 0x78, 0xf1, 0x4e, 0x76], "insertq xmm6, xmm1, 0x4e, 0x76"),
+        testcase!(&[0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0x7c, 0x0f], "haddps xmm1, xmmword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0x7c, 0xcf], "haddps xmm1, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0x7d, 0x0f], "hsubps xmm1, xmmword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0x7d, 0xcf], "hsubps xmm1, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0xae, 0xf1], "umwait ecx"),
+        testcase!(&[0xf2, 0x0f, 0xbc, 0xd3], "bsf dx, bx"),
+        testcase!(&[0xf2, 0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0xf2, 0x0f, 0xc1, 0xcc], "xadd sp, cx"),
+        testcase!(&[0xf2, 0x0f, 0xc2, 0x03, 0x08], "cmpsd xmm0, qword [bp + di * 1], 0x8"),
+        testcase!(&[0xf2, 0x0f, 0xc2, 0xc3, 0x08], "cmpsd xmm0, xmm3, 0x8"),
+        testcase!(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, xmmword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0xd0, 0xcf], "addsubps xmm1, xmm7"),
+        testcase!(&[0xf2, 0x0f, 0xd6, 0xc3], "movdq2q mm0, xmm3"),
+        testcase!(&[0xf2, 0x0f, 0xf0, 0x0f], "lddqu xmm1, xmmword [bx]"),
+        testcase!(&[0xf2, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"),
+        testcase!(&[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0], "movsd xmm0, xmm0"),
+        testcase!(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c], "enqcmd ax, zmmword ss:[bp + di * 1 + 0x1c09]"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp qword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xe8], "setssbsy"),
+        testcase!(&[0xf3, 0x0f, 0x01, 0xea], "saveprevssp"),
+        testcase!(&[0xf3, 0x0f, 0x12, 0x0f], "movsldup xmm1, xmmword [bx]"),
+        testcase!(&[0xf3, 0x0f, 0x12, 0xcf], "movsldup xmm1, xmm7"),
+        testcase!(&[0xf3, 0x0f, 0x16, 0x0f], "movshdup xmm1, xmmword [bx]"),
+        testcase!(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7"),
+        testcase!(&[0xf3, 0x0f, 0x16, 0xcf], "movshdup xmm1, xmm7"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0xfa], "endbr64"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0xfb], "endbr32"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0xfc], "nop sp, di"),
+        testcase!(&[0xf3, 0x0f, 0x21, 0xc8], "mov eax, dr1"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, dword [bx + si * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0x01], "cvtsi2ss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0xc1], "cvtsi2ss xmm0, ecx"),
+        testcase!(&[0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi"),
+        testcase!(&[0xf3, 0x0f, 0x2c, 0x01], "cvttss2si eax, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x2c, 0xc1], "cvttss2si eax, xmm1"),
+        testcase!(&[0xf3, 0x0f, 0x2d, 0x01], "cvtss2si eax, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x2d, 0xc1], "cvtss2si eax, xmm1"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xdd, 0x03], "aesdec128kl xmm0, m384b [bp + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xf6, 0x01], "adox eax, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x38, 0xf6, 0xc1], "adox eax, ecx"),
+        testcase!(&[0xf3, 0x0f, 0x51, 0x01], "sqrtss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x52, 0x01], "rsqrtss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x53, 0x01], "rcpss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x53, 0xc1], "rcpss xmm0, xmm1"),
+        testcase!(&[0xf3, 0x0f, 0x58, 0x01], "addss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x59, 0x01], "mulss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x59, 0xc8], "mulss xmm1, xmm0"),
+        testcase!(&[0xf3, 0x0f, 0x5a, 0x01], "cvtss2sd xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x5b, 0x01], "cvttps2dq xmm0, xmmword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x5c, 0x01], "subss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x5d, 0x01], "minss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x5e, 0x01], "divss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x5f, 0x01], "maxss xmm0, dword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0x6f, 0x07], "movdqu xmm0, xmmword [bx]"),
+        testcase!(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e"),
+        testcase!(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e"),
+        testcase!(&[0xf3, 0x0f, 0x7e, 0xc1], "movq xmm0, xmm1"),
+        testcase!(&[0xf3, 0x0f, 0x7f, 0x45, 0x00], "movdqu xmmword [di], xmm0"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy qword [bx + si * 1]"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xe6], "ptwrite esi"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xe9], "incssp ecx"),
+        testcase!(&[0xf3, 0x0f, 0xae, 0xf1], "umonitor cx"),
+        testcase!(&[0x67, 0xf3, 0x0f, 0xae, 0xf1], "umonitor ecx"),
+        testcase!(&[0xf3, 0x0f, 0xb8, 0xc1], "popcnt ax, cx"),
+        testcase!(&[0xf3, 0x0f, 0xb8, 0xc1], "popcnt ax, cx"),
+        testcase!(&[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt dx, bx"),
+        testcase!(&[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt dx, bx"),
+        testcase!(&[0xf3, 0x0f, 0xbc, 0xd7], "tzcnt dx, di"),
+        testcase!(&[0xf3, 0x0f, 0xbd, 0xc1], "lzcnt ax, cx"),
+        testcase!(&[0xf3, 0x0f, 0xc0, 0xcc], "xadd ah, cl"),
+        testcase!(&[0xf3, 0x0f, 0xc1, 0xcc], "xadd sp, cx"),
+        testcase!(&[0xf3, 0x0f, 0xc2, 0x03, 0x08], "cmpss xmm0, dword [bp + di * 1], 0x8"),
+        testcase!(&[0xf3, 0x0f, 0xc2, 0xc3, 0x08], "cmpss xmm0, xmm3, 0x8"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b qword [bx]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon qword [bp + di * 1]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon qword [bx]"),
+        testcase!(&[0xf3, 0x0f, 0xc7, 0xfd], "rdpid ebp"),
+        testcase!(&[0xf3, 0x0f, 0xd6, 0xc3], "movq2dq xmm0, mm3"),
+        testcase!(&[0xf3, 0x0f, 0xff, 0xc1], "ud0 eax, ecx"),
+        testcase!(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp qword [bx + di * 1]"),
+        testcase!(&[0xf3, 0x66, 0x0f, 0x01, 0xe8], "setssbsy"),
+        testcase!(&[0xf3, 0x66, 0x0f, 0x01, 0xea], "saveprevssp"),
+        testcase!(&[0xf3, 0xa5], "rep movs word es:[di], word ds:[si]"),
+        testcase!(&[0x67, 0xf3, 0xa5], "rep movs word es:[edi], word ds:[esi]"),
+        testcase!(&[0x66, 0x67, 0xf3, 0xa5], "rep movs dword es:[edi], dword ds:[esi]"),
+        testcase!(&[0xf3, 0xab], "rep stos word es:[di], ax"),
+        testcase!(&[0xf5], "cmc"),
+        testcase!(&[0xf6, 0x28], "imul byte [bx + si * 1]"),
+        testcase!(&[0xf6, 0xc2, 0x18], "test dl, 0x18"),
+        testcase!(&[0xf6, 0xe8], "imul al"),
+        testcase!(&[0xfe, 0x00], "inc byte [bx + si * 1]"),
+        testcase!(&[0xfe, 0x08], "dec byte [bx + si * 1]"),
+        testcase!(&[0xff, 0x00], "inc word [bx + si * 1]"),
+        testcase!(&[0xff, 0x08], "dec word [bx + si * 1]"),
+        testcase!(&[0xff, 0x15], "call word [di]"),
+        testcase!(&[0x67, 0xff, 0x15, 0x12, 0x12, 0x12, 0x12], "call word [0x12121212]"),
+        // note that this call only writes two bytes, and only moves sp by two.
+        testcase!(&[0x66, 0xff, 0x15], "call dword [di]"),
+        testcase!(&[0xff, 0x18], "callf dword [bx + si * 1]"),
+        testcase!(&[0xff, 0x24], "jmp word [si]"),
+        testcase!(&[0xff, 0x75, 0x08], "push word [di + 0x8]"),
+        testcase!(&[0xff, 0x75, 0xb8], "push word [di - 0x48]"),
+        testcase!(&[0xff, 0xe0], "jmp ax"),
+        testcase!(&[0xff, 0xd0], "call ax"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn test_invalid_sequences() {
-    test_invalid(&[0x0f, 0x01, 0x69, 0xff]);
-    test_invalid(&[0x0f, 0x01, 0xc6]);
-    test_invalid(&[0x0f, 0x01, 0xc7]);
-    test_invalid(&[0x0f, 0x01, 0xcc]);
-    test_invalid(&[0x0f, 0x01, 0xcd]);
-    test_invalid(&[0x0f, 0x01, 0xce]);
-    test_invalid(&[0x0f, 0x01, 0xd2]);
-    test_invalid(&[0x0f, 0x01, 0xd3]);
-    test_invalid(&[0x0f, 0x01, 0xe8]);
-    test_invalid(&[0x0f, 0x01, 0xe9]);
-    test_invalid(&[0x0f, 0x01, 0xea]);
-    test_invalid(&[0x0f, 0x01, 0xeb]);
-    test_invalid(&[0x0f, 0x01, 0xf8]);
-    test_invalid(&[0x0f, 0x13, 0xc0]);
-    test_invalid(&[0x0f, 0x17, 0xc0]);
-    test_invalid(&[0x0f, 0x20, 0xc8]);
-    test_invalid(&[0x0f, 0x22, 0xc8]);
-    test_invalid(&[0x0f, 0x36]);
-    test_invalid(&[0x0f, 0x38, 0x10, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x14, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x15, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x17, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x20, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x21, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x22, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x23, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x24, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x25, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x28, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x29, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x2a, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x2b, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x30, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x31, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x32, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x33, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x34, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x35, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x38, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x39, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x3a, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x3b, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x3c, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x3d, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x3e, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x3f, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x40, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x41, 0x06]);
-    test_invalid(&[0x0f, 0x38, 0x80, 0x2f]);
-    test_invalid(&[0x0f, 0x38, 0x81, 0x2f]);
-    test_invalid(&[0x0f, 0x38, 0x82, 0x2f]);
-    test_invalid(&[0x0f, 0x38, 0xf0, 0xc6]);
-    test_invalid(&[0x0f, 0x38, 0xf5, 0x47, 0xe9]);
-    test_invalid(&[0x0f, 0x3a, 0x08, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x09, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x0a, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x0b, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x0e, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x14, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x14, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x15, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x15, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x16, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x16, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x17, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x17, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x20, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x21, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x22, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x40, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x41, 0x06]);
-    test_invalid(&[0x0f, 0x3a, 0x42, 0x06]);
-    test_invalid(&[0x0f, 0x50, 0x00]);
-    test_invalid(&[0x0f, 0x6c]);
-    test_invalid(&[0x0f, 0x6d]);
-    test_invalid(&[0x0f, 0x71, 0x00, 0x7f]);
-    test_invalid(&[0x0f, 0x71, 0xc0, 0x7f]);
-    test_invalid(&[0x0f, 0x72, 0x00, 0x7f]);
-    test_invalid(&[0x0f, 0x72, 0xc0, 0x7f]);
-    test_invalid(&[0x0f, 0x73, 0x00, 0x7f]);
-    test_invalid(&[0x0f, 0x73, 0xc0, 0x7f]);
-    test_invalid(&[0x0f, 0x73, 0xe0, 0x7f]);
-    test_invalid(&[0x0f, 0xc3, 0xc3]);
-    test_invalid(&[0x0f, 0xc5, 0x01, 0x00]);
-    test_invalid(&[0x0f, 0xd7, 0x00]);
-    test_invalid(&[0x0f, 0xe7, 0xc3]);
-    test_invalid(&[0x0f, 0xf0, 0xc2]);
-    test_invalid(&[0x0f, 0xf7, 0x01]);
-    test_invalid(&[0x2e, 0x2e, 0xf2, 0x36, 0x0f, 0xb2, 0xdb, 0x42, 0xd6, 0xa3, 0x16]);
-    test_invalid(&[0x66, 0x0f, 0x01, 0xc8]);
-    test_invalid(&[0x66, 0x0f, 0x01, 0xc9]);
-    test_invalid(&[0x66, 0x0f, 0x13, 0xc3]);
-    test_invalid(&[0x66, 0x0f, 0x16, 0xc3]);
-    test_invalid(&[0x66, 0x0f, 0x17, 0xc3]);
-    test_invalid(&[0x66, 0x0f, 0x37]);
-    test_invalid(&[0x66, 0x0f, 0x38, 0x2a, 0xc6]);
-    test_invalid(&[0x66, 0x0f, 0x38, 0xf1, 0xc6]);
-    test_invalid(&[0x66, 0x0f, 0x50, 0x01]);
-    test_invalid(&[0x66, 0x0f, 0x52, 0x01]);
-    test_invalid(&[0x66, 0x0f, 0x53, 0x01]);
-    test_invalid(&[0x66, 0x0f, 0x71, 0x10, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x71, 0x20, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x71, 0x30, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x72, 0x10, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x72, 0x20, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x72, 0x30, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x73, 0x10, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x73, 0x18, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x73, 0x30, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x73, 0x38, 0x8f]);
-    test_invalid(&[0x66, 0x0f, 0x78, 0x03]);
-    test_invalid(&[0x66, 0x0f, 0x78, 0xc9, 0x4e, 0x76]);
-    test_invalid(&[0x66, 0x0f, 0x79, 0x03]);
-    test_invalid(&[0x66, 0x0f, 0x79, 0x0f]);
-    test_invalid(&[0x66, 0x0f, 0xae, 0xff]);
-    test_invalid(&[0x66, 0x0f, 0xc3, 0x03]);
-    test_invalid(&[0x66, 0x0f, 0xc5, 0x08, 0xff]);
-    test_invalid(&[0x66, 0x0f, 0xd7, 0x01]);
-    test_invalid(&[0x66, 0x0f, 0xe7, 0xc1]);
-    test_invalid(&[0x66, 0x0f, 0xf0, 0x01]);
-    test_invalid(&[0x66, 0x0f, 0xf0, 0xc1]);
-    test_invalid(&[0x66, 0x0f, 0xf7, 0x01]);
-    test_invalid(&[0x66, 0x2e, 0x64, 0x66, 0x0f, 0x38, 0xf8, 0xe2]);
-    test_invalid(&[0x66, 0x3e, 0x65, 0x3e, 0x0f, 0x38, 0xf5, 0xf0]);
-    test_invalid(&[0x66, 0xf2, 0x0f, 0x79, 0x0f]);
-    test_invalid(&[0x66, 0xf2, 0x66, 0x0f, 0x16, 0xcf]);
-    test_invalid(&[0x66, 0xf3, 0x0f, 0xae, 0xe6]);
-    test_invalid(&[0x8d, 0xdd]);
-    test_invalid(&[0x8e, 0x08]);
-    test_invalid(&[0x8e, 0x30]);
-    test_invalid(&[0x8e, 0x38]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_011, 0x12, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_0111_111, 0x12, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_010_001]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_011_001]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_010_001]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_011_001]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b0_1111_101, 0x7e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_000, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_000, 0x51, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x13, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_001, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_010, 0x10, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_010, 0x16, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0x10, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_011, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x12, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x16, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_100, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x12, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x13, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x16, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_101, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_110, 0x10, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_110, 0x16, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x10, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0x12, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_0111_111, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_011_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_101_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_000_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_100_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_101_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_110_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_111_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_000_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_100_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_101_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xc5, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x17, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x6e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_011_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0x7e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xc4, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xc5, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_101, 0xf7, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x17, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x18, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1c, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1d, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x1e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x30, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x31, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x32, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x33, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x34, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x35, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x36, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_001, 0x41, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x17, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x19, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x20, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x21, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x22, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x23, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x24, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x25, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2c, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2d, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x2f, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x30, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x31, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x32, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x33, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x34, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x35, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0x41, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_0111_101, 0xdb, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x16, 0b00_011_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x19, 0b11_001_010]); // "vbroadcastsd xmm, xmm" is not legal (L!=0)
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x5a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x18, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x19, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x18, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_0111_101, 0xdb, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_001, 0x18, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_001, 0x46, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x16, 0b00_011_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x19, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x1a, 0b00_001_010]); // vex.w=1 is invalid
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x36, 0b11_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x46, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00010, 0b1_1111_101, 0x5a, 0b00_001_010]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x08, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x09, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x14, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x15, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x16, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x38, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x60, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x61, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x62, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_001, 0x63, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x08, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x09, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x17, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x20, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x21, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x22, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x39, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x41, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x60, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x61, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x62, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_0111_101, 0x63, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x06, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_001, 0x46, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x00, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x01, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x14, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x15, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x16, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x17, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x60, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x61, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x62, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b0_1111_101, 0x63, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x16, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x38, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0x4c, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_001, 0xdf, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x18, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x19, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x22, 0b00_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0x4c, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_0111_101, 0xdf, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x00, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x01, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_001, 0x02, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x02, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x1d, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x39, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b110_00011, 0b1_1111_101, 0x46, 0b11_001_010, 0x77]);
-    test_invalid(&[0xc4, 0b111_00010, 0b1_1111_001, 0x13, 0b11_001_010]);
-    test_invalid(&[0xc4, 0xe2, 0xf9, 0x58, 0xc1]);
-    test_invalid(&[0xc4, 0xe2, 0xf9, 0x59, 0xc1]);
-    test_invalid(&[0xc4, 0xe2, 0xf9, 0x78, 0xc1]);
-    test_invalid(&[0xc4, 0xe2, 0xf9, 0x79, 0xc1]);
-    test_invalid(&[0xc5, 0b1_1111_111, 0x2f, 0b11_001_010]);
-    test_invalid(&[0xc5, 0x8c, 0x77]);
-    test_invalid(&[0xd9, 0x08]);
-    test_invalid(&[0xd9, 0x09]);
-    test_invalid(&[0xd9, 0x0a]);
-    test_invalid(&[0xd9, 0x0b]);
-    test_invalid(&[0xd9, 0x0c]);
-    test_invalid(&[0xd9, 0x0d]);
-    test_invalid(&[0xd9, 0x0e]);
-    test_invalid(&[0xd9, 0x0f]);
-    test_invalid(&[0xd9, 0xd1]);
-    test_invalid(&[0xd9, 0xd2]);
-    test_invalid(&[0xd9, 0xd3]);
-    test_invalid(&[0xd9, 0xd4]);
-    test_invalid(&[0xd9, 0xd5]);
-    test_invalid(&[0xd9, 0xd6]);
-    test_invalid(&[0xd9, 0xd7]);
-    test_invalid(&[0xd9, 0xe2]);
-    test_invalid(&[0xd9, 0xe3]);
-    test_invalid(&[0xd9, 0xe6]);
-    test_invalid(&[0xd9, 0xe7]);
-    test_invalid(&[0xd9, 0xef]);
-    test_invalid(&[0xda, 0xe0]);
-    test_invalid(&[0xda, 0xe1]);
-    test_invalid(&[0xda, 0xe2]);
-    test_invalid(&[0xda, 0xe3]);
-    test_invalid(&[0xda, 0xe4]);
-    test_invalid(&[0xda, 0xe5]);
-    test_invalid(&[0xda, 0xe6]);
-    test_invalid(&[0xda, 0xe7]);
-    test_invalid(&[0xda, 0xe8]);
-    test_invalid(&[0xda, 0xea]);
-    test_invalid(&[0xda, 0xeb]);
-    test_invalid(&[0xda, 0xec]);
-    test_invalid(&[0xda, 0xed]);
-    test_invalid(&[0xda, 0xee]);
-    test_invalid(&[0xda, 0xef]);
-    test_invalid(&[0xda, 0xf0]);
-    test_invalid(&[0xda, 0xf1]);
-    test_invalid(&[0xda, 0xf2]);
-    test_invalid(&[0xda, 0xf3]);
-    test_invalid(&[0xda, 0xf4]);
-    test_invalid(&[0xda, 0xf5]);
-    test_invalid(&[0xda, 0xf6]);
-    test_invalid(&[0xda, 0xf7]);
-    test_invalid(&[0xda, 0xf8]);
-    test_invalid(&[0xda, 0xf9]);
-    test_invalid(&[0xda, 0xfa]);
-    test_invalid(&[0xda, 0xfb]);
-    test_invalid(&[0xda, 0xfc]);
-    test_invalid(&[0xda, 0xfd]);
-    test_invalid(&[0xda, 0xfe]);
-    test_invalid(&[0xda, 0xff]);
-    test_invalid(&[0xdb, 0x20]);
-    test_invalid(&[0xdb, 0x21]);
-    test_invalid(&[0xdb, 0x22]);
-    test_invalid(&[0xdb, 0x23]);
-    test_invalid(&[0xdb, 0x24]);
-    test_invalid(&[0xdb, 0x25]);
-    test_invalid(&[0xdb, 0x26]);
-    test_invalid(&[0xdb, 0x27]);
-    test_invalid(&[0xdb, 0x30]);
-    test_invalid(&[0xdb, 0x31]);
-    test_invalid(&[0xdb, 0x32]);
-    test_invalid(&[0xdb, 0x33]);
-    test_invalid(&[0xdb, 0x34]);
-    test_invalid(&[0xdb, 0x35]);
-    test_invalid(&[0xdb, 0x36]);
-    test_invalid(&[0xdb, 0x37]);
-    test_invalid(&[0xdb, 0xe5]);
-    test_invalid(&[0xdb, 0xe6]);
-    test_invalid(&[0xdb, 0xe7]);
-    test_invalid(&[0xdb, 0xf8]);
-    test_invalid(&[0xdb, 0xf9]);
-    test_invalid(&[0xdb, 0xfa]);
-    test_invalid(&[0xdb, 0xfb]);
-    test_invalid(&[0xdb, 0xfc]);
-    test_invalid(&[0xdb, 0xfd]);
-    test_invalid(&[0xdb, 0xfe]);
-    test_invalid(&[0xdb, 0xff]);
-    test_invalid(&[0xdd, 0x28]);
-    test_invalid(&[0xdd, 0x29]);
-    test_invalid(&[0xdd, 0x2a]);
-    test_invalid(&[0xdd, 0x2b]);
-    test_invalid(&[0xdd, 0x2c]);
-    test_invalid(&[0xdd, 0x2d]);
-    test_invalid(&[0xdd, 0x2e]);
-    test_invalid(&[0xdd, 0x2f]);
-    test_invalid(&[0xdd, 0xf0]);
-    test_invalid(&[0xdd, 0xf1]);
-    test_invalid(&[0xdd, 0xf2]);
-    test_invalid(&[0xdd, 0xf3]);
-    test_invalid(&[0xdd, 0xf4]);
-    test_invalid(&[0xdd, 0xf5]);
-    test_invalid(&[0xdd, 0xf6]);
-    test_invalid(&[0xdd, 0xf7]);
-    test_invalid(&[0xdd, 0xf8]);
-    test_invalid(&[0xdd, 0xf9]);
-    test_invalid(&[0xdd, 0xfa]);
-    test_invalid(&[0xdd, 0xfb]);
-    test_invalid(&[0xdd, 0xfc]);
-    test_invalid(&[0xdd, 0xfd]);
-    test_invalid(&[0xdd, 0xfe]);
-    test_invalid(&[0xdd, 0xff]);
-    test_invalid(&[0xde, 0xd8]);
-    test_invalid(&[0xde, 0xda]);
-    test_invalid(&[0xde, 0xdb]);
-    test_invalid(&[0xde, 0xdc]);
-    test_invalid(&[0xde, 0xdd]);
-    test_invalid(&[0xde, 0xde]);
-    test_invalid(&[0xde, 0xdf]);
-    test_invalid(&[0xdf, 0xe1]);
-    test_invalid(&[0xdf, 0xe2]);
-    test_invalid(&[0xdf, 0xe3]);
-    test_invalid(&[0xdf, 0xe4]);
-    test_invalid(&[0xdf, 0xe5]);
-    test_invalid(&[0xdf, 0xe6]);
-    test_invalid(&[0xdf, 0xe7]);
-    test_invalid(&[0xdf, 0xf8]);
-    test_invalid(&[0xdf, 0xf9]);
-    test_invalid(&[0xdf, 0xfa]);
-    test_invalid(&[0xdf, 0xfb]);
-    test_invalid(&[0xdf, 0xfc]);
-    test_invalid(&[0xdf, 0xfd]);
-    test_invalid(&[0xdf, 0xfe]);
-    test_invalid(&[0xdf, 0xff]);
-    test_invalid(&[0xf0, 0x33, 0xc0]);
-    test_invalid(&[0xf0, 0xc7, 0x00, 0x00, 0x00, 0x00]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xc8]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xc9]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xee]);
-    test_invalid(&[0xf2, 0x0f, 0x01, 0xef]);
-    test_invalid(&[0xf2, 0x0f, 0x16, 0xcf]);
-    test_invalid(&[0xf2, 0x0f, 0x2b, 0xc6]);
-    test_invalid(&[0xf2, 0x0f, 0x37]);
-    test_invalid(&[0xf2, 0x0f, 0x79, 0x0f]);
-    test_invalid(&[0xf3, 0x0f, 0x01, 0xc8]);
-    test_invalid(&[0xf3, 0x0f, 0x01, 0xc9]);
-    test_invalid(&[0xf3, 0x0f, 0x37]);
-    test_invalid(&[0xf3, 0x0f, 0x38, 0xf8, 0xf3]);
-    test_invalid(&[0xf3, 0x0f, 0xae, 0x04, 0x4f]);
-    test_invalid(&[0xf3, 0x0f, 0xae, 0x87]);
-    test_invalid(&[0xf3, 0x0f, 0xba, 0xc6]);
-    test_invalid(&[0xf3, 0x0f, 0xd0, 0x0f]);
-    test_invalid(&[0xf3, 0x0f, 0xd6, 0x03]);
-    test_invalid(&[0xf3, 0x2e, 0x0f, 0x6a, 0x18]);
-    test_invalid(&[0xf3, 0x67, 0x0f, 0x3a, 0xf0, 0xfb, 0xb4]);
-    test_invalid(&[0xf3, 0xf2, 0x0f, 0xae, 0x8f, 0x54, 0x3c, 0x58, 0xb7]);
-    test_invalid(&[0xff, 0xd8]);
+mod invalid_sequences {
+    use crate::real_mode::{TestCase, run_test};
 
-    // vpbroadcastmw2d. similar to `vpmovm2*`, out-of-range `k` are just masked down.
-    test_display(&[0x62, 0xd2, 0x7e, 0x28, 0x3a, 0xca], "vpbroadcastmw2d ymm1, k2");
-    // vpmovm2b (and larger forms). for some reason the source operand is a mask register but uses
-    // modrm bits as a register selector. out-of-range `k` seem to just get masked down..
-    test_display(&[0x62, 0xd2, 0x7e, 0x08, 0x28, 0xc2], "vpmovm2b xmm0, k2");
-    test_display(&[0x62, 0xf2, 0x7e, 0x08, 0x28, 0xc1], "vpmovm2b xmm0, k1");
-    // vpmovb2m (and larger forms). out-of-range `k` are invalid in 64-bit mode, are part of the
-    // `bound` instruction for 32- and 16-bit modes.
-    test_display(&[0x62, 0x72, 0x7e /* , 0x28, 0x29, 0xfd */], "bound si, dword [bp + si * 1 + 0x7e]");
-    test_display(&[0x62, 0xf2, 0x7e, 0x28, 0x29, 0xfd], "vpmovb2m k7, ymm5");
+    const CASES: &'static [TestCase] = &[
+        testcase!(invalid: &[0x0f, 0x01, 0x69, 0xff]),
+        testcase!(invalid: &[0x0f, 0x01, 0xc6]),
+        testcase!(invalid: &[0x0f, 0x01, 0xc7]),
+        testcase!(invalid: &[0x0f, 0x01, 0xcc]),
+        testcase!(invalid: &[0x0f, 0x01, 0xcd]),
+        testcase!(invalid: &[0x0f, 0x01, 0xce]),
+        testcase!(invalid: &[0x0f, 0x01, 0xd2]),
+        testcase!(invalid: &[0x0f, 0x01, 0xd3]),
+        testcase!(invalid: &[0x0f, 0x01, 0xe8]),
+        testcase!(invalid: &[0x0f, 0x01, 0xe9]),
+        testcase!(invalid: &[0x0f, 0x01, 0xea]),
+        testcase!(invalid: &[0x0f, 0x01, 0xeb]),
+        testcase!(invalid: &[0x0f, 0x01, 0xf8]),
+        testcase!(invalid: &[0x0f, 0x13, 0xc0]),
+        testcase!(invalid: &[0x0f, 0x17, 0xc0]),
+        testcase!(invalid: &[0x0f, 0x20, 0xc8]),
+        testcase!(invalid: &[0x0f, 0x22, 0xc8]),
+        testcase!(invalid: &[0x0f, 0x36]),
+        testcase!(invalid: &[0x0f, 0x38, 0x10, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x14, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x15, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x17, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x20, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x21, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x22, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x23, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x24, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x25, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x28, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x29, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x2a, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x2b, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x30, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x31, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x32, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x33, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x34, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x35, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x38, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x39, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x3a, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x3b, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x3c, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x3d, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x3e, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x3f, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x40, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x41, 0x06]),
+        testcase!(invalid: &[0x0f, 0x38, 0x80, 0x2f]),
+        testcase!(invalid: &[0x0f, 0x38, 0x81, 0x2f]),
+        testcase!(invalid: &[0x0f, 0x38, 0x82, 0x2f]),
+        testcase!(invalid: &[0x0f, 0x38, 0xf0, 0xc6]),
+        testcase!(invalid: &[0x0f, 0x38, 0xf5, 0x47, 0xe9]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x08, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x09, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x0a, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x0b, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x0e, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x14, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x14, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x15, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x15, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x16, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x16, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x17, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x17, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x20, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x21, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x22, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x40, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x41, 0x06]),
+        testcase!(invalid: &[0x0f, 0x3a, 0x42, 0x06]),
+        testcase!(invalid: &[0x0f, 0x50, 0x00]),
+        testcase!(invalid: &[0x0f, 0x6c]),
+        testcase!(invalid: &[0x0f, 0x6d]),
+        testcase!(invalid: &[0x0f, 0x71, 0x00, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x71, 0xc0, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x72, 0x00, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x72, 0xc0, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x73, 0x00, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x73, 0xc0, 0x7f]),
+        testcase!(invalid: &[0x0f, 0x73, 0xe0, 0x7f]),
+        testcase!(invalid: &[0x0f, 0xc3, 0xc3]),
+        testcase!(invalid: &[0x0f, 0xc5, 0x01, 0x00]),
+        testcase!(invalid: &[0x0f, 0xd7, 0x00]),
+        testcase!(invalid: &[0x0f, 0xe7, 0xc3]),
+        testcase!(invalid: &[0x0f, 0xf0, 0xc2]),
+        testcase!(invalid: &[0x0f, 0xf7, 0x01]),
+        testcase!(invalid: &[0x2e, 0x2e, 0xf2, 0x36, 0x0f, 0xb2, 0xdb, 0x42, 0xd6, 0xa3, 0x16]),
+        testcase!(invalid: &[0x66, 0x0f, 0x01, 0xc8]),
+        testcase!(invalid: &[0x66, 0x0f, 0x01, 0xc9]),
+        testcase!(invalid: &[0x66, 0x0f, 0x13, 0xc3]),
+        testcase!(invalid: &[0x66, 0x0f, 0x16, 0xc3]),
+        testcase!(invalid: &[0x66, 0x0f, 0x17, 0xc3]),
+        testcase!(invalid: &[0x66, 0x0f, 0x37]),
+        testcase!(invalid: &[0x66, 0x0f, 0x38, 0x2a, 0xc6]),
+        testcase!(invalid: &[0x66, 0x0f, 0x38, 0xf1, 0xc6]),
+        testcase!(invalid: &[0x66, 0x0f, 0x50, 0x01]),
+        testcase!(invalid: &[0x66, 0x0f, 0x52, 0x01]),
+        testcase!(invalid: &[0x66, 0x0f, 0x53, 0x01]),
+        testcase!(invalid: &[0x66, 0x0f, 0x71, 0x10, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x71, 0x20, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x71, 0x30, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x72, 0x10, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x72, 0x20, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x72, 0x30, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x10, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x18, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x30, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x73, 0x38, 0x8f]),
+        testcase!(invalid: &[0x66, 0x0f, 0x78, 0x03]),
+        testcase!(invalid: &[0x66, 0x0f, 0x78, 0xc9, 0x4e, 0x76]),
+        testcase!(invalid: &[0x66, 0x0f, 0x79, 0x03]),
+        testcase!(invalid: &[0x66, 0x0f, 0x79, 0x0f]),
+        testcase!(invalid: &[0x66, 0x0f, 0xae, 0xff]),
+        testcase!(invalid: &[0x66, 0x0f, 0xc3, 0x03]),
+        testcase!(invalid: &[0x66, 0x0f, 0xc5, 0x08, 0xff]),
+        testcase!(invalid: &[0x66, 0x0f, 0xd7, 0x01]),
+        testcase!(invalid: &[0x66, 0x0f, 0xe7, 0xc1]),
+        testcase!(invalid: &[0x66, 0x0f, 0xf0, 0x01]),
+        testcase!(invalid: &[0x66, 0x0f, 0xf0, 0xc1]),
+        testcase!(invalid: &[0x66, 0x0f, 0xf7, 0x01]),
+        testcase!(invalid: &[0x66, 0x2e, 0x64, 0x66, 0x0f, 0x38, 0xf8, 0xe2]),
+        testcase!(invalid: &[0x66, 0x3e, 0x65, 0x3e, 0x0f, 0x38, 0xf5, 0xf0]),
+        testcase!(invalid: &[0x66, 0xf2, 0x0f, 0x79, 0x0f]),
+        testcase!(invalid: &[0x66, 0xf2, 0x66, 0x0f, 0x16, 0xcf]),
+        testcase!(invalid: &[0x66, 0xf3, 0x0f, 0xae, 0xe6]),
+        testcase!(invalid: &[0x8d, 0xdd]),
+        testcase!(invalid: &[0x8e, 0x08]),
+        testcase!(invalid: &[0x8e, 0x30]),
+        testcase!(invalid: &[0x8e, 0x38]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_001, 0x2f, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_011, 0x12, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_101, 0x2f, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_0111_111, 0x12, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_000, 0x2b, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_010_001]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_000, 0xae, 0b11_011_001]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0x2b, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0xc5, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_001, 0xd7, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_010_001]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_100, 0xae, 0b00_011_001]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_101, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b0_1111_101, 0x7e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_000, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_000, 0x51, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x13, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x16, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_001, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_010, 0x10, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_010, 0x16, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_011, 0x10, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_011, 0x11, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_011, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_100, 0x12, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_100, 0x16, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_100, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x12, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x13, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x16, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_101, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_110, 0x10, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_110, 0x16, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0x10, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0x11, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0x12, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_0111_111, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_000, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b00_011_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x71, 0b11_101_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_000_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_100_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_101_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_110_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x72, 0b00_111_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_000_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_100_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0x73, 0b11_101_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0xc5, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0xe7, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_001, 0xf7, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_011, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_100, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_100, 0x2b, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_100, 0x50, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x17, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x2b, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x6e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x72, 0b11_011_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0x7e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xc4, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xc5, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xe7, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_101, 0xf7, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00001, 0b1_1111_111, 0xf0, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x17, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x18, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x1c, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x1d, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x1e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x2a, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x30, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x31, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x32, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x33, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x34, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x35, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x36, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_001, 0x41, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x17, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x19, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x20, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x21, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x22, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x23, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x24, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x25, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2c, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2d, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x2f, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x30, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x31, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x32, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x33, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x34, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x35, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0x41, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_0111_101, 0xdb, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x16, 0b00_011_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x19, 0b11_001_010]), // "vbroadcastsd xmm, xmm" is not legal (L!=0)
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x5a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x8c, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_001, 0x8e, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b0_1111_101, 0x5a, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x18, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x19, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_001, 0x1a, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x18, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x19, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0x1a, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_0111_101, 0xdb, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_001, 0x18, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_001, 0x46, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x16, 0b00_011_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x19, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x1a, 0b00_001_010]), // vex.w=1 is invalid
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x36, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x46, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00010, 0b1_1111_101, 0x5a, 0b00_001_010]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x08, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x09, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x14, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x15, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x16, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x38, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x60, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x61, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x62, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_001, 0x63, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x08, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x09, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x17, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x20, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x21, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x22, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x39, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x41, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x60, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x61, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x62, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_0111_101, 0x63, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x06, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x19, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_001, 0x46, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x00, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x01, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x14, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x15, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x16, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x17, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x60, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x61, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x62, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b0_1111_101, 0x63, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x16, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x38, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0x4c, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_001, 0xdf, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x18, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x19, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x22, 0b00_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0x4c, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_0111_101, 0xdf, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_001, 0x00, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_001, 0x01, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_001, 0x02, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x02, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x19, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x1d, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x39, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b110_00011, 0b1_1111_101, 0x46, 0b11_001_010, 0x77]),
+        testcase!(invalid: &[0xc4, 0b111_00010, 0b1_1111_001, 0x13, 0b11_001_010]),
+        testcase!(invalid: &[0xc4, 0xe2, 0xf9, 0x58, 0xc1]),
+        testcase!(invalid: &[0xc4, 0xe2, 0xf9, 0x59, 0xc1]),
+        testcase!(invalid: &[0xc4, 0xe2, 0xf9, 0x78, 0xc1]),
+        testcase!(invalid: &[0xc4, 0xe2, 0xf9, 0x79, 0xc1]),
+        testcase!(invalid: &[0xc5, 0b1_1111_111, 0x2f, 0b11_001_010]),
+        testcase!(invalid: &[0xc5, 0x8c, 0x77]),
+        testcase!(invalid: &[0xd9, 0x08]),
+        testcase!(invalid: &[0xd9, 0x09]),
+        testcase!(invalid: &[0xd9, 0x0a]),
+        testcase!(invalid: &[0xd9, 0x0b]),
+        testcase!(invalid: &[0xd9, 0x0c]),
+        testcase!(invalid: &[0xd9, 0x0d]),
+        testcase!(invalid: &[0xd9, 0x0e]),
+        testcase!(invalid: &[0xd9, 0x0f]),
+        testcase!(invalid: &[0xd9, 0xd1]),
+        testcase!(invalid: &[0xd9, 0xd2]),
+        testcase!(invalid: &[0xd9, 0xd3]),
+        testcase!(invalid: &[0xd9, 0xd4]),
+        testcase!(invalid: &[0xd9, 0xd5]),
+        testcase!(invalid: &[0xd9, 0xd6]),
+        testcase!(invalid: &[0xd9, 0xd7]),
+        testcase!(invalid: &[0xd9, 0xe2]),
+        testcase!(invalid: &[0xd9, 0xe3]),
+        testcase!(invalid: &[0xd9, 0xe6]),
+        testcase!(invalid: &[0xd9, 0xe7]),
+        testcase!(invalid: &[0xd9, 0xef]),
+        testcase!(invalid: &[0xda, 0xe0]),
+        testcase!(invalid: &[0xda, 0xe1]),
+        testcase!(invalid: &[0xda, 0xe2]),
+        testcase!(invalid: &[0xda, 0xe3]),
+        testcase!(invalid: &[0xda, 0xe4]),
+        testcase!(invalid: &[0xda, 0xe5]),
+        testcase!(invalid: &[0xda, 0xe6]),
+        testcase!(invalid: &[0xda, 0xe7]),
+        testcase!(invalid: &[0xda, 0xe8]),
+        testcase!(invalid: &[0xda, 0xea]),
+        testcase!(invalid: &[0xda, 0xeb]),
+        testcase!(invalid: &[0xda, 0xec]),
+        testcase!(invalid: &[0xda, 0xed]),
+        testcase!(invalid: &[0xda, 0xee]),
+        testcase!(invalid: &[0xda, 0xef]),
+        testcase!(invalid: &[0xda, 0xf0]),
+        testcase!(invalid: &[0xda, 0xf1]),
+        testcase!(invalid: &[0xda, 0xf2]),
+        testcase!(invalid: &[0xda, 0xf3]),
+        testcase!(invalid: &[0xda, 0xf4]),
+        testcase!(invalid: &[0xda, 0xf5]),
+        testcase!(invalid: &[0xda, 0xf6]),
+        testcase!(invalid: &[0xda, 0xf7]),
+        testcase!(invalid: &[0xda, 0xf8]),
+        testcase!(invalid: &[0xda, 0xf9]),
+        testcase!(invalid: &[0xda, 0xfa]),
+        testcase!(invalid: &[0xda, 0xfb]),
+        testcase!(invalid: &[0xda, 0xfc]),
+        testcase!(invalid: &[0xda, 0xfd]),
+        testcase!(invalid: &[0xda, 0xfe]),
+        testcase!(invalid: &[0xda, 0xff]),
+        testcase!(invalid: &[0xdb, 0x20]),
+        testcase!(invalid: &[0xdb, 0x21]),
+        testcase!(invalid: &[0xdb, 0x22]),
+        testcase!(invalid: &[0xdb, 0x23]),
+        testcase!(invalid: &[0xdb, 0x24]),
+        testcase!(invalid: &[0xdb, 0x25]),
+        testcase!(invalid: &[0xdb, 0x26]),
+        testcase!(invalid: &[0xdb, 0x27]),
+        testcase!(invalid: &[0xdb, 0x30]),
+        testcase!(invalid: &[0xdb, 0x31]),
+        testcase!(invalid: &[0xdb, 0x32]),
+        testcase!(invalid: &[0xdb, 0x33]),
+        testcase!(invalid: &[0xdb, 0x34]),
+        testcase!(invalid: &[0xdb, 0x35]),
+        testcase!(invalid: &[0xdb, 0x36]),
+        testcase!(invalid: &[0xdb, 0x37]),
+        testcase!(invalid: &[0xdb, 0xe5]),
+        testcase!(invalid: &[0xdb, 0xe6]),
+        testcase!(invalid: &[0xdb, 0xe7]),
+        testcase!(invalid: &[0xdb, 0xf8]),
+        testcase!(invalid: &[0xdb, 0xf9]),
+        testcase!(invalid: &[0xdb, 0xfa]),
+        testcase!(invalid: &[0xdb, 0xfb]),
+        testcase!(invalid: &[0xdb, 0xfc]),
+        testcase!(invalid: &[0xdb, 0xfd]),
+        testcase!(invalid: &[0xdb, 0xfe]),
+        testcase!(invalid: &[0xdb, 0xff]),
+        testcase!(invalid: &[0xdd, 0x28]),
+        testcase!(invalid: &[0xdd, 0x29]),
+        testcase!(invalid: &[0xdd, 0x2a]),
+        testcase!(invalid: &[0xdd, 0x2b]),
+        testcase!(invalid: &[0xdd, 0x2c]),
+        testcase!(invalid: &[0xdd, 0x2d]),
+        testcase!(invalid: &[0xdd, 0x2e]),
+        testcase!(invalid: &[0xdd, 0x2f]),
+        testcase!(invalid: &[0xdd, 0xf0]),
+        testcase!(invalid: &[0xdd, 0xf1]),
+        testcase!(invalid: &[0xdd, 0xf2]),
+        testcase!(invalid: &[0xdd, 0xf3]),
+        testcase!(invalid: &[0xdd, 0xf4]),
+        testcase!(invalid: &[0xdd, 0xf5]),
+        testcase!(invalid: &[0xdd, 0xf6]),
+        testcase!(invalid: &[0xdd, 0xf7]),
+        testcase!(invalid: &[0xdd, 0xf8]),
+        testcase!(invalid: &[0xdd, 0xf9]),
+        testcase!(invalid: &[0xdd, 0xfa]),
+        testcase!(invalid: &[0xdd, 0xfb]),
+        testcase!(invalid: &[0xdd, 0xfc]),
+        testcase!(invalid: &[0xdd, 0xfd]),
+        testcase!(invalid: &[0xdd, 0xfe]),
+        testcase!(invalid: &[0xdd, 0xff]),
+        testcase!(invalid: &[0xde, 0xd8]),
+        testcase!(invalid: &[0xde, 0xda]),
+        testcase!(invalid: &[0xde, 0xdb]),
+        testcase!(invalid: &[0xde, 0xdc]),
+        testcase!(invalid: &[0xde, 0xdd]),
+        testcase!(invalid: &[0xde, 0xde]),
+        testcase!(invalid: &[0xde, 0xdf]),
+        testcase!(invalid: &[0xdf, 0xe1]),
+        testcase!(invalid: &[0xdf, 0xe2]),
+        testcase!(invalid: &[0xdf, 0xe3]),
+        testcase!(invalid: &[0xdf, 0xe4]),
+        testcase!(invalid: &[0xdf, 0xe5]),
+        testcase!(invalid: &[0xdf, 0xe6]),
+        testcase!(invalid: &[0xdf, 0xe7]),
+        testcase!(invalid: &[0xdf, 0xf8]),
+        testcase!(invalid: &[0xdf, 0xf9]),
+        testcase!(invalid: &[0xdf, 0xfa]),
+        testcase!(invalid: &[0xdf, 0xfb]),
+        testcase!(invalid: &[0xdf, 0xfc]),
+        testcase!(invalid: &[0xdf, 0xfd]),
+        testcase!(invalid: &[0xdf, 0xfe]),
+        testcase!(invalid: &[0xdf, 0xff]),
+        testcase!(invalid: &[0xf0, 0x33, 0xc0]),
+        testcase!(invalid: &[0xf0, 0xc7, 0x00, 0x00, 0x00, 0x00]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xc8]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xc9]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xee]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x01, 0xef]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x16, 0xcf]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x2b, 0xc6]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x37]),
+        testcase!(invalid: &[0xf2, 0x0f, 0x79, 0x0f]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x01, 0xc8]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x01, 0xc9]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x37]),
+        testcase!(invalid: &[0xf3, 0x0f, 0x38, 0xf8, 0xf3]),
+        testcase!(invalid: &[0xf3, 0x0f, 0xae, 0x04, 0x4f]),
+        testcase!(invalid: &[0xf3, 0x0f, 0xae, 0x87]),
+        testcase!(invalid: &[0xf3, 0x0f, 0xba, 0xc6]),
+        testcase!(invalid: &[0xf3, 0x0f, 0xd0, 0x0f]),
+        testcase!(invalid: &[0xf3, 0x0f, 0xd6, 0x03]),
+        testcase!(invalid: &[0xf3, 0x2e, 0x0f, 0x6a, 0x18]),
+        testcase!(invalid: &[0xf3, 0x67, 0x0f, 0x3a, 0xf0, 0xfb, 0xb4]),
+        testcase!(invalid: &[0xf3, 0xf2, 0x0f, 0xae, 0x8f, 0x54, 0x3c, 0x58, 0xb7]),
+        testcase!(invalid: &[0xff, 0xd8]),
 
+        // vpbroadcastmw2d. similar to `vpmovm2*`, out-of-range `k` are just masked down.
+        testcase!(&[0x62, 0xd2, 0x7e, 0x28, 0x3a, 0xca], "vpbroadcastmw2d ymm1, k2"),
+        // vpmovm2b (and larger forms). for some reason the source operand is a mask register but uses
+        // modrm bits as a register selector. out-of-range `k` seem to just get masked down..
+        testcase!(&[0x62, 0xd2, 0x7e, 0x08, 0x28, 0xc2], "vpmovm2b xmm0, k2"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x08, 0x28, 0xc1], "vpmovm2b xmm0, k1"),
+        // vpmovb2m (and larger forms). out-of-range `k` are invalid in 64-bit mode, are part of the
+        // `bound` instruction for 32- and 16-bit modes.
+        testcase!(&[0x62, 0x72, 0x7e /* , 0x28, 0x29, 0xfd */], "bound si, dword [bp + si * 1 + 0x7e]"),
+        testcase!(&[0x62, 0xf2, 0x7e, 0x28, 0x29, 0xfd], "vpmovb2m k7, ymm5"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 // some test cases are best just lifted from llvm or gcc.
-#[test]
-fn from_llvm() {
-    test_display(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01], "hreset 0x1");
-    let mut reader = yaxpeax_arch::U8Reader::new(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01]);
-    let hreset = InstDecoder::default().decode(&mut reader).expect("can disassemble test instruction");
-    assert_eq!(hreset.operand_count(), 1);
+mod from_llvm {
+    use crate::real_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        testcase!(&[0xf3, 0x0f, 0x3a, 0xf0, 0xc0, 0x01], "hreset 0x1"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
-#[test]
-fn from_reports() {
-    // negative compressed evex displacements should not overflow and panic
-    test_display(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [bx + di * 1 - 0xb20]");
-    test_display(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [bp + si * 1 - 0x70]{k7}, xmm4");
-    test_display(&[0xf3, 0x0f, 0x1e, 0x0f], "nop word [bx], cx");
+mod from_reports {
+    use crate::real_mode::{TestCase, run_test};
+
+    const CASES: &'static [TestCase] = &[
+        // negative compressed evex displacements should not overflow and panic
+        testcase!(&[0x62, 0xf2, 0x6d, 0xac, 0x00, 0x59, 0xa7], "vpshufb ymm3{k4}{z}, ymm2, ymmword [bx + di * 1 - 0xb20]"),
+        testcase!(&[0x62, 0xf2, 0xfd, 0x0f, 0x8a, 0x62, 0xf2], "vcompresspd xmmword [bp + si * 1 - 0x70]{k7}, xmm4"),
+        testcase!(&[0xf3, 0x0f, 0x1e, 0x0f], "nop word [bx], cx"),
+    ];
+
+    #[test]
+    fn test() {
+        run_test(CASES);
+    }
 }
 
 mod reg_specs {
diff --git a/test/test.rs b/test/test.rs
index 6dfeb91..dd5bb8a 100644
--- a/test/test.rs
+++ b/test/test.rs
@@ -1,6 +1,10 @@
 extern crate yaxpeax_arch;
 extern crate yaxpeax_x86;
 
+// target-specific impls for some kinds of testing, such as wrappers for
+// "assemble text through {nasm,masm,gas,..}"
+mod tools;
+
 mod long_mode;
 mod protected_mode;
 mod real_mode;
diff --git a/test/tools.rs b/test/tools.rs
new file mode 100644
index 0000000..ed78a17
--- /dev/null
+++ b/test/tools.rs
@@ -0,0 +1,284 @@
+// for masm testing:
+// * `dumpbin` is a "bytes to masm-like text" function and,
+// * `masm` is a "masm-like text to bytes" function.
+pub use imp::{dumpbin, masm};
+
+/// configure the various test tools for a desired bitness.
+// some tools (dumpbin) do not require any particular configuration as they take their cues from
+// object file headers. other tools (masm) not only need different source directives, but are
+// entirely different executables for different modes.
+#[derive(Copy, Clone, Debug)]
+pub enum CodeModel {
+    // nothing even tries to run masm in 16-bit mode (yet..?)
+    #[allow(dead_code)]
+    Bits16,
+    Bits32,
+    Bits64,
+}
+
+#[cfg(not(any(target_os="linux", target_os="windows")))]
+mod imp {
+    use super::CodeModel;
+
+    // stub impls to at least run tests on other platforms, but some
+    // test-specific features will of course fail at runtime..
+    pub fn dumpbin(_bytes: &[u8], _codeness: CodeModel) -> Result<String, String> {
+        panic!("no impl of dumpbin on this target");
+    }
+
+    pub fn masm(_text: &str, _codeness: CodeModel) -> Result<Vec<u8>, String> {
+        panic!("no impl of masm on this target");
+    }
+}
+
+#[cfg(target_os="linux")]
+mod imp {
+    use super::CodeModel;
+
+    pub fn dumpbin(_bytes: &[u8], _codeness: CodeModel) -> Result<String, String> {
+        // how very sad:
+        // > wibo: call reached missing import GetModuleHandleExA from kernel32
+        panic!("wibo can't run dumpbin right now");
+    }
+
+    pub fn masm(_text: &str, _codeness: CodeModel) -> Result<Vec<u8>, String> {
+        panic!("have not implemented wibo/masm on linux yet");
+    }
+}
+
+#[cfg(target_os="windows")]
+mod imp {
+    use super::CodeModel;
+
+    use std::fmt::{Write as FmtWrite};
+    use std::io::Write;
+    use std::process::Command;
+    use crate::tools::carve_dumpbin_stdout;
+
+    use tempfile::NamedTempFile;
+
+    pub fn dumpbin(bytes: &[u8], codeness: CodeModel) -> Result<String, String> {
+        let mut source = String::new();
+
+        match codeness {
+            CodeModel::Bits16 => {
+                source.push_str(".286\n");
+            }
+            CodeModel::Bits32 => {
+                source.push_str(".386\n");
+            }
+            CodeModel::Bits64 => {
+                // no special incantations to get 64-bit code out of masm
+            }
+        }
+        source.push_str(".code\n");
+        source.push_str("\n");
+        source.push_str("start::\n");
+        source.push_str("    db ");
+        let mut printed = false;
+        for byte in bytes {
+            if printed {
+                source.push_str(", ");
+            }
+            write!(source, "0{:02x}h", byte).expect("can write");
+            printed = true;
+        }
+        source.push_str("\nEND\n");
+        eprintln!("SOURCE FOLLOWS: {source}");
+
+        let mut tempfile = NamedTempFile::new().unwrap();
+        tempfile.write_all(source.as_bytes()).expect("can write source");
+        let sourcepath = tempfile.into_temp_path();
+        let mut objpath = sourcepath.to_path_buf();
+        objpath.add_extension(".o");
+
+        let exe = match codeness {
+            CodeModel::Bits64 => "ml64.exe",
+            _other => "ml.exe"
+        };
+
+        let out = Command::new(format!("..\\..\\tools\\{}", exe))
+            .args(&["/c", "/Fo", &objpath.display().to_string(), &sourcepath.display().to_string()])
+            .output()
+            .expect("can run");
+        if !out.status.success() {
+            eprintln!("failed to assemble {bytes:x?}:");
+            eprintln!("stdout: {}", std::str::from_utf8(out.stdout.as_slice()).expect("valid utf8"));
+            eprintln!("stderr: {}", std::str::from_utf8(out.stderr.as_slice()).expect("valid utf8"));
+            panic!("failed to {}", exe);
+        }
+
+        let out = Command::new("..\\..\\tools\\dumpbin.exe")
+            .args(&["/disasm:wide", &objpath.display().to_string()])
+            .output()
+            .expect("can run");
+        if !out.status.success() {
+            eprintln!("failed to dumpbin {bytes:x?}:");
+            eprintln!("stdout: {}", std::str::from_utf8(out.stdout.as_slice()).expect("valid utf8"));
+            eprintln!("stderr: {}", std::str::from_utf8(out.stderr.as_slice()).expect("valid utf8"));
+            panic!("failed to dumpbin.exe");
+        }
+
+
+        let dumpbin_out = std::str::from_utf8(out.stdout.as_slice()).expect("valid utf8");
+
+        let dumpbin_interesting = carve_dumpbin_stdout(dumpbin_out).expect("works");
+        let dumpbin_interesting = dumpbin_interesting[0];
+
+        let end =   "  0000000000000000: 0F C7 0F                                     ".len();
+        if dumpbin_interesting.len() <= end {
+            return Err("no instruction".to_string());
+        }
+
+        let asm_line = dumpbin_interesting[end..].trim();
+        let text = if let Some(idx) = asm_line.find("  ") {
+            let opcode = &asm_line[..idx];
+            let operands = &asm_line[idx..].trim();
+            format!("{opcode} {operands}")
+        } else {
+            asm_line.to_string()
+        };
+        let text = text.replace(",", ", ")
+            .replace("+", " + ")
+            .replace("-", " - ")
+            .replace("*", " * ")
+            .replace(" + FFFFFFFFCCBBAA34h", " - 334455CCh") // with apologies to future-me, replace common negative displacements into more normal values...
+            .replace("rn - sae", "rn-sae")
+            .replace("rd - sae", "rd-sae")
+            .replace("ru - sae", "ru-sae")
+            .replace("rz - sae", "rz-sae")
+            .replace(" oword ", " xmmword ");
+
+        eprintln!("testcase bytes {:x?} -> dumpbin -> text {}", bytes, text);
+
+        Ok(text)
+    }
+
+    pub fn masm(text: &str, codeness: CodeModel) -> Result<Vec<u8>, String> {
+        let mut source = String::new();
+
+        match codeness {
+            CodeModel::Bits16 => {
+                source.push_str(".286\n");
+            }
+            CodeModel::Bits32 => {
+                source.push_str(".386\n");
+            }
+            CodeModel::Bits64 => {
+                // no special incantations to get 64-bit code out of masm
+            }
+        }
+        source.push_str(".code\n");
+        source.push_str("\n");
+        source.push_str("start::\n");
+        writeln!(source, "    {text}").expect("ok");
+        source.push_str("\nEND\n");
+/*
+        eprintln!("assembling SOURCE:");
+        eprintln!("{source}");
+        eprintln!("-----");
+*/
+        let mut tempfile = NamedTempFile::new().unwrap();
+        tempfile.write_all(source.as_bytes()).expect("can write source");
+        tempfile.as_file().sync_data().expect("can sync");
+        let sourcepath = tempfile.into_temp_path();
+        let mut objpath = sourcepath.to_path_buf();
+        objpath.add_extension(".o");
+
+        let exe = match codeness {
+            CodeModel::Bits64 => "ml64.exe",
+            _other => "ml.exe"
+        };
+
+        let out = Command::new(format!("..\\..\\tools\\{}", exe))
+            .args(&["/c", "/Fo", &objpath.display().to_string(), &sourcepath.display().to_string()])
+            .output()
+            .expect("can run");
+        if !out.status.success() {
+            eprintln!("failed to assemble {text:x?}:");
+            eprintln!("stdout: {}", std::str::from_utf8(out.stdout.as_slice()).expect("valid utf8"));
+            eprintln!("stderr: {}", std::str::from_utf8(out.stderr.as_slice()).expect("valid utf8"));
+            panic!("failed to {} as part of masm()", exe);
+        }
+
+        let out = Command::new("..\\..\\tools\\dumpbin.exe")
+            .args(&["/disasm:wide", &objpath.display().to_string()])
+            .output()
+            .expect("can run");
+        if !out.status.success() {
+            eprintln!("failed to dumpbin {text:x?}:");
+            eprintln!("stdout: {}", std::str::from_utf8(out.stdout.as_slice()).expect("valid utf8"));
+            eprintln!("stderr: {}", std::str::from_utf8(out.stderr.as_slice()).expect("valid utf8"));
+            panic!("failed to dumpbin.exe");
+        }
+
+        let dumpbin_out = std::str::from_utf8(out.stdout.as_slice()).expect("valid utf8");
+
+        let dumpbin_interesting = carve_dumpbin_stdout(dumpbin_out).expect("works");
+
+        let end =   "  0000000000000000: 0F C7 0F                                     ".len();
+        let start = "  0000000000000000: ".len();
+        let hex_text = dumpbin_interesting[0][start..end].trim();
+        let mut bytes = Vec::new();
+        for f in hex_text.split(" ") {
+            let b = u8::from_str_radix(f, 16).expect("should be able to parse");
+            bytes.push(b);
+        }
+
+        eprintln!("testcase \"{}\" -> masm -> dumpbin -> bytes {:x?}", text, bytes);
+
+        Ok(bytes)
+    }
+}
+
+#[allow(unused)]
+fn carve_dumpbin_stdout(stdout: &str) -> Result<Vec<&str>, String> {
+    let lines = stdout.split("\n").collect::<Vec<_>>();
+
+    let mut disasm_start = match lines.iter().enumerate().find_map(|(idx, line)| {
+        if line.starts_with("File Type: COFF OBJECT") {
+            Some(idx)
+        } else {
+            None
+        }
+    }) {
+        Some(start) => start,
+        None => {
+            eprintln!("failed to find COFF OBJECT line in dumpbin output:");
+            eprintln!("{}", stdout);
+            return Err("failed to find disassembly start in dumpbin output".to_string());
+        }
+    };
+
+    let disasm_end = match lines.iter().enumerate().find_map(|(idx, line)| {
+        if line.starts_with("  Summary") {
+            Some(idx)
+        } else {
+            None
+        }
+    }) {
+        Some(end) => end,
+        None => {
+            eprintln!("failed to find Summary line in dumpbin output:");
+            eprintln!("{}", stdout);
+            return Err("failed to find disassembly end in dumpbin output".to_string());
+        }
+    };
+
+    if lines[disasm_start + 2].starts_with("$$00") {
+        // the line is probably an invented label for rip-relative addressing.
+        disasm_start += 1;
+    }
+
+    let disasm_lines = &lines[disasm_start + 2..disasm_end - 2 + 1];
+
+    if disasm_lines.len() > 1 {
+        eprintln!("disassembly is too complex");
+        eprintln!("{}", stdout);
+        return Err("got multiple lines of disassembly".to_string());
+    }
+
+    // eprintln!("dumpbin returns: {:?}", disasm_lines);
+
+    Ok(disasm_lines.to_vec())
+}