some doc comments covered incorrect modesHEADno-gods-no-

4 files changed, 18 insertions, 18 deletions

diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index ae77636..18d4268 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -3531,9 +3531,9 @@ mod buffer_sink {
     /// ### example
     ///
     /// ```
-    /// use yaxpeax_x86::long_mode::InstDecoder;
-    /// use yaxpeax_x86::long_mode::InstructionTextBuffer;
-    /// use yaxpeax_x86::long_mode::DisplayStyle;
+    /// use yaxpeax_x86::protected_mode::InstDecoder;
+    /// use yaxpeax_x86::protected_mode::InstructionTextBuffer;
+    /// use yaxpeax_x86::protected_mode::DisplayStyle;
     ///
     /// let bytes = &[0x33, 0xc0];
     /// let inst = InstDecoder::default().decode_slice(bytes).expect("can decode");
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index f74592b..cfad63c 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -41,7 +41,7 @@ impl fmt::Display for DecodeError {
 /// an `x86` register, including its number and type. if `fmt` is enabled, name too.
 ///
 /// ```
-/// use yaxpeax_x86::long_mode::{RegSpec, register_class};
+/// use yaxpeax_x86::protected_mode::{RegSpec, register_class};
 ///
 /// assert_eq!(RegSpec::ecx().num(), 1);
 /// assert_eq!(RegSpec::ecx().class(), register_class::D);
@@ -68,7 +68,7 @@ impl Hash for RegSpec {
 ///
 /// these are only obtained through [`Opcode::condition()`]:
 /// ```
-/// use yaxpeax_x86::long_mode::{Opcode, ConditionCode};
+/// use yaxpeax_x86::protected_mode::{Opcode, ConditionCode};
 ///
 /// assert_eq!(Opcode::JB.condition(), Some(ConditionCode::B));
 /// ```
@@ -3290,7 +3290,7 @@ impl Instruction {
     /// later. see the documentation on [`display::DisplayStyle`] for more.
     ///
     /// ```
-    /// use yaxpeax_x86::long_mode::{InstDecoder, DisplayStyle, DefaultRules};
+    /// use yaxpeax_x86::protected_mode::{InstDecoder, DisplayStyle, DefaultRules};
     ///
     /// let decoder = InstDecoder::default();
     /// let inst = decoder.decode_slice(&[0x33, 0xc1]).unwrap();
@@ -5266,7 +5266,7 @@ pub enum InnerDescription {
     /// displaying for human consumption.
     OperandCode(OperandCodeWrapper),
     /// a decoded register: a name for the bits used to decode it, the register number those bits
-    /// specify, and the fully-constructed [`long_mode::RegSpec`] that was decoded.
+    /// specify, and the fully-constructed [`protected_mode::RegSpec`] that was decoded.
     RegisterNumber(&'static str, u8, RegSpec),
     /// a miscellaneous string describing some bits of the instruction. this may describe a prefix,
     /// internal details of a prefix, error or constraints on an opcode, operand encoding details,
diff --git a/src/real_mode/display.rs b/src/real_mode/display.rs
index 98f292b..b6096cd 100644
--- a/src/real_mode/display.rs
+++ b/src/real_mode/display.rs
@@ -3531,22 +3531,22 @@ mod buffer_sink {
     /// ### example
     ///
     /// ```
-    /// use yaxpeax_x86::long_mode::InstDecoder;
-    /// use yaxpeax_x86::long_mode::InstructionTextBuffer;
-    /// use yaxpeax_x86::long_mode::DisplayStyle;
+    /// use yaxpeax_x86::real_mode::InstDecoder;
+    /// use yaxpeax_x86::real_mode::InstructionTextBuffer;
+    /// use yaxpeax_x86::real_mode::DisplayStyle;
     ///
     /// let bytes = &[0x33, 0xc0];
     /// let inst = InstDecoder::default().decode_slice(bytes).expect("can decode");
     /// let mut text_buf = InstructionTextBuffer::new();
     /// assert_eq!(
     ///     text_buf.format_inst(&inst.display_with(DisplayStyle::Intel)).expect("can format"),
-    ///     "xor eax, eax"
+    ///     "xor ax, ax"
     /// );
     ///
     /// // or, getting the formatted instruction with `text_str`:
     /// assert_eq!(
     ///     text_buf.text_str(),
-    ///     "xor eax, eax"
+    ///     "xor ax, ax"
     /// );
     /// ```
     pub struct InstructionTextBuffer {
diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs
index 4049a97..03d251b 100644
--- a/src/real_mode/mod.rs
+++ b/src/real_mode/mod.rs
@@ -41,7 +41,7 @@ impl fmt::Display for DecodeError {
 /// an `x86` register, including its number and type. if `fmt` is enabled, name too.
 ///
 /// ```
-/// use yaxpeax_x86::long_mode::{RegSpec, register_class};
+/// use yaxpeax_x86::real_mode::{RegSpec, register_class};
 ///
 /// assert_eq!(RegSpec::ecx().num(), 1);
 /// assert_eq!(RegSpec::ecx().class(), register_class::D);
@@ -68,7 +68,7 @@ impl Hash for RegSpec {
 ///
 /// these are only obtained through [`Opcode::condition()`]:
 /// ```
-/// use yaxpeax_x86::long_mode::{Opcode, ConditionCode};
+/// use yaxpeax_x86::real_mode::{Opcode, ConditionCode};
 ///
 /// assert_eq!(Opcode::JB.condition(), Some(ConditionCode::B));
 /// ```
@@ -3317,13 +3317,13 @@ impl Instruction {
     /// later. see the documentation on [`display::DisplayStyle`] for more.
     ///
     /// ```
-    /// use yaxpeax_x86::long_mode::{InstDecoder, DisplayStyle};
+    /// use yaxpeax_x86::real_mode::{InstDecoder, DisplayStyle};
     ///
     /// let decoder = InstDecoder::default();
     /// let inst = decoder.decode_slice(&[0x33, 0xc1]).unwrap();
     ///
-    /// assert_eq!("eax ^= ecx", inst.display_with(DisplayStyle::C).to_string());
-    /// assert_eq!("xor eax, ecx", inst.display_with(DisplayStyle::Intel).to_string());
+    /// assert_eq!("ax ^= cx", inst.display_with(DisplayStyle::C).to_string());
+    /// assert_eq!("xor ax, cx", inst.display_with(DisplayStyle::Intel).to_string());
     /// ```
     pub fn display_with<'a>(&'a self, style: display::DisplayStyle) -> display::InstructionDisplayer<'a> {
         display::InstructionDisplayer {
@@ -5288,7 +5288,7 @@ pub enum InnerDescription {
     /// displaying for human consumption.
     OperandCode(OperandCodeWrapper),
     /// a decoded register: a name for the bits used to decode it, the register number those bits
-    /// specify, and the fully-constructed [`long_mode::RegSpec`] that was decoded.
+    /// specify, and the fully-constructed [`real_mode::RegSpec`] that was decoded.
     RegisterNumber(&'static str, u8, RegSpec),
     /// a miscellaneous string describing some bits of the instruction. this may describe a prefix,
     /// internal details of a prefix, error or constraints on an opcode, operand encoding details,