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| author | iximeow <me@iximeow.net> | 2026-04-19 16:35:41 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-04-19 16:35:41 +0000 |
| commit | 396b52fd6407e022e380490e6d9a5653d9e77dda (patch) | |
| tree | 99e341f6b2458913d69149a66817d33124019f6c | |
| parent | 3bcd17033a96852e7bb40c211d8c42e529d6780b (diff) | |
report memory access size for "monitor"
| -rw-r--r-- | CHANGELOG | 1 | ||||
| -rw-r--r-- | src/long_mode/mod.rs | 5 |
2 files changed, 6 insertions, 0 deletions
@@ -20,6 +20,7 @@ is unchanged and uses a 16-bit form for source GPR. * reject 0f0d prefetch/nop with a register operand, which was incorrectly decoded before. * maskmovq and maskmovdqu now have their implicit memory access size reported correctly. +* monitor now reports the memory access size of the monitored dword/qword. ## 2.0.0 diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 5d7180e..de9a323 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -8296,6 +8296,11 @@ fn read_operands< match m { 0b000 => { instruction.opcode = Opcode::MONITOR; + instruction.mem_size = if instruction.prefixes.address_size() { + 4 + } else { + 8 + }; } 0b001 => { instruction.opcode = Opcode::MWAIT; |
