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| author | iximeow <me@iximeow.net> | 2026-05-25 18:12:35 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-05-25 18:12:35 +0000 |
| commit | 426d092da378cb271d084632a20865952da395c6 (patch) | |
| tree | 295a81fef7d5cf34a60cdccf8963298b734b5e8c /CHANGELOG | |
| parent | cb58e32ca672b01e773e189671a6868c1d7ed9b1 (diff) | |
reject arpl in 16-bit decoding
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -54,6 +54,7 @@ like raw instruction bytes. * correct swapped operand order of 0xD6-opcode movq. in 32/16-bit, fix this opcode being decoded as vmovd. * some instructions (such as invept, invvpid) were accepted by uarch-specific deocders when they should not have been. +* reject `arpl` in 16-bit decoding. * disallow 66-prefixed `sha1rnds4`. * mov seg-to-reg has more careful destination GPR selection. * 64-bit: use 32-bit GPRs for the destination rather than 16-bit. |
