add MASM-style formatting support in all modes

this includes a mildly nightmarish bit of test harness to compare
against ml.exe/ml64.exe/dumpbin.exe, which in turn chased out a bunch of
bugs. yay!

1 files changed, 28 insertions, 0 deletions

diff --git a/CHANGELOG b/CHANGELOG
index b60363b..6f18457 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,5 +1,10 @@
 ## 2.2.0
 
+* add DisplayStyle::Masm to long mode, protected mode, and real mode instruction formatting.
+  this "masm-style" formatting is derived from the output format of
+  dumpbin.exe, and (on Windows) is tested to round-trip through masm.exe or
+  ml64.exe as appropriate. caveats apply; see the documentation on DisplayStyle for details.
+
 * `Instruction::invalid()` returns instructions with opcode `Opcode::Invalid`, rather than nop.
   decoding an instruction with `opcode == Invalid` was already possible through attempting
   to decode invalid opcodes into a `&mut Instruction`; `invalid()` returning a no-operand
@@ -7,6 +12,29 @@
   that did not reflect a decoded x86 instruction.
   it has long passed its time. thank you for the patch, @Grond66!
 
+testing instruction round-tripping through `masm` found a few bugs, which are also fixed in this release:
+
+* fix vpbroadcast* with a SIMD register source being able to claim ymm as a source. the source
+  register according to manuals and every assembler is xmm-size, if a register. semantically this
+  has little effect: the broadcasted value is the low lane of the source register in these cases.
+* fix vpbroadcast* with a memory source reporting incorrect memory sizes. the memory address being
+  broadcast indicates the size, which is one byte/word/dword/qword. it is unrelated to the
+  broadcasted-to vector length.
+* fix incorrect index-vector-register size choice for vgatherdpd. the index register is xmm, not
+  depends-on-L xmm/ymm.
+* fix SEAM and {rd,wr}{fs,gs}base instructions being decoded in 32-bit and 16-bit modes.
+* the pextr*/pinsr*/insertps/extrps immediate is now an unsigned 8-bit immediate, rather than signed.
+  these instructions consume 8 bit of immediate as several fields compressed into 8 bits, rather
+  than as a numeric value, so sign extension is not useful.  further, extending the immediate makes
+  it more difficult to round-trip disassembly through other assemblers.
+* fix vmread/vmwrite reporting 8-byte accesses outside long mode; they are 4-byte accesses in
+  protected and real modes.
+* fix lfs/lgs/lss loading into dword registers when operating with a short (16-bit segment/offset) pointer.
+  in these cases, the offset is loaded into a 16-bit register, not 32-bit. the upper 32 bits are unchanged.
+* fix 32/16-bit unprefixed lss reporting too-small memory read.  in both modes
+  lss could be decoded as reading only an offset, rather than an offset (into the
+  destination register) and segment (into ss)
+
 ## 2.1.1
 
 * fix jrcxz/jecxz/jcxz having "two operands". accessing the "second" operand