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authoriximeow <me@iximeow.net>2026-03-27 07:05:18 +0000
committeriximeow <me@iximeow.net>2026-03-27 07:05:18 +0000
commitc1ede29b37292df4d45dfefe54bd5ca3e222f1fc (patch)
tree4c576316ba8ceb89a4594d74b8a65db37fdaa7b3 /CHANGELOG
parentce0b0dcfaaeeb78fc627e54ddb0eca84f3575067 (diff)
more accurate mov seg-to-gpr operand size
Diffstat (limited to 'CHANGELOG')
-rw-r--r--CHANGELOG6
1 files changed, 6 insertions, 0 deletions
diff --git a/CHANGELOG b/CHANGELOG
index a1ef883..8cdc8d3 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -10,6 +10,12 @@
* push-immediate, pushf, popf, leave, and xlat now all report a correct memory
access size, fixing the prior behavior of reporting to memory access size at
all
+* 64-bit mode: mov seg-to-reg uses 32-bit GPRs for the destination rather than 16-bit.
+ * this is more accurate to the semantic of the instruction, which is why other disassemblers
+ report it this way; for register destinations specifically the segment selector is
+ zero-extended to 64 bits for storage. writing to "eax" in this way implies the 32->64 bit
+ zero-extend, whereas writing to "ax" does not imply any zero-extension. mov reg-to-seg
+ is unchanged and uses a 16-bit form for source GPR.
## 2.0.0