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authoriximeow <me@iximeow.net>2019-07-20 10:55:58 -0700
committeriximeow <me@iximeow.net>2020-01-12 16:10:13 -0800
commit0504f759cadb643d50e4eee6e9372d98dd3ac245 (patch)
tree1145b2edc9f014f60fa09ebf3f85d05bb4c53394 /src/lib.rs
parent7b233f8382aa36e1f8c45d5d0827ccbc028a6357 (diff)
these types SHOULD be representable with one byte
Diffstat (limited to 'src/lib.rs')
-rw-r--r--src/lib.rs4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/lib.rs b/src/lib.rs
index 24f4299..82a1e48 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -213,6 +213,7 @@ impl Operand {
#[cfg(feature="use-serde")]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash, Serialize, Deserialize)]
+#[repr(u8)]
pub enum RegisterBank {
Q, D, W, B, rB, // Quadword, Dword, Word, Byte
CR, DR, S, EIP, RIP, EFlags, RFlags, // Control reg, Debug reg, Selector, ...
@@ -222,6 +223,7 @@ pub enum RegisterBank {
#[allow(non_camel_case_types)]
#[cfg(not(feature="use-serde"))]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)]
+#[repr(u8)]
pub enum RegisterBank {
Q, D, W, B, rB, // Quadword, Dword, Word, Byte
CR, DR, S, EIP, RIP, EFlags, RFlags, // Control reg, Debug reg, Selector, ...
@@ -230,12 +232,14 @@ pub enum RegisterBank {
}
#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)]
+#[repr(u8)]
pub enum Segment {
CS, DS, ES, FS, GS, SS
}
#[allow(non_camel_case_types)]
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
+#[repr(u8)]
pub enum Opcode {
XADD,
BT,