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authoriximeow <me@iximeow.net>2021-06-27 01:19:52 -0700
committeriximeow <me@iximeow.net>2021-06-27 01:19:52 -0700
commit1e230284c3bdeb5d3e71b5e058481ca0bf4d578e (patch)
treed88692d97b10c6da83d71dc2ffc311a842d6cb53 /src/long_mode/mod.rs
parentdc4de3f7678218b29075aa9f24bfb06b5cb4df75 (diff)
all tests now passing for long mode
Diffstat (limited to 'src/long_mode/mod.rs')
-rw-r--r--src/long_mode/mod.rs21
1 files changed, 18 insertions, 3 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 60a18c5..e0dff7c 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -4317,6 +4317,8 @@ impl PrefixVex {
fn w(&self) -> bool { (self.bits & 0x08) == 0x08 }
#[inline]
fn l(&self) -> bool { (self.bits & 0x10) == 0x10 }
+ #[inline]
+ fn compressed_disp(&self) -> bool { (self.bits & 0x20) == 0x20 }
}
#[derive(Debug, Copy, Clone)]
@@ -4403,6 +4405,15 @@ impl Prefixes {
}
#[inline]
+ fn apply_compressed_disp(&mut self, state: bool) {
+ if state {
+ self.rex.bits |= 0x20;
+ } else {
+ self.rex.bits &= 0xdf;
+ }
+ }
+
+ #[inline]
fn rex_from(&mut self, bits: u8) {
self.rex.bits = bits;
}
@@ -5427,11 +5438,15 @@ pub(self) fn read_E_ymm<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut In
}
}
#[allow(non_snake_case)]
-pub(self) fn read_E_zmm<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut Instruction, modrm: u8, length: &mut u8) -> Result<OperandSpec, DecodeError> {
+pub(self) fn read_E_vex<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut Instruction, modrm: u8, length: &mut u8, bank: RegisterBank) -> Result<OperandSpec, DecodeError> {
if modrm >= 0b11000000 {
- read_modrm_reg(instr, modrm, RegisterBank::Z)
+ read_modrm_reg(instr, modrm, bank)
} else {
- read_M(bytes_iter, instr, modrm, length)
+ let res = read_M(bytes_iter, instr, modrm, length)?;
+ if (modrm & 0b01_000_000) == 0b01_000_000 {
+ instr.prefixes.apply_compressed_disp(true);
+ }
+ Ok(res)
}
}