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authoriximeow <me@iximeow.net>2021-08-21 17:22:07 -0700
committeriximeow <me@iximeow.net>2021-08-21 19:20:41 -0700
commitb6f83fa1b4859a6de2d7017e9709b9520d933f6b (patch)
tree17988288f2d126a34569b0dfd1fc00f8f639c40b /src/long_mode/mod.rs
parent0a39607d690755c5f7f7462677fb75580946be2c (diff)
add descriptions for other prefixes, 16-bit addressing
Diffstat (limited to 'src/long_mode/mod.rs')
-rw-r--r--src/long_mode/mod.rs20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 111ba69..d68bb95 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -7614,20 +7614,40 @@ fn read_with_annotations<
prefixes.set_gs();
},
0x66 => {
+ sink.record((words.offset() - 2) as u32 * 8, (words.offset() - 2) as u32 * 8 + 7, FieldDescription {
+ desc: InnerDescription::Misc("operand size override (to 16 bits)"),
+ id: words.offset() as u32 * 8 - 16,
+ });
prefixes.set_operand_size();
},
0x67 => {
+ sink.record((words.offset() - 2) as u32 * 8, (words.offset() - 2) as u32 * 8 + 7, FieldDescription {
+ desc: InnerDescription::Misc("address size override (to 32 bits)"),
+ id: words.offset() as u32 * 8 - 16,
+ });
prefixes.set_address_size();
instruction.regs[1].bank = RegisterBank::D;
instruction.regs[2].bank = RegisterBank::D;
},
0xf0 => {
+ sink.record((words.offset() - 2) as u32 * 8, (words.offset() - 2) as u32 * 8 + 7, FieldDescription {
+ desc: InnerDescription::Misc("lock prefix"),
+ id: words.offset() as u32 * 8 - 16,
+ });
prefixes.set_lock();
},
0xf2 => {
+ sink.record((words.offset() - 2) as u32 * 8, (words.offset() - 2) as u32 * 8 + 7, FieldDescription {
+ desc: InnerDescription::Misc("repnz prefix"),
+ id: words.offset() as u32 * 8 - 16,
+ });
prefixes.set_repnz();
},
0xf3 => {
+ sink.record((words.offset() - 2) as u32 * 8, (words.offset() - 2) as u32 * 8 + 7, FieldDescription {
+ desc: InnerDescription::Misc("rep prefix"),
+ id: words.offset() as u32 * 8 - 16,
+ });
prefixes.set_rep();
},
_ => { unsafe { unreachable_unchecked(); } }