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authoriximeow <me@iximeow.net>2021-06-28 00:09:40 -0700
committeriximeow <me@iximeow.net>2021-06-28 00:09:40 -0700
commit5a1fd6f773320c845f2549722b9f27094d68bdf2 (patch)
treee65285474a54641c70761db9f38ab5a2c1460748 /src/long_mode
parentc42f84b37c9be599442a44caab289f5fdf971649 (diff)
protected mode memory sizes
also some long-mode cleanup in corresponding areas
Diffstat (limited to 'src/long_mode')
-rw-r--r--src/long_mode/mod.rs4
-rw-r--r--src/long_mode/vex.rs6
2 files changed, 2 insertions, 8 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 1039260..9fee5b9 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -7479,9 +7479,6 @@ fn read_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter: T,
let modrm = read_modrm(&mut bytes_iter, length)?;
instruction.operands[1] = read_E(&mut bytes_iter, instruction, modrm, 1, length)?;
- if instruction.operands[1] != OperandSpec::RegMMM {
- instruction.mem_size = 1;
- }
instruction.modrm_rrr =
RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present());
if instruction.operands[1] != OperandSpec::RegMMM {
@@ -9747,7 +9744,6 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
instruction.opcode = opcode;
instruction.mem_size = mem_size;
instruction.operands[0] = read_M(&mut bytes_iter, instruction, modrm, length)?;
- instruction.mem_size = mem_size;
}
}
OperandCode::ModRM_0x0fba => {
diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs
index 6db99a1..35f979f 100644
--- a/src/long_mode/vex.rs
+++ b/src/long_mode/vex.rs
@@ -420,6 +420,7 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst
instruction.opcode = if modrm & 0xc0 == 0xc0 {
Opcode::VMOVHLPS
} else {
+ instruction.mem_size = 4;
Opcode::VMOVLPS
};
instruction.modrm_rrr =
@@ -427,7 +428,6 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst
instruction.operands[0] = OperandSpec::RegRRR;
instruction.operands[1] = OperandSpec::RegVex;
instruction.operands[2] = read_E_xmm(bytes, instruction, modrm, length)?;
- instruction.mem_size = 4;
instruction.operand_count = 3;
Ok(())
}
@@ -436,6 +436,7 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst
instruction.opcode = if modrm & 0xc0 == 0xc0 {
Opcode::VMOVLHPS
} else {
+ instruction.mem_size = 8;
Opcode::VMOVHPS
};
instruction.modrm_rrr =
@@ -443,7 +444,6 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst
instruction.operands[0] = OperandSpec::RegRRR;
instruction.operands[1] = OperandSpec::RegVex;
instruction.operands[2] = read_E_xmm(bytes, instruction, modrm, length)?;
- instruction.mem_size = 8;
instruction.operand_count = 3;
Ok(())
}
@@ -537,7 +537,6 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst
instruction.operands[2] = mem_oper;
instruction.imm = read_imm_unsigned(bytes, 1, length)?;
instruction.operands[3] = OperandSpec::ImmU8;
- instruction.mem_size = 1;
if mem_oper != OperandSpec::RegMMM {
instruction.mem_size = 1;
}
@@ -555,7 +554,6 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst
instruction.operands[2] = mem_oper;
instruction.imm = read_imm_unsigned(bytes, 1, length)?;
instruction.operands[3] = OperandSpec::ImmU8;
- instruction.mem_size = 4;
if mem_oper != OperandSpec::RegMMM {
instruction.mem_size = 4;
}