diff options
| author | iximeow <me@iximeow.net> | 2021-03-21 01:21:11 -0700 | 
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-03-21 01:21:55 -0700 | 
| commit | 68e719a30e989d6580f8077cb9afa5af3ddffa9a (patch) | |
| tree | a80ad3342eb7408138c6632ff918688aa2f4ed08 /src/long_mode | |
| parent | a493b4d267c4fb6a042cf071301c8885196b4a91 (diff) | |
add tdx
decoder flag to come
Diffstat (limited to 'src/long_mode')
| -rw-r--r-- | src/long_mode/display.rs | 10 | ||||
| -rw-r--r-- | src/long_mode/mod.rs | 48 | 
2 files changed, 55 insertions, 3 deletions
| diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs index 3e38d8d..9986194 100644 --- a/src/long_mode/display.rs +++ b/src/long_mode/display.rs @@ -1285,6 +1285,12 @@ const MNEMONICS: &[&'static str] = &[      // CET      "wruss",      "wrss", + +    // TDX +    "tdcall", +    "seamret", +    "seamops", +    "seamcall",  ];  impl Opcode { @@ -2223,6 +2229,10 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color              Opcode::SYSRET |              Opcode::CLTS |              Opcode::SYSCALL | +            Opcode::TDCALL | +            Opcode::SEAMRET | +            Opcode::SEAMOPS | +            Opcode::SEAMCALL |              Opcode::LSL |              Opcode::SLDT |              Opcode::STR | diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 9410b2b..5014e05 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -1944,6 +1944,12 @@ pub enum Opcode {      // CET      WRUSS,      WRSS, + +    // TDX +    TDCALL, +    SEAMRET, +    SEAMOPS, +    SEAMCALL,  }  #[derive(Debug)] @@ -3995,6 +4001,7 @@ enum OperandCode {      ModRM_0x0f00 = OperandCodeBuilder::new().read_modrm().special_case(40).bits(),      ModRM_0x0f01 = OperandCodeBuilder::new().read_modrm().special_case(41).bits(), +    ModRM_0x660f01 = OperandCodeBuilder::new().read_modrm().special_case(52).bits(),      ModRM_0x0f0d = OperandCodeBuilder::new().read_modrm().special_case(42).bits(),      ModRM_0x0f0f = OperandCodeBuilder::new().read_modrm().special_case(65).bits(), // 3dnow      ModRM_0x0fae = OperandCodeBuilder::new().read_modrm().special_case(43).bits(), @@ -4866,7 +4873,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {      if prefixes.repnz() {          match opcode {              0x00 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f00), -            0x01 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f01), +            0x01 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),              0x02 => OpcodeRecord(Interpretation::Instruction(Opcode::LAR), OperandCode::Gv_Ew),              0x03 => OpcodeRecord(Interpretation::Instruction(Opcode::LSL), OperandCode::Gv_Ew_LSL),              0x04 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5143,7 +5150,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {      } else if prefixes.rep() {          match opcode {              0x00 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f00), -            0x01 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f01), +            0x01 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),              0x02 => OpcodeRecord(Interpretation::Instruction(Opcode::LAR), OperandCode::Gv_Ew),              0x03 => OpcodeRecord(Interpretation::Instruction(Opcode::LSL), OperandCode::Gv_Ew_LSL),              0x04 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -5420,7 +5427,7 @@ fn read_0f_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {      } else if prefixes.operand_size() {          match opcode {              0x00 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f00), -            0x01 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f01), +            0x01 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x660f01),              0x02 => OpcodeRecord(Interpretation::Instruction(Opcode::LAR), OperandCode::Gv_Ew),              0x03 => OpcodeRecord(Interpretation::Instruction(Opcode::LSL), OperandCode::Gv_Ew_LSL),              0x04 => OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), @@ -8096,6 +8103,41 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter              }              instruction.operands[0] = read_E(&mut bytes_iter, instruction, modrm, 2, length)?;          } +        OperandCode::ModRM_0x660f01 => { +            let modrm = read_modrm(&mut bytes_iter, length)?; +            let r = (modrm >> 3) & 7; +            if r == 1 { +                let mod_bits = modrm >> 6; +                let m = modrm & 7; +                if mod_bits == 0b11 { +                    instruction.operands[0] = OperandSpec::Nothing; +                    instruction.operand_count = 0; +                    match m { +                        0b100 => { +                            instruction.opcode = Opcode::TDCALL; +                        } +                        0b101 => { +                            instruction.opcode = Opcode::SEAMRET; +                        } +                        0b110 => { +                            instruction.opcode = Opcode::SEAMOPS; +                        } +                        0b111 => { +                            instruction.opcode = Opcode::SEAMCALL; +                        } +                        _ => { +                            instruction.opcode = Opcode::Invalid; +                            return Err(DecodeError::InvalidOpcode); +                        } +                    } +                    return Ok(()); +                } else { +                    return Err(DecodeError::InvalidOpcode); +                } +            } else { +                return Err(DecodeError::InvalidOpcode); +            } +        }          OperandCode::ModRM_0x0f01 => {              let opwidth = imm_width_from_prefixes_64(SizeCode::vq, instruction.prefixes);              let modrm = read_modrm(&mut bytes_iter, length)?; | 
