diff options
| author | iximeow <me@iximeow.net> | 2020-08-03 01:51:39 -0700 | 
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2020-08-09 01:38:57 -0700 | 
| commit | 97f1c7e15a35df264dae91d76660db4762bd5d25 (patch) | |
| tree | c5774b6525a670fe4d58ee84446c86a7c373fc87 /src/long_mode | |
| parent | 37c43412cbdd7c5da1da2ee17c241d44e9720ae2 (diff) | |
vpermq (avx2)
Diffstat (limited to 'src/long_mode')
| -rw-r--r-- | src/long_mode/vex.rs | 13 | 
1 files changed, 12 insertions, 1 deletions
| diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs index cdca801..8325e3f 100644 --- a/src/long_mode/vex.rs +++ b/src/long_mode/vex.rs @@ -772,8 +772,19 @@ fn read_vex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instruction: &mut Inst              instruction.vex_reg.bank = bank;              Ok(())          } +        VEXOperandCode::G_E_ymm_imm8 => { +            let modrm = read_modrm(bytes, length)?; +            instruction.modrm_rrr = +                RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.vex().r(), RegisterBank::Y); +            let mem_oper = read_E_ymm(bytes, instruction, modrm, length)?; +            instruction.operands[0] = OperandSpec::RegRRR; +            instruction.operands[1] = mem_oper; +            instruction.imm = read_imm_unsigned(bytes, 1, length)?; +            instruction.operands[2] = OperandSpec::ImmU8; +            instruction.operand_count = 3; +            Ok(()) +        } -        VEXOperandCode::G_E_ymm_imm8 |          VEXOperandCode::G_V_E_xmm_xmm4 |          VEXOperandCode::G_V_E_ymm_ymm4 |          VEXOperandCode::G_V_ymm_E_xmm | | 
