diff options
author | iximeow <me@iximeow.net> | 2021-07-02 19:37:56 -0700 |
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committer | iximeow <me@iximeow.net> | 2021-07-02 19:37:56 -0700 |
commit | 0b04fd05a955033dc781caaec6eb2b32f85c1b3f (patch) | |
tree | ea843ce0d1b8423a33925e6b5f7a478612c1a2d8 /src/long_mode | |
parent | 1d4b7c2dad97694a6980d95287519ba4c3d582ff (diff) |
fix several strict rejection for several
Diffstat (limited to 'src/long_mode')
-rw-r--r-- | src/long_mode/mod.rs | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 65bda54..22ffe58 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -7595,6 +7595,9 @@ fn read_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpe instruction.operand_count = 1; } 6 => { + if instruction.opcode == Opcode::Invalid { + return Err(DecodeError::InvalidOpcode); + } instruction.operands[0] = OperandSpec::Nothing; instruction.operand_count = 0; return Ok(()); @@ -7731,14 +7734,14 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y } OperandCode::INV_Gv_M => { let modrm = read_modrm(words)?; + if modrm >= 0xc0 { + return Err(DecodeError::InvalidOperand); + } instruction.regs[0] = RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::Q); instruction.operands[0] = OperandSpec::RegRRR; instruction.operands[1] = read_M(words, instruction, modrm)?; - if instruction.operands[1] == OperandSpec::RegMMM { - return Err(DecodeError::InvalidOperand); - } if [Opcode::LFS, Opcode::LGS, Opcode::LSS].contains(&instruction.opcode) { if instruction.prefixes.rex().w() { instruction.mem_size = 10; |