diff options
| author | iximeow <me@iximeow.net> | 2021-07-03 13:39:46 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-07-03 13:43:39 -0700 |
| commit | 7796f7e088c5aa878cfb61b5a885b64daf390808 (patch) | |
| tree | e070d42e01c88aba9efea534749160f191b9483b /src/protected_mode/display.rs | |
| parent | 2e34ef39d75caeb10c499712bc28ac9de8abf984 (diff) | |
clean up x86_32 and make interfaces match x86_64
Diffstat (limited to 'src/protected_mode/display.rs')
| -rw-r--r-- | src/protected_mode/display.rs | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs index 83d3b56..3e0079e 100644 --- a/src/protected_mode/display.rs +++ b/src/protected_mode/display.rs @@ -3414,7 +3414,13 @@ fn contextualize_intel<T: fmt::Write, Y: YaxColors>(instr: &Instruction, colors: } } } else { - Operand::from_spec(instr, instr.operands[i as usize - 1]).width() / instr.mem_size + // this should never be `None` - that would imply two + // memory operands for a broadcasted operation. + if let Some(width) = Operand::from_spec(instr, instr.operands[i as usize - 1]).width() { + width / instr.mem_size + } else { + 0 + } }; write!(out, "{{1to{}}}", scale)?; } |