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author | iximeow <me@iximeow.net> | 2020-05-03 13:52:39 -0700 |
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committer | iximeow <me@iximeow.net> | 2020-05-03 13:52:39 -0700 |
commit | c9df7910c914d04644aee660d48de1245467f384 (patch) | |
tree | 33d1a0f5f21b4356d8a4c544f8a5aa901461d93d /src/protected_mode/mod.rs | |
parent | 79388a4ff09fe21d31fe41a68e59a92263c2eea5 (diff) |
that instruction is cwd, not cbd
Diffstat (limited to 'src/protected_mode/mod.rs')
-rw-r--r-- | src/protected_mode/mod.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index 3370aaa..2a32a91 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -505,7 +505,7 @@ pub enum Opcode { CBW, CWDE, CDQE, - CBD, + CWD, CDQ, CQO, LODS, @@ -5945,7 +5945,7 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter OperandCode::CVT_DA => { let opwidth = imm_width_from_prefixes(SizeCode::vd, instruction.prefixes); instruction.opcode = match opwidth { - 2 => { Opcode::CBD }, + 2 => { Opcode::CWD }, 4 => { Opcode::CDQ }, _ => { unreachable!("invalid operation width"); }, } |