diff options
| author | iximeow <me@iximeow.net> | 2021-07-02 19:45:34 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2021-07-02 19:45:34 -0700 |
| commit | 7394c9dc4727d42b3ccbdf38f114ae0b5d28069d (patch) | |
| tree | 21da3f7098b8fbdd3e58ec4b9359d1e002d07703 /src/protected_mode/mod.rs | |
| parent | 0b04fd05a955033dc781caaec6eb2b32f85c1b3f (diff) | |
intel keylocker instructions that access memory have memory access sizes
Diffstat (limited to 'src/protected_mode/mod.rs')
| -rw-r--r-- | src/protected_mode/mod.rs | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index 908e449..a1aac3f 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -8436,11 +8436,13 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y OperandCode::ModRM_0xf30f38d8 => { let modrm = read_modrm(words)?; let r = (modrm >> 3) & 7; + instruction.mem_size = 63; match r { 0b000 => { if modrm >= 0b11_000_000 { return Err(DecodeError::InvalidOperand); } + instruction.mem_size = 48; instruction.opcode = Opcode::AESENCWIDE128KL; instruction.operands[0] = read_M(words, instruction, modrm)?; return Ok(()); @@ -8449,6 +8451,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if modrm >= 0b11_000_000 { return Err(DecodeError::InvalidOperand); } + instruction.mem_size = 48; instruction.opcode = Opcode::AESDECWIDE128KL; instruction.operands[0] = read_M(words, instruction, modrm)?; return Ok(()); @@ -8457,6 +8460,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if modrm >= 0b11_000_000 { return Err(DecodeError::InvalidOperand); } + instruction.mem_size = 64; instruction.opcode = Opcode::AESENCWIDE256KL; instruction.operands[0] = read_M(words, instruction, modrm)?; return Ok(()); @@ -8465,6 +8469,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if modrm >= 0b11_000_000 { return Err(DecodeError::InvalidOperand); } + instruction.mem_size = 64; instruction.opcode = Opcode::AESDECWIDE256KL; instruction.operands[0] = read_M(words, instruction, modrm)?; return Ok(()); @@ -8479,6 +8484,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if let OperandSpec::RegMMM = instruction.operands[1] { instruction.opcode = Opcode::LOADIWKEY; } else { + instruction.mem_size = 48; instruction.opcode = Opcode::AESENC128KL; } } @@ -8487,6 +8493,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if let OperandSpec::RegMMM = instruction.operands[1] { return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 48; instruction.opcode = Opcode::AESDEC128KL; } } @@ -8495,6 +8502,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if let OperandSpec::RegMMM = instruction.operands[1] { return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 64; instruction.opcode = Opcode::AESENC256KL; } } @@ -8503,6 +8511,7 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y if let OperandSpec::RegMMM = instruction.operands[1] { return Err(DecodeError::InvalidOperand); } else { + instruction.mem_size = 64; instruction.opcode = Opcode::AESDEC256KL; } } |