yax builds again with opcodes generated by type

1 files changed, 6 insertions, 2159 deletions

diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 2993968..2adf0c8 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -11,6 +11,7 @@ pub use self::display::{DisplayStyle, InstructionDisplayer};
 
 use core::cmp::PartialEq;
 use crate::safer_unchecked::unreachable_kinda_unchecked as unreachable_unchecked;
+pub use crate::generated::opcode::protected_mode::Opcode as Opcode;
 
 use yaxpeax_arch::{AddressDiff, Decoder, Reader, LengthedInstruction};
 use yaxpeax_arch::annotation::{AnnotatingDecoder, DescriptionSink, NullSink};
@@ -997,1500 +998,6 @@ const XSAVE: [Opcode; 10] = [
     Opcode::XSETBV,
 ];
 
-#[allow(non_camel_case_types)]
-#[derive(Copy, Clone, Debug, Eq, PartialEq)]
-#[non_exhaustive]
-pub enum Opcode {
-    Invalid,
-    ADD,
-    OR,
-    ADC,
-    SBB,
-    AND,
-    XOR,
-    SUB,
-    CMP,
-    XADD,
-    BT,
-    BTS,
-    BTC,
-    BTR,
-    BSF,
-    BSR,
-    TZCNT,
-    MOVSS,
-    ADDSS,
-    SUBSS,
-    MULSS,
-    DIVSS,
-    MINSS,
-    MAXSS,
-    SQRTSS,
-    MOVSD,
-    SQRTSD,
-    ADDSD,
-    SUBSD,
-    MULSD,
-    DIVSD,
-    MINSD,
-    MAXSD,
-    MOVSLDUP,
-    MOVSHDUP,
-    MOVDDUP,
-    HADDPS,
-    HSUBPS,
-    ADDSUBPD,
-    ADDSUBPS,
-    CVTSI2SS,
-    CVTSI2SD,
-    CVTTSD2SI,
-    CVTTPS2DQ,
-    CVTPD2DQ,
-    CVTPD2PS,
-    CVTPS2DQ,
-    CVTSD2SI,
-    CVTSD2SS,
-    CVTTSS2SI,
-    CVTSS2SI,
-    CVTSS2SD,
-    CVTDQ2PD,
-    LDDQU,
-    MOVZX,
-    MOVSX,
-    MOVSXD,
-    SAR,
-    SAL,
-    SHR,
-    SHRD,
-    SHL,
-    RCR,
-    RCL,
-    ROR,
-    ROL,
-    INC,
-    DEC,
-    HLT,
-    CALL,
-    CALLF,
-    JMP,
-    JMPF,
-    PUSH,
-    POP,
-    LEA,
-    NOP,
-    PREFETCHNTA,
-    PREFETCH0,
-    PREFETCH1,
-    PREFETCH2,
-    XCHG,
-    POPF,
-    INT,
-    INTO,
-    IRET,
-    IRETD,
-    IRETQ,
-    RETF,
-    ENTER,
-    LEAVE,
-    MOV,
-    RETURN,
-    PUSHF,
-    WAIT,
-    CBW,
-    CWDE,
-    CDQE,
-    CWD,
-    CDQ,
-    CQO,
-    LODS,
-    STOS,
-    LAHF,
-    SAHF,
-    CMPS,
-    SCAS,
-    MOVS,
-    TEST,
-    INS,
-    IN,
-    OUTS,
-    OUT,
-    IMUL,
-    JO,
-    JNO,
-    JB,
-    JNB,
-    JZ,
-    JNZ,
-    JA,
-    JNA,
-    JS,
-    JNS,
-    JP,
-    JNP,
-    JL,
-    JGE,
-    JLE,
-    JG,
-    CMOVA,
-    CMOVB,
-    CMOVG,
-    CMOVGE,
-    CMOVL,
-    CMOVLE,
-    CMOVNA,
-    CMOVNB,
-    CMOVNO,
-    CMOVNP,
-    CMOVNS,
-    CMOVNZ,
-    CMOVO,
-    CMOVP,
-    CMOVS,
-    CMOVZ,
-    DIV,
-    IDIV,
-    MUL,
-    NEG,
-    NOT,
-    CMPXCHG,
-    SETO,
-    SETNO,
-    SETB,
-    SETAE,
-    SETZ,
-    SETNZ,
-    SETBE,
-    SETA,
-    SETS,
-    SETNS,
-    SETP,
-    SETNP,
-    SETL,
-    SETGE,
-    SETLE,
-    SETG,
-    CPUID,
-    UD0,
-    UD1,
-    UD2,
-    WBINVD,
-    INVD,
-    SYSRET,
-    CLTS,
-    SYSCALL,
-    LSL,
-    LAR,
-    LES,
-    LDS,
-    SGDT,
-    SIDT,
-    LGDT,
-    LIDT,
-    SMSW,
-    LMSW,
-    SWAPGS,
-    RDTSCP,
-    INVLPG,
-    FXSAVE,
-    FXRSTOR,
-    LDMXCSR,
-    STMXCSR,
-    XSAVE,
-    XRSTOR,
-    XSAVEOPT,
-    LFENCE,
-    MFENCE,
-    SFENCE,
-    CLFLUSH,
-    CLFLUSHOPT,
-    CLWB,
-    WRMSR,
-    RDTSC,
-    RDMSR,
-    RDPMC,
-    SLDT,
-    STR,
-    LLDT,
-    LTR,
-    VERR,
-    VERW,
-    CMC,
-    CLC,
-    STC,
-    CLI,
-    STI,
-    CLD,
-    STD,
-    JMPE,
-    POPCNT,
-    MOVDQU,
-    MOVDQA,
-    MOVQ,
-    CMPSS,
-    CMPSD,
-    UNPCKLPS,
-    UNPCKLPD,
-    UNPCKHPS,
-    UNPCKHPD,
-    PSHUFHW,
-    PSHUFLW,
-    MOVUPS,
-    MOVQ2DQ,
-    MOVDQ2Q,
-    RSQRTSS,
-    RCPSS,
-
-    ANDN,
-    BEXTR,
-    BLSI,
-    BLSMSK,
-    BLSR,
-    VMCLEAR,
-    VMXON,
-    VMCALL,
-    VMLAUNCH,
-    VMRESUME,
-    VMXOFF,
-    PCONFIG,
-    MONITOR,
-    MWAIT,
-    MONITORX,
-    MWAITX,
-    CLAC,
-    STAC,
-    ENCLS,
-    ENCLV,
-    XGETBV,
-    XSETBV,
-    VMFUNC,
-    XABORT,
-    XBEGIN,
-    XEND,
-    XTEST,
-    ENCLU,
-    RDPKRU,
-    WRPKRU,
-
-    RDPRU,
-    CLZERO,
-
-    RDSEED,
-    RDRAND,
-
-    ADDPS,
-    ADDPD,
-    ANDNPS,
-    ANDNPD,
-    ANDPS,
-    ANDPD,
-    BSWAP,
-    CMPPD,
-    CMPPS,
-    COMISD,
-    COMISS,
-    CVTDQ2PS,
-    CVTPI2PS,
-    CVTPI2PD,
-    CVTPS2PD,
-    CVTPS2PI,
-    CVTPD2PI,
-    CVTTPS2PI,
-    CVTTPD2PI,
-    CVTTPD2DQ,
-    DIVPS,
-    DIVPD,
-    EMMS,
-    GETSEC,
-    LFS,
-    LGS,
-    LSS,
-    MASKMOVQ,
-    MASKMOVDQU,
-    MAXPS,
-    MAXPD,
-    MINPS,
-    MINPD,
-    MOVAPS,
-    MOVAPD,
-    MOVD,
-    MOVLPS,
-    MOVLPD,
-    MOVHPS,
-    MOVHPD,
-    MOVLHPS,
-    MOVHLPS,
-    MOVUPD,
-    MOVMSKPS,
-    MOVMSKPD,
-    MOVNTI,
-    MOVNTPS,
-    MOVNTPD,
-    EXTRQ,
-    INSERTQ,
-    MOVNTSS,
-    MOVNTSD,
-    MOVNTQ,
-    MOVNTDQ,
-    MULPS,
-    MULPD,
-    ORPS,
-    ORPD,
-    PACKSSDW,
-    PACKSSWB,
-    PACKUSWB,
-    PADDB,
-    PADDD,
-    PADDQ,
-    PADDSB,
-    PADDSW,
-    PADDUSB,
-    PADDUSW,
-    PADDW,
-    PAND,
-    PANDN,
-    PAVGB,
-    PAVGW,
-    PCMPEQB,
-    PCMPEQD,
-    PCMPEQW,
-    PCMPGTB,
-    PCMPGTD,
-    PCMPGTW,
-    PINSRW,
-    PMADDWD,
-    PMAXSW,
-    PMAXUB,
-    PMINSW,
-    PMINUB,
-    PMOVMSKB,
-    PMULHUW,
-    PMULHW,
-    PMULLW,
-    PMULUDQ,
-    POR,
-    PSADBW,
-    PSHUFW,
-    PSHUFD,
-    PSLLD,
-    PSLLDQ,
-    PSLLQ,
-    PSLLW,
-    PSRAD,
-    PSRAW,
-    PSRLD,
-    PSRLDQ,
-    PSRLQ,
-    PSRLW,
-    PSUBB,
-    PSUBD,
-    PSUBQ,
-    PSUBSB,
-    PSUBSW,
-    PSUBUSB,
-    PSUBUSW,
-    PSUBW,
-    PUNPCKHBW,
-    PUNPCKHDQ,
-    PUNPCKHWD,
-    PUNPCKLBW,
-    PUNPCKLDQ,
-    PUNPCKLWD,
-    PUNPCKLQDQ,
-    PUNPCKHQDQ,
-    PXOR,
-    RCPPS,
-    RSM,
-    RSQRTPS,
-    SHLD,
-    SHUFPD,
-    SHUFPS,
-    SLHD,
-    SQRTPS,
-    SQRTPD,
-    SUBPS,
-    SUBPD,
-    SYSENTER,
-    SYSEXIT,
-    UCOMISD,
-    UCOMISS,
-    VMREAD,
-    VMWRITE,
-    XORPS,
-    XORPD,
-
-    VMOVDDUP,
-    VPSHUFLW,
-    VPSHUFHW,
-    VHADDPS,
-    VHSUBPS,
-    VADDSUBPS,
-    VCVTPD2DQ,
-    VLDDQU,
-
-    VCOMISD,
-    VCOMISS,
-    VUCOMISD,
-    VUCOMISS,
-    VADDPD,
-    VADDPS,
-    VADDSD,
-    VADDSS,
-    VADDSUBPD,
-    VAESDEC,
-    VAESDECLAST,
-    VAESENC,
-    VAESENCLAST,
-    VAESIMC,
-    VAESKEYGENASSIST,
-    VBLENDPD,
-    VBLENDPS,
-    VBLENDVPD,
-    VBLENDVPS,
-    VBROADCASTF128,
-    VBROADCASTI128,
-    VBROADCASTSD,
-    VBROADCASTSS,
-    VCMPSD,
-    VCMPSS,
-    VCMPPD,
-    VCMPPS,
-    VCVTDQ2PD,
-    VCVTDQ2PS,
-    VCVTPD2PS,
-    VCVTPH2PS,
-    VCVTPS2DQ,
-    VCVTPS2PD,
-    VCVTSS2SD,
-    VCVTSI2SS,
-    VCVTSI2SD,
-    VCVTSD2SI,
-    VCVTSD2SS,
-    VCVTPS2PH,
-    VCVTSS2SI,
-    VCVTTPD2DQ,
-    VCVTTPS2DQ,
-    VCVTTSS2SI,
-    VCVTTSD2SI,
-    VDIVPD,
-    VDIVPS,
-    VDIVSD,
-    VDIVSS,
-    VDPPD,
-    VDPPS,
-    VEXTRACTF128,
-    VEXTRACTI128,
-    VEXTRACTPS,
-    VFMADD132PD,
-    VFMADD132PS,
-    VFMADD132SD,
-    VFMADD132SS,
-    VFMADD213PD,
-    VFMADD213PS,
-    VFMADD213SD,
-    VFMADD213SS,
-    VFMADD231PD,
-    VFMADD231PS,
-    VFMADD231SD,
-    VFMADD231SS,
-    VFMADDSUB132PD,
-    VFMADDSUB132PS,
-    VFMADDSUB213PD,
-    VFMADDSUB213PS,
-    VFMADDSUB231PD,
-    VFMADDSUB231PS,
-    VFMSUB132PD,
-    VFMSUB132PS,
-    VFMSUB132SD,
-    VFMSUB132SS,
-    VFMSUB213PD,
-    VFMSUB213PS,
-    VFMSUB213SD,
-    VFMSUB213SS,
-    VFMSUB231PD,
-    VFMSUB231PS,
-    VFMSUB231SD,
-    VFMSUB231SS,
-    VFMSUBADD132PD,
-    VFMSUBADD132PS,
-    VFMSUBADD213PD,
-    VFMSUBADD213PS,
-    VFMSUBADD231PD,
-    VFMSUBADD231PS,
-    VFNMADD132PD,
-    VFNMADD132PS,
-    VFNMADD132SD,
-    VFNMADD132SS,
-    VFNMADD213PD,
-    VFNMADD213PS,
-    VFNMADD213SD,
-    VFNMADD213SS,
-    VFNMADD231PD,
-    VFNMADD231PS,
-    VFNMADD231SD,
-    VFNMADD231SS,
-    VFNMSUB132PD,
-    VFNMSUB132PS,
-    VFNMSUB132SD,
-    VFNMSUB132SS,
-    VFNMSUB213PD,
-    VFNMSUB213PS,
-    VFNMSUB213SD,
-    VFNMSUB213SS,
-    VFNMSUB231PD,
-    VFNMSUB231PS,
-    VFNMSUB231SD,
-    VFNMSUB231SS,
-    VGATHERDPD,
-    VGATHERDPS,
-    VGATHERQPD,
-    VGATHERQPS,
-    VHADDPD,
-    VHSUBPD,
-    VINSERTF128,
-    VINSERTI128,
-    VINSERTPS,
-    VMASKMOVDQU,
-    VMASKMOVPD,
-    VMASKMOVPS,
-    VMAXPD,
-    VMAXPS,
-    VMAXSD,
-    VMAXSS,
-    VMINPD,
-    VMINPS,
-    VMINSD,
-    VMINSS,
-    VMOVAPD,
-    VMOVAPS,
-    VMOVD,
-    VMOVDQA,
-    VMOVDQU,
-    VMOVHLPS,
-    VMOVHPD,
-    VMOVHPS,
-    VMOVLHPS,
-    VMOVLPD,
-    VMOVLPS,
-    VMOVMSKPD,
-    VMOVMSKPS,
-    VMOVNTDQ,
-    VMOVNTDQA,
-    VMOVNTPD,
-    VMOVNTPS,
-    VMOVQ,
-    VMOVSS,
-    VMOVSD,
-    VMOVSHDUP,
-    VMOVSLDUP,
-    VMOVUPD,
-    VMOVUPS,
-    VMPSADBW,
-    VMULPD,
-    VMULPS,
-    VMULSD,
-    VMULSS,
-    VPABSB,
-    VPABSD,
-    VPABSW,
-    VPACKSSDW,
-    VPACKUSDW,
-    VPACKSSWB,
-    VPACKUSWB,
-    VPADDB,
-    VPADDD,
-    VPADDQ,
-    VPADDSB,
-    VPADDSW,
-    VPADDUSB,
-    VPADDUSW,
-    VPADDW,
-    VPALIGNR,
-    VANDPD,
-    VANDPS,
-    VORPD,
-    VORPS,
-    VANDNPD,
-    VANDNPS,
-    VPAND,
-    VPANDN,
-    VPAVGB,
-    VPAVGW,
-    VPBLENDD,
-    VPBLENDVB,
-    VPBLENDW,
-    VPBROADCASTB,
-    VPBROADCASTD,
-    VPBROADCASTQ,
-    VPBROADCASTW,
-    VPCLMULQDQ,
-    VPCMPEQB,
-    VPCMPEQD,
-    VPCMPEQQ,
-    VPCMPEQW,
-    VPCMPGTB,
-    VPCMPGTD,
-    VPCMPGTQ,
-    VPCMPGTW,
-    VPCMPESTRI,
-    VPCMPESTRM,
-    VPCMPISTRI,
-    VPCMPISTRM,
-    VPERM2F128,
-    VPERM2I128,
-    VPERMD,
-    VPERMILPD,
-    VPERMILPS,
-    VPERMPD,
-    VPERMPS,
-    VPERMQ,
-    VPEXTRB,
-    VPEXTRD,
-    VPEXTRQ,
-    VPEXTRW,
-    VPGATHERDD,
-    VPGATHERDQ,
-    VPGATHERQD,
-    VPGATHERQQ,
-    VPHADDD,
-    VPHADDSW,
-    VPHADDW,
-    VPMADDUBSW,
-    VPHMINPOSUW,
-    VPHSUBD,
-    VPHSUBSW,
-    VPHSUBW,
-    VPINSRB,
-    VPINSRD,
-    VPINSRQ,
-    VPINSRW,
-    VPMADDWD,
-    VPMASKMOVD,
-    VPMASKMOVQ,
-    VPMAXSB,
-    VPMAXSD,
-    VPMAXSW,
-    VPMAXUB,
-    VPMAXUW,
-    VPMAXUD,
-    VPMINSB,
-    VPMINSW,
-    VPMINSD,
-    VPMINUB,
-    VPMINUW,
-    VPMINUD,
-    VPMOVMSKB,
-    VPMOVSXBD,
-    VPMOVSXBQ,
-    VPMOVSXBW,
-    VPMOVSXDQ,
-    VPMOVSXWD,
-    VPMOVSXWQ,
-    VPMOVZXBD,
-    VPMOVZXBQ,
-    VPMOVZXBW,
-    VPMOVZXDQ,
-    VPMOVZXWD,
-    VPMOVZXWQ,
-    VPMULDQ,
-    VPMULHRSW,
-    VPMULHUW,
-    VPMULHW,
-    VPMULLQ,
-    VPMULLD,
-    VPMULLW,
-    VPMULUDQ,
-    VPOR,
-    VPSADBW,
-    VPSHUFB,
-    VPSHUFD,
-    VPSIGNB,
-    VPSIGND,
-    VPSIGNW,
-    VPSLLD,
-    VPSLLDQ,
-    VPSLLQ,
-    VPSLLVD,
-    VPSLLVQ,
-    VPSLLW,
-    VPSRAD,
-    VPSRAVD,
-    VPSRAW,
-    VPSRLD,
-    VPSRLDQ,
-    VPSRLQ,
-    VPSRLVD,
-    VPSRLVQ,
-    VPSRLW,
-    VPSUBB,
-    VPSUBD,
-    VPSUBQ,
-    VPSUBSB,
-    VPSUBSW,
-    VPSUBUSB,
-    VPSUBUSW,
-    VPSUBW,
-    VPTEST,
-    VPUNPCKHBW,
-    VPUNPCKHDQ,
-    VPUNPCKHQDQ,
-    VPUNPCKHWD,
-    VPUNPCKLBW,
-    VPUNPCKLDQ,
-    VPUNPCKLQDQ,
-    VPUNPCKLWD,
-    VPXOR,
-    VRCPPS,
-    VROUNDPD,
-    VROUNDPS,
-    VROUNDSD,
-    VROUNDSS,
-    VRSQRTPS,
-    VRSQRTSS,
-    VRCPSS,
-    VSHUFPD,
-    VSHUFPS,
-    VSQRTPD,
-    VSQRTPS,
-    VSQRTSS,
-    VSQRTSD,
-    VSUBPD,
-    VSUBPS,
-    VSUBSD,
-    VSUBSS,
-    VTESTPD,
-    VTESTPS,
-    VUNPCKHPD,
-    VUNPCKHPS,
-    VUNPCKLPD,
-    VUNPCKLPS,
-    VXORPD,
-    VXORPS,
-    VZEROUPPER,
-    VZEROALL,
-    VLDMXCSR,
-    VSTMXCSR,
-
-    PCLMULQDQ,
-    AESKEYGENASSIST,
-    AESIMC,
-    AESENC,
-    AESENCLAST,
-    AESDEC,
-    AESDECLAST,
-    PCMPGTQ,
-    PCMPISTRM,
-    PCMPISTRI,
-    PCMPESTRI,
-    PACKUSDW,
-    PCMPESTRM,
-    PCMPEQQ,
-    PTEST,
-    PHMINPOSUW,
-    DPPS,
-    DPPD,
-    MPSADBW,
-    PMOVZXDQ,
-    PMOVSXDQ,
-    PMOVZXBD,
-    PMOVSXBD,
-    PMOVZXWQ,
-    PMOVSXWQ,
-    PMOVZXBQ,
-    PMOVSXBQ,
-    PMOVSXWD,
-    PMOVZXWD,
-    PEXTRQ,
-    PEXTRD,
-    PEXTRW,
-    PEXTRB,
-    PMOVSXBW,
-    PMOVZXBW,
-    PINSRQ,
-    PINSRD,
-    PINSRB,
-    EXTRACTPS,
-    INSERTPS,
-    ROUNDSS,
-    ROUNDSD,
-    ROUNDPS,
-    ROUNDPD,
-    PMAXSB,
-    PMAXSD,
-    PMAXUW,
-    PMAXUD,
-    PMINSD,
-    PMINSB,
-    PMINUD,
-    PMINUW,
-    BLENDW,
-    PBLENDVB,
-    PBLENDW,
-    BLENDVPS,
-    BLENDVPD,
-    BLENDPS,
-    BLENDPD,
-    PMULDQ,
-    MOVNTDQA,
-    PMULLD,
-    PALIGNR,
-    PSIGNW,
-    PSIGND,
-    PSIGNB,
-    PSHUFB,
-    PMULHRSW,
-    PMADDUBSW,
-    PABSD,
-    PABSW,
-    PABSB,
-    PHSUBSW,
-    PHSUBW,
-    PHSUBD,
-    PHADDD,
-    PHADDSW,
-    PHADDW,
-    HSUBPD,
-    HADDPD,
-
-    SHA1RNDS4,
-    SHA1NEXTE,
-    SHA1MSG1,
-    SHA1MSG2,
-    SHA256RNDS2,
-    SHA256MSG1,
-    SHA256MSG2,
-
-    LZCNT,
-    CLGI,
-    STGI,
-    SKINIT,
-    VMLOAD,
-    VMMCALL,
-    VMSAVE,
-    VMRUN,
-    INVLPGA,
-    INVLPGB,
-    TLBSYNC,
-
-    MOVBE,
-
-    ADCX,
-    ADOX,
-
-    PREFETCHW,
-
-    RDPID,
-    CMPXCHG8B,
-    CMPXCHG16B,
-    VMPTRLD,
-    VMPTRST,
-
-    BZHI,
-    MULX,
-    SHLX,
-    SHRX,
-    SARX,
-    PDEP,
-    PEXT,
-    RORX,
-    XRSTORS,
-    XRSTORS64,
-    XSAVEC,
-    XSAVEC64,
-    XSAVES,
-    XSAVES64,
-
-    RDFSBASE,
-    RDGSBASE,
-    WRFSBASE,
-    WRGSBASE,
-
-    CRC32,
-    SALC,
-    XLAT,
-
-    F2XM1,
-    FABS,
-    FADD,
-    FADDP,
-    FBLD,
-    FBSTP,
-    FCHS,
-    FCMOVB,
-    FCMOVBE,
-    FCMOVE,
-    FCMOVNB,
-    FCMOVNBE,
-    FCMOVNE,
-    FCMOVNU,
-    FCMOVU,
-    FCOM,
-    FCOMI,
-    FCOMIP,
-    FCOMP,
-    FCOMPP,
-    FCOS,
-    FDECSTP,
-    FDISI8087_NOP,
-    FDIV,
-    FDIVP,
-    FDIVR,
-    FDIVRP,
-    FENI8087_NOP,
-    FFREE,
-    FFREEP,
-    FIADD,
-    FICOM,
-    FICOMP,
-    FIDIV,
-    FIDIVR,
-    FILD,
-    FIMUL,
-    FINCSTP,
-    FIST,
-    FISTP,
-    FISTTP,
-    FISUB,
-    FISUBR,
-    FLD,
-    FLD1,
-    FLDCW,
-    FLDENV,
-    FLDL2E,
-    FLDL2T,
-    FLDLG2,
-    FLDLN2,
-    FLDPI,
-    FLDZ,
-    FMUL,
-    FMULP,
-    FNCLEX,
-    FNINIT,
-    FNOP,
-    FNSAVE,
-    FNSTCW,
-    FNSTENV,
-    FNSTOR,
-    FNSTSW,
-    FPATAN,
-    FPREM,
-    FPREM1,
-    FPTAN,
-    FRNDINT,
-    FRSTOR,
-    FSCALE,
-    FSETPM287_NOP,
-    FSIN,
-    FSINCOS,
-    FSQRT,
-    FST,
-    FSTP,
-    FSTPNCE,
-    FSUB,
-    FSUBP,
-    FSUBR,
-    FSUBRP,
-    FTST,
-    FUCOM,
-    FUCOMI,
-    FUCOMIP,
-    FUCOMP,
-    FUCOMPP,
-    FXAM,
-    FXCH,
-    FXTRACT,
-    FYL2X,
-    FYL2XP1,
-
-    LOOPNZ,
-    LOOPZ,
-    LOOP,
-    JECXZ,
-
-    PUSHA,
-    POPA,
-    BOUND,
-    ARPL,
-    AAS,
-    AAA,
-    DAS,
-    DAA,
-    AAM,
-    AAD,
-
-    // started shipping in Tremont, 2020 sept 23
-    MOVDIR64B,
-    MOVDIRI,
-
-    // started shipping in Tiger Lake, 2020 sept 2
-    AESDEC128KL,
-    AESDEC256KL,
-    AESDECWIDE128KL,
-    AESDECWIDE256KL,
-    AESENC128KL,
-    AESENC256KL,
-    AESENCWIDE128KL,
-    AESENCWIDE256KL,
-    ENCODEKEY128,
-    ENCODEKEY256,
-    LOADIWKEY,
-
-    // unsure
-    HRESET,
-
-    // 3dnow
-    FEMMS,
-    PI2FW,
-    PI2FD,
-    PF2IW,
-    PF2ID,
-    PMULHRW,
-    PFCMPGE,
-    PFMIN,
-    PFRCP,
-    PFRSQRT,
-    PFSUB,
-    PFADD,
-    PFCMPGT,
-    PFMAX,
-    PFRCPIT1,
-    PFRSQIT1,
-    PFSUBR,
-    PFACC,
-    PFCMPEQ,
-    PFMUL,
-    PFMULHRW,
-    PFRCPIT2,
-    PFNACC,
-    PFPNACC,
-    PSWAPD,
-    PAVGUSB,
-
-    // ENQCMD
-    ENQCMD,
-    ENQCMDS,
-
-    // INVPCID
-    INVEPT,
-    INVVPID,
-    INVPCID,
-
-    // PTWRITE
-    PTWRITE,
-
-    // GFNI
-    GF2P8AFFINEQB,
-    GF2P8AFFINEINVQB,
-    GF2P8MULB,
-
-    // CET
-    WRUSS,
-    WRSS,
-    INCSSP,
-    SAVEPREVSSP,
-    SETSSBSY,
-    CLRSSBSY,
-    RSTORSSP,
-    ENDBR64,
-    ENDBR32,
-
-    // TDX
-    TDCALL,
-    SEAMRET,
-    SEAMOPS,
-    SEAMCALL,
-
-    // WAITPKG
-    TPAUSE,
-    UMONITOR,
-    UMWAIT,
-
-    // UINTR
-    UIRET,
-    TESTUI,
-    CLUI,
-    STUI,
-    SENDUIPI,
-
-    // TSXLDTRK
-    XSUSLDTRK,
-    XRESLDTRK,
-
-    // AVX512F
-    VALIGND,
-    VALIGNQ,
-    VBLENDMPD,
-    VBLENDMPS,
-    VCOMPRESSPD,
-    VCOMPRESSPS,
-    VCVTPD2UDQ,
-    VCVTTPD2UDQ,
-    VCVTPS2UDQ,
-    VCVTTPS2UDQ,
-    VCVTQQ2PD,
-    VCVTQQ2PS,
-    VCVTSD2USI,
-    VCVTTSD2USI,
-    VCVTSS2USI,
-    VCVTTSS2USI,
-    VCVTUDQ2PD,
-    VCVTUDQ2PS,
-    VCVTUSI2USD,
-    VCVTUSI2USS,
-    VEXPANDPD,
-    VEXPANDPS,
-    VEXTRACTF32X4,
-    VEXTRACTF64X4,
-    VEXTRACTI32X4,
-    VEXTRACTI64X4,
-    VFIXUPIMMPD,
-    VFIXUPIMMPS,
-    VFIXUPIMMSD,
-    VFIXUPIMMSS,
-    VGETEXPPD,
-    VGETEXPPS,
-    VGETEXPSD,
-    VGETEXPSS,
-    VGETMANTPD,
-    VGETMANTPS,
-    VGETMANTSD,
-    VGETMANTSS,
-    VINSERTF32X4,
-    VINSERTF64X4,
-    VINSERTI64X4,
-    VMOVDQA32,
-    VMOVDQA64,
-    VMOVDQU32,
-    VMOVDQU64,
-    VPBLENDMD,
-    VPBLENDMQ,
-    VPCMPD,
-    VPCMPUD,
-    VPCMPQ,
-    VPCMPUQ,
-    VPCOMPRESSQ,
-    VPCOMPRESSD,
-    VPERMI2D,
-    VPERMI2Q,
-    VPERMI2PD,
-    VPERMI2PS,
-    VPERMT2D,
-    VPERMT2Q,
-    VPERMT2PD,
-    VPERMT2PS,
-    VPMAXSQ,
-    VPMAXUQ,
-    VPMINSQ,
-    VPMINUQ,
-    VPMOVSQB,
-    VPMOVUSQB,
-    VPMOVSQW,
-    VPMOVUSQW,
-    VPMOVSQD,
-    VPMOVUSQD,
-    VPMOVSDB,
-    VPMOVUSDB,
-    VPMOVSDW,
-    VPMOVUSDW,
-    VPROLD,
-    VPROLQ,
-    VPROLVD,
-    VPROLVQ,
-    VPRORD,
-    VPRORQ,
-    VPRORRD,
-    VPRORRQ,
-    VPSCATTERDD,
-    VPSCATTERDQ,
-    VPSCATTERQD,
-    VPSCATTERQQ,
-    VPSRAQ,
-    VPSRAVQ,
-    VPTESTNMD,
-    VPTESTNMQ,
-    VPTERNLOGD,
-    VPTERNLOGQ,
-    VPTESTMD,
-    VPTESTMQ,
-    VRCP14PD,
-    VRCP14PS,
-    VRCP14SD,
-    VRCP14SS,
-    VRNDSCALEPD,
-    VRNDSCALEPS,
-    VRNDSCALESD,
-    VRNDSCALESS,
-    VRSQRT14PD,
-    VRSQRT14PS,
-    VRSQRT14SD,
-    VRSQRT14SS,
-    VSCALEDPD,
-    VSCALEDPS,
-    VSCALEDSD,
-    VSCALEDSS,
-    VSCATTERDD,
-    VSCATTERDQ,
-    VSCATTERQD,
-    VSCATTERQQ,
-    VSHUFF32X4,
-    VSHUFF64X2,
-    VSHUFI32X4,
-    VSHUFI64X2,
-
-    // AVX512DQ
-    VCVTTPD2QQ,
-    VCVTPD2QQ,
-    VCVTTPD2UQQ,
-    VCVTPD2UQQ,
-    VCVTTPS2QQ,
-    VCVTPS2QQ,
-    VCVTTPS2UQQ,
-    VCVTPS2UQQ,
-    VCVTUQQ2PD,
-    VCVTUQQ2PS,
-    VEXTRACTF64X2,
-    VEXTRACTI64X2,
-    VFPCLASSPD,
-    VFPCLASSPS,
-    VFPCLASSSD,
-    VFPCLASSSS,
-    VINSERTF64X2,
-    VINSERTI64X2,
-    VPMOVM2D,
-    VPMOVM2Q,
-    VPMOVB2D,
-    VPMOVQ2M,
-    VRANGEPD,
-    VRANGEPS,
-    VRANGESD,
-    VRANGESS,
-    VREDUCEPD,
-    VREDUCEPS,
-    VREDUCESD,
-    VREDUCESS,
-
-    // AVX512BW
-    VDBPSADBW,
-    VMOVDQU8,
-    VMOVDQU16,
-    VPBLENDMB,
-    VPBLENDMW,
-    VPCMPB,
-    VPCMPUB,
-    VPCMPW,
-    VPCMPUW,
-    VPERMW,
-    VPERMI2B,
-    VPERMI2W,
-    VPMOVM2B,
-    VPMOVM2W,
-    VPMOVB2M,
-    VPMOVW2M,
-    VPMOVSWB,
-    VPMOVUSWB,
-    VPSLLVW,
-    VPSRAVW,
-    VPSRLVW,
-    VPTESTNMB,
-    VPTESTNMW,
-    VPTESTMB,
-    VPTESTMW,
-
-    // AVX512CD
-    VPBROADCASTM,
-    VPCONFLICTD,
-    VPCONFLICTQ,
-    VPLZCNTD,
-    VPLZCNTQ,
-
-    KUNPCKBW,
-    KUNPCKWD,
-    KUNPCKDQ,
-
-    KADDB,
-    KANDB,
-    KANDNB,
-    KMOVB,
-    KNOTB,
-    KORB,
-    KORTESTB,
-    KSHIFTLB,
-    KSHIFTRB,
-    KTESTB,
-    KXNORB,
-    KXORB,
-    KADDW,
-    KANDW,
-    KANDNW,
-    KMOVW,
-    KNOTW,
-    KORW,
-    KORTESTW,
-    KSHIFTLW,
-    KSHIFTRW,
-    KTESTW,
-    KXNORW,
-    KXORW,
-    KADDD,
-    KANDD,
-    KANDND,
-    KMOVD,
-    KNOTD,
-    KORD,
-    KORTESTD,
-    KSHIFTLD,
-    KSHIFTRD,
-    KTESTD,
-    KXNORD,
-    KXORD,
-    KADDQ,
-    KANDQ,
-    KANDNQ,
-    KMOVQ,
-    KNOTQ,
-    KORQ,
-    KORTESTQ,
-    KSHIFTLQ,
-    KSHIFTRQ,
-    KTESTQ,
-    KXNORQ,
-    KXORQ,
-
-    // AVX512ER
-    VEXP2PD,
-    VEXP2PS,
-    VEXP2SD,
-    VEXP2SS,
-    VRCP28PD,
-    VRCP28PS,
-    VRCP28SD,
-    VRCP28SS,
-    VRSQRT28PD,
-    VRSQRT28PS,
-    VRSQRT28SD,
-    VRSQRT28SS,
-
-    // AVX512PF
-    VGATHERPF0DPD,
-    VGATHERPF0DPS,
-    VGATHERPF0QPD,
-    VGATHERPF0QPS,
-    VGATHERPF1DPD,
-    VGATHERPF1DPS,
-    VGATHERPF1QPD,
-    VGATHERPF1QPS,
-    VSCATTERPF0DPD,
-    VSCATTERPF0DPS,
-    VSCATTERPF0QPD,
-    VSCATTERPF0QPS,
-    VSCATTERPF1DPD,
-    VSCATTERPF1DPS,
-    VSCATTERPF1QPD,
-    VSCATTERPF1QPS,
-
-    // MPX
-    BNDMK,
-    BNDCL,
-    BNDCU,
-    BNDCN,
-    BNDMOV,
-    BNDLDX,
-    BNDSTX,
-
-    VGF2P8AFFINEQB,
-    VGF2P8AFFINEINVQB,
-    VPSHRDQ,
-    VPSHRDD,
-    VPSHRDW,
-    VPSHLDQ,
-    VPSHLDD,
-    VPSHLDW,
-    VBROADCASTF32X8,
-    VBROADCASTF64X4,
-    VBROADCASTF32X4,
-    VBROADCASTF64X2,
-    VBROADCASTF32X2,
-    VBROADCASTI32X8,
-    VBROADCASTI64X4,
-    VBROADCASTI32X4,
-    VBROADCASTI64X2,
-    VBROADCASTI32X2,
-    VEXTRACTI32X8,
-    VEXTRACTF32X8,
-    VINSERTI32X8,
-    VINSERTF32X8,
-    VINSERTI32X4,
-    V4FNMADDSS,
-    V4FNMADDPS,
-    VCVTNEPS2BF16,
-    V4FMADDSS,
-    V4FMADDPS,
-    VCVTNE2PS2BF16,
-    VP2INTERSECTD,
-    VP2INTERSECTQ,
-    VP4DPWSSDS,
-    VP4DPWSSD,
-    VPDPWSSDS,
-    VPDPWSSD,
-    VPDPBUSDS,
-    VDPBF16PS,
-    VPBROADCASTMW2D,
-    VPBROADCASTMB2Q,
-    VPMOVD2M,
-    VPMOVQD,
-    VPMOVWB,
-    VPMOVDB,
-    VPMOVDW,
-    VPMOVQB,
-    VPMOVQW,
-    VGF2P8MULB,
-    VPMADD52HUQ,
-    VPMADD52LUQ,
-    VPSHUFBITQMB,
-    VPERMB,
-    VPEXPANDD,
-    VPEXPANDQ,
-    VPABSQ,
-    VPRORVD,
-    VPRORVQ,
-    VPMULTISHIFTQB,
-    VPERMT2B,
-    VPERMT2W,
-    VPSHRDVQ,
-    VPSHRDVD,
-    VPSHRDVW,
-    VPSHLDVQ,
-    VPSHLDVD,
-    VPSHLDVW,
-    VPCOMPRESSB,
-    VPCOMPRESSW,
-    VPEXPANDB,
-    VPEXPANDW,
-    VPOPCNTD,
-    VPOPCNTQ,
-    VPOPCNTB,
-    VPOPCNTW,
-    VSCALEFSS,
-    VSCALEFSD,
-    VSCALEFPS,
-    VSCALEFPD,
-    VPDPBUSD,
-    VCVTUSI2SD,
-    VCVTUSI2SS,
-    VPXORD,
-    VPXORQ,
-    VPORD,
-    VPORQ,
-    VPANDND,
-    VPANDNQ,
-    VPANDD,
-    VPANDQ,
-
-    PSMASH,
-    PVALIDATE,
-    RMPADJUST,
-    RMPUPDATE,
-}
-
 impl PartialEq for Instruction {
     fn eq(&self, other: &Self) -> bool {
         if self.prefixes != other.prefixes {
@@ -2544,7 +1051,7 @@ pub struct Instruction {
     operands: [OperandSpec; 4],
     imm: u32,
     disp: u32,
-    opcode: Opcode,
+    pub(crate) opcode: Opcode,
     mem_size: u8,
 }
 
@@ -3431,666 +1938,6 @@ impl InstDecoder {
         self.flags |= 1 << 63;
         self
     }
-
-    /// Optionally reject or reinterpret instruction according to the decoder's
-    /// declared extensions.
-    fn revise_instruction(&self, inst: &mut Instruction) -> Result<(), DecodeError> {
-        if inst.prefixes.evex().is_some() {
-            if !self.avx512() {
-                return Err(DecodeError::InvalidOpcode);
-            } else {
-                return Ok(());
-            }
-        }
-        match inst.opcode {
-            Opcode::TZCNT => {
-                if !self.bmi1() {
-                    // tzcnt is only supported if bmi1 is enabled. without bmi1, this decodes as
-                    // bsf.
-                    inst.opcode = Opcode::BSF;
-                }
-            }
-            Opcode::LDDQU |
-            Opcode::ADDSUBPS |
-            Opcode::ADDSUBPD |
-            Opcode::HADDPS |
-            Opcode::HSUBPS |
-            Opcode::HADDPD |
-            Opcode::HSUBPD |
-            Opcode::MOVSHDUP |
-            Opcode::MOVSLDUP |
-            Opcode::MOVDDUP |
-            Opcode::MONITOR |
-            Opcode::MWAIT => {
-                // via Intel section 5.7, SSE3 Instructions
-                if !self.sse3() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::PHADDW |
-            Opcode::PHADDSW |
-            Opcode::PHADDD |
-            Opcode::PHSUBW |
-            Opcode::PHSUBSW |
-            Opcode::PHSUBD |
-            Opcode::PABSB |
-            Opcode::PABSW |
-            Opcode::PABSD |
-            Opcode::PMADDUBSW |
-            Opcode::PMULHRSW |
-            Opcode::PSHUFB |
-            Opcode::PSIGNB |
-            Opcode::PSIGNW |
-            Opcode::PSIGND |
-            Opcode::PALIGNR => {
-                // via Intel section 5.8, SSSE3 Instructions
-                if !self.ssse3() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::PMULLD |
-            Opcode::PMULDQ |
-            Opcode::MOVNTDQA |
-            Opcode::BLENDPD |
-            Opcode::BLENDPS |
-            Opcode::BLENDVPD |
-            Opcode::BLENDVPS |
-            Opcode::PBLENDVB |
-            Opcode::BLENDW |
-            Opcode::PMINUW |
-            Opcode::PMINUD |
-            Opcode::PMINSB |
-            Opcode::PMINSD |
-            Opcode::PMAXUW |
-            Opcode::PMAXUD |
-            Opcode::PMAXSB |
-            Opcode::PMAXSD |
-            Opcode::ROUNDPS |
-            Opcode::ROUNDPD |
-            Opcode::ROUNDSS |
-            Opcode::ROUNDSD |
-            Opcode::PBLENDW |
-            Opcode::EXTRACTPS |
-            Opcode::INSERTPS |
-            Opcode::PINSRB |
-            Opcode::PINSRD |
-            Opcode::PINSRQ |
-            Opcode::PMOVSXBW |
-            Opcode::PMOVZXBW |
-            Opcode::PMOVSXBD |
-            Opcode::PMOVZXBD |
-            Opcode::PMOVSXWD |
-            Opcode::PMOVZXWD |
-            Opcode::PMOVSXBQ |
-            Opcode::PMOVZXBQ |
-            Opcode::PMOVSXWQ |
-            Opcode::PMOVZXWQ |
-            Opcode::PMOVSXDQ |
-            Opcode::PMOVZXDQ |
-            Opcode::DPPS |
-            Opcode::DPPD |
-            Opcode::MPSADBW |
-            Opcode::PHMINPOSUW |
-            Opcode::PTEST |
-            Opcode::PCMPEQQ |
-            Opcode::PEXTRB |
-            Opcode::PEXTRW |
-            Opcode::PEXTRD |
-            Opcode::PEXTRQ |
-            Opcode::PACKUSDW => {
-                // via Intel section 5.10, SSE4.1 Instructions
-                if !self.sse4_1() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::EXTRQ |
-            Opcode::INSERTQ |
-            Opcode::MOVNTSS |
-            Opcode::MOVNTSD => {
-                if !self.sse4a() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::CRC32 |
-            Opcode::PCMPESTRI |
-            Opcode::PCMPESTRM |
-            Opcode::PCMPISTRI |
-            Opcode::PCMPISTRM |
-            Opcode::PCMPGTQ => {
-                // via Intel section 5.11, SSE4.2 Instructions
-                if !self.sse4_2() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::AESDEC |
-            Opcode::AESDECLAST |
-            Opcode::AESENC |
-            Opcode::AESENCLAST |
-            Opcode::AESIMC |
-            Opcode::AESKEYGENASSIST => {
-                // via Intel section 5.12. AESNI AND PCLMULQDQ
-                if !self.aesni() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::PCLMULQDQ => {
-                // via Intel section 5.12. AESNI AND PCLMULQDQ
-                if !self.pclmulqdq() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::XABORT |
-            Opcode::XBEGIN |
-            Opcode::XEND |
-            Opcode::XTEST => {
-                if !self.tsx() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::SHA1MSG1 |
-            Opcode::SHA1MSG2 |
-            Opcode::SHA1NEXTE |
-            Opcode::SHA1RNDS4 |
-            Opcode::SHA256MSG1 |
-            Opcode::SHA256MSG2 |
-            Opcode::SHA256RNDS2 => {
-                if !self.sha() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::ENCLV |
-            Opcode::ENCLS |
-            Opcode::ENCLU => {
-                if !self.sgx() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            // AVX...
-            Opcode::VMOVDDUP |
-            Opcode::VPSHUFLW |
-            Opcode::VPSHUFHW |
-            Opcode::VHADDPS |
-            Opcode::VHSUBPS |
-            Opcode::VADDSUBPS |
-            Opcode::VCVTPD2DQ |
-            Opcode::VLDDQU |
-            Opcode::VCOMISD |
-            Opcode::VCOMISS |
-            Opcode::VUCOMISD |
-            Opcode::VUCOMISS |
-            Opcode::VADDPD |
-            Opcode::VADDPS |
-            Opcode::VADDSD |
-            Opcode::VADDSS |
-            Opcode::VADDSUBPD |
-            Opcode::VBLENDPD |
-            Opcode::VBLENDPS |
-            Opcode::VBLENDVPD |
-            Opcode::VBLENDVPS |
-            Opcode::VBROADCASTF128 |
-            Opcode::VBROADCASTI128 |
-            Opcode::VBROADCASTSD |
-            Opcode::VBROADCASTSS |
-            Opcode::VCMPSD |
-            Opcode::VCMPSS |
-            Opcode::VCMPPD |
-            Opcode::VCMPPS |
-            Opcode::VCVTDQ2PD |
-            Opcode::VCVTDQ2PS |
-            Opcode::VCVTPD2PS |
-            Opcode::VCVTPS2DQ |
-            Opcode::VCVTPS2PD |
-            Opcode::VCVTSS2SD |
-            Opcode::VCVTSI2SS |
-            Opcode::VCVTSI2SD |
-            Opcode::VCVTSD2SI |
-            Opcode::VCVTSD2SS |
-            Opcode::VCVTSS2SI |
-            Opcode::VCVTTPD2DQ |
-            Opcode::VCVTTPS2DQ |
-            Opcode::VCVTTSS2SI |
-            Opcode::VCVTTSD2SI |
-            Opcode::VDIVPD |
-            Opcode::VDIVPS |
-            Opcode::VDIVSD |
-            Opcode::VDIVSS |
-            Opcode::VDPPD |
-            Opcode::VDPPS |
-            Opcode::VEXTRACTF128 |
-            Opcode::VEXTRACTI128 |
-            Opcode::VEXTRACTPS |
-            Opcode::VFMADD132PD |
-            Opcode::VFMADD132PS |
-            Opcode::VFMADD132SD |
-            Opcode::VFMADD132SS |
-            Opcode::VFMADD213PD |
-            Opcode::VFMADD213PS |
-            Opcode::VFMADD213SD |
-            Opcode::VFMADD213SS |
-            Opcode::VFMADD231PD |
-            Opcode::VFMADD231PS |
-            Opcode::VFMADD231SD |
-            Opcode::VFMADD231SS |
-            Opcode::VFMADDSUB132PD |
-            Opcode::VFMADDSUB132PS |
-            Opcode::VFMADDSUB213PD |
-            Opcode::VFMADDSUB213PS |
-            Opcode::VFMADDSUB231PD |
-            Opcode::VFMADDSUB231PS |
-            Opcode::VFMSUB132PD |
-            Opcode::VFMSUB132PS |
-            Opcode::VFMSUB132SD |
-            Opcode::VFMSUB132SS |
-            Opcode::VFMSUB213PD |
-            Opcode::VFMSUB213PS |
-            Opcode::VFMSUB213SD |
-            Opcode::VFMSUB213SS |
-            Opcode::VFMSUB231PD |
-            Opcode::VFMSUB231PS |
-            Opcode::VFMSUB231SD |
-            Opcode::VFMSUB231SS |
-            Opcode::VFMSUBADD132PD |
-            Opcode::VFMSUBADD132PS |
-            Opcode::VFMSUBADD213PD |
-            Opcode::VFMSUBADD213PS |
-            Opcode::VFMSUBADD231PD |
-            Opcode::VFMSUBADD231PS |
-            Opcode::VFNMADD132PD |
-            Opcode::VFNMADD132PS |
-            Opcode::VFNMADD132SD |
-            Opcode::VFNMADD132SS |
-            Opcode::VFNMADD213PD |
-            Opcode::VFNMADD213PS |
-            Opcode::VFNMADD213SD |
-            Opcode::VFNMADD213SS |
-            Opcode::VFNMADD231PD |
-            Opcode::VFNMADD231PS |
-            Opcode::VFNMADD231SD |
-            Opcode::VFNMADD231SS |
-            Opcode::VFNMSUB132PD |
-            Opcode::VFNMSUB132PS |
-            Opcode::VFNMSUB132SD |
-            Opcode::VFNMSUB132SS |
-            Opcode::VFNMSUB213PD |
-            Opcode::VFNMSUB213PS |
-            Opcode::VFNMSUB213SD |
-            Opcode::VFNMSUB213SS |
-            Opcode::VFNMSUB231PD |
-            Opcode::VFNMSUB231PS |
-            Opcode::VFNMSUB231SD |
-            Opcode::VFNMSUB231SS |
-            Opcode::VGATHERDPD |
-            Opcode::VGATHERDPS |
-            Opcode::VGATHERQPD |
-            Opcode::VGATHERQPS |
-            Opcode::VHADDPD |
-            Opcode::VHSUBPD |
-            Opcode::VINSERTF128 |
-            Opcode::VINSERTI128 |
-            Opcode::VINSERTPS |
-            Opcode::VMASKMOVDQU |
-            Opcode::VMASKMOVPD |
-            Opcode::VMASKMOVPS |
-            Opcode::VMAXPD |
-            Opcode::VMAXPS |
-            Opcode::VMAXSD |
-            Opcode::VMAXSS |
-            Opcode::VMINPD |
-            Opcode::VMINPS |
-            Opcode::VMINSD |
-            Opcode::VMINSS |
-            Opcode::VMOVAPD |
-            Opcode::VMOVAPS |
-            Opcode::VMOVD |
-            Opcode::VMOVDQA |
-            Opcode::VMOVDQU |
-            Opcode::VMOVHLPS |
-            Opcode::VMOVHPD |
-            Opcode::VMOVHPS |
-            Opcode::VMOVLHPS |
-            Opcode::VMOVLPD |
-            Opcode::VMOVLPS |
-            Opcode::VMOVMSKPD |
-            Opcode::VMOVMSKPS |
-            Opcode::VMOVNTDQ |
-            Opcode::VMOVNTDQA |
-            Opcode::VMOVNTPD |
-            Opcode::VMOVNTPS |
-            Opcode::VMOVQ |
-            Opcode::VMOVSS |
-            Opcode::VMOVSD |
-            Opcode::VMOVSHDUP |
-            Opcode::VMOVSLDUP |
-            Opcode::VMOVUPD |
-            Opcode::VMOVUPS |
-            Opcode::VMPSADBW |
-            Opcode::VMULPD |
-            Opcode::VMULPS |
-            Opcode::VMULSD |
-            Opcode::VMULSS |
-            Opcode::VPABSB |
-            Opcode::VPABSD |
-            Opcode::VPABSW |
-            Opcode::VPACKSSDW |
-            Opcode::VPACKUSDW |
-            Opcode::VPACKSSWB |
-            Opcode::VPACKUSWB |
-            Opcode::VPADDB |
-            Opcode::VPADDD |
-            Opcode::VPADDQ |
-            Opcode::VPADDSB |
-            Opcode::VPADDSW |
-            Opcode::VPADDUSB |
-            Opcode::VPADDUSW |
-            Opcode::VPADDW |
-            Opcode::VPALIGNR |
-            Opcode::VPAND |
-            Opcode::VANDPD |
-            Opcode::VANDPS |
-            Opcode::VANDNPD |
-            Opcode::VANDNPS |
-            Opcode::VORPD |
-            Opcode::VORPS |
-            Opcode::VPANDN |
-            Opcode::VPAVGB |
-            Opcode::VPAVGW |
-            Opcode::VPBLENDD |
-            Opcode::VPBLENDVB |
-            Opcode::VPBLENDW |
-            Opcode::VPBROADCASTB |
-            Opcode::VPBROADCASTD |
-            Opcode::VPBROADCASTQ |
-            Opcode::VPBROADCASTW |
-            Opcode::VPCLMULQDQ |
-            Opcode::VPCMPEQB |
-            Opcode::VPCMPEQD |
-            Opcode::VPCMPEQQ |
-            Opcode::VPCMPEQW |
-            Opcode::VPCMPGTB |
-            Opcode::VPCMPGTD |
-            Opcode::VPCMPGTQ |
-            Opcode::VPCMPGTW |
-            Opcode::VPCMPESTRI |
-            Opcode::VPCMPESTRM |
-            Opcode::VPCMPISTRI |
-            Opcode::VPCMPISTRM |
-            Opcode::VPERM2F128 |
-            Opcode::VPERM2I128 |
-            Opcode::VPERMD |
-            Opcode::VPERMILPD |
-            Opcode::VPERMILPS |
-            Opcode::VPERMPD |
-            Opcode::VPERMPS |
-            Opcode::VPERMQ |
-            Opcode::VPEXTRB |
-            Opcode::VPEXTRD |
-            Opcode::VPEXTRQ |
-            Opcode::VPEXTRW |
-            Opcode::VPGATHERDD |
-            Opcode::VPGATHERDQ |
-            Opcode::VPGATHERQD |
-            Opcode::VPGATHERQQ |
-            Opcode::VPHADDD |
-            Opcode::VPHADDSW |
-            Opcode::VPHADDW |
-            Opcode::VPMADDUBSW |
-            Opcode::VPHMINPOSUW |
-            Opcode::VPHSUBD |
-            Opcode::VPHSUBSW |
-            Opcode::VPHSUBW |
-            Opcode::VPINSRB |
-            Opcode::VPINSRD |
-            Opcode::VPINSRQ |
-            Opcode::VPINSRW |
-            Opcode::VPMADDWD |
-            Opcode::VPMASKMOVD |
-            Opcode::VPMASKMOVQ |
-            Opcode::VPMAXSB |
-            Opcode::VPMAXSD |
-            Opcode::VPMAXSW |
-            Opcode::VPMAXUB |
-            Opcode::VPMAXUW |
-            Opcode::VPMAXUD |
-            Opcode::VPMINSB |
-            Opcode::VPMINSW |
-            Opcode::VPMINSD |
-            Opcode::VPMINUB |
-            Opcode::VPMINUW |
-            Opcode::VPMINUD |
-            Opcode::VPMOVMSKB |
-            Opcode::VPMOVSXBD |
-            Opcode::VPMOVSXBQ |
-            Opcode::VPMOVSXBW |
-            Opcode::VPMOVSXDQ |
-            Opcode::VPMOVSXWD |
-            Opcode::VPMOVSXWQ |
-            Opcode::VPMOVZXBD |
-            Opcode::VPMOVZXBQ |
-            Opcode::VPMOVZXBW |
-            Opcode::VPMOVZXDQ |
-            Opcode::VPMOVZXWD |
-            Opcode::VPMOVZXWQ |
-            Opcode::VPMULDQ |
-            Opcode::VPMULHRSW |
-            Opcode::VPMULHUW |
-            Opcode::VPMULHW |
-            Opcode::VPMULLQ |
-            Opcode::VPMULLD |
-            Opcode::VPMULLW |
-            Opcode::VPMULUDQ |
-            Opcode::VPOR |
-            Opcode::VPSADBW |
-            Opcode::VPSHUFB |
-            Opcode::VPSHUFD |
-            Opcode::VPSIGNB |
-            Opcode::VPSIGND |
-            Opcode::VPSIGNW |
-            Opcode::VPSLLD |
-            Opcode::VPSLLDQ |
-            Opcode::VPSLLQ |
-            Opcode::VPSLLVD |
-            Opcode::VPSLLVQ |
-            Opcode::VPSLLW |
-            Opcode::VPSRAD |
-            Opcode::VPSRAVD |
-            Opcode::VPSRAW |
-            Opcode::VPSRLD |
-            Opcode::VPSRLDQ |
-            Opcode::VPSRLQ |
-            Opcode::VPSRLVD |
-            Opcode::VPSRLVQ |
-            Opcode::VPSRLW |
-            Opcode::VPSUBB |
-            Opcode::VPSUBD |
-            Opcode::VPSUBQ |
-            Opcode::VPSUBSB |
-            Opcode::VPSUBSW |
-            Opcode::VPSUBUSB |
-            Opcode::VPSUBUSW |
-            Opcode::VPSUBW |
-            Opcode::VPTEST |
-            Opcode::VPUNPCKHBW |
-            Opcode::VPUNPCKHDQ |
-            Opcode::VPUNPCKHQDQ |
-            Opcode::VPUNPCKHWD |
-            Opcode::VPUNPCKLBW |
-            Opcode::VPUNPCKLDQ |
-            Opcode::VPUNPCKLQDQ |
-            Opcode::VPUNPCKLWD |
-            Opcode::VPXOR |
-            Opcode::VRCPPS |
-            Opcode::VROUNDPD |
-            Opcode::VROUNDPS |
-            Opcode::VROUNDSD |
-            Opcode::VROUNDSS |
-            Opcode::VRSQRTPS |
-            Opcode::VRSQRTSS |
-            Opcode::VRCPSS |
-            Opcode::VSHUFPD |
-            Opcode::VSHUFPS |
-            Opcode::VSQRTPD |
-            Opcode::VSQRTPS |
-            Opcode::VSQRTSS |
-            Opcode::VSQRTSD |
-            Opcode::VSUBPD |
-            Opcode::VSUBPS |
-            Opcode::VSUBSD |
-            Opcode::VSUBSS |
-            Opcode::VTESTPD |
-            Opcode::VTESTPS |
-            Opcode::VUNPCKHPD |
-            Opcode::VUNPCKHPS |
-            Opcode::VUNPCKLPD |
-            Opcode::VUNPCKLPS |
-            Opcode::VXORPD |
-            Opcode::VXORPS |
-            Opcode::VZEROUPPER |
-            Opcode::VZEROALL |
-            Opcode::VLDMXCSR |
-            Opcode::VSTMXCSR => {
-                // TODO: check a table for these
-                if !self.avx() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::VAESDEC |
-            Opcode::VAESDECLAST |
-            Opcode::VAESENC |
-            Opcode::VAESENCLAST |
-            Opcode::VAESIMC |
-            Opcode::VAESKEYGENASSIST => {
-                // TODO: check a table for these
-                if !self.avx() || !self.aesni() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::MOVBE => {
-                if !self.movbe() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::POPCNT => {
-                /*
-                 * from the intel SDM:
-                 * ```
-                 * Before an application attempts to use the POPCNT instruction, it must check that
-                 * the processor supports SSE4.2 (if CPUID.01H:ECX.SSE4_2[bit 20] = 1) and POPCNT
-                 * (if CPUID.01H:ECX.POPCNT[bit 23] = 1).
-                 * ```
-                 */
-                if self.intel_quirks() && (self.sse4_2() || self.popcnt()) {
-                    return Ok(());
-                } else if !self.popcnt() {
-                    /*
-                     * elsewhere from the amd APM:
-                     * `Instruction Subsets and CPUID Feature Flags` on page 507 indicates that
-                     * popcnt is present when the popcnt bit is reported by cpuid. this seems to be
-                     * the less quirky default, so `intel_quirks` is considered the outlier, and
-                     * before this default.
-                     * */
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::LZCNT => {
-                /*
-                 * amd APM, `LZCNT` page 212:
-                 * LZCNT is an Advanced Bit Manipulation (ABM) instruction. Support for the LZCNT
-                 * instruction is indicated by CPUID Fn8000_0001_ECX[ABM] = 1.
-                 *
-                 * meanwhile the intel SDM simply states:
-                 * ```
-                 * CPUID.EAX=80000001H:ECX.LZCNT[bit 5]: if 1 indicates the processor supports the
-                 * LZCNT instruction.
-                 * ```
-                 *
-                 * so that's considered the less-quirky (default) case here.
-                 * */
-                if self.amd_quirks() && !self.abm() {
-                    return Err(DecodeError::InvalidOpcode);
-                } else if !self.lzcnt() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::ADCX |
-            Opcode::ADOX => {
-                if !self.adx() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::VMRUN |
-            Opcode::VMLOAD |
-            Opcode::VMSAVE |
-            Opcode::CLGI |
-            Opcode::VMMCALL |
-            Opcode::INVLPGA => {
-                if !self.svm() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::STGI |
-            Opcode::SKINIT => {
-                if !self.svm() || !self.skinit() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::LAHF |
-            Opcode::SAHF => {
-                if !self.lahfsahf() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::VCVTPS2PH |
-            Opcode::VCVTPH2PS => {
-                /*
-                 * from intel SDM:
-                 * ```
-                 * 14.4.1 Detection of F16C Instructions Application using float 16 instruction
-                 *    must follow a detection sequence similar to AVX to ensure: • The OS has
-                 *    enabled YMM state management support, • The processor support AVX as
-                 *    indicated by the CPUID feature flag, i.e. CPUID.01H:ECX.AVX[bit 28] = 1.  •
-                 *    The processor support 16-bit floating-point conversion instructions via a
-                 *    CPUID feature flag (CPUID.01H:ECX.F16C[bit 29] = 1).
-                 * ```
-                 *
-                 * TODO: only the VEX-coded variant of this instruction should be gated on `f16c`.
-                 * the EVEX-coded variant should be gated on `avx512f` or `avx512vl` if not
-                 * EVEX.512-coded.
-                 */
-                if !self.avx() || !self.f16c() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::RDRAND => {
-                if !self.rdrand() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::RDSEED => {
-                if !self.rdseed() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            Opcode::MONITORX | Opcode::MWAITX | // these are gated on the `monitorx` and `mwaitx` cpuid bits, but are AMD-only.
-            Opcode::CLZERO | Opcode::RDPRU => { // again, gated on specific cpuid bits, but AMD-only.
-                if !self.amd_quirks() {
-                    return Err(DecodeError::InvalidOpcode);
-                }
-            }
-            other => {
-                if !self.bmi1() {
-                    if BMI1.contains(&other) {
-                        return Err(DecodeError::InvalidOpcode);
-                    }
-                }
-                if !self.bmi2() {
-                    if BMI2.contains(&other) {
-                        return Err(DecodeError::InvalidOpcode);
-                    }
-                }
-            }
-        }
-        Ok(())
-    }
 }
 
 impl Default for InstDecoder {
@@ -4116,7 +1963,7 @@ impl Decoder<Arch> for InstDecoder {
         }
 
         if self != &InstDecoder::default() {
-            self.revise_instruction(&mut instr)?;
+            crate::generated::protected_mode::revise_instruction(self, &mut instr)?;
         }
 
         Ok(instr)
@@ -4141,7 +1988,7 @@ impl AnnotatingDecoder<Arch> for InstDecoder {
         }
 
         if self != &InstDecoder::default() {
-            self.revise_instruction(instr)?;
+            crate::generated::protected_mode::revise_instruction(self, instr)?;
         }
 
         Ok(())
@@ -7677,7 +5524,7 @@ fn unlikely_operands<
                     vex::three_byte_vex(words, modrm, instruction, sink)?;
 
                     if decoder != &InstDecoder::default() {
-                        decoder.revise_instruction(instruction)?;
+                        crate::generated::protected_mode::revise_instruction(decoder, instruction)?;
                     }
                     return Ok(());
                 }
@@ -7710,7 +5557,7 @@ fn unlikely_operands<
                     vex::two_byte_vex(words, modrm, instruction, sink)?;
 
                     if decoder != &InstDecoder::default() {
-                        decoder.revise_instruction(instruction)?;
+                        crate::generated::protected_mode::revise_instruction(decoder, instruction)?;
                     }
                     return Ok(());
                 }