DecodeEverything wasn't useful, no better than InstDecoder::default()??

7 files changed, 49 insertions, 193 deletions

diff --git a/src/isa_settings.rs b/src/isa_settings.rs
index e003d80..63f7454 100644
--- a/src/isa_settings.rs
+++ b/src/isa_settings.rs
@@ -9,7 +9,7 @@
 
 macro_rules! gen_isa_settings {
     (
-        ($inst_ty:ty, $decode_err:ty, $featureful_decoder:ty, $unconditional_decoder:ty, $revise_inst_fn:ident),
+        ($inst_ty:ty, $decode_err:ty, $featureful_decoder:ty),
         $(
             $(#[$doc:meta])*
             $feature:ident,
@@ -39,54 +39,29 @@ macro_rules! gen_isa_settings {
     ) => {
         /// specific decode settings controlling how an x86 byte sequence is interpreted.
         ///
-        /// this currently exists to specify which extensions are to be accepted or rejected. the two
-        /// implementations provided by `yaxpeax-x86` are:
-        /// * [`InstDecoder`], providing configurable enablement or disablement per-extension
-        /// * [`DecodeEverything`], which allows all extensions supported by `yaxpeax-x86`
-        ///
         /// notably, `InstDecoder::default()` and `DecodeEverything` are functionally equivalent in that
         /// they accept all extensions supported by the decoder.
         ///
         /// TODO: many additional extension support flags.
         /// * extended MMX (see `sha256:daee4e23dac983f1744126352d40cc71d47b4a9283a2a1e473837728ca9c51ac`)
         /// * lots of others... tile extensions...
-        pub trait IsaSettings {
+        impl $featureful_decoder {
             $(
                 $(#[$doc])*
-                fn $feature(&self) -> bool;
+                pub fn $feature(&self) -> bool {
+                    let i = $idx as usize;
+                    self.flags[i / 64] & (1 << (i % 64)) != 0
+                }
             )+
 
             $(
                 $(#[$composite_doc])*
-                fn $composite_feature(&self) -> bool {
+                pub fn $composite_feature(&self) -> bool {
                     self.$first_inner_feature()
                         $($(&& self.$inner_feature())+)?
                 }
             )*
 
-            fn revise_instruction(&self, inst: &mut $inst_ty) -> Result<(), $decode_err> {
-                $revise_inst_fn(self, inst)
-            }
-        }
-
-        impl IsaSettings for $unconditional_decoder {
-            $(fn $feature(&self) -> bool { true })+
-
-            fn revise_instruction(&self, _inst: &mut $inst_ty) -> Result<(), $decode_err> {
-                Ok(())
-            }
-        }
-
-        impl IsaSettings for $featureful_decoder {
-            $(
-                fn $feature(&self) -> bool {
-                    let i = $idx as usize;
-                    self.flags[i / 64] & (1 << (i % 64)) != 0
-                }
-            )+
-        }
-
-        impl $featureful_decoder {
             $(
                 $(#[$set_doc])*
                 pub fn $set_feature(mut self) -> Self {
@@ -103,28 +78,14 @@ macro_rules! gen_isa_settings {
                         $($(.$set_inner_feature())+)?
                 }
             )*
-
-            $(
-                $(#[$doc])*
-                pub fn $feature(&self) -> bool {
-                    <Self as IsaSettings>::$feature(self)
-                }
-            )+
-
-            $(
-                $(#[$composite_doc])*
-                pub fn $composite_feature(&self) -> bool {
-                    <Self as IsaSettings>::$composite_feature(self)
-                }
-            )*
         }
     }
 }
 
 macro_rules! gen_arch_isa_settings {
-    ($inst_ty:ty, $decode_err:ty, $featureful_decoder:ty, $unconditional_decoder:ty, $revise_inst_fn:ident) => {
+    ($inst_ty:ty, $decode_err:ty, $featureful_decoder:ty) => {
         gen_isa_settings!(
-            ($inst_ty, $decode_err, $featureful_decoder, $unconditional_decoder, $revise_inst_fn),
+            ($inst_ty, $decode_err, $featureful_decoder),
             _3dnow, with_3dnow = 1;
             _3dnowprefetch, with_3dnowprefetch = 2;
             abm, with_abm = 3;
diff --git a/src/long_mode/isa_settings.rs b/src/long_mode/isa_settings.rs
index 77ee7e2..10088d2 100644
--- a/src/long_mode/isa_settings.rs
+++ b/src/long_mode/isa_settings.rs
@@ -1,13 +1,10 @@
-use super::{BMI1, BMI2, DecodeError, DecodeEverything, InstDecoder, Instruction, Opcode};
+use super::{BMI1, BMI2, DecodeError, InstDecoder, Instruction, Opcode};
 
-crate::isa_settings::gen_arch_isa_settings!(
-    Instruction, DecodeError, InstDecoder, DecodeEverything,
-    revise_instruction
-);
+crate::isa_settings::gen_arch_isa_settings!(Instruction, DecodeError, InstDecoder);
 
 /// optionally reject or reinterpret instruction according to settings for this decode
 /// operation.
-fn revise_instruction<D: IsaSettings + ?Sized>(settings: &D, inst: &mut Instruction) -> Result<(), DecodeError> {
+pub(crate) fn revise_instruction(settings: &InstDecoder, inst: &mut Instruction) -> Result<(), DecodeError> {
     if inst.prefixes.evex().is_some() {
         if !settings.avx512() {
             return Err(DecodeError::InvalidOpcode);
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 0045236..e471391 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -5,8 +5,6 @@ mod display;
 pub mod uarch;
 mod isa_settings;
 
-pub use isa_settings::IsaSettings;
-
 pub use crate::MemoryAccessSize;
 
 #[cfg(feature = "fmt")]
@@ -2818,33 +2816,6 @@ impl InstDecoder {
     }
 }
 
-pub struct DecodeEverything {}
-
-impl Decoder<Arch> for DecodeEverything {
-    fn decode<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>>(&self, words: &mut T) -> Result<Instruction, <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        let mut instr = Instruction::invalid();
-        self.decode_into(&mut instr, words)?;
-
-        Ok(instr)
-    }
-    #[inline(always)]
-    fn decode_into<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>>(&self, instr: &mut Instruction, words: &mut T) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        self.decode_with_annotation(instr, words, &mut NullSink)
-    }
-}
-
-impl AnnotatingDecoder<Arch> for DecodeEverything {
-    type FieldDescription = FieldDescription;
-
-    #[inline(always)]
-    fn decode_with_annotation<
-        T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
-        S: DescriptionSink<Self::FieldDescription>
-    >(&self, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        decode_with_annotation(self, instr, words, sink)
-    }
-}
-
 impl Default for InstDecoder {
     /// Instantiates an x86_64 decoder that probably decodes what you want.
     ///
@@ -2884,18 +2855,17 @@ impl AnnotatingDecoder<Arch> for InstDecoder {
 
 #[inline(always)]
 fn decode_with_annotation<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>
->(isa_settings: &D, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-    DecodeCtx::new().read_with_annotations(isa_settings, words, instr, sink)?;
+>(decoder: &InstDecoder, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
+    DecodeCtx::new().read_with_annotations(decoder, words, instr, sink)?;
 
     instr.length = words.offset() as u8;
     if words.offset() > 15 {
         return Err(DecodeError::TooLong);
     }
 
-    isa_settings.revise_instruction(instr)?;
+    isa_settings::revise_instruction(decoder, instr)?;
 
     Ok(())
 }
@@ -5381,10 +5351,9 @@ fn read_opc_hotpath<
 #[cfg_attr(feature="profiling", inline(never))]
 #[cfg_attr(not(feature="profiling"), inline(always))]
 fn read_with_annotations<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>,
->(mut self, isa_settings: &D, words: &mut T, instruction: &mut Instruction, sink: &mut S) -> Result<(), DecodeError> {
+>(mut self, decoder: &InstDecoder, words: &mut T, instruction: &mut Instruction, sink: &mut S) -> Result<(), DecodeError> {
     words.mark();
     let mut nextb = words.next().ok().ok_or(DecodeError::ExhaustedInput)?;
     let mut next_rec = OPCODES[nextb as usize];
@@ -5532,7 +5501,7 @@ fn read_with_annotations<
         record.operand()
     };
 
-    self.read_operands(isa_settings, words, instruction, record, sink)?;
+    self.read_operands(decoder, words, instruction, record, sink)?;
 
     if self.check_lock {
         if !instruction.opcode.can_lock() || !instruction.operands[0].is_memory() {
@@ -5601,10 +5570,9 @@ fn read_avx_prefixed<
 #[cfg_attr(feature="profiling", inline(never))]
 #[cfg_attr(not(feature="profiling"), inline(always))]
 fn read_operands<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>
->(&mut self, isa_settings: &D, words: &mut T, instruction: &mut Instruction, operand_code: OperandCode, sink: &mut S) -> Result<(), DecodeError> {
+>(&mut self, decoder: &InstDecoder, words: &mut T, instruction: &mut Instruction, operand_code: OperandCode, sink: &mut S) -> Result<(), DecodeError> {
     sink.record(
         words.offset() as u32 * 8 - 1, words.offset() as u32 * 8 - 1,
         InnerDescription::Boundary("opcode ends/operands begin (typically)")
@@ -8728,7 +8696,7 @@ fn read_operands<
                         instruction.opcode = Opcode::LFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
@@ -8738,7 +8706,7 @@ fn read_operands<
                         instruction.opcode = Opcode::MFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
@@ -8748,7 +8716,7 @@ fn read_operands<
                         instruction.opcode = Opcode::SFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
diff --git a/src/protected_mode/isa_settings.rs b/src/protected_mode/isa_settings.rs
index 77ee7e2..10088d2 100644
--- a/src/protected_mode/isa_settings.rs
+++ b/src/protected_mode/isa_settings.rs
@@ -1,13 +1,10 @@
-use super::{BMI1, BMI2, DecodeError, DecodeEverything, InstDecoder, Instruction, Opcode};
+use super::{BMI1, BMI2, DecodeError, InstDecoder, Instruction, Opcode};
 
-crate::isa_settings::gen_arch_isa_settings!(
-    Instruction, DecodeError, InstDecoder, DecodeEverything,
-    revise_instruction
-);
+crate::isa_settings::gen_arch_isa_settings!(Instruction, DecodeError, InstDecoder);
 
 /// optionally reject or reinterpret instruction according to settings for this decode
 /// operation.
-fn revise_instruction<D: IsaSettings + ?Sized>(settings: &D, inst: &mut Instruction) -> Result<(), DecodeError> {
+pub(crate) fn revise_instruction(settings: &InstDecoder, inst: &mut Instruction) -> Result<(), DecodeError> {
     if inst.prefixes.evex().is_some() {
         if !settings.avx512() {
             return Err(DecodeError::InvalidOpcode);
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 2ee3e38..170a830 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -5,8 +5,6 @@ mod display;
 pub mod uarch;
 mod isa_settings;
 
-pub use isa_settings::IsaSettings;
-
 pub use crate::MemoryAccessSize;
 
 #[cfg(feature = "fmt")]
@@ -2734,33 +2732,6 @@ impl InstDecoder {
     }
 }
 
-pub struct DecodeEverything {}
-
-impl Decoder<Arch> for DecodeEverything {
-    fn decode<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>>(&self, words: &mut T) -> Result<Instruction, <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        let mut instr = Instruction::invalid();
-        self.decode_into(&mut instr, words)?;
-
-        Ok(instr)
-    }
-    #[inline(always)]
-    fn decode_into<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>>(&self, instr: &mut Instruction, words: &mut T) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        self.decode_with_annotation(instr, words, &mut NullSink)
-    }
-}
-
-impl AnnotatingDecoder<Arch> for DecodeEverything {
-    type FieldDescription = FieldDescription;
-
-    #[inline(always)]
-    fn decode_with_annotation<
-        T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
-        S: DescriptionSink<Self::FieldDescription>
-    >(&self, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        decode_with_annotation(self, instr, words, sink)
-    }
-}
-
 impl Default for InstDecoder {
     /// Instantiates an x86 decoder that probably decodes what you want.
     ///
@@ -2798,18 +2769,17 @@ impl AnnotatingDecoder<Arch> for InstDecoder {
 
 #[inline(always)]
 fn decode_with_annotation<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>
->(isa_settings: &D, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-    DecodeCtx::new().read_with_annotations(isa_settings, words, instr, sink)?;
+>(decoder: &InstDecoder, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
+    DecodeCtx::new().read_with_annotations(decoder, words, instr, sink)?;
 
     instr.length = words.offset() as u8;
     if words.offset() > 15 {
         return Err(DecodeError::TooLong);
     }
 
-    isa_settings.revise_instruction(instr)?;
+    isa_settings::revise_instruction(decoder, instr)?;
 
     Ok(())
 }
@@ -5394,10 +5364,9 @@ fn read_opc_hotpath<
 #[cfg_attr(feature="profiling", inline(never))]
 #[cfg_attr(not(feature="profiling"), inline(always))]
 fn read_with_annotations<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>,
->(&mut self, isa_settings: &D, words: &mut T, instruction: &mut Instruction, sink: &mut S) -> Result<(), DecodeError> {
+>(&mut self, decoder: &InstDecoder, words: &mut T, instruction: &mut Instruction, sink: &mut S) -> Result<(), DecodeError> {
     words.mark();
     let mut nextb = words.next().ok().ok_or(DecodeError::ExhaustedInput)?;
     let mut next_rec = OPCODES[nextb as usize];
@@ -5543,7 +5512,7 @@ fn read_with_annotations<
         record.operand()
     };
 
-    self.read_operands(isa_settings, words, instruction, record, sink)?;
+    self.read_operands(decoder, words, instruction, record, sink)?;
 
     if self.check_lock {
         if !instruction.opcode.can_lock() || !instruction.operands[0].is_memory() {
@@ -5557,10 +5526,9 @@ fn read_with_annotations<
 #[cfg_attr(feature="profiling", inline(never))]
 #[cfg_attr(not(feature="profiling"), inline(always))]
 fn read_operands<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>
->(&mut self, isa_settings: &D, words: &mut T, instruction: &mut Instruction, operand_code: OperandCode, sink: &mut S) -> Result<(), DecodeError> {
+>(&mut self, decoder: &InstDecoder, words: &mut T, instruction: &mut Instruction, operand_code: OperandCode, sink: &mut S) -> Result<(), DecodeError> {
     sink.record(
         words.offset() as u32 * 8 - 1, words.offset() as u32 * 8 - 1,
         InnerDescription::Boundary("opcode ends/operands begin (typically)")
@@ -6578,7 +6546,7 @@ fn read_operands<
                     );
                     vex::three_byte_vex(words, modrm, instruction, sink)?;
 
-                    isa_settings.revise_instruction(instruction)?;
+                    isa_settings::revise_instruction(decoder, instruction)?;
 
                     return Ok(());
                 }
@@ -6610,7 +6578,7 @@ fn read_operands<
                     );
                     vex::two_byte_vex(words, modrm, instruction, sink)?;
 
-                    isa_settings.revise_instruction(instruction)?;
+                    isa_settings::revise_instruction(decoder, instruction)?;
 
                     return Ok(());
                 }
@@ -8515,7 +8483,7 @@ fn read_operands<
                         instruction.opcode = Opcode::LFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
@@ -8525,7 +8493,7 @@ fn read_operands<
                         instruction.opcode = Opcode::MFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
@@ -8535,7 +8503,7 @@ fn read_operands<
                         instruction.opcode = Opcode::SFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
diff --git a/src/real_mode/isa_settings.rs b/src/real_mode/isa_settings.rs
index 77ee7e2..10088d2 100644
--- a/src/real_mode/isa_settings.rs
+++ b/src/real_mode/isa_settings.rs
@@ -1,13 +1,10 @@
-use super::{BMI1, BMI2, DecodeError, DecodeEverything, InstDecoder, Instruction, Opcode};
+use super::{BMI1, BMI2, DecodeError, InstDecoder, Instruction, Opcode};
 
-crate::isa_settings::gen_arch_isa_settings!(
-    Instruction, DecodeError, InstDecoder, DecodeEverything,
-    revise_instruction
-);
+crate::isa_settings::gen_arch_isa_settings!(Instruction, DecodeError, InstDecoder);
 
 /// optionally reject or reinterpret instruction according to settings for this decode
 /// operation.
-fn revise_instruction<D: IsaSettings + ?Sized>(settings: &D, inst: &mut Instruction) -> Result<(), DecodeError> {
+pub(crate) fn revise_instruction(settings: &InstDecoder, inst: &mut Instruction) -> Result<(), DecodeError> {
     if inst.prefixes.evex().is_some() {
         if !settings.avx512() {
             return Err(DecodeError::InvalidOpcode);
diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs
index e62333b..c07d783 100644
--- a/src/real_mode/mod.rs
+++ b/src/real_mode/mod.rs
@@ -5,8 +5,6 @@ mod display;
 pub mod uarch;
 mod isa_settings;
 
-pub use isa_settings::IsaSettings;
-
 pub use crate::MemoryAccessSize;
 
 #[cfg(feature = "fmt")]
@@ -2734,33 +2732,6 @@ impl InstDecoder {
     }
 }
 
-pub struct DecodeEverything {}
-
-impl Decoder<Arch> for DecodeEverything {
-    fn decode<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>>(&self, words: &mut T) -> Result<Instruction, <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        let mut instr = Instruction::invalid();
-        self.decode_into(&mut instr, words)?;
-
-        Ok(instr)
-    }
-    #[inline(always)]
-    fn decode_into<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>>(&self, instr: &mut Instruction, words: &mut T) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        self.decode_with_annotation(instr, words, &mut NullSink)
-    }
-}
-
-impl AnnotatingDecoder<Arch> for DecodeEverything {
-    type FieldDescription = FieldDescription;
-
-    #[inline(always)]
-    fn decode_with_annotation<
-        T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
-        S: DescriptionSink<Self::FieldDescription>
-    >(&self, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-        decode_with_annotation(self, instr, words, sink)
-    }
-}
-
 impl Default for InstDecoder {
     /// Instantiates an x86 decoder that probably decodes what you want.
     ///
@@ -2798,18 +2769,17 @@ impl AnnotatingDecoder<Arch> for InstDecoder {
 
 #[inline(always)]
 fn decode_with_annotation<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>
->(isa_settings: &D, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
-    DecodeCtx::new().read_with_annotations(isa_settings, words, instr, sink)?;
+>(decoder: &InstDecoder, instr: &mut Instruction, words: &mut T, sink: &mut S) -> Result<(), <Arch as yaxpeax_arch::Arch>::DecodeError> {
+    DecodeCtx::new().read_with_annotations(decoder, words, instr, sink)?;
 
     instr.length = words.offset() as u8;
     if words.offset() > 15 {
         return Err(DecodeError::TooLong);
     }
 
-    isa_settings.revise_instruction(instr)?;
+    isa_settings::revise_instruction(decoder, instr)?;
 
     Ok(())
 }
@@ -5395,10 +5365,9 @@ fn read_opc_hotpath<
 #[cfg_attr(feature="profiling", inline(never))]
 #[cfg_attr(not(feature="profiling"), inline(always))]
 fn read_with_annotations<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>,
->(mut self, isa_settings: &D, words: &mut T, instruction: &mut Instruction, sink: &mut S) -> Result<(), DecodeError> {
+>(mut self, decoder: &InstDecoder, words: &mut T, instruction: &mut Instruction, sink: &mut S) -> Result<(), DecodeError> {
     words.mark();
     let mut nextb = words.next().ok().ok_or(DecodeError::ExhaustedInput)?;
     let mut next_rec = OPCODES[nextb as usize];
@@ -5544,7 +5513,7 @@ fn read_with_annotations<
         record.operand()
     };
 
-    self.read_operands(isa_settings, words, instruction, record, sink)?;
+    self.read_operands(decoder, words, instruction, record, sink)?;
 
     if self.check_lock {
         if !instruction.opcode.can_lock() || !instruction.operands[0].is_memory() {
@@ -5558,10 +5527,9 @@ fn read_with_annotations<
 #[cfg_attr(feature="profiling", inline(never))]
 #[cfg_attr(not(feature="profiling"), inline(always))]
 fn read_operands<
-    D: IsaSettings,
     T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpeax_arch::Arch>::Word>,
     S: DescriptionSink<FieldDescription>
->(&mut self, isa_settings: &D, words: &mut T, instruction: &mut Instruction, operand_code: OperandCode, sink: &mut S) -> Result<(), DecodeError> {
+>(&mut self, decoder: &InstDecoder, words: &mut T, instruction: &mut Instruction, operand_code: OperandCode, sink: &mut S) -> Result<(), DecodeError> {
     sink.record(
         words.offset() as u32 * 8 - 1, words.offset() as u32 * 8 - 1,
         InnerDescription::Boundary("opcode ends/operands begin (typically)")
@@ -6586,7 +6554,7 @@ fn read_operands<
                     );
                     vex::three_byte_vex(words, modrm, instruction, sink)?;
 
-                    isa_settings.revise_instruction(instruction)?;
+                    isa_settings::revise_instruction(decoder, instruction)?;
 
                     return Ok(());
                 }
@@ -6618,7 +6586,7 @@ fn read_operands<
                     );
                     vex::two_byte_vex(words, modrm, instruction, sink)?;
 
-                    isa_settings.revise_instruction(instruction)?;
+                    isa_settings::revise_instruction(decoder, instruction)?;
 
                     return Ok(());
                 }
@@ -8530,7 +8498,7 @@ fn read_operands<
                         instruction.opcode = Opcode::LFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
@@ -8540,7 +8508,7 @@ fn read_operands<
                         instruction.opcode = Opcode::MFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }
@@ -8550,7 +8518,7 @@ fn read_operands<
                         instruction.opcode = Opcode::SFENCE;
                         // Intel's manual accepts m != 0, AMD supports m != 0 though the manual
                         // doesn't say (tested on threadripper)
-                        if !isa_settings.amd_quirks() && !isa_settings.intel_quirks() {
+                        if !decoder.amd_quirks() && !decoder.intel_quirks() {
                             if m != 0 {
                                 return Err(DecodeError::InvalidOperand);
                             }