aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authoriximeow <me@iximeow.net>2020-01-15 23:51:17 -0800
committeriximeow <me@iximeow.net>2020-01-15 23:51:17 -0800
commitf2de087952ce4bc10ba18ad6bbb5d34ff01d2921 (patch)
treedbb518d39b803d5d327ee5d969f1e403388f6080 /src
parent36c018bb23063f0449549dc261830ccaa567e4fd (diff)
support "int imm8" instructions
Diffstat (limited to 'src')
-rw-r--r--src/long_mode/mod.rs6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 1468a9c..be2dbeb 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -5753,6 +5753,12 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
_ => { unreachable!("invalid operation width"); },
}
}
+ OperandCode::Ib => {
+ instruction.imm =
+ read_imm_unsigned(&mut bytes_iter, 1, length)?;
+ instruction.operands[0] = OperandSpec::ImmU8;
+ instruction.operand_count = 1;
+ }
OperandCode::Iw => {
instruction.imm =
read_imm_unsigned(&mut bytes_iter, 2, length)?;