diff options
author | iximeow <me@iximeow.net> | 2023-07-05 01:11:00 -0700 |
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committer | iximeow <me@iximeow.net> | 2023-07-05 01:11:00 -0700 |
commit | 74bacb4c07e1872c235c0eb85ef9e13ad372c9fd (patch) | |
tree | df0bf82a3e9161e26d7177a216caad43db2ac7be /test/long_mode/mod.rs | |
parent | e6b4393054cdf11bf5a1afbd75ed389c66f02395 (diff) |
fix operand handling for the psl/psr family of xmm shifts/rotates
these instructions ignored rex bits even for xmm reigsters, which is
incorrect (so says xed)
Diffstat (limited to 'test/long_mode/mod.rs')
-rw-r--r-- | test/long_mode/mod.rs | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs index ab1cc23..dd3d3d3 100644 --- a/test/long_mode/mod.rs +++ b/test/long_mode/mod.rs @@ -440,25 +440,25 @@ fn test_sse2() { test_instr(&[0xf2, 0x0f, 0x70, 0xc0, 0x4e], "pshuflw xmm0, xmm0, 0x4e"); test_instr(&[0xf3, 0x0f, 0x70, 0xc0, 0x4e], "pshufhw xmm0, xmm0, 0x4e"); test_invalid(&[0x66, 0x4f, 0x0f, 0x71, 0x10, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x71, 0xd0, 0x8f], "psrlw xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x71, 0xd0, 0x8f], "psrlw xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x71, 0x20, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x71, 0xe0, 0x8f], "psraw xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x71, 0xe0, 0x8f], "psraw xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x71, 0x30, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x71, 0xf0, 0x8f], "psllw xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x71, 0xf0, 0x8f], "psllw xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x72, 0x10, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x72, 0xd0, 0x8f], "psrld xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x72, 0xd0, 0x8f], "psrld xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x72, 0x20, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x72, 0xe0, 0x8f], "psrad xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x72, 0xe0, 0x8f], "psrad xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x72, 0x30, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x72, 0xf0, 0x8f], "pslld xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x72, 0xf0, 0x8f], "pslld xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x73, 0x10, 0x8f]); test_invalid(&[0x66, 0x4f, 0x0f, 0x73, 0x18, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xd0, 0x8f], "psrlq xmm0, 0x8f"); - test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xd8, 0x8f], "psrldq xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xd0, 0x8f], "psrlq xmm8, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xd8, 0x8f], "psrldq xmm8, 0x8f"); test_invalid(&[0x66, 0x4f, 0x0f, 0x73, 0x30, 0x8f]); test_invalid(&[0x66, 0x4f, 0x0f, 0x73, 0x38, 0x8f]); - test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm0, 0x8f"); - test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm0, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xf0, 0x8f], "psllq xmm8, 0x8f"); + test_instr(&[0x66, 0x4f, 0x0f, 0x73, 0xf8, 0x8f], "pslldq xmm8, 0x8f"); test_instr(&[0x66, 0x0f, 0x7e, 0xc1], "movd ecx, xmm0"); test_instr(&[0x66, 0x48, 0x0f, 0x7e, 0xc1], "movq rcx, xmm0"); test_instr(&[0x66, 0x48, 0x0f, 0x7e, 0x01], "movq qword [rcx], xmm0"); |