sse4.1 instruction tests

1 files changed, 164 insertions, 1 deletions

diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index 2ddb7d1..9ce4019 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -586,6 +586,133 @@ fn test_sse3() {
 }
 
 #[test]
+fn test_sse4_1() {
+    fn test_instr(bytes: &[u8], text: &'static str) {
+        test_display_under(&InstDecoder::minimal().with_sse4_1(), bytes, text);
+        test_invalid_under(&InstDecoder::minimal(), bytes);
+        // avx doesn't imply older instructions are necessarily valid
+        test_invalid_under(&InstDecoder::minimal().with_avx(), bytes);
+        // sse4_2 doesn't imply older instructions are necessarily valid
+        test_invalid_under(&InstDecoder::minimal().with_sse4_2(), bytes);
+    }
+
+    #[allow(unused)]
+    fn test_instr_invalid(bytes: &[u8]) {
+        test_invalid_under(&InstDecoder::minimal().with_sse4_1(), bytes);
+        test_invalid_under(&InstDecoder::default(), bytes);
+    }
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x0c, 0x06], "blendps xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x0c, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x0d, 0x06], "blendpd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x0d, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x10, 0x06], "pblendvb xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x10, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x14, 0x06], "blendvps xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x14, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x15, 0x06], "blendvpd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x15, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x17, 0x06], "ptest xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x17, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x20, 0x06], "pmovsxbw xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x20, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x21, 0x06], "pmovsxbd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x21, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x22, 0x06], "pmovsxbq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x22, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x23, 0x06], "pmovsxwd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x23, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x24, 0x06], "pmovsxwq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x24, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x25, 0x06], "pmovsxdq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x25, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x28, 0x06], "pmuldq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x28, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x29, 0x06], "pcmpeqq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x29, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x2a, 0x06], "movntdqa xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x2a, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x2b, 0x06], "packusdw xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x2b, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x30, 0x06], "pmovzxbw xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x30, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x31, 0x06], "pmovzxbd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x31, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x32, 0x06], "pmovzxbq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x32, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x33, 0x06], "pmovzxwd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x33, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x34, 0x06], "pmovzxwq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x34, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x35, 0x06], "pmovzxdq xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x35, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x38, 0x06], "pminsb xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x38, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x39, 0x06], "pminsd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x39, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x3a, 0x06], "pminuw xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x3a, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x3b, 0x06], "pminud xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x3b, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x3c, 0x06], "pmaxsb xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x3c, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x3d, 0x06], "pmaxsd xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x3d, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x3e, 0x06], "pmaxuw xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x3e, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x3f, 0x06], "pmaxud xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x3f, 0x06]);
+
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x40, 0x06], "pmulld xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x40, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x38, 0x41, 0x06], "phminposuw xmm0, [rsi]");
+    test_invalid(&[0x0f, 0x38, 0x41, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x3a, 0x08, 0x06, 0x31], "roundps xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x08, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x09, 0x06, 0x31], "roundpd xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x09, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0a, 0x06, 0x31], "roundss xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x0a, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0b, 0x06, 0x31], "roundsd xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x0b, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0e, 0x06, 0x31], "pblendw xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x0e, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x3a, 0x14, 0x06, 0x31], "pextrb xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x14, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x16, 0x06, 0x31], "pextrd xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x16, 0x06]);
+    test_instr(&[0x66, 0x48, 0x0f, 0x3a, 0x16, 0x06, 0x31], "pextrq xmm0, [rsi], 0x31");
+    test_instr(&[0x66, 0x0f, 0x3a, 0x17, 0x06, 0x31], "extractps xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x17, 0x06]);
+
+    test_instr(&[0x66, 0x0f, 0x3a, 0x20, 0x06, 0x31], "pinsrb xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x20, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x21, 0x06, 0x31], "insertps xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x21, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x22, 0x06, 0x31], "pinsrd xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x22, 0x06]);
+    test_instr(&[0x66, 0x48, 0x0f, 0x3a, 0x22, 0x06, 0x31], "pinsrq xmm0, [rsi], 0x31");
+
+    test_instr(&[0x66, 0x0f, 0x3a, 0x40, 0x06, 0x31], "dpps xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x40, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x41, 0x06, 0x31], "dppd xmm0, [rsi], 0x31");
+    test_invalid(&[0x0f, 0x3a, 0x41, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x42, 0x06, 0x44], "mpsadbw xmm0, [rsi], 0x44");
+    test_invalid(&[0x0f, 0x3a, 0x42, 0x06]);
+}
+
+#[test]
 fn test_ssse3() {
     fn test_instr(bytes: &[u8], text: &'static str) {
         test_display_under(&InstDecoder::minimal().with_ssse3(), bytes, text);
@@ -603,6 +730,40 @@ fn test_ssse3() {
         test_invalid_under(&InstDecoder::default(), bytes);
     }
     test_instr(&[0x66, 0x0f, 0x38, 0x00, 0xda], "pshufb xmm3, xmm2");
+    test_instr(&[0x66, 0x0f, 0x38, 0x00, 0x06], "pshufb xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x00, 0x06], "pshufb mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x01, 0x06], "phaddw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x01, 0x06], "phaddw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x02, 0x06], "phaddd xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x02, 0x06], "phaddd mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x03, 0x06], "phaddsw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x03, 0x06], "phaddsw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x04, 0x06], "pmaddubsw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x04, 0x06], "pmaddubsw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x05, 0x06], "phsubw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x05, 0x06], "phsubw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x06, 0x06], "phsubd xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x06, 0x06], "phsubd mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x07, 0x06], "phsubsw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x07, 0x06], "phsubsw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x08, 0x06], "psignb xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x08, 0x06], "psignb mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x09, 0x06], "psignw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x09, 0x06], "psignw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x0a, 0x06], "psignd xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x0a, 0x06], "psignd mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x0b, 0x06], "pmulhrsw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x0b, 0x06], "pmulhrsw mm0, [rsi]");
+
+    test_instr(&[0x66, 0x0f, 0x38, 0x1c, 0x06], "pabsb xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x1c, 0x06], "pabsb mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x1d, 0x06], "pabsw xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x1d, 0x06], "pabsw mm0, [rsi]");
+    test_instr(&[0x66, 0x0f, 0x38, 0x1e, 0x06], "pabsd xmm0, [rsi]");
+    test_instr(&[0x0f, 0x38, 0x1e, 0x06], "pabsd mm0, [rsi]");
+
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr xmm0, [rsi], 0x30");
+    test_instr(&[0x0f, 0x3a, 0x0f, 0x06, 0x30], "palignr mm0, [rsi], 0x30");
 }
 
 #[test]
@@ -1155,7 +1316,9 @@ fn prefixed_0f() {
     test_display(&[0x0f, 0x02, 0xc0], "lar eax, ax");
     test_display(&[0x48, 0x0f, 0x02, 0xc0], "lar rax, ax");
     test_display(&[0x0f, 0x03, 0xc0], "lsl eax, eax");
-    test_display(&[0x48, 0x0f, 0x03, 0xc0], "lsl rax, rax");
+    // capstone says `lsl rax, rax`, but xed says `rax, eax`. intel docs also say second reg should
+    // be dword.
+    test_display(&[0x48, 0x0f, 0x03, 0xc0], "lsl rax, eax");
     test_display(&[0x0f, 0x05], "syscall");
     test_display(&[0x48, 0x0f, 0x05], "syscall");
     test_display(&[0x66, 0x0f, 0x05], "syscall");