update protected mode tests (this breaks them horribly. next commit will fix.)

1 files changed, 265 insertions, 37 deletions

diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index 88cf7ea..98fc8b3 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -1,10 +1,11 @@
 mod regspec;
 mod operand;
+mod display;
 
 use std::fmt::Write;
 
 use yaxpeax_arch::{AddressBase, Decoder, LengthedInstruction};
-use yaxpeax_x86::protected_mode::{InstDecoder, Opcode};
+use yaxpeax_x86::protected_mode::InstDecoder;
 
 fn test_invalid(data: &[u8]) {
     test_invalid_under(&InstDecoder::default(), data);
@@ -12,7 +13,7 @@ fn test_invalid(data: &[u8]) {
 
 fn test_invalid_under(decoder: &InstDecoder, data: &[u8]) {
     if let Ok(inst) = decoder.decode(data.into_iter().cloned()) {
-        assert_eq!(inst.opcode(), Opcode::Invalid, "decoded {:?} from {:02x?} under decoder {}", inst.opcode(), data, decoder);
+        panic!("decoded {:?} from {:02x?} under decoder {}", inst.opcode(), data, decoder);
     } else {
         // this is fine
     }
@@ -91,7 +92,7 @@ fn test_mmx() {
     test_display(&[0x0f, 0xe7, 0x03], "movntq [ebx], mm0");
     test_invalid(&[0x0f, 0xe7, 0xc3]);
 
-    test_display(&[0x66, 0x0f, 0xc3, 0x03], "movnti [ebx], eax");
+    test_invalid(&[0x66, 0x0f, 0xc3, 0x03]);
     test_display(&[0x0f, 0xc3, 0x03], "movnti [ebx], eax");
     test_invalid(&[0x0f, 0xc3, 0xc3]);
 
@@ -116,7 +117,11 @@ fn test_mmx() {
     test_display(&[0x0f, 0x75, 0xc2], "pcmpeqw mm0, mm2");
     test_display(&[0x0f, 0x76, 0xc2], "pcmpeqd mm0, mm2");
 
+    test_display(&[0x66, 0x0f, 0xc5, 0xd8, 0xff], "pextrw ebx, xmm0, 0xff");
+    test_invalid(&[0x66, 0x0f, 0xc5, 0x08, 0xff]);
+
     test_display(&[0x0f, 0xc5, 0xd1, 0x00], "pextrw edx, mm1, 0x0");
+    test_invalid(&[0x0f, 0xc5, 0x01, 0x00]);
 
     test_display(&[0x0f, 0xd8, 0xc2], "psubusb mm0, mm2");
     test_display(&[0x0f, 0xd9, 0xc2], "psubusw mm0, mm2");
@@ -203,7 +208,6 @@ fn test_sse2() {
     test_instr(&[0xf2, 0x0f, 0x10, 0x0c, 0xc7], "movsd xmm1, [edi + eax * 8]");
     test_instr(&[0xf2, 0x0f, 0x11, 0x0c, 0xc7], "movsd [edi + eax * 8], xmm1");
     test_instr(&[0x66, 0x0f, 0x11, 0x0c, 0xc7], "movupd [edi + eax * 8], xmm1");
-    test_instr(&[0x66, 0x0f, 0x12, 0xc3], "movhlps xmm0, xmm3"); // reg-reg form is movhlps
     test_instr(&[0x66, 0x0f, 0x12, 0x03], "movlpd xmm0, [ebx]"); // reg-mem is movlpd
     test_instr(&[0x66, 0x0f, 0x13, 0x03], "movlpd [ebx], xmm0");
     test_invalid(&[0x66, 0x0f, 0x13, 0xc3]);
@@ -212,7 +216,7 @@ fn test_sse2() {
     test_instr(&[0x66, 0x0f, 0x15, 0x03], "unpckhpd xmm0, [ebx]");
     test_instr(&[0x66, 0x0f, 0x15, 0xc3], "unpckhpd xmm0, xmm3");
     test_instr(&[0x66, 0x0f, 0x16, 0x03], "movhpd xmm0, [ebx]");
-    test_instr(&[0x66, 0x0f, 0x16, 0xc3], "movlhps xmm0, xmm3");
+    test_invalid(&[0x66, 0x0f, 0x16, 0xc3]);
     test_instr(&[0x66, 0x0f, 0x17, 0x03], "movhpd [ebx], xmm0");
     test_invalid(&[0x66, 0x0f, 0x17, 0xc3]);
 
@@ -246,8 +250,8 @@ fn test_sse2() {
     test_instr(&[0x66, 0x0f, 0x50, 0xc1], "movmskpd eax, xmm1");
     test_instr(&[0x66, 0x0f, 0x51, 0x01], "sqrtpd xmm0, [ecx]");
     test_instr(&[0xf2, 0x0f, 0x51, 0x01], "sqrtsd xmm0, [ecx]");
-    test_instr(&[0x66, 0x0f, 0x52, 0x01], "rsqrtps xmm0, [ecx]"); // note: NOT "rsqrtpd" - no such instruction exists, so fall back to just 0f52 parse.
-    test_instr(&[0x66, 0x0f, 0x53, 0x01], "rcpps xmm0, [ecx]"); // note: NOT "rcppd" - no such instruction exists, so fall back to just 0f53 parse.
+    test_invalid(&[0x66, 0x0f, 0x52, 0x01]);
+    test_invalid(&[0x66, 0x0f, 0x53, 0x01]);
     test_instr(&[0x66, 0x0f, 0x54, 0x01], "andpd xmm0, [ecx]");
     test_instr(&[0x66, 0x0f, 0x55, 0x01], "andnpd xmm0, [ecx]");
     test_instr(&[0x66, 0x0f, 0x56, 0x01], "orpd xmm0, [ecx]");
@@ -479,8 +483,10 @@ fn test_sse2() {
     test_instr(&[0x66, 0x0f, 0xfd, 0x01], "paddw xmm0, [ecx]");
     test_instr(&[0x66, 0x0f, 0xfe, 0xc1], "paddd xmm0, xmm1");
     test_instr(&[0x66, 0x0f, 0xfe, 0x01], "paddd xmm0, [ecx]");
-    test_instr(&[0x66, 0x0f, 0xff, 0xc1], "paddq xmm0, xmm1");
-    test_instr(&[0x66, 0x0f, 0xff, 0x01], "paddq xmm0, [ecx]");
+    test_instr(&[0x66, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
+    test_instr(&[0xf2, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
+    test_instr(&[0xf3, 0x0f, 0xff, 0xc1], "ud0 eax, ecx");
+    test_instr(&[0x66, 0x0f, 0xff, 0x01], "ud0 eax, [ecx]");
 
     test_instr(&[0x66, 0x0f, 0x74, 0xc1], "pcmpeqb xmm0, xmm1");
     test_instr(&[0x66, 0x0f, 0x74, 0x12], "pcmpeqb xmm2, [edx]");
@@ -509,6 +515,7 @@ fn test_sse3() {
     test_instr_invalid(&[0xf2, 0x0f, 0xf0, 0xcf]);
     test_instr(&[0xf2, 0x0f, 0xd0, 0x0f], "addsubps xmm1, [edi]");
     test_instr(&[0xf2, 0x0f, 0xd0, 0xcf], "addsubps xmm1, xmm7");
+    test_invalid(&[0xf3, 0x0f, 0xd0, 0x0f]);
     test_instr(&[0x66, 0x0f, 0xd0, 0x0f], "addsubpd xmm1, [edi]");
     test_instr(&[0x66, 0x0f, 0xd0, 0xcf], "addsubpd xmm1, xmm7");
 
@@ -530,13 +537,15 @@ fn test_sse3() {
     test_instr(&[0xf2, 0x0f, 0x12, 0x0f], "movddup xmm1, [edi]");
     test_instr(&[0xf2, 0x0f, 0x12, 0xcf], "movddup xmm1, xmm7");
 
-    test_instr(&[0x66, 0x0f, 0x01, 0xc8], "monitor");
-    test_instr(&[0xf2, 0x0f, 0x01, 0xc8], "monitor");
-    test_instr(&[0xf3, 0x0f, 0x01, 0xc8], "monitor");
+    test_instr(&[0x0f, 0x01, 0xc8], "monitor");
+    test_invalid(&[0x66, 0x0f, 0x01, 0xc8]);
+    test_invalid(&[0xf3, 0x0f, 0x01, 0xc8]);
+    test_invalid(&[0xf2, 0x0f, 0x01, 0xc8]);
 
-    test_instr(&[0x66, 0x0f, 0x01, 0xc9], "mwait");
-    test_instr(&[0xf2, 0x0f, 0x01, 0xc9], "mwait");
-    test_instr(&[0xf3, 0x0f, 0x01, 0xc9], "mwait");
+    test_instr(&[0x0f, 0x01, 0xc9], "mwait");
+    test_invalid(&[0x66, 0x0f, 0x01, 0xc9]);
+    test_invalid(&[0xf2, 0x0f, 0x01, 0xc9]);
+    test_invalid(&[0xf3, 0x0f, 0x01, 0xc9]);
 }
 
 #[test]
@@ -590,10 +599,10 @@ fn test_sse4_1() {
         test_invalid_under(&InstDecoder::default(), bytes);
     }
 
-    test_instr(&[0x66, 0x0f, 0x38, 0x0c, 0x06], "blendps xmm0, [esi]");
-    test_invalid(&[0x0f, 0x38, 0x0c, 0x06]);
-    test_instr(&[0x66, 0x0f, 0x38, 0x0d, 0x06], "blendpd xmm0, [esi]");
-    test_invalid(&[0x0f, 0x38, 0x0d, 0x06]);
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0x11, 0x22], "blendps xmm2, [ecx], 0x22");
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0c, 0xc1, 0x22], "blendps xmm0, xmm1, 0x22");
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0x11, 0x22], "blendpd xmm2, [ecx], 0x22");
+    test_instr(&[0x66, 0x0f, 0x3a, 0x0d, 0xc1, 0x22], "blendpd xmm0, xmm1, 0x22");
 
     test_instr(&[0x66, 0x0f, 0x38, 0x10, 0x06], "pblendvb xmm0, [esi]");
     test_invalid(&[0x0f, 0x38, 0x10, 0x06]);
@@ -624,6 +633,7 @@ fn test_sse4_1() {
     test_instr(&[0x66, 0x0f, 0x38, 0x29, 0x06], "pcmpeqq xmm0, [esi]");
     test_invalid(&[0x0f, 0x38, 0x29, 0x06]);
     test_instr(&[0x66, 0x0f, 0x38, 0x2a, 0x06], "movntdqa xmm0, [esi]");
+    test_invalid(&[0x66, 0x0f, 0x38, 0x2a, 0xc6]);
     test_invalid(&[0x0f, 0x38, 0x2a, 0x06]);
     test_instr(&[0x66, 0x0f, 0x38, 0x2b, 0x06], "packusdw xmm0, [esi]");
     test_invalid(&[0x0f, 0x38, 0x2b, 0x06]);
@@ -801,6 +811,12 @@ fn test_0f01() {
     test_display(&[0x0f, 0x01, 0xdd], "clgi");
     test_display(&[0x0f, 0x01, 0xde], "skinit eax");
     test_display(&[0x0f, 0x01, 0xdf], "invlpga eax, ecx");
+// TODO: not clear what SHOULD be reported for invlpgb. certainly not a `rax` operand. xed claims
+// that this is UD in protected mode. the AMD manual explicitly says this does not #UD in protected
+// mode. same for tlbsync.
+//    test_display(&[0x0f, 0x01, 0xfe], "invlpgb rax, edx, ecx");
+//    test_display(&[0x0f, 0x01, 0xff], "tlbsync");
+//    test_display(&[0x2e, 0x67, 0x65, 0x2e, 0x46, 0x0f, 0x01, 0xff], "tlbsync");
     test_display(&[0x0f, 0x01, 0xe0], "smsw ax");
     test_display(&[0x0f, 0x01, 0xe1], "smsw cx");
     test_display(&[0x0f, 0x01, 0xe2], "smsw dx");
@@ -814,10 +830,10 @@ fn test_0f01() {
     test_invalid(&[0x0f, 0x01, 0xe9]);
     test_invalid(&[0x0f, 0x01, 0xea]);
     test_invalid(&[0x0f, 0x01, 0xeb]);
-    test_invalid(&[0x0f, 0x01, 0xec]);
-    test_invalid(&[0x0f, 0x01, 0xed]);
     test_display(&[0x0f, 0x01, 0xee], "rdpkru");
     test_display(&[0x0f, 0x01, 0xef], "wrpkru");
+    test_invalid(&[0xf2, 0x0f, 0x01, 0xee]);
+    test_invalid(&[0xf2, 0x0f, 0x01, 0xef]);
     test_display(&[0x0f, 0x01, 0xf0], "lmsw ax");
     test_display(&[0x0f, 0x01, 0xf1], "lmsw cx");
     test_display(&[0x0f, 0x01, 0xf2], "lmsw dx");
@@ -832,8 +848,6 @@ fn test_0f01() {
     test_display(&[0x0f, 0x01, 0xfb], "mwaitx");
     test_display(&[0x0f, 0x01, 0xfc], "clzero");
     test_display(&[0x0f, 0x01, 0xfd], "rdpru ecx");
-    test_invalid(&[0x0f, 0x01, 0xfe]);
-    test_invalid(&[0x0f, 0x01, 0xff]);
 }
 
 #[test]
@@ -844,6 +858,8 @@ fn test_0fae() {
     let minimal = InstDecoder::minimal();
     // drawn heavily from "Table A-6.  Opcode Extensions for One- and Two-byte Opcodes by Group
     // Number"
+    test_invalid(&[0xf3, 0x0f, 0xae, 0x87]);
+    test_invalid(&[0xf3, 0x0f, 0xae, 0x04, 0x4f]);
     test_display(&[0x0f, 0xae, 0x04, 0x4f], "fxsave [edi + ecx * 2]");
     test_display(&[0x0f, 0xae, 0x0c, 0x4f], "fxrstor [edi + ecx * 2]");
     test_display(&[0x0f, 0xae, 0x14, 0x4f], "ldmxcsr [edi + ecx * 2]");
@@ -1017,10 +1033,10 @@ fn test_mov() {
     test_display(&[0x0f, 0x97, 0xc8], "seta al");
     test_display(&[0x0f, 0x97, 0x00], "seta [eax]");
     test_display(&[0x0f, 0x97, 0x08], "seta [eax]");
-    test_display(&[0xd6], "salc");
+//    test_display(&[0xd6], "salc");
     test_display(&[0x8e, 0x00], "mov es, [eax]");
-    // cs is not an allowed destination - would #ud on execution
-    test_display(&[0x8e, 0x08], "mov cs, [eax]");
+    // cs is not an allowed destination
+    test_invalid(&[0x8e, 0x08]);
     test_display(&[0x8e, 0x10], "mov ss, [eax]");
     test_display(&[0x8e, 0x18], "mov ds, [eax]");
     test_display(&[0x8e, 0x20], "mov fs, [eax]");
@@ -1049,7 +1065,17 @@ fn test_prefixes() {
     test_invalid(&[0xf0, 0x33, 0xc0]);
     test_display(&[0xf0, 0x31, 0x00], "lock xor [eax], eax");
     test_display(&[0xf0, 0x80, 0x30, 0x00], "lock xor [eax], 0x0");
+    test_display(&[0xf0, 0x0f, 0xbb, 0x17], "lock btc [edi], edx");
+    test_display(&[0x66, 0x2e, 0xf2, 0xf0, 0x0f, 0xbb, 0x13], "lock btc [ebx], dx");
     test_invalid(&[0xf0, 0xc7, 0x00, 0x00, 0x00, 0x00]);
+    test_display(&[0x0f, 0xc1, 0xcc], "xadd esp, ecx");
+    test_display(&[0x66, 0x0f, 0xc1, 0xcc], "xadd sp, cx");
+    test_display(&[0xf2, 0x0f, 0xc1, 0xcc], "xadd esp, ecx");
+    test_display(&[0xf3, 0x0f, 0xc1, 0xcc], "xadd esp, ecx");
+    test_display(&[0x0f, 0xc0, 0xcc], "xadd ah, cl");
+    test_display(&[0x66, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
+    test_display(&[0xf2, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
+    test_display(&[0xf3, 0x0f, 0xc0, 0xcc], "xadd ah, cl");
 }
 
 #[test]
@@ -1106,8 +1132,10 @@ fn test_push_pop() {
 fn test_bmi1() {
     let bmi1 = InstDecoder::minimal().with_bmi1();
     let no_bmi1 = InstDecoder::minimal();
-    test_display_under(&bmi1, &[0x0f, 0xbc, 0xd3], "tzcnt edx, ebx");
-    test_display_under(&no_bmi1, &[0x0f, 0xbc, 0xd3], "bsf edx, ebx");
+    test_display_under(&bmi1, &[0xf3, 0x0f, 0xbc, 0xd3], "tzcnt edx, ebx");
+    test_display_under(&bmi1, &[0xf2, 0x0f, 0xbc, 0xd3], "bsf edx, ebx");
+    test_display_under(&bmi1, &[0x0f, 0xbc, 0xd3], "bsf edx, ebx");
+    test_display_under(&no_bmi1, &[0xf3, 0x0f, 0xbc, 0xd3], "bsf edx, ebx");
 
     // from the intel manual [`ANDN`, though this is true for `BMI1` generally]:
     // ```
@@ -1176,6 +1204,8 @@ fn test_popcnt() {
 #[test]
 fn test_bitwise() {
     test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbc, 0xd3], "bsf edx, ebx");
+    test_display_under(&InstDecoder::minimal(), &[0x0f, 0xbb, 0x17], "btc [edi], edx");
+    test_display_under(&InstDecoder::minimal(), &[0xf0, 0x0f, 0xbb, 0x17], "lock btc [edi], edx");
     test_display(&[0x0f, 0xa3, 0xd0], "bt eax, edx");
     test_display(&[0x0f, 0xab, 0xd0], "bts eax, edx");
     test_display(&[0x0f, 0xb3, 0xd0], "btr eax, edx");
@@ -1234,6 +1264,9 @@ fn test_misc() {
     test_display(&[0x66, 0x0f, 0xc7, 0x33], "vmclear [ebx]");
     test_display(&[0xf3, 0x0f, 0xc7, 0x33], "vmxon [ebx]");
 
+    test_display(&[0xf3, 0x0f, 0xae, 0x26], "ptwrite [esi]");
+    test_display(&[0xf3, 0x0f, 0xae, 0xe6], "ptwrite esi");
+    test_invalid(&[0x66, 0xf3, 0x0f, 0xae, 0xe6]);
     test_display(&[0xf3, 0x0f, 0xae, 0xc4], "rdfsbase esp");
     test_display(&[0xf3, 0x0f, 0xae, 0xcc], "rdgsbase esp");
     test_display(&[0xf3, 0x0f, 0xae, 0xd4], "wrfsbase esp");
@@ -1241,7 +1274,16 @@ fn test_misc() {
     test_display(&[0x66, 0x0f, 0xae, 0x3f], "clflushopt [edi]"); // or clflush without 66
     test_invalid(&[0x66, 0x0f, 0xae, 0xff]);
     test_display(&[0x66, 0x0f, 0xae, 0x37], "clwb [edi]");
-    test_invalid(&[0x66, 0x0f, 0xae, 0xf7]);
+    test_display(&[0x66, 0x0f, 0xae, 0xf7], "tpause edi");
+    test_display(&[0xf3, 0x0f, 0xae, 0xf1], "umonitor ecx");
+    test_display(&[0xf2, 0x0f, 0xae, 0xf1], "umwait ecx");
+    test_display(&[0x66, 0x0f, 0x38, 0x80, 0x2f], "invept ebp, [edi]");
+    test_invalid(&[0x0f, 0x38, 0x80, 0x2f]);
+    test_display(&[0x66, 0x0f, 0x38, 0x81, 0x2f], "invvpid ebp, [edi]");
+    test_invalid(&[0x0f, 0x38, 0x81, 0x2f]);
+    test_display(&[0x66, 0x0f, 0x38, 0x82, 0x2f], "invpcid ebp, [edi]");
+    test_invalid(&[0x0f, 0x38, 0x82, 0x2f]);
+    test_display(&[0x66, 0x0f, 0xae, 0xf1], "tpause ecx");
 }
 
 #[test]
@@ -1397,6 +1439,15 @@ fn test_vex() {
 
     test_instr(&[0xc5, 0xf1, 0xc4, 0xd8, 0x78], "vpinsrw xmm3, xmm1, eax, 0x78");
     test_instr(&[0xc5, 0xf1, 0xc4, 0x18, 0x78], "vpinsrw xmm3, xmm1, [eax], 0x78");
+
+    // uh oh, i think these sizes are backwards...
+    test_instr(&[0xc5, 0xe0, 0x54, 0x03], "vandpd xmm0, xmm3, [ebx]");
+    test_instr(&[0xc5, 0xe1, 0x54, 0x03], "vandps xmm0, xmm3, [ebx]");
+    test_instr(&[0xc5, 0xe0, 0x55, 0x03], "vandnpd xmm0, xmm3, [ebx]");
+    test_instr(&[0xc5, 0xe1, 0x55, 0x03], "vandnps xmm0, xmm3, [ebx]");
+    test_instr(&[0xc5, 0xe0, 0x56, 0x03], "vorpd xmm0, xmm3, [ebx]");
+    test_instr(&[0xc5, 0xe1, 0x56, 0x03], "vorps xmm0, xmm3, [ebx]");
+    test_instr(&[0xc4, 0xa2, 0x15, 0x3e, 0x14, 0xb9], "vpmaxuw ymm2, ymm13, [ecx + edi * 4]");
 }
 
 #[test]
@@ -1429,12 +1480,13 @@ fn prefixed_0f() {
     test_display(&[0x0f, 0x16, 0xc0], "movlhps xmm0, xmm0");
     test_invalid(&[0x0f, 0x17, 0xc0]);
     test_display(&[0x0f, 0x17, 0x00], "movhps [eax], xmm0");
-    test_invalid(&[0x0f, 0x18, 0xc0]);
+    test_display(&[0x0f, 0x18, 0xc0], "nop eax"); // capstone says invalid, xed says nop
     test_display(&[0x0f, 0x18, 0x00], "prefetchnta [eax]");
     test_display(&[0x0f, 0x18, 0x08], "prefetch0 [eax]");
     test_display(&[0x0f, 0x18, 0x10], "prefetch1 [eax]");
     test_display(&[0x0f, 0x18, 0x18], "prefetch2 [eax]");
     test_display(&[0x0f, 0x18, 0x20], "nop [eax]");
+    test_display(&[0x0f, 0x18, 0xcc], "nop esp");
     test_display(&[0x0f, 0x19, 0x20], "nop [eax]");
     test_display(&[0x0f, 0x1a, 0x20], "nop [eax]");
     test_display(&[0x0f, 0x1b, 0x20], "nop [eax]");
@@ -1442,10 +1494,12 @@ fn prefixed_0f() {
     test_display(&[0x0f, 0x1d, 0x20], "nop [eax]");
     test_display(&[0x0f, 0x1e, 0x20], "nop [eax]");
     test_display(&[0x0f, 0x1f, 0x20], "nop [eax]");
-    test_display(&[0x0f, 0x20, 0xc8], "mov eax, cr1");
+    test_display(&[0x0f, 0x20, 0xc8], "mov eax, cr0");
+    test_invalid(&[0x0f, 0x20, 0xc8]);
     test_display(&[0x0f, 0x21, 0xc8], "mov eax, dr1");
-    test_display(&[0x0f, 0x22, 0xc8], "mov cr1, eax");
-    test_display(&[0x0f, 0x22, 0xcf], "mov cr1, edi");
+    test_display(&[0x0f, 0x22, 0xc0], "mov cr0, eax");
+    test_invalid(&[0x0f, 0x22, 0xc8]);
+    test_display(&[0x0f, 0x22, 0xc7], "mov cr0, edi");
     test_display(&[0x0f, 0x23, 0xc8], "mov dr1, eax");
     test_display(&[0x0f, 0x23, 0xcf], "mov dr1, edi");
     test_display(&[0x0f, 0x30], "wrmsr");
@@ -1456,6 +1510,9 @@ fn prefixed_0f() {
     test_display(&[0x0f, 0x35], "sysexit");
     test_invalid(&[0x0f, 0x36]);
     test_display(&[0x0f, 0x37], "getsec");
+    test_invalid(&[0x66, 0x0f, 0x37]);
+    test_invalid(&[0xf2, 0x0f, 0x37]);
+    test_invalid(&[0xf3, 0x0f, 0x37]);
     test_display(&[0x0f, 0x60, 0x00], "punpcklbw mm0, [eax]");
     test_display(&[0x0f, 0x60, 0xc2], "punpcklbw mm0, mm2");
     test_display(&[0x0f, 0x61, 0x00], "punpcklwd mm0, [eax]");
@@ -1518,13 +1575,13 @@ fn prefixed_0f() {
 #[test]
 fn prefixed_660f() {
     test_display(&[0x66, 0x0f, 0x10, 0xc0], "movupd xmm0, xmm0");
-    test_display(&[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0], "movupd xmm0, xmm0");
+    test_display(&[0xf2, 0x66, 0x66, 0x0f, 0x10, 0xc0], "movsd xmm0, xmm0");
 }
 
 #[test]
 fn prefixed_f20f() {
-    test_display(&[0xf2, 0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7");
-    test_display(&[0x66, 0xf2, 0x66, 0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7");
+    test_invalid(&[0xf2, 0x0f, 0x16, 0xcf]);
+    test_invalid(&[0x40, 0x66, 0xf2, 0x66, 0x4d, 0x0f, 0x16, 0xcf]);
 }
 
 #[test]
@@ -1605,6 +1662,10 @@ fn test_svm() {
 #[test]
 fn test_movbe() {
     test_display(&[0x0f, 0x38, 0xf0, 0x06], "movbe eax, [esi]");
+    test_invalid(&[0x0f, 0x38, 0xf0, 0xc6]);
+    test_display(&[0x0f, 0x38, 0xf1, 0x06], "movbe [esi], eax");
+    test_display(&[0x66, 0x0f, 0x38, 0xf1, 0x06], "movbe [esi], ax");
+    test_invalid(&[0x66, 0x0f, 0x38, 0xf1, 0xc6]);
 }
 
 #[test]
@@ -1627,6 +1688,7 @@ fn test_rand() {
 #[test]
 fn test_sha() {
     test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0x40], "sha1rnds4 xmm2, [edx], 0x40");
+    test_display(&[0x0f, 0x3a, 0xcc, 0x12, 0xff], "sha1rnds4 xmm2, [edx], 0xff");
     test_display(&[0x0f, 0x38, 0xc8, 0x12], "sha1nexte xmm2, [edx]");
     test_display(&[0x0f, 0x38, 0xc9, 0x12], "sha1msg1 xmm2, [edx]");
     test_display(&[0x0f, 0x38, 0xca, 0x12], "sha1msg2 xmm2, [edx]");
@@ -1639,7 +1701,6 @@ fn test_sha() {
 fn test_vmx() {
     test_display(&[0x0f, 0xc7, 0x3f], "vmptrst [edi]");
     test_display(&[0x0f, 0xc7, 0x37], "vmptrld [edi]");
-    test_display(&[0xf3, 0x0f, 0xc7, 0xf7], "rdrand edi");
     test_display(&[0xf3, 0x0f, 0xc7, 0x37], "vmxon [edi]");
     test_display(&[0x66, 0x0f, 0xc7, 0xf7], "rdrand di");
     test_display(&[0x66, 0x0f, 0xc7, 0x37], "vmclear [edi]");
@@ -1658,6 +1719,9 @@ fn test_rdpid() {
 #[test]
 fn test_cmpxchg8b() {
     test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]");
+    test_display(&[0xf2, 0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]");
+    test_display(&[0xf3, 0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]");
+    test_display(&[0x66, 0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]");
 }
 
 #[test]
@@ -2039,3 +2103,167 @@ fn test_x87() {
     test_invalid(&[0xdf, 0xfe]);
     test_invalid(&[0xdf, 0xff]);
 }
+
+#[test]
+fn test_mishegos_finds() {
+    test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
+    test_display(&[0x26, 0x66, 0x67, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm4");
+    test_display(&[0x65, 0x66, 0x66, 0x64, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, fs:[edi]");
+    test_invalid(&[0xf3, 0xf2, 0x0f, 0xae, 0x8f, 0x54, 0x3c, 0x58, 0xb7]);
+    /*
+    test_display(&[652e662e0f3814ff], "blendvps");
+    test_display(&[66666565450f3acf2b4b], "gf2 ");
+    */
+
+    // might just be yax trying to do a f20f decode when it should not be f2
+    // impossible instruction if operands could be read: lock is illegal here.
+    // test_display(&[f06565f2640f16], "???");
+//    test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd");
+    test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, [eax - 0x5]");
+    test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b [edi]");
+    test_display(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b, ], "movntdqa xmm5, [ebx]");
+    test_display(&[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c, 0xf0, 0x63, ], "blendpd xmm7, [ax - 0xf83d010], 0x63");
+    test_display(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d, ], "pmovsxwd xmm3, fs:[ebp + 0x2da80f69]");
+    test_display(&[0x2e, 0x66, 0x26, 0x64, 0x0f, 0x3a, 0x21, 0x0b, 0xb1, ], "insertps xmm1, fs:[ecx], -0x4f");
+    test_display(&[0x66, 0x26, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm10, [esi - 0x669d68c], 0x6a");
+    test_display(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03, 0xb3, 0xfa], "pmaxud xmm3, gs:[ebp - 0x54cfc34]");
+    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri [ebp + 0x3e], edx");
+    test_invalid(&[0x66, 0x2e, 0x64, 0x66, 0x0f, 0x38, 0xf8, 0xe2]);
+    test_display(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1");
+    test_display(&[0x2e, 0x66, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, [eax + 0x2d], 0x57");
+    test_display(&[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f, 0xcd, 0xd7], "lddqu xmm4, [ax - 0x2832a0e5]");
+    test_display(&[0x2e, 0x3e, 0x66, 0x3e, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, [eax], 0x48");
+
+    test_display(&[0x2e, 0x36, 0x47, 0x0f, 0x18, 0xe7], "nop r15d");
+    test_display(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg gs:[edi], ecx");
+    test_display(&[0x66, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75], "pclmulqdq xmm1, [eax + 0x3526adb3], 0x75");
+    test_display(&[0x0f, 0xff, 0x6b, 0xac], "ud0 ebp, [ebx - 0x54]");
+
+    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, [ebx + 0x3f9d1c09]");
+    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, fs:[edx + 0x54]");
+    test_invalid(&[0xf3, 0x0f, 0x38, 0xf8, 0xf3]);
+
+    test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0");
+
+    test_invalid(&[0xf3, 0x2e, 0x0f, 0x6a, 0x18]);
+}
+
+#[test]
+fn test_cet() {
+    // see
+    // https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
+    // includes encodings:
+    // wruss{d,q} 066 f 38 f5
+    // wrss{d,q} 0f 38 f6
+    // rstorssp f3 0f 01 /5
+    // saveprevssp f3 0f 01 ea
+    // rdssp{d,q} f3 0f 1e
+    // incssp{d,q} f3 0f ae /5
+    // test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd [eax + ebx * 4 - 0x2c0accb3], ecx");
+    // setssbsy f3 0f 01 e8
+    // clrssbsy f3 0f ae /6
+    // endbr64 f3 0f ae fa
+    // endbr32 f3 0f ae fb
+    test_display(&[0xf3, 0x0f, 0xae, 0xe9], "incssp ecx");
+    test_display(&[0x3e, 0x0f, 0x38, 0xf6, 0x23], "wrss [ebx], esp");
+    test_display(&[0x66, 0x0f, 0x38, 0xf5, 0x47, 0xe9], "wruss [edi - 0x17], eax");
+    test_invalid(&[0x0f, 0x38, 0xf5, 0x47, 0xe9]);
+    test_invalid(&[0x66, 0x3e, 0x65, 0x3e, 0x0f, 0x38, 0xf5, 0xf0]);
+    test_display(&[0xf3, 0x0f, 0x01, 0xe8], "setssbsy");
+    test_display(&[0xf3, 0x0f, 0x01, 0xea], "saveprevssp");
+    test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xe8], "setssbsy");
+    test_display(&[0x66, 0xf3, 0x0f, 0x01, 0xea], "saveprevssp");
+    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xe8], "setssbsy");
+    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0xea], "saveprevssp");
+    test_display(&[0xf3, 0x0f, 0x01, 0x29], "rstorssp [ecx]");
+    test_display(&[0xf3, 0x66, 0x0f, 0x01, 0x29], "rstorssp [ecx]");
+    test_display(&[0xf3, 0x0f, 0xae, 0x30], "clrssbsy [eax]");
+}
+
+#[test]
+fn test_sse4a() {
+    fn test_instr(bytes: &[u8], text: &'static str) {
+        test_display_under(&InstDecoder::minimal().with_sse4a(), bytes, text);
+        test_display_under(&InstDecoder::default(), bytes, text);
+        test_invalid_under(&InstDecoder::minimal(), bytes);
+    }
+
+    test_instr(&[0xf2, 0x0f, 0x2b, 0x06], "movntsd [esi], xmm0");
+    test_invalid(&[0xf2, 0x0f, 0x2b, 0xc6]);
+    test_instr(&[0xf3, 0x0f, 0x2b, 0x06], "movntss [esi], xmm0");
+    test_invalid(&[0xf3, 0x0f, 0xba, 0xc6]);
+    test_instr(&[0x66, 0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7");
+    test_invalid(&[0x66, 0xf2, 0x0f, 0x79, 0x0f]);
+    test_instr(&[0xf2, 0x0f, 0x79, 0xcf], "insertq xmm1, xmm7");
+    test_instr(&[0xf2, 0x0f, 0x78, 0xf1, 0x4e, 0x76], "insertq xmm6, xmm1, 0x4e, 0x76");
+    test_invalid(&[0xf2, 0x0f, 0x79, 0x0f]);
+    test_instr(&[0x66, 0x0f, 0x79, 0xcf], "extrq xmm1, xmm7");
+    test_invalid(&[0x66, 0x0f, 0x79, 0x0f]);
+    test_instr(&[0x66, 0x0f, 0x78, 0xc1, 0x4e, 0x76], "extrq xmm1, 0x4e, 0x76");
+    test_invalid(&[0x66, 0x0f, 0x78, 0xc9, 0x4e, 0x76]);
+}
+
+#[test]
+fn test_3dnow() {
+    test_display(&[0x0f, 0x0f, 0xe0, 0x8a], "pfnacc mm4, mm0");
+    test_display(&[0x0f, 0x0f, 0x38, 0x8e], "pfpnacc mm7, [eax]");
+    test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
+    test_display(&[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4], "pfmax mm4, [ebx + edx * 4 - 0x6d]");
+    test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw mm6, [eax - 0x5]");
+    test_display(&[0x66, 0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6");
+    test_display(&[0x0f, 0x0f, 0xc6, 0xb7], "pmulhrw mm0, mm6");
+}
+
+// first appeared in tremont
+#[test]
+fn test_direct_stores() {
+    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri [ebp + 0x3e], edx");
+    test_display(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, [ebp + 0x729080b]");
+}
+
+#[test]
+fn test_key_locker() {
+    test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0");
+    test_display(&[0xf3, 0x0f, 0x38, 0xfa, 0xde], "encodekey128 ebx, esi");
+    test_display(&[0xf3, 0x0f, 0x38, 0xfb, 0xde], "encodekey256 ebx, esi");
+}
+
+// these uinter test cases come from llvm:
+// https://reviews.llvm.org/differential/changeset/?ref=2226860
+#[test]
+fn test_uintr() {
+    test_display(&[0xf3, 0x0f, 0x01, 0xec], "uiret");
+    test_display(&[0xf3, 0x0f, 0x01, 0xed], "testui");
+    test_display(&[0xf3, 0x0f, 0x01, 0xee], "clui");
+    test_display(&[0xf3, 0x0f, 0x01, 0xef], "stui");
+    test_display(&[0xf3, 0x0f, 0xc7, 0xf0], "senduipi eax");
+    test_display(&[0xf3, 0x0f, 0xc7, 0xf2], "senduipi edx");
+}
+
+// started shipping in sapphire rapids
+#[test]
+fn test_enqcmd() {
+    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd eax, [ebx + 0x3f9d1c09]");
+    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, fs:[edx + 0x54]");
+}
+
+#[test]
+fn test_gfni() {
+    test_display(&[0x3e, 0x64, 0x64, 0x66, 0x0f, 0x3a, 0xcf, 0xba, 0x13, 0x23, 0x04, 0xba, 0x6b], "gf2p8affineinvqb xmm7, fs:[edx - 0x45fbdced], 0x6b");
+    test_display(&[0x66, 0x36, 0x0f, 0x3a, 0xce, 0x8c, 0x56, 0x9e, 0x82, 0xd1, 0xbe, 0xad], "gf2p8affineqb xmm1, [esi + edx * 2 - 0x412e7d62], 0xad");
+    test_display(&[0x66, 0x0f, 0x38, 0xcf, 0x1c, 0x54], "gf2p8mulb xmm11, [esp + edx * 2]");
+}
+
+#[test]
+fn test_tdx() {
+    test_display(&[0x66, 0x0f, 0x01, 0xcc], "tdcall");
+    test_display(&[0x66, 0x0f, 0x01, 0xcd], "seamret");
+    test_display(&[0x66, 0x0f, 0x01, 0xce], "seamops");
+    test_display(&[0x66, 0x0f, 0x01, 0xcf], "seamcall");
+}
+
+#[test]
+fn test_tsxldtrk() {
+    test_display(&[0xf2, 0x0f, 0x01, 0xe8], "xsusldtrk");
+    test_display(&[0xf2, 0x0f, 0x01, 0xe9], "xresldtrk");
+}