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authoriximeow <me@iximeow.net>2021-07-03 13:39:46 -0700
committeriximeow <me@iximeow.net>2021-07-03 13:43:39 -0700
commit7796f7e088c5aa878cfb61b5a885b64daf390808 (patch)
treee070d42e01c88aba9efea534749160f191b9483b /test/protected_mode/operand.rs
parent2e34ef39d75caeb10c499712bc28ac9de8abf984 (diff)
clean up x86_32 and make interfaces match x86_64
Diffstat (limited to 'test/protected_mode/operand.rs')
-rw-r--r--test/protected_mode/operand.rs12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/protected_mode/operand.rs b/test/protected_mode/operand.rs
index 0813c34..028cb8f 100644
--- a/test/protected_mode/operand.rs
+++ b/test/protected_mode/operand.rs
@@ -2,14 +2,14 @@ use yaxpeax_x86::protected_mode::{Operand, RegSpec};
#[test]
fn register_widths() {
- assert_eq!(Operand::Register(RegSpec::esp()).width(), 4);
- assert_eq!(Operand::Register(RegSpec::sp()).width(), 2);
- assert_eq!(Operand::Register(RegSpec::cl()).width(), 1);
- assert_eq!(Operand::Register(RegSpec::ch()).width(), 1);
- assert_eq!(Operand::Register(RegSpec::gs()).width(), 2);
+ assert_eq!(Operand::Register(RegSpec::esp()).width(), Some(4));
+ assert_eq!(Operand::Register(RegSpec::sp()).width(), Some(2));
+ assert_eq!(Operand::Register(RegSpec::cl()).width(), Some(1));
+ assert_eq!(Operand::Register(RegSpec::ch()).width(), Some(1));
+ assert_eq!(Operand::Register(RegSpec::gs()).width(), Some(2));
}
#[test]
fn memory_widths() {
-// assert_eq!(Operand::RegDeref(RegSpec::esp()).width(), 4);
+ assert_eq!(Operand::RegDeref(RegSpec::esp()).width(), None);
}