rename most operand variants, make them structy rather than tupley

2 files changed, 14 insertions, 14 deletions

diff --git a/test/long_mode/operand.rs b/test/long_mode/operand.rs
index a47e6c8..0faa1c3 100644
--- a/test/long_mode/operand.rs
+++ b/test/long_mode/operand.rs
@@ -3,19 +3,19 @@ use yaxpeax_x86::MemoryAccessSize;
 
 #[test]
 fn register_widths() {
-    assert_eq!(Operand::Register(RegSpec::rsp()).width(), Some(8));
-    assert_eq!(Operand::Register(RegSpec::esp()).width(), Some(4));
-    assert_eq!(Operand::Register(RegSpec::sp()).width(), Some(2));
-    assert_eq!(Operand::Register(RegSpec::cl()).width(), Some(1));
-    assert_eq!(Operand::Register(RegSpec::ch()).width(), Some(1));
-    assert_eq!(Operand::Register(RegSpec::gs()).width(), Some(2));
+    assert_eq!(Operand::Register { reg: RegSpec::rsp() }.width(), Some(8));
+    assert_eq!(Operand::Register { reg: RegSpec::esp() }.width(), Some(4));
+    assert_eq!(Operand::Register { reg: RegSpec::sp() }.width(), Some(2));
+    assert_eq!(Operand::Register { reg: RegSpec::cl() }.width(), Some(1));
+    assert_eq!(Operand::Register { reg: RegSpec::ch() }.width(), Some(1));
+    assert_eq!(Operand::Register { reg: RegSpec::gs() }.width(), Some(2));
 }
 
 #[test]
 fn memory_widths() {
     // the register operand directly doesn't report a size - it comes from the `Instruction` for
-    // which this is an operand.
-    assert_eq!(Operand::RegDeref(RegSpec::rsp()).width(), None);
+    // which this is an operand .
+    assert_eq!(Operand::MemDeref { base: RegSpec::rsp() }.width(), None);
 
     fn mem_size_of(data: &[u8]) -> MemoryAccessSize {
         let decoder = InstDecoder::default();
diff --git a/test/protected_mode/operand.rs b/test/protected_mode/operand.rs
index 6eb9ba5..78a34b4 100644
--- a/test/protected_mode/operand.rs
+++ b/test/protected_mode/operand.rs
@@ -3,18 +3,18 @@ use yaxpeax_x86::MemoryAccessSize;
 
 #[test]
 fn register_widths() {
-    assert_eq!(Operand::Register(RegSpec::esp()).width(), Some(4));
-    assert_eq!(Operand::Register(RegSpec::sp()).width(), Some(2));
-    assert_eq!(Operand::Register(RegSpec::cl()).width(), Some(1));
-    assert_eq!(Operand::Register(RegSpec::ch()).width(), Some(1));
-    assert_eq!(Operand::Register(RegSpec::gs()).width(), Some(2));
+    assert_eq!(Operand::Register { reg: RegSpec::esp() }.width(), Some(4));
+    assert_eq!(Operand::Register { reg: RegSpec::sp() }.width(), Some(2));
+    assert_eq!(Operand::Register { reg: RegSpec::cl() }.width(), Some(1));
+    assert_eq!(Operand::Register { reg: RegSpec::ch() }.width(), Some(1));
+    assert_eq!(Operand::Register { reg: RegSpec::gs() }.width(), Some(2));
 }
 
 #[test]
 fn memory_widths() {
     // the register operand directly doesn't report a size - it comes from the `Instruction` for
     // which this is an operand.
-    assert_eq!(Operand::RegDeref(RegSpec::esp()).width(), None);
+    assert_eq!(Operand::MemDeref { base: RegSpec::esp() }.width(), None);
 
     fn mem_size_of(data: &[u8]) -> MemoryAccessSize {
         let decoder = InstDecoder::default();