support several new extensions, 3dnow, and nuance in invalid operands

1 files changed, 101 insertions, 6 deletions

diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index 2fb8833..a1e8c36 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -134,7 +134,7 @@ fn test_mmx() {
     test_invalid(&[0x0f, 0xe7, 0xc3]);
 
     test_display(&[0x4f, 0x0f, 0xc3, 0x03], "movnti [r11], r8");
-    test_display(&[0x66, 0x0f, 0xc3, 0x03], "movnti [rbx], eax");
+    test_invalid(&[0x66, 0x0f, 0xc3, 0x03]);
     test_display(&[0x0f, 0xc3, 0x03], "movnti [rbx], eax");
     test_invalid(&[0x0f, 0xc3, 0xc3]);
 
@@ -299,8 +299,8 @@ fn test_sse2() {
     test_instr(&[0x66, 0x4f, 0x0f, 0x50, 0xc1], "movmskpd r8d, xmm9");
     test_instr(&[0x66, 0x4f, 0x0f, 0x51, 0x01], "sqrtpd xmm8, [r9]");
     test_instr(&[0xf2, 0x4f, 0x0f, 0x51, 0x01], "sqrtsd xmm8, [r9]");
-    test_instr(&[0x66, 0x4f, 0x0f, 0x52, 0x01], "rsqrtps xmm8, [r9]"); // note: NOT "rsqrtpd" - no such instruction exists, so fall back to just 0f52 parse.
-    test_instr(&[0x66, 0x4f, 0x0f, 0x53, 0x01], "rcpps xmm8, [r9]"); // note: NOT "rcppd" - no such instruction exists, so fall back to just 0f53 parse.
+    test_invalid(&[0x66, 0x4f, 0x0f, 0x52, 0x01]);
+    test_invalid(&[0x66, 0x4f, 0x0f, 0x53, 0x01]);
     test_instr(&[0x66, 0x4f, 0x0f, 0x54, 0x01], "andpd xmm8, [r9]");
     test_instr(&[0x66, 0x4f, 0x0f, 0x55, 0x01], "andnpd xmm8, [r9]");
     test_instr(&[0x66, 0x4f, 0x0f, 0x56, 0x01], "orpd xmm8, [r9]");
@@ -1318,7 +1318,7 @@ fn test_misc() {
     test_display(&[0x48, 0x98], "cdqe");
     test_display(&[0x98], "cwde");
     test_display(&[0x66, 0x99], "cwd");
-    test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop cs:[rax + rax * 1]");
+    test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop [rax + rax * 1]");
     test_display(&[0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00], "nop [rax + rax * 1]");
     test_display(&[0x48, 0x8d, 0xa4, 0xc7, 0x20, 0x00, 0x00, 0x12], "lea rsp, [rdi + rax * 8 + 0x12000020]");
     test_display(&[0x33, 0xc0], "xor eax, eax");
@@ -1642,8 +1642,8 @@ fn prefixed_660f() {
 
 #[test]
 fn prefixed_f20f() {
-    test_display(&[0xf2, 0x0f, 0x16, 0xcf], "movlhps xmm1, xmm7");
-    test_display(&[0xf2, 0x4d, 0x0f, 0x16, 0xcf], "movlhps xmm9, xmm15");
+    test_invalid(&[0xf2, 0x0f, 0x16, 0xcf]);
+    test_invalid(&[0xf2, 0x4d, 0x0f, 0x16, 0xcf]);
     test_display(&[0x40, 0x66, 0xf2, 0x66, 0x4d, 0x0f, 0x16, 0xcf], "movlhps xmm9, xmm15");
 }
 
@@ -2136,3 +2136,98 @@ fn test_x87() {
     test_invalid(&[0xdf, 0xfe]);
     test_invalid(&[0xdf, 0xff]);
 }
+
+#[test]
+fn test_mishegos_finds() {
+    test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
+    test_display(&[0x26, 0x66, 0x67, 0x41, 0x0f, 0x38, 0xdf, 0xe4], "aesdeclast xmm4, xmm12");
+    test_display(&[0x65, 0x66, 0x66, 0x64, 0x48, 0x0f, 0x38, 0xdb, 0x0f], "aesimc xmm1, fs:[rdi]");
+    /*
+    test_display(&[652e662e0f3814ff], "blendvps");
+    test_display(&[66666565450f3acf2b4b], "gf2 ");
+    test_display(&[2e64f2f3400f38fbf8], "encodekey256");
+    */
+
+    // might just be yax trying to do a f20f decode when it should not be f2
+    // impossible instruction if operands could be read: lock is illegal here.
+    // test_display(&[f06565f2640f16], "???");
+//    test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd");
+    test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw");
+    test_display(&[0x0f, 0xc7, 0x0f], "cmpxchg8b [rdi]");
+    test_display(&[0x4f, 0x0f, 0xc7, 0x0f], "cmpxchg16b [r15]");
+    test_display(&[0x66, 0x3e, 0x26, 0x2e, 0x2e, 0x0f, 0x38, 0x2a, 0x2b, ], "movntdqa xmm5, [rbx]");
+    test_display(&[0x66, 0x2e, 0x67, 0x0f, 0x3a, 0x0d, 0xb8, 0xf0, 0x2f, 0x7c, 0xf0, 0x63, ], "blendpd xmm7, [eax - 0xf83d010], 0x63");
+    test_display(&[0x66, 0x66, 0x64, 0x3e, 0x0f, 0x38, 0x23, 0x9d, 0x69, 0x0f, 0xa8, 0x2d, ], "pmovsxwd xmm3, [rbp + 0x2da80f69]");
+    test_display(&[0x2e, 0x66, 0x26, 0x64, 0x49, 0x0f, 0x3a, 0x21, 0x0b, 0xb1, ], "insertps xmm1, fs:[r11], -0x4f");
+    test_display(&[0x66, 0x26, 0x45, 0x0f, 0x3a, 0x42, 0x96, 0x74, 0x29, 0x96, 0xf9, 0x6a], "mpsadbw xmm10, [r14 - 0x669d68c], 0x6a");
+    test_display(&[0x67, 0x26, 0x66, 0x65, 0x0f, 0x38, 0x3f, 0x9d, 0xcc, 0x03, 0xb3, 0xfa], "pmaxud xmm3, gs:[ebp - 0x54cfc34]");
+    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri [rbp + 0x3e], edx");
+    test_display(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b rbp, [rbp + 0x729080b]");
+    test_display(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, [ebp + 0x729080b]");
+    test_display(&[0x67, 0x66, 0x65, 0x3e, 0x0f, 0x6d, 0xd1], "punpckhqdq xmm2, xmm1");
+    test_display(&[0x2e, 0x66, 0x40, 0x0f, 0x3a, 0x0d, 0x40, 0x2d, 0x57], "blendpd xmm0, [rax + 0x2d], 0x57");
+    test_display(&[0xf2, 0x3e, 0x26, 0x67, 0x0f, 0xf0, 0xa0, 0x1b, 0x5f, 0xcd, 0xd7], "lddqu xmm4, [eax - 0x2832a0e5]");
+    test_display(&[0x2e, 0x3e, 0x66, 0x3e, 0x49, 0x0f, 0x3a, 0x41, 0x30, 0x48], "dppd xmm6, [r8], 0x48");
+
+    test_display(&[0x2e, 0x36, 0x47, 0x0f, 0x18, 0xe7], "nop r15d");
+    test_display(&[0x65, 0xf0, 0x87, 0x0f], "lock xchg gs:[rdi], ecx");
+    test_display(&[0x66, 0x4e, 0x0f, 0x3a, 0x44, 0x88, 0xb3, 0xad, 0x26, 0x35, 0x75], "pclmulqdq xmm9, [rax + 0x3526adb3], 0x75");
+    test_display(&[0x4c, 0x0f, 0xff, 0x6b, 0xac], "ud0 r13, [rbx - 0x54]");
+
+    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x47, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd r8d, [r11 + 0x3f9d1c09]");
+    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, fs:[rdx + 0x54]");
+
+    test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0");
+
+    test_invalid(&[0xf3, 0x2e, 0x0f, 0x6a, 0x18]);
+}
+
+#[test]
+fn test_cet() {
+    // see
+    // https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
+    // includes encodings:
+    // wruss{d,q} 066 f 38 f5
+    // wrss{d,q} 0f 38 f6
+    // rstorssp f3 0f 01 /5
+    // saveprevssp f3 0f 01 ea
+    // rdssp{d,q} f3 0f 1e
+    // incssp{d,q} f3 0f ae /5
+    // test_display(&[0x0f, 0x38, 0xf6, 0x8c, 0x98, 0x4d, 0x33, 0xf5, 0xd3, ], "wrssd [rax + rbx * 4 - 0x2c0accb3], ecx");
+    // setssbsy f3 0f 01 e8
+    // clrssbsy f3 0f ae /6
+    // endbr64 f3 0f ae fa
+    // endbr32 f3 0f ae fb
+}
+
+#[test]
+fn test_sse4a() {
+    // really gotta get some test cases for this
+}
+
+#[test]
+fn test_3dnow() {
+    test_display(&[0x65, 0x67, 0x65, 0x65, 0x0f, 0x0e], "femms");
+    test_display(&[0x3e, 0xf3, 0x2e, 0xf2, 0x0f, 0x0f, 0x64, 0x93, 0x93, 0xa4], "pfmax mm4, [rbx + rdx * 4 - 0x6d]");
+    test_display(&[0x26, 0x36, 0x0f, 0x0f, 0x70, 0xfb, 0x0c], "pi2fw");
+}
+
+// first appeared in tremont
+#[test]
+fn test_direct_stores() {
+    test_display(&[0x36, 0x36, 0x2e, 0x0f, 0x38, 0xf9, 0x55, 0x3e, ], "movdiri [rbp + 0x3e], edx");
+    test_display(&[0x36, 0x26, 0x66, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b rbp, [rbp + 0x729080b]");
+    test_display(&[0x36, 0x26, 0x66, 0x67, 0x0f, 0x38, 0xf8, 0xad, 0x0b, 0x08, 0x29, 0x07], "movdir64b ebp, [ebp + 0x729080b]");
+}
+
+#[test]
+fn test_key_locker() {
+    test_display(&[0xf3, 0x64, 0x2e, 0x65, 0x0f, 0x38, 0xdc, 0xe8], "loadiwkey xmm5, xmm0");
+}
+
+// started shipping in sapphire rapids
+#[test]
+fn test_enqcmd() {
+    test_display(&[0xf2, 0xf2, 0x2e, 0x36, 0x47, 0x0f, 0x38, 0xf8, 0x83, 0x09, 0x1c, 0x9d, 0x3f], "enqcmd r8d, [r11 + 0x3f9d1c09]");
+    test_display(&[0x3e, 0x64, 0xf3, 0x64, 0x0f, 0x38, 0xf8, 0x72, 0x54], "enqcmds esi, fs:[rdx + 0x54]");
+}