diff options
| -rw-r--r-- | CHANGELOG | 4 | ||||
| -rw-r--r-- | src/long_mode/mod.rs | 71 | ||||
| -rw-r--r-- | src/protected_mode/mod.rs | 71 | ||||
| -rw-r--r-- | src/real_mode/mod.rs | 71 | ||||
| -rw-r--r-- | test/long_mode/mod.rs | 1 | ||||
| -rw-r--r-- | test/long_mode/opcode.rs | 79 | ||||
| -rw-r--r-- | test/protected_mode/mod.rs | 1 | ||||
| -rw-r--r-- | test/protected_mode/opcode.rs | 79 | ||||
| -rw-r--r-- | test/real_mode/mod.rs | 1 | ||||
| -rw-r--r-- | test/real_mode/opcode.rs | 79 |
10 files changed, 457 insertions, 0 deletions
@@ -4,6 +4,10 @@ * this "getter" would in fact set the selected segment to `cs`. it has never actually returned a `bool`, like other selector-checking methods on `Prefixes`. +* add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpers + * discovered that `jna` and `jnb` are named what they are, instead of + `jbe`/`jae` like their `setcc` an `cmovcc` counterparts. sorry. these will + become `jbe` and `jae` in 2.x. ## 1.1.5 * fix several typos across crate docs - thank you Bruce! (aka github user waywardmonkeys) diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index a89d673..ba6f410 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -4197,6 +4197,77 @@ impl AnnotatingDecoder<Arch> for InstDecoder { } impl Opcode { + /// check if the instruction is one of x86's sixteen conditional jump instructions. use this + /// rather than `opcode.to_string().starts_with("j") && opcode != Opcode::JMP`, thank you. + pub fn is_jcc(&self) -> bool { + match self { + Opcode::JO | + Opcode::JNO | + Opcode::JB | + Opcode::JNB | + Opcode::JZ | + Opcode::JNZ | + Opcode::JA | + Opcode::JNA | + Opcode::JS | + Opcode::JNS | + Opcode::JP | + Opcode::JNP | + Opcode::JL | + Opcode::JGE | + Opcode::JG | + Opcode::JLE => true, + _ => false, + } + } + + /// check if the instruction is one of x86's sixteen conditional move instructions. + pub fn is_cmovcc(&self) -> bool { + match self { + Opcode::CMOVO | + Opcode::CMOVNO | + Opcode::CMOVB | + Opcode::CMOVNB | + Opcode::CMOVZ | + Opcode::CMOVNZ | + Opcode::CMOVA | + Opcode::CMOVNA | + Opcode::CMOVS | + Opcode::CMOVNS | + Opcode::CMOVP | + Opcode::CMOVNP | + Opcode::CMOVL | + Opcode::CMOVGE | + Opcode::CMOVG | + Opcode::CMOVLE => true, + _ => false, + } + } + + /// check if the instruction is one of x86's sixteen conditional set instructions. + pub fn is_setcc(&self) -> bool { + match self { + Opcode::SETO | + Opcode::SETNO | + Opcode::SETB | + Opcode::SETAE | + Opcode::SETZ | + Opcode::SETNZ | + Opcode::SETA | + Opcode::SETBE | + Opcode::SETS | + Opcode::SETNS | + Opcode::SETP | + Opcode::SETNP | + Opcode::SETL | + Opcode::SETGE | + Opcode::SETG | + Opcode::SETLE => true, + _ => false + } + + } + /// get the [`ConditionCode`] for this instruction, if it is in fact conditional. x86's /// conditional instructions are `Jcc`, `CMOVcc`, andd `SETcc`. pub fn condition(&self) -> Option<ConditionCode> { diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index 223c834..ee1ca46 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -4149,6 +4149,77 @@ impl AnnotatingDecoder<Arch> for InstDecoder { } impl Opcode { + /// check if the instruction is one of x86's sixteen conditional jump instructions. use this + /// rather than `opcode.to_string().starts_with("j") && opcode != Opcode::JMP`, thank you. + pub fn is_jcc(&self) -> bool { + match self { + Opcode::JO | + Opcode::JNO | + Opcode::JB | + Opcode::JNB | + Opcode::JZ | + Opcode::JNZ | + Opcode::JA | + Opcode::JNA | + Opcode::JS | + Opcode::JNS | + Opcode::JP | + Opcode::JNP | + Opcode::JL | + Opcode::JGE | + Opcode::JG | + Opcode::JLE => true, + _ => false, + } + } + + /// check if the instruction is one of x86's sixteen conditional move instructions. + pub fn is_cmovcc(&self) -> bool { + match self { + Opcode::CMOVO | + Opcode::CMOVNO | + Opcode::CMOVB | + Opcode::CMOVNB | + Opcode::CMOVZ | + Opcode::CMOVNZ | + Opcode::CMOVA | + Opcode::CMOVNA | + Opcode::CMOVS | + Opcode::CMOVNS | + Opcode::CMOVP | + Opcode::CMOVNP | + Opcode::CMOVL | + Opcode::CMOVGE | + Opcode::CMOVG | + Opcode::CMOVLE => true, + _ => false, + } + } + + /// check if the instruction is one of x86's sixteen conditional set instructions. + pub fn is_setcc(&self) -> bool { + match self { + Opcode::SETO | + Opcode::SETNO | + Opcode::SETB | + Opcode::SETAE | + Opcode::SETZ | + Opcode::SETNZ | + Opcode::SETA | + Opcode::SETBE | + Opcode::SETS | + Opcode::SETNS | + Opcode::SETP | + Opcode::SETNP | + Opcode::SETL | + Opcode::SETGE | + Opcode::SETG | + Opcode::SETLE => true, + _ => false + } + + } + /// get the [`ConditionCode`] for this instruction, if it is in fact conditional. x86's /// conditional instructions are `Jcc`, `CMOVcc`, andd `SETcc`. pub fn condition(&self) -> Option<ConditionCode> { diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs index 1f6614e..676f9b6 100644 --- a/src/real_mode/mod.rs +++ b/src/real_mode/mod.rs @@ -4149,6 +4149,77 @@ impl AnnotatingDecoder<Arch> for InstDecoder { } impl Opcode { + /// check if the instruction is one of x86's sixteen conditional jump instructions. use this + /// rather than `opcode.to_string().starts_with("j") && opcode != Opcode::JMP`, thank you. + pub fn is_jcc(&self) -> bool { + match self { + Opcode::JO | + Opcode::JNO | + Opcode::JB | + Opcode::JNB | + Opcode::JZ | + Opcode::JNZ | + Opcode::JA | + Opcode::JNA | + Opcode::JS | + Opcode::JNS | + Opcode::JP | + Opcode::JNP | + Opcode::JL | + Opcode::JGE | + Opcode::JG | + Opcode::JLE => true, + _ => false, + } + } + + /// check if the instruction is one of x86's sixteen conditional move instructions. + pub fn is_cmovcc(&self) -> bool { + match self { + Opcode::CMOVO | + Opcode::CMOVNO | + Opcode::CMOVB | + Opcode::CMOVNB | + Opcode::CMOVZ | + Opcode::CMOVNZ | + Opcode::CMOVA | + Opcode::CMOVNA | + Opcode::CMOVS | + Opcode::CMOVNS | + Opcode::CMOVP | + Opcode::CMOVNP | + Opcode::CMOVL | + Opcode::CMOVGE | + Opcode::CMOVG | + Opcode::CMOVLE => true, + _ => false, + } + } + + /// check if the instruction is one of x86's sixteen conditional set instructions. + pub fn is_setcc(&self) -> bool { + match self { + Opcode::SETO | + Opcode::SETNO | + Opcode::SETB | + Opcode::SETAE | + Opcode::SETZ | + Opcode::SETNZ | + Opcode::SETA | + Opcode::SETBE | + Opcode::SETS | + Opcode::SETNS | + Opcode::SETP | + Opcode::SETNP | + Opcode::SETL | + Opcode::SETGE | + Opcode::SETG | + Opcode::SETLE => true, + _ => false + } + + } + /// get the [`ConditionCode`] for this instruction, if it is in fact conditional. x86's /// conditional instructions are `Jcc`, `CMOVcc`, andd `SETcc`. pub fn condition(&self) -> Option<ConditionCode> { diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs index eeee155..12d5f96 100644 --- a/test/long_mode/mod.rs +++ b/test/long_mode/mod.rs @@ -2,6 +2,7 @@ extern crate rand; mod regspec; mod operand; +mod opcode; #[cfg(feature="fmt")] mod display; #[cfg(feature="std")] diff --git a/test/long_mode/opcode.rs b/test/long_mode/opcode.rs new file mode 100644 index 0000000..9b9c141 --- /dev/null +++ b/test/long_mode/opcode.rs @@ -0,0 +1,79 @@ +use yaxpeax_x86::long_mode::{ConditionCode, Opcode}; + +#[test] +fn conditional_instructions() { + const JCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::JO, ConditionCode::O), + (Opcode::JNO, ConditionCode::NO), + (Opcode::JB, ConditionCode::B), + (Opcode::JNB, ConditionCode::AE), + (Opcode::JZ, ConditionCode::Z), + (Opcode::JNZ, ConditionCode::NZ), + (Opcode::JA, ConditionCode::A), + (Opcode::JNA, ConditionCode::BE), + (Opcode::JS, ConditionCode::S), + (Opcode::JNS, ConditionCode::NS), + (Opcode::JP, ConditionCode::P), + (Opcode::JNP, ConditionCode::NP), + (Opcode::JL, ConditionCode::L), + (Opcode::JGE, ConditionCode::GE), + (Opcode::JG, ConditionCode::G), + (Opcode::JLE, ConditionCode::LE), + ]; + for (opc, cond) in JCC.iter() { + assert!(opc.is_jcc()); + assert!(!opc.is_setcc()); + assert!(!opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } + + const SETCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::SETO, ConditionCode::O), + (Opcode::SETNO, ConditionCode::NO), + (Opcode::SETB, ConditionCode::B), + (Opcode::SETAE, ConditionCode::AE), + (Opcode::SETZ, ConditionCode::Z), + (Opcode::SETNZ, ConditionCode::NZ), + (Opcode::SETA, ConditionCode::A), + (Opcode::SETBE, ConditionCode::BE), + (Opcode::SETS, ConditionCode::S), + (Opcode::SETNS, ConditionCode::NS), + (Opcode::SETP, ConditionCode::P), + (Opcode::SETNP, ConditionCode::NP), + (Opcode::SETL, ConditionCode::L), + (Opcode::SETGE, ConditionCode::GE), + (Opcode::SETG, ConditionCode::G), + (Opcode::SETLE, ConditionCode::LE), + ]; + for (opc, cond) in SETCC.iter() { + assert!(!opc.is_jcc()); + assert!(opc.is_setcc()); + assert!(!opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } + + const CMOVCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::CMOVO, ConditionCode::O), + (Opcode::CMOVNO, ConditionCode::NO), + (Opcode::CMOVB, ConditionCode::B), + (Opcode::CMOVNB, ConditionCode::AE), + (Opcode::CMOVZ, ConditionCode::Z), + (Opcode::CMOVNZ, ConditionCode::NZ), + (Opcode::CMOVA, ConditionCode::A), + (Opcode::CMOVNA, ConditionCode::BE), + (Opcode::CMOVS, ConditionCode::S), + (Opcode::CMOVNS, ConditionCode::NS), + (Opcode::CMOVP, ConditionCode::P), + (Opcode::CMOVNP, ConditionCode::NP), + (Opcode::CMOVL, ConditionCode::L), + (Opcode::CMOVGE, ConditionCode::GE), + (Opcode::CMOVG, ConditionCode::G), + (Opcode::CMOVLE, ConditionCode::LE), + ]; + for (opc, cond) in CMOVCC.iter() { + assert!(!opc.is_jcc()); + assert!(!opc.is_setcc()); + assert!(opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } +} diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs index 93f4b8f..0270dcc 100644 --- a/test/protected_mode/mod.rs +++ b/test/protected_mode/mod.rs @@ -1,5 +1,6 @@ mod regspec; mod operand; +mod opcode; #[cfg(feature="fmt")] mod display; mod evex_generated; diff --git a/test/protected_mode/opcode.rs b/test/protected_mode/opcode.rs new file mode 100644 index 0000000..b6ab1d3 --- /dev/null +++ b/test/protected_mode/opcode.rs @@ -0,0 +1,79 @@ +use yaxpeax_x86::protected_mode::{ConditionCode, Opcode}; + +#[test] +fn conditional_instructions() { + const JCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::JO, ConditionCode::O), + (Opcode::JNO, ConditionCode::NO), + (Opcode::JB, ConditionCode::B), + (Opcode::JNB, ConditionCode::AE), + (Opcode::JZ, ConditionCode::Z), + (Opcode::JNZ, ConditionCode::NZ), + (Opcode::JA, ConditionCode::A), + (Opcode::JNA, ConditionCode::BE), + (Opcode::JS, ConditionCode::S), + (Opcode::JNS, ConditionCode::NS), + (Opcode::JP, ConditionCode::P), + (Opcode::JNP, ConditionCode::NP), + (Opcode::JL, ConditionCode::L), + (Opcode::JGE, ConditionCode::GE), + (Opcode::JG, ConditionCode::G), + (Opcode::JLE, ConditionCode::LE), + ]; + for (opc, cond) in JCC.iter() { + assert!(opc.is_jcc()); + assert!(!opc.is_setcc()); + assert!(!opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } + + const SETCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::SETO, ConditionCode::O), + (Opcode::SETNO, ConditionCode::NO), + (Opcode::SETB, ConditionCode::B), + (Opcode::SETAE, ConditionCode::AE), + (Opcode::SETZ, ConditionCode::Z), + (Opcode::SETNZ, ConditionCode::NZ), + (Opcode::SETA, ConditionCode::A), + (Opcode::SETBE, ConditionCode::BE), + (Opcode::SETS, ConditionCode::S), + (Opcode::SETNS, ConditionCode::NS), + (Opcode::SETP, ConditionCode::P), + (Opcode::SETNP, ConditionCode::NP), + (Opcode::SETL, ConditionCode::L), + (Opcode::SETGE, ConditionCode::GE), + (Opcode::SETG, ConditionCode::G), + (Opcode::SETLE, ConditionCode::LE), + ]; + for (opc, cond) in SETCC.iter() { + assert!(!opc.is_jcc()); + assert!(opc.is_setcc()); + assert!(!opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } + + const CMOVCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::CMOVO, ConditionCode::O), + (Opcode::CMOVNO, ConditionCode::NO), + (Opcode::CMOVB, ConditionCode::B), + (Opcode::CMOVNB, ConditionCode::AE), + (Opcode::CMOVZ, ConditionCode::Z), + (Opcode::CMOVNZ, ConditionCode::NZ), + (Opcode::CMOVA, ConditionCode::A), + (Opcode::CMOVNA, ConditionCode::BE), + (Opcode::CMOVS, ConditionCode::S), + (Opcode::CMOVNS, ConditionCode::NS), + (Opcode::CMOVP, ConditionCode::P), + (Opcode::CMOVNP, ConditionCode::NP), + (Opcode::CMOVL, ConditionCode::L), + (Opcode::CMOVGE, ConditionCode::GE), + (Opcode::CMOVG, ConditionCode::G), + (Opcode::CMOVLE, ConditionCode::LE), + ]; + for (opc, cond) in CMOVCC.iter() { + assert!(!opc.is_jcc()); + assert!(!opc.is_setcc()); + assert!(opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } +} diff --git a/test/real_mode/mod.rs b/test/real_mode/mod.rs index 27ef2f6..21c1d2a 100644 --- a/test/real_mode/mod.rs +++ b/test/real_mode/mod.rs @@ -1,4 +1,5 @@ mod operand; +mod opcode; use std::fmt::Write; diff --git a/test/real_mode/opcode.rs b/test/real_mode/opcode.rs new file mode 100644 index 0000000..ad35d94 --- /dev/null +++ b/test/real_mode/opcode.rs @@ -0,0 +1,79 @@ +use yaxpeax_x86::real_mode::{ConditionCode, Opcode}; + +#[test] +fn conditional_instructions() { + const JCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::JO, ConditionCode::O), + (Opcode::JNO, ConditionCode::NO), + (Opcode::JB, ConditionCode::B), + (Opcode::JNB, ConditionCode::AE), + (Opcode::JZ, ConditionCode::Z), + (Opcode::JNZ, ConditionCode::NZ), + (Opcode::JA, ConditionCode::A), + (Opcode::JNA, ConditionCode::BE), + (Opcode::JS, ConditionCode::S), + (Opcode::JNS, ConditionCode::NS), + (Opcode::JP, ConditionCode::P), + (Opcode::JNP, ConditionCode::NP), + (Opcode::JL, ConditionCode::L), + (Opcode::JGE, ConditionCode::GE), + (Opcode::JG, ConditionCode::G), + (Opcode::JLE, ConditionCode::LE), + ]; + for (opc, cond) in JCC.iter() { + assert!(opc.is_jcc()); + assert!(!opc.is_setcc()); + assert!(!opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } + + const SETCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::SETO, ConditionCode::O), + (Opcode::SETNO, ConditionCode::NO), + (Opcode::SETB, ConditionCode::B), + (Opcode::SETAE, ConditionCode::AE), + (Opcode::SETZ, ConditionCode::Z), + (Opcode::SETNZ, ConditionCode::NZ), + (Opcode::SETA, ConditionCode::A), + (Opcode::SETBE, ConditionCode::BE), + (Opcode::SETS, ConditionCode::S), + (Opcode::SETNS, ConditionCode::NS), + (Opcode::SETP, ConditionCode::P), + (Opcode::SETNP, ConditionCode::NP), + (Opcode::SETL, ConditionCode::L), + (Opcode::SETGE, ConditionCode::GE), + (Opcode::SETG, ConditionCode::G), + (Opcode::SETLE, ConditionCode::LE), + ]; + for (opc, cond) in SETCC.iter() { + assert!(!opc.is_jcc()); + assert!(opc.is_setcc()); + assert!(!opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } + + const CMOVCC: &'static [(Opcode, ConditionCode); 16] = &[ + (Opcode::CMOVO, ConditionCode::O), + (Opcode::CMOVNO, ConditionCode::NO), + (Opcode::CMOVB, ConditionCode::B), + (Opcode::CMOVNB, ConditionCode::AE), + (Opcode::CMOVZ, ConditionCode::Z), + (Opcode::CMOVNZ, ConditionCode::NZ), + (Opcode::CMOVA, ConditionCode::A), + (Opcode::CMOVNA, ConditionCode::BE), + (Opcode::CMOVS, ConditionCode::S), + (Opcode::CMOVNS, ConditionCode::NS), + (Opcode::CMOVP, ConditionCode::P), + (Opcode::CMOVNP, ConditionCode::NP), + (Opcode::CMOVL, ConditionCode::L), + (Opcode::CMOVGE, ConditionCode::GE), + (Opcode::CMOVG, ConditionCode::G), + (Opcode::CMOVLE, ConditionCode::LE), + ]; + for (opc, cond) in CMOVCC.iter() { + assert!(!opc.is_jcc()); + assert!(!opc.is_setcc()); + assert!(opc.is_cmovcc()); + assert_eq!(opc.condition(), Some(*cond)); + } +} |