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-rw-r--r--src/display.rs2
-rw-r--r--src/lib.rs21
-rw-r--r--test/test.rs32
3 files changed, 30 insertions, 25 deletions
diff --git a/src/display.rs b/src/display.rs
index e1343ce..029eed3 100644
--- a/src/display.rs
+++ b/src/display.rs
@@ -441,6 +441,7 @@ impl fmt::Display for Opcode {
&Opcode::MAXPS => write!(f, "{}", "maxps"),
&Opcode::MINPS => write!(f, "{}", "minps"),
&Opcode::MOVAPS => write!(f, "{}", "movaps"),
+ &Opcode::MOVAPD => write!(f, "{}", "movapd"),
&Opcode::MOVD => write!(f, "{}", "movd"),
&Opcode::MOVLPS => write!(f, "{}", "movlps"),
&Opcode::MOVLHPS => write!(f, "{}", "movlhps"),
@@ -702,6 +703,7 @@ impl <T: std::fmt::Write> Colorize<T> for Opcode {
Opcode::CVTTSS2SI |
Opcode::MASKMOVQ |
Opcode::MOVAPS |
+ Opcode::MOVAPD |
Opcode::MOVD |
Opcode::MOVHPS |
Opcode::MOVHLPS |
diff --git a/src/lib.rs b/src/lib.rs
index bf94dbe..fd791b0 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -622,6 +622,7 @@ pub enum Opcode {
MAXPS,
MINPS,
MOVAPS,
+ MOVAPD,
MOVD,
MOVLPS,
MOVHPS,
@@ -1200,7 +1201,7 @@ pub enum OperandCode {
Gb_Eb_Ib = 0xc4,
Gv_Ev_Iv = 0xc5,
// gap: 0xc6
- G_U_xmm = 0xc7,
+ Gd_U_xmm = 0xc7,
M_G_xmm = 0xc9,
ModRM_0x0f12 = 0xcb,
ModRM_0x0f16 = 0xce,
@@ -1297,8 +1298,8 @@ const OPCODE_660F_MAP: [OpcodeRecord; 256] = [
OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
- OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
- OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
+ OpcodeRecord(Interpretation::Instruction(Opcode::MOVAPD), OperandCode::G_E_xmm),
+ OpcodeRecord(Interpretation::Instruction(Opcode::MOVAPD), OperandCode::E_G_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
@@ -2175,8 +2176,8 @@ const OPCODE_0F_MAP: [OpcodeRecord; 256] = [
OpcodeRecord(Interpretation::Instruction(Opcode::MOVNTPS), OperandCode::M_G_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::CVTTPS2PI), OperandCode::Nothing),
OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PI), OperandCode::Nothing),
- OpcodeRecord(Interpretation::Instruction(Opcode::UCOMISS), OperandCode::Nothing),
- OpcodeRecord(Interpretation::Instruction(Opcode::COMISS), OperandCode::Nothing),
+ OpcodeRecord(Interpretation::Instruction(Opcode::UCOMISS), OperandCode::G_E_xmm),
+ OpcodeRecord(Interpretation::Instruction(Opcode::COMISS), OperandCode::G_E_xmm),
// 0x30
OpcodeRecord(Interpretation::Instruction(Opcode::WRMSR), OperandCode::Nothing),
@@ -2215,7 +2216,7 @@ const OPCODE_0F_MAP: [OpcodeRecord; 256] = [
OpcodeRecord(Interpretation::Instruction(Opcode::CMOVG), OperandCode::Gv_Ev),
// 0x50
- OpcodeRecord(Interpretation::Instruction(Opcode::MOVMSKPS), OperandCode::G_U_xmm),
+ OpcodeRecord(Interpretation::Instruction(Opcode::MOVMSKPS), OperandCode::Gd_U_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::SQRTPS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::RSQRTPS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::RCPPS), OperandCode::G_E_xmm),
@@ -2225,8 +2226,8 @@ const OPCODE_0F_MAP: [OpcodeRecord; 256] = [
OpcodeRecord(Interpretation::Instruction(Opcode::XORPS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::ADDPS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::MULPS), OperandCode::G_E_xmm),
- OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PD), OperandCode::Unsupported),
- OpcodeRecord(Interpretation::Instruction(Opcode::CVTDQ2PS), OperandCode::Unsupported),
+ OpcodeRecord(Interpretation::Instruction(Opcode::CVTPS2PD), OperandCode::G_E_xmm),
+ OpcodeRecord(Interpretation::Instruction(Opcode::CVTDQ2PS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::SUBPS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::MINPS), OperandCode::G_E_xmm),
OpcodeRecord(Interpretation::Instruction(Opcode::DIVPS), OperandCode::G_E_xmm),
@@ -3619,11 +3620,13 @@ fn unlikely_operands<T: Iterator<Item=u8>>(mut bytes_iter: T, instruction: &mut
_ => Opcode::NOP,
};
}
- OperandCode::G_U_xmm => {
+ OperandCode::Gd_U_xmm => {
+ instruction.operands[1] = mem_oper;
if instruction.operands[1] != OperandSpec::RegMMM {
instruction.opcode = Opcode::Invalid;
return Err(());
}
+ instruction.modrm_rrr.bank = RegisterBank::D;
instruction.modrm_mmm.bank = RegisterBank::X;
}
OperandCode::M_G_xmm => {
diff --git a/test/test.rs b/test/test.rs
index 30e6eac..f3ae928 100644
--- a/test/test.rs
+++ b/test/test.rs
@@ -67,8 +67,8 @@ fn test_cvt() {
test_display(&[0x4f, 0x66, 0x0f, 0x2a, 0xcf], "cvtpi2pd xmm1, mm7");
test_display(&[0x4f, 0xf3, 0x0f, 0x2a, 0xcf], "cvtsi2ss xmm1, edi");
test_display(&[0x4f, 0xf2, 0x0f, 0x2a, 0xcf], "cvtsi2sd xmm1, edi");
- test_display(&[0x4f, 0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, dword [rax]");
- test_display(&[0x4f, 0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, dword [rax]");
+ test_display(&[0x4f, 0xf2, 0x0f, 0x2a, 0x00], "cvtsi2sd xmm0, [rax]");
+ test_display(&[0x4f, 0xf3, 0x0f, 0x2a, 0x00], "cvtsi2ss xmm0, [rax]");
test_display(&[0x4f, 0x66, 0x0f, 0x2a, 0x00], "cvtpi2pd xmm0, qword [rax]");
}
@@ -114,7 +114,7 @@ fn test_sse() {
test_display(&[0x4f, 0x0f, 0x28, 0x00], "movaps xmm8, [r8]");
test_display(&[0x4f, 0x0f, 0x29, 0x00], "movaps [r8], xmm8");
test_display(&[0x4f, 0x0f, 0x2b, 0x00], "movntps [r8], xmm8");
- test_display(&[0x4f, 0x0f, 0x2e, 0x00], "ucomiss xmm8, dword [r8]");
+ test_display(&[0x4f, 0x0f, 0x2e, 0x00], "ucomiss xmm8, [r8]");
test_display(&[0x4f, 0x0f, 0x2f, 0x00], "comiss xmm8, [r8]");
test_display(&[0x4f, 0x0f, 0x50, 0xc0], "movmskps r8d, xmm8");
test_display(&[0x0f, 0x28, 0xd0], "movaps xmm2, xmm0");
@@ -122,19 +122,19 @@ fn test_sse() {
test_display(&[0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [rax]");
test_invalid(&[0x4f, 0x0f, 0x50, 0x00]);
test_display(&[0x4f, 0x0f, 0x50, 0xc0], "movmskps r8d, xmm8");
- test_display(&[0x4f, 0x0f, 0x51, 0x00], "sqrtps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x52, 0x00], "rsqrtps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x53, 0x00], "rcpps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x54, 0x00], "andps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x55, 0x00], "andnps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x56, 0x00], "orps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x57, 0x00], "xorps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x58, 0x00], "addps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x59, 0x00], "mulps xmm8, xmmword [r8]");
- test_display(&[0x4f, 0x0f, 0x5a, 0x00], "cvtps2pd xmm8, qword [r8]");
- test_display(&[0x4f, 0x0f, 0x5b, 0x00], "cvtdq2ps xmm8, xmmword [r8]");
- test_display(&[0x66, 0x4f, 0x0f, 0x5b, 0x00], "cvtdq2ps xmm8, xmmword [r8]");
- test_display(&[0x67, 0x4f, 0x0f, 0x5b, 0x00], "cvtdq2ps xmm8, xmmword [r8d]");
+ test_display(&[0x4f, 0x0f, 0x51, 0x00], "sqrtps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x52, 0x00], "rsqrtps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x53, 0x00], "rcpps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x54, 0x00], "andps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x55, 0x00], "andnps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x56, 0x00], "orps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x57, 0x00], "xorps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x58, 0x00], "addps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x59, 0x00], "mulps xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x5a, 0x00], "cvtps2pd xmm8, [r8]");
+ test_display(&[0x4f, 0x0f, 0x5b, 0x00], "cvtdq2ps xmm8, [r8]");
+ test_display(&[0x66, 0x4f, 0x0f, 0x5b, 0x00], "cvtdq2ps xmm8, [r8]");
+ test_display(&[0x67, 0x4f, 0x0f, 0x5b, 0x00], "cvtdq2ps xmm8, [r8d]");
test_display(&[0x4f, 0x66, 0x0f, 0x28, 0x00], "movapd xmm0, [rax]");
test_display(&[0x66, 0x4f, 0x0f, 0x28, 0x00], "movapd xmm8, [r8]");
test_display(&[0x66, 0x4f, 0x0f, 0x28, 0x00], "movapd xmm8, [r8]");
generated by cgit v1.1 at 2024-11-01 06:34:42 +0000