diff options
| -rw-r--r-- | CHANGELOG | 2 | ||||
| -rw-r--r-- | src/isa_settings.rs | 17 |
2 files changed, 19 insertions, 0 deletions
@@ -7,6 +7,8 @@ even when their corresponding extension is not selected. * added uarch-specific decoders for Zen 2, Zen 3, Zen 4, and Zen 5 * removed 3DNow support from AMD uarch-specific decoders after K10 +* for uarch-specific decoding, there is now a feature bit for Intel Key Locker. this corrects an + issue where Key Locker instructions would decode under AMD-specific decoders. * push-immediate, pushf, popf, leave, and xlat now all report a correct memory access size, fixing the prior behavior of reporting to memory access size at all diff --git a/src/isa_settings.rs b/src/isa_settings.rs index c996bd2..76eb795 100644 --- a/src/isa_settings.rs +++ b/src/isa_settings.rs @@ -758,6 +758,21 @@ macro_rules! gen_isa_settings { return Err(<$decode_err>::InvalidOpcode); } } + <$opcode>::AESDEC128KL | + <$opcode>::AESDEC256KL | + <$opcode>::AESDECWIDE128KL | + <$opcode>::AESDECWIDE256KL | + <$opcode>::AESENC128KL | + <$opcode>::AESENC256KL | + <$opcode>::AESENCWIDE128KL | + <$opcode>::AESENCWIDE256KL | + <$opcode>::ENCODEKEY128 | + <$opcode>::ENCODEKEY256 | + <$opcode>::LOADIWKEY => { + if !settings.keylocker() { + return Err(<$decode_err>::InvalidOpcode); + } + } <$opcode>::MONITORX | <$opcode>::MWAITX | // these are gated on the `monitorx` and `mwaitx` cpuid bits, but are AMD-only. <$opcode>::CLZERO | <$opcode>::RDPRU => { // again, gated on specific cpuid bits, but AMD-only. if !settings.amd_quirks() { @@ -941,6 +956,8 @@ macro_rules! gen_arch_isa_settings { avx512_vnni, with_avx512_vnni = 109; avx512_ifma, with_avx512_ifma = 110; + keylocker, with_keylocker = 111; + { sse4 = { sse4_1, |