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-rw-r--r--src/long_mode/mod.rs6
-rw-r--r--test/test.rs3
2 files changed, 9 insertions, 0 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 1468a9c..be2dbeb 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -5753,6 +5753,12 @@ fn unlikely_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter
_ => { unreachable!("invalid operation width"); },
}
}
+ OperandCode::Ib => {
+ instruction.imm =
+ read_imm_unsigned(&mut bytes_iter, 1, length)?;
+ instruction.operands[0] = OperandSpec::ImmU8;
+ instruction.operand_count = 1;
+ }
OperandCode::Iw => {
instruction.imm =
read_imm_unsigned(&mut bytes_iter, 2, length)?;
diff --git a/test/test.rs b/test/test.rs
index fc4f1b1..5ba8bd9 100644
--- a/test/test.rs
+++ b/test/test.rs
@@ -510,6 +510,9 @@ fn test_bitwise() {
#[test]
fn test_misc() {
+ test_display(&[0xcc], "int 0x3");
+ test_display(&[0xcd, 0x00], "int 0x0");
+ test_display(&[0xcd, 0xff], "int 0xff");
test_display(&[0x9c], "pushf");
test_display(&[0x48, 0x98], "cdqe");
test_display(&[0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00], "nop cs:[rax + rax * 1]");