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-rw-r--r--test/protected_mode/behavior.rs14
-rw-r--r--test/real_mode/behavior.rs14
2 files changed, 28 insertions, 0 deletions
diff --git a/test/protected_mode/behavior.rs b/test/protected_mode/behavior.rs
index 59412d0..0fa8637 100644
--- a/test/protected_mode/behavior.rs
+++ b/test/protected_mode/behavior.rs
@@ -1708,6 +1708,20 @@ mod kvm {
}
}
+ if instr.opcode() == Opcode::MOV {
+ if let Operand::Register { reg } = instr.operand(0) {
+ if reg.class() == register_class::S {
+ // mov to segment selector can #GP if the selector is invalid:
+ // > If the DS, ES, FS, or GS register is being loaded and the
+ // > segment pointed to is not a data or readable code segment.
+ //
+ // and even if the VM continues, results will be unpredictable with segment
+ // registers full of random data..
+ return true;
+ }
+ }
+ }
+
if instr.opcode() == Opcode::BOUND {
// when bound *does things*, it's a #BR exception.
return true;
diff --git a/test/real_mode/behavior.rs b/test/real_mode/behavior.rs
index 30a7bd6..b2731da 100644
--- a/test/real_mode/behavior.rs
+++ b/test/real_mode/behavior.rs
@@ -1683,6 +1683,20 @@ mod kvm {
}
}
+ if instr.opcode() == Opcode::MOV {
+ if let Operand::Register { reg } = instr.operand(0) {
+ if reg.class() == register_class::S {
+ // mov to segment selector can #GP if the selector is invalid:
+ // > If the DS, ES, FS, or GS register is being loaded and the
+ // > segment pointed to is not a data or readable code segment.
+ //
+ // and even if the VM continues, results will be unpredictable with segment
+ // registers full of random data..
+ return true;
+ }
+ }
+ }
+
if instr.opcode() == Opcode::XCHG {
// TODO: don't understand why this "cared about dontcares"s...
return true;