aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/long_mode/mod.rs9
-rw-r--r--src/protected_mode/mod.rs6
-rw-r--r--src/shared/evex.in13
3 files changed, 21 insertions, 7 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 65bda54..22ffe58 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -7595,6 +7595,9 @@ fn read_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as yaxpe
instruction.operand_count = 1;
}
6 => {
+ if instruction.opcode == Opcode::Invalid {
+ return Err(DecodeError::InvalidOpcode);
+ }
instruction.operands[0] = OperandSpec::Nothing;
instruction.operand_count = 0;
return Ok(());
@@ -7731,14 +7734,14 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y
}
OperandCode::INV_Gv_M => {
let modrm = read_modrm(words)?;
+ if modrm >= 0xc0 {
+ return Err(DecodeError::InvalidOperand);
+ }
instruction.regs[0] =
RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::Q);
instruction.operands[0] = OperandSpec::RegRRR;
instruction.operands[1] = read_M(words, instruction, modrm)?;
- if instruction.operands[1] == OperandSpec::RegMMM {
- return Err(DecodeError::InvalidOperand);
- }
if [Opcode::LFS, Opcode::LGS, Opcode::LSS].contains(&instruction.opcode) {
if instruction.prefixes.rex().w() {
instruction.mem_size = 10;
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index ac7294f..908e449 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -7562,13 +7562,13 @@ fn unlikely_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch as y
}
OperandCode::INV_Gv_M => {
let modrm = read_modrm(words)?;
+ if modrm >= 0xc0 {
+ return Err(DecodeError::InvalidOperand);
+ }
instruction.regs[0] = RegSpec { bank: RegisterBank::D, num: (modrm >> 3) & 7 };
instruction.operands[0] = OperandSpec::RegRRR;
instruction.operands[1] = read_M(words, instruction, modrm)?;
- if instruction.operands[1] == OperandSpec::RegMMM {
- return Err(DecodeError::InvalidOperand);
- }
if [Opcode::LFS, Opcode::LGS, Opcode::LSS].contains(&instruction.opcode) {
if instruction.prefixes.operand_size() {
instruction.mem_size = 4;
diff --git a/src/shared/evex.in b/src/shared/evex.in
index 9c48d33..2bcd2f4 100644
--- a/src/shared/evex.in
+++ b/src/shared/evex.in
@@ -1196,6 +1196,9 @@ pub(crate) fn read_evex_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address
}
generated::EVEXOperandCode::G_V_E_LL => {
deny_mask_reg(instruction)?;
+ if [Opcode::VAESDECLAST, Opcode::VAESDEC, Opcode::VAESENC, Opcode::VAESENCLAST].contains(&instruction.opcode) {
+ deny_z(instruction)?;
+ }
let sz = regs_size(instruction);
@@ -3151,6 +3154,7 @@ pub(crate) fn read_evex_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address
}
}
generated::EVEXOperandCode::Gm_E_LL => {
+ deny_vex_reg(instruction)?;
check_mask_reg(instruction)?;
let sz = regs_size(instruction);
@@ -4567,7 +4571,9 @@ pub(crate) fn read_evex_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address
let mem_oper = read_E_vex(words, instruction, modrm, RegisterBank::X)?;
let item_size = if instruction.prefixes.evex_unchecked().vex().w() {
- if instruction.opcode == Opcode::VRANGESS {
+ if instruction.opcode == Opcode::VRNDSCALESS {
+ return Err(DecodeError::InvalidOpcode);
+ } else if instruction.opcode == Opcode::VRANGESS {
instruction.opcode = Opcode::VRANGESD;
8
} else if instruction.opcode == Opcode::VFPCLASSSS {
@@ -4608,6 +4614,11 @@ pub(crate) fn read_evex_operands<T: Reader<<Arch as yaxpeax_arch::Arch>::Address
set_reg_sizes(instruction, RegisterBank::X);
}
generated::EVEXOperandCode::Gm_V_E_xmm_imm8_sae => {
+ if instruction.opcode == Opcode::VRNDSCALESD {
+ if instruction.prefixes.evex_unchecked().vex().w() {
+ return Err(DecodeError::InvalidOpcode);
+ }
+ }
let modrm = read_modrm(words)?;
set_rrr(instruction, modrm);
let mem_oper = read_E_vex(words, instruction, modrm, RegisterBank::X)?;