diff options
| -rw-r--r-- | src/lib.rs | 2143 |
1 files changed, 1116 insertions, 1027 deletions
@@ -176,7 +176,7 @@ pub enum Operand { RegIndexBaseScale(RegSpec, RegSpec, u8), RegIndexBaseScaleDisp(RegSpec, RegSpec, u8, i32), // Many(Vec<Operand>), - Nothing + Nothing, } impl Operand { @@ -213,7 +213,6 @@ impl Operand { #[cfg(feature="use-serde")] #[derive(Copy, Clone, Debug, Eq, PartialEq, Hash, Serialize, Deserialize)] -#[repr(u8)] pub enum RegisterBank { Q, D, W, B, rB, // Quadword, Dword, Word, Byte CR, DR, S, EIP, RIP, EFlags, RFlags, // Control reg, Debug reg, Selector, ... @@ -223,7 +222,6 @@ pub enum RegisterBank { #[allow(non_camel_case_types)] #[cfg(not(feature="use-serde"))] #[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)] -#[repr(u8)] pub enum RegisterBank { Q, D, W, B, rB, // Quadword, Dword, Word, Byte CR, DR, S, EIP, RIP, EFlags, RFlags, // Control reg, Debug reg, Selector, ... @@ -232,23 +230,22 @@ pub enum RegisterBank { } #[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)] -#[repr(u8)] pub enum Segment { DS = 0, CS, ES, FS, GS, SS } #[allow(non_camel_case_types)] #[derive(Copy, Clone, Debug, Eq, PartialEq)] -#[repr(u8)] pub enum Opcode { - ADD = 0, - OR = 1, - ADC = 2, - SBB = 3, - AND = 4, + ADD = 1, + OR = 2, + ADC = 3, + SBB = 4, + AND = 5, XOR = 6, - SUB = 5, - CMP = 7, + SUB = 7, + CMP = 8, + Invalid, XADD, BT, BTS, @@ -436,7 +433,6 @@ pub enum Opcode { CLD, STD, JMPE, - Invalid } #[derive(Debug)] pub struct Instruction { @@ -555,15 +551,16 @@ impl Instruction { #[derive(Debug)] pub struct Prefixes { bits: u8, - rep_prefix: Option<RepPrefix>, + rep_prefix: RepPrefix, rex: PrefixRex, segment: Segment, } #[derive(Debug, Copy, Clone, PartialEq, Eq)] pub enum RepPrefix { - E, - NE + None = 0, + E = 1, + NE = 2, } #[derive(Debug)] @@ -576,7 +573,7 @@ impl Prefixes { fn new(bits: u8) -> Prefixes { Prefixes { bits: bits, - rep_prefix: None, + rep_prefix: RepPrefix::None, rex: PrefixRex { bits: 0 }, segment: Segment::DS, } @@ -602,13 +599,13 @@ impl Prefixes { #[inline] fn set_address_size(&mut self) { self.bits = self.bits | 0x2 } #[inline] - pub fn repne(&self) -> bool { self.rep_prefix == Some(RepPrefix::NE) } + pub fn repne(&self) -> bool { self.rep_prefix == RepPrefix::NE } #[inline] - fn set_repne(&mut self) { self.rep_prefix = Some(RepPrefix::NE); } + fn set_repne(&mut self) { self.rep_prefix = RepPrefix::NE; } #[inline] - pub fn repe(&self) -> bool { self.rep_prefix == Some(RepPrefix::E) } + pub fn repe(&self) -> bool { self.rep_prefix == RepPrefix::E } #[inline] - fn set_repe(&mut self) { self.rep_prefix = Some(RepPrefix::E); } + fn set_repe(&mut self) { self.rep_prefix = RepPrefix::E; } #[inline] pub fn set_lock(&mut self) { self.bits |= 0x4 } #[inline] @@ -738,10 +735,38 @@ pub enum OperandCode { Yb_Xb, Yv_AX, Yv_Xv, - Zb_Ib(u8), - Zv(u8), - Zv_AX(u8), - Zv_Ivq(u8), + Zb_Ib_R0, + Zb_Ib_R1, + Zb_Ib_R2, + Zb_Ib_R3, + Zb_Ib_R4, + Zb_Ib_R5, + Zb_Ib_R6, + Zb_Ib_R7, + Zv_R0, + Zv_R1, + Zv_R2, + Zv_R3, + Zv_R4, + Zv_R5, + Zv_R6, + Zv_R7, + Zv_AX_R0, + Zv_AX_R1, + Zv_AX_R2, + Zv_AX_R3, + Zv_AX_R4, + Zv_AX_R5, + Zv_AX_R6, + Zv_AX_R7, + Zv_Ivq_R0, + Zv_Ivq_R1, + Zv_Ivq_R2, + Zv_Ivq_R3, + Zv_Ivq_R4, + Zv_Ivq_R5, + Zv_Ivq_R6, + Zv_Ivq_R7, Nothing, Implied } @@ -770,301 +795,304 @@ const BITWISE_OPCODE_MAP: [Opcode; 8] = [ Opcode::SAL, Opcode::SAR ]; -fn read_opcode_660f_map<T: Iterator<Item=u8>>(_bytes_iter: &mut T, _instruction: &mut Instruction) -> Option<OperandCode> { +fn read_opcode_660f_map<T: Iterator<Item=u8>>(_bytes_iter: &mut T, _instruction: &mut Instruction) -> Option<OpcodeRecord> { panic!("660f opcode map unsupported".to_string()); } -#[derive(Copy, Clone)] -struct OpcodeInstructionRecord(Opcode, OperandCode); - -const OPCODE_F20F_MAP: [OpcodeInstructionRecord; 256] = [ - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), +const OPCODE_F20F_MAP: [OpcodeRecord; 256] = [ + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x10 - OpcodeInstructionRecord(Opcode::MOVSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::MOVSD, OperandCode::E_G_xmm), - OpcodeInstructionRecord(Opcode::MOVDDUP, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVSD), OperandCode::E_G_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVDDUP), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x20 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::CVTSI2SD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::CVTTSD2SI, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::CVTSD2SI, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTSI2SD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTTSD2SI), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SI), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x30 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x40 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x50 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::SQRTSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::ADDSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::MULSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::CVTSD2SS, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::SUBSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::MINSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::DIVSD, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::MAXSD, OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SQRTSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::ADDSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::MULSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::CVTSD2SS), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SUBSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::MINSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::DIVSD), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::MAXSD), OperandCode::G_E_xmm), // 0x60 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x70 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::HADDPS, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::HSUBPS, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::HADDPS), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::HSUBPS), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x80 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x90 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xa0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xb0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xc0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xd0 - OpcodeInstructionRecord(Opcode::ADDSUBPS, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::ADDSUBPS), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xe0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xf0 - OpcodeInstructionRecord(Opcode::LDDQU, OperandCode::G_E_xmm), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::LDDQU), OperandCode::G_E_xmm), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), ]; -fn read_opcode_f20f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OperandCode> { +fn read_opcode_f20f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OpcodeRecord> { match bytes_iter.next() { Some(b) => { instruction.length += 1; let record = OPCODE_F20F_MAP[b as usize]; - instruction.opcode = record.0; - Some(record.1) + if let Interpretation::Instruction(opc) = record.0 { + instruction.opcode = opc; + } else { + unsafe { unreachable_unchecked(); } + } + Some(record) } None => { None } } } -fn read_opcode_f30f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OperandCode> { +fn read_opcode_f30f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OpcodeRecord> { + return None; + /* match bytes_iter.next() { Some(b) => { instruction.length += 1; @@ -1093,299 +1121,304 @@ fn read_opcode_f30f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: & None } } + */ } -const OPCODE_0F_MAP: [OpcodeInstructionRecord; 256] = [ - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::ModRM_0x0f00), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::ModRM_0x0f01), - OpcodeInstructionRecord(Opcode::LAR, OperandCode::Gv_M), - OpcodeInstructionRecord(Opcode::LSL, OperandCode::Gv_M), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::SYSCALL, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::CLTS, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::SYSRET, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::INVD, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::WBINVD, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::UD2, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::NOP, OperandCode::Ev), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), +const OPCODE_0F_MAP: [OpcodeRecord; 256] = [ + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f00), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0f01), + OpcodeRecord(Interpretation::Instruction(Opcode::LAR), OperandCode::Gv_M), + OpcodeRecord(Interpretation::Instruction(Opcode::LSL), OperandCode::Gv_M), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SYSCALL), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CLTS), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SYSRET), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::INVD), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::WBINVD), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::UD2), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x10 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::NOP, OperandCode::Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Ev), // 0x20 - OpcodeInstructionRecord(Opcode::MOV, OperandCode::Rq_Cq_0), - OpcodeInstructionRecord(Opcode::MOV, OperandCode::Rq_Dq_0), - OpcodeInstructionRecord(Opcode::MOV, OperandCode::Cq_Rq_0), - OpcodeInstructionRecord(Opcode::MOV, OperandCode::Dq_Rq_0), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Rq_Cq_0), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Rq_Dq_0), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Cq_Rq_0), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Dq_Rq_0), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x30 - OpcodeInstructionRecord(Opcode::WRMSR, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::RDTSC, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::RDMSR, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::RDPMC, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::WRMSR), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::RDTSC), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::RDMSR), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::RDPMC), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x40 - OpcodeInstructionRecord(Opcode::CMOVO, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVNO, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVB, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVNB, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVZ, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVNZ, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVNA, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVA, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVS, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVNS, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVP, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVNP, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVL, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVGE, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVLE, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::CMOVG, OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVO), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVNO), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVB), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVNB), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVZ), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVNZ), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVNA), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVA), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVS), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVNS), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVP), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVNP), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVL), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVGE), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVLE), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMOVG), OperandCode::Gv_Ev), // 0x50 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x60 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x70 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x80 - OpcodeInstructionRecord(Opcode::JO, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JNO, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JB, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JNB, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JZ, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JNZ, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JNA, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JA, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JS, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JNS, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JP, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JNP, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JL, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JGE, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JLE, OperandCode::Jvds), - OpcodeInstructionRecord(Opcode::JG, OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JO), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JNO), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JB), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JNB), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JZ), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JNZ), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JNA), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JA), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JS), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JNS), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JP), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JNP), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JL), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JGE), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JLE), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JG), OperandCode::Jvds), // 0x90 - OpcodeInstructionRecord(Opcode::SETO, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETNO, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETB, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETAE, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETZ, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETNZ, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETBE, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETA, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETS, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETNS, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETP, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETNP, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETL, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETGE, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETLE, OperandCode::Eb_R0), - OpcodeInstructionRecord(Opcode::SETG, OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETO), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETNO), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETB), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETAE), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETZ), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETNZ), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETBE), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETA), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETS), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETNS), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETP), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETNP), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETL), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETGE), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETLE), OperandCode::Eb_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::SETG), OperandCode::Eb_R0), // 0xa0 - OpcodeInstructionRecord(Opcode::PUSH, OperandCode::FS), - OpcodeInstructionRecord(Opcode::POP, OperandCode::GS), - OpcodeInstructionRecord(Opcode::CPUID, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::BT, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::PUSH, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::PUSH, OperandCode::GS), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::ModRM_0x0fae), - OpcodeInstructionRecord(Opcode::IMUL, OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::FS), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::GS), + OpcodeRecord(Interpretation::Instruction(Opcode::CPUID), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::BT), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::GS), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0fae), + OpcodeRecord(Interpretation::Instruction(Opcode::IMUL), OperandCode::Gv_Ev), // 0xb0 - OpcodeInstructionRecord(Opcode::CMPXCHG, OperandCode::Eb_Gb), - OpcodeInstructionRecord(Opcode::CMPXCHG, OperandCode::Ev_Gv), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::MOVZX_b, OperandCode::Gv_Eb), - OpcodeInstructionRecord(Opcode::MOVZX_w, OperandCode::Gv_Ew), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::ModRM_0x0fba), - OpcodeInstructionRecord(Opcode::BTC, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::BSF, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::BSR, OperandCode::Gv_Ev), - OpcodeInstructionRecord(Opcode::MOVSX_b, OperandCode::Gv_Eb), - OpcodeInstructionRecord(Opcode::MOVSX_w, OperandCode::Gv_Ew), + OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::CMPXCHG), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_b), OperandCode::Gv_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVZX_w), OperandCode::Gv_Ew), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x0fba), + OpcodeRecord(Interpretation::Instruction(Opcode::BTC), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::BSF), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::BSR), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVSX_b), OperandCode::Gv_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVSX_w), OperandCode::Gv_Ew), // 0xc0 - OpcodeInstructionRecord(Opcode::XADD, OperandCode::Eb_Gb), - OpcodeInstructionRecord(Opcode::XADD, OperandCode::Ev_Gv), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::XADD), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::XADD), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xd0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xe0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xf0 - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), - OpcodeInstructionRecord(Opcode::Invalid, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), ]; -fn read_opcode_0f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OperandCode> { +fn read_opcode_0f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OpcodeRecord> { match bytes_iter.next() { Some(b) => { instruction.length += 1; let record = OPCODE_0F_MAP[b as usize]; - instruction.opcode = record.0; - Some(record.1) + if let Interpretation::Instruction(opc) = record.0 { + instruction.opcode = opc; + } else { + unsafe { unreachable_unchecked(); } + } + Some(record) } None => { None @@ -1395,399 +1428,309 @@ fn read_opcode_0f_map<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mu #[derive(Copy, Clone, PartialEq, Eq)] enum Interpretation { - Instruction, + Instruction(Opcode), Prefix, } #[derive(Copy, Clone)] // this should be a 32-byte struct.. -struct OpcodeRecord(Opcode, Interpretation, OperandCode); +struct OpcodeRecord(Interpretation, OperandCode); const OPCODES: [OpcodeRecord; 256] = [ - OpcodeRecord(Opcode::ADD, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::ADD, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::ADD, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::ADD, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::ADD, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::ADD, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::OR, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::OR, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::OR, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::OR, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::OR, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::OR, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::ADC, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::ADC, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::ADC, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::ADC, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::ADC, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::ADC, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::SBB, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::SBB, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::SBB, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::SBB, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::SBB, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::SBB, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::AND, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::AND, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::AND, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::AND, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::AND, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::AND, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::SUB, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::SUB, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::SUB, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::SUB, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::SUB, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::SUB, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::XOR, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::XOR, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::XOR, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::XOR, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::XOR, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::XOR, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::CMP, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::CMP, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::CMP, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::CMP, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::CMP, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::CMP, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::ADD), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::ADD), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::ADD), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::ADD), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::ADD), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::ADD), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::OR), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::OR), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::OR), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::OR), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::OR), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::OR), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::ADC), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::ADC), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::ADC), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::ADC), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::ADC), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::ADC), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SBB), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::SBB), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::SBB), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::SBB), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::SBB), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::SBB), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::AND), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::AND), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::AND), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::AND), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::AND), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::AND), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SUB), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::SUB), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::SUB), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::SUB), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::SUB), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::SUB), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::XOR), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::XOR), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::XOR), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::XOR), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::XOR), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::XOR), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CMP), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::CMP), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::CMP), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::CMP), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::CMP), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::CMP), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0x40: - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), // 0x50: - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(0)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(1)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(2)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(3)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(4)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(5)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(6)), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Zv(7)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(0)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(1)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(2)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(3)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(4)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(5)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(6)), - OpcodeRecord(Opcode::POP, Interpretation::Instruction, OperandCode::Zv(7)), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R1), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R2), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R3), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R4), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R5), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R6), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Zv_R7), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R1), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R2), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R3), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R4), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R5), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R6), + OpcodeRecord(Interpretation::Instruction(Opcode::POP), OperandCode::Zv_R7), // 0x60 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::MOVSXD, Interpretation::Instruction, OperandCode::Gv_Ed), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Ivs), - OpcodeRecord(Opcode::IMUL, Interpretation::Instruction, OperandCode::Gv_Ev_Iv), - OpcodeRecord(Opcode::PUSH, Interpretation::Instruction, OperandCode::Ibs), - OpcodeRecord(Opcode::IMUL, Interpretation::Instruction, OperandCode::Gb_Eb_Ib), - OpcodeRecord(Opcode::INS, Interpretation::Instruction, OperandCode::Yb_DX), - OpcodeRecord(Opcode::INS, Interpretation::Instruction, OperandCode::Yv_DX), - OpcodeRecord(Opcode::OUTS, Interpretation::Instruction, OperandCode::DX_Xb), - OpcodeRecord(Opcode::OUTS, Interpretation::Instruction, OperandCode::DX_Xv), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVSXD), OperandCode::Gv_Ed), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Ivs), + OpcodeRecord(Interpretation::Instruction(Opcode::IMUL), OperandCode::Gv_Ev_Iv), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSH), OperandCode::Ibs), + OpcodeRecord(Interpretation::Instruction(Opcode::IMUL), OperandCode::Gb_Eb_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::INS), OperandCode::Yb_DX), + OpcodeRecord(Interpretation::Instruction(Opcode::INS), OperandCode::Yv_DX), + OpcodeRecord(Interpretation::Instruction(Opcode::OUTS), OperandCode::DX_Xb), + OpcodeRecord(Interpretation::Instruction(Opcode::OUTS), OperandCode::DX_Xv), // 0x70 - OpcodeRecord(Opcode::JO, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JNO, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JB, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JNB, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JZ, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JNZ, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JNA, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JA, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JS, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JNS, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JP, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JNP, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JL, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JGE, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JLE, Interpretation::Instruction, OperandCode::Jbs), - OpcodeRecord(Opcode::JG, Interpretation::Instruction, OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JO), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JNO), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JB), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JNB), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JZ), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JNZ), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JNA), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JA), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JS), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JNS), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JP), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JNP), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JL), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JGE), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JLE), OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::JG), OperandCode::Jbs), // 0x80 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0x80_Eb_Ib), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0x81_Ev_Ivs), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0x83_Ev_Ibs), - OpcodeRecord(Opcode::TEST, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::TEST, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Eb_Gb), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Ev_Gv), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Gb_Eb), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Gv_Ev), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Ew_Sw), - OpcodeRecord(Opcode::LEA, Interpretation::Instruction, OperandCode::Gv_M), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Sw_Ew), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0x8f_Ev), - OpcodeRecord(Opcode::NOP, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(1)), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(2)), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(3)), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(4)), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(5)), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(6)), - OpcodeRecord(Opcode::XCHG, Interpretation::Instruction, OperandCode::Zv_AX(7)), - OpcodeRecord(Opcode::CBW, Interpretation::Instruction, OperandCode::AX_AL), - OpcodeRecord(Opcode::CBW, Interpretation::Instruction, OperandCode::DX_AX), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::WAIT, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::PUSHF, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::POPF, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::SAHF, Interpretation::Instruction, OperandCode::AH), - OpcodeRecord(Opcode::LAHF, Interpretation::Instruction, OperandCode::AH), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::AL_Ob), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::AX_Ov), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Ob_AL), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Ov_AX), - OpcodeRecord(Opcode::MOVS, Interpretation::Instruction, OperandCode::Yb_Xb), - OpcodeRecord(Opcode::MOVS, Interpretation::Instruction, OperandCode::Yv_Xv), - OpcodeRecord(Opcode::CMPS, Interpretation::Instruction, OperandCode::Yb_Xb), - OpcodeRecord(Opcode::CMPS, Interpretation::Instruction, OperandCode::Yv_Xv), - OpcodeRecord(Opcode::TEST, Interpretation::Instruction, OperandCode::AL_Ib), - OpcodeRecord(Opcode::TEST, Interpretation::Instruction, OperandCode::AX_Ivd), - OpcodeRecord(Opcode::STOS, Interpretation::Instruction, OperandCode::Yb_AL), - OpcodeRecord(Opcode::STOS, Interpretation::Instruction, OperandCode::Yv_AX), - OpcodeRecord(Opcode::LODS, Interpretation::Instruction, OperandCode::AL_Xb), - OpcodeRecord(Opcode::LODS, Interpretation::Instruction, OperandCode::AX_Xv), - OpcodeRecord(Opcode::SCAS, Interpretation::Instruction, OperandCode::Yb_AL), - OpcodeRecord(Opcode::SCAS, Interpretation::Instruction, OperandCode::Yv_AX), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x80_Eb_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x81_Ev_Ivs), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x83_Ev_Ibs), + OpcodeRecord(Interpretation::Instruction(Opcode::TEST), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::TEST), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Eb_Gb), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Ev_Gv), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Gb_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Gv_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Ew_Sw), + OpcodeRecord(Interpretation::Instruction(Opcode::LEA), OperandCode::Gv_M), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Sw_Ew), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0x8f_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::NOP), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R1), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R2), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R3), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R4), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R5), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R6), + OpcodeRecord(Interpretation::Instruction(Opcode::XCHG), OperandCode::Zv_AX_R7), + OpcodeRecord(Interpretation::Instruction(Opcode::CBW), OperandCode::AX_AL), + OpcodeRecord(Interpretation::Instruction(Opcode::CBW), OperandCode::DX_AX), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::PUSHF), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::POPF), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::SAHF), OperandCode::AH), + OpcodeRecord(Interpretation::Instruction(Opcode::LAHF), OperandCode::AH), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::AL_Ob), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::AX_Ov), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Ob_AL), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Ov_AX), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVS), OperandCode::Yb_Xb), + OpcodeRecord(Interpretation::Instruction(Opcode::MOVS), OperandCode::Yv_Xv), + OpcodeRecord(Interpretation::Instruction(Opcode::CMPS), OperandCode::Yb_Xb), + OpcodeRecord(Interpretation::Instruction(Opcode::CMPS), OperandCode::Yv_Xv), + OpcodeRecord(Interpretation::Instruction(Opcode::TEST), OperandCode::AL_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::TEST), OperandCode::AX_Ivd), + OpcodeRecord(Interpretation::Instruction(Opcode::STOS), OperandCode::Yb_AL), + OpcodeRecord(Interpretation::Instruction(Opcode::STOS), OperandCode::Yv_AX), + OpcodeRecord(Interpretation::Instruction(Opcode::LODS), OperandCode::AL_Xb), + OpcodeRecord(Interpretation::Instruction(Opcode::LODS), OperandCode::AX_Xv), + OpcodeRecord(Interpretation::Instruction(Opcode::SCAS), OperandCode::Yb_AL), + OpcodeRecord(Interpretation::Instruction(Opcode::SCAS), OperandCode::Yv_AX), // 0xb0 - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(0)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(1)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(2)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(3)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(4)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(5)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(6)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zb_Ib(7)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(0)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(1)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(2)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(3)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(4)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(5)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(6)), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::Zv_Ivq(7)), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R1), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R2), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R3), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R4), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R5), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R6), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zb_Ib_R7), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R0), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R1), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R2), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R3), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R4), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R5), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R6), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::Zv_Ivq_R7), // 0xc0 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xc0_Eb_Ib), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xc1_Ev_Ib), - OpcodeRecord(Opcode::RETURN, Interpretation::Instruction, OperandCode::Iw), - OpcodeRecord(Opcode::RETURN, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::ModRM_0xc6_Eb_Ib), - OpcodeRecord(Opcode::MOV, Interpretation::Instruction, OperandCode::ModRM_0xc7_Ev_Iv), - OpcodeRecord(Opcode::ENTER, Interpretation::Instruction, OperandCode::Iw_Ib), - OpcodeRecord(Opcode::LEAVE, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::RETF, Interpretation::Instruction, OperandCode::Iw), - OpcodeRecord(Opcode::RETF, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::INT, Interpretation::Instruction, OperandCode::I_3), - OpcodeRecord(Opcode::INT, Interpretation::Instruction, OperandCode::Ib), - OpcodeRecord(Opcode::INTO, Interpretation::Instruction, OperandCode::Fw), - OpcodeRecord(Opcode::IRET, Interpretation::Instruction, OperandCode::Fw), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xc0_Eb_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xc1_Ev_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::RETURN), OperandCode::Iw), + OpcodeRecord(Interpretation::Instruction(Opcode::RETURN), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::ModRM_0xc6_Eb_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::MOV), OperandCode::ModRM_0xc7_Ev_Iv), + OpcodeRecord(Interpretation::Instruction(Opcode::ENTER), OperandCode::Iw_Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::LEAVE), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::RETF), OperandCode::Iw), + OpcodeRecord(Interpretation::Instruction(Opcode::RETF), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::INT), OperandCode::I_3), + OpcodeRecord(Interpretation::Instruction(Opcode::INT), OperandCode::Ib), + OpcodeRecord(Interpretation::Instruction(Opcode::INTO), OperandCode::Fw), + OpcodeRecord(Interpretation::Instruction(Opcode::IRET), OperandCode::Fw), // 0xd0 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xd0_Eb_1), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xd1_Ev_1), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xd2_Eb_CL), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xd3_Ev_CL), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd0_Eb_1), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd1_Ev_1), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd2_Eb_CL), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd3_Ev_CL), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // XLAT - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 d8 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 d9 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 da - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 db - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 dc - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 dd - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 de - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // x86 df - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xe0 // LOOPNZ - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // LOOPZ - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // LOOP - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // JECXZ - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // IN - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // IN - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // OUT - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // OUT - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xe8 - OpcodeRecord(Opcode::CALL, Interpretation::Instruction, OperandCode::Jvds), - OpcodeRecord(Opcode::JMP, Interpretation::Instruction, OperandCode::Jvds), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::JMP, Interpretation::Instruction, OperandCode::Jbs), + OpcodeRecord(Interpretation::Instruction(Opcode::CALL), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::JMP), OperandCode::Jvds), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::JMP), OperandCode::Jbs), // IN - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // IN - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // OUT - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // OUT - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), // 0xf0 - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), // ICEBP? - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), + OpcodeRecord(Interpretation::Prefix, OperandCode::Nothing), // 0xf4 - OpcodeRecord(Opcode::HLT, Interpretation::Instruction, OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::HLT), OperandCode::Nothing), // CMC - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xf6), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xf7), - OpcodeRecord(Opcode::CLC, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::STC, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::CLI, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::STI, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::CLD, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::STD, Interpretation::Instruction, OperandCode::Nothing), - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xfe_Eb), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xf6), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xf7), + OpcodeRecord(Interpretation::Instruction(Opcode::CLC), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::STC), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CLI), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::STI), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::CLD), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::STD), OperandCode::Nothing), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xfe_Eb), // TODO: test 0xff /3 - OpcodeRecord(Opcode::Invalid, Interpretation::Instruction, OperandCode::ModRM_0xff_Ev), + OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xff_Ev), ]; -fn read_opcode<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<OperandCode> { - let mut alternate_opcode_map: Option<OpcodeMap> = None; - use std::hint::unreachable_unchecked; -// use std::intrinsics::unlikely; - instruction.prefixes = Prefixes::new(0); - loop { - match bytes_iter.next() { - Some(b) => { - instruction.length += 1; - let record = OPCODES[b as usize]; - if record.1 == Interpretation::Instruction { - instruction.opcode = record.0; - return Some(record.2); - } else { - match b { - 0x0f => { - return match alternate_opcode_map { - Some(OpcodeMap::Map66) => { - read_opcode_660f_map(bytes_iter, instruction) - }, - Some(OpcodeMap::MapF2) => { - read_opcode_f20f_map(bytes_iter, instruction) - }, - Some(OpcodeMap::MapF3) => { - read_opcode_f30f_map(bytes_iter, instruction) - }, - None => { - read_opcode_0f_map(bytes_iter, instruction) - } - }; - }, - 0x26 => { - instruction.prefixes.set_es(); - alternate_opcode_map = None; - }, - 0x2e => { - instruction.prefixes.set_cs(); - alternate_opcode_map = None; - }, - 0x36 => { - instruction.prefixes.set_ss(); - alternate_opcode_map = None; - }, - 0x3e => { - instruction.prefixes.set_ds(); - alternate_opcode_map = None; - }, - x if x < 0x50 => { - // x86_32 inc/dec - // x86_64 rex - instruction.prefixes.rex_mut().from(x); - }, - 0x64 => { - instruction.prefixes.set_fs(); - alternate_opcode_map = None; - }, - 0x65 => { - instruction.prefixes.set_gs(); - alternate_opcode_map = None; - }, - 0x66 => { - instruction.prefixes.set_operand_size(); - alternate_opcode_map = Some(OpcodeMap::Map66); - }, - 0x67 => { - instruction.prefixes.set_address_size(); - alternate_opcode_map = None; - }, - 0xf0 => { - instruction.prefixes.set_lock(); - }, - 0xf2 => { - instruction.prefixes.set_repnz(); - alternate_opcode_map = Some(OpcodeMap::MapF2); - }, - 0xf3 => { - instruction.prefixes.set_rep(); - alternate_opcode_map = Some(OpcodeMap::MapF3); - }, - _ => { unsafe { unreachable_unchecked(); } } - } - } - }, - None => { - return None; - } - } - } -} - #[allow(non_snake_case)] fn read_E<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut Instruction, modrm: u8, width: u8, result: usize) -> Option<()> { let bank = width_to_gp_reg_bank(width, instr.prefixes.rex().present()); @@ -1801,17 +1744,16 @@ fn read_E_xmm<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut Instruction, #[allow(non_snake_case)] fn read_E_anybank<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut Instruction, modrm: u8, _width: u8, result: usize, reg_bank: RegisterBank) -> Option<()> { let modbits = (modrm >> 6); - let m = modrm & 7; let addr_width = if instr.prefixes.address_size() { 4 } else { 8 }; if modbits == 0b11 { - instr.operands[result] = Operand::Register(RegSpec::from_parts(m, instr.prefixes.rex().b(), reg_bank)) - } else if m == 5 && modbits == 0b00 { + instr.operands[result] = Operand::Register(RegSpec::from_parts(modrm & 7, instr.prefixes.rex().b(), reg_bank)) + } else if (modrm & 7) == 5 && modbits == 0b00 { let disp = read_num(bytes_iter, 4, &mut instr.length); instr.operands[result] = Operand::RegDisp( if addr_width == 8 { RegSpec::RIP() } else { RegSpec::EIP() }, disp as i32 ); - } else if m == 4 { + } else if (modrm & 7) == 4 { let sibbyte = match bytes_iter.next() { Some(b) => b, None => { return None; } //Err("Out of bytes".to_string()) @@ -1912,7 +1854,7 @@ fn read_E_anybank<T: Iterator<Item=u8>>(bytes_iter: &mut T, instr: &mut Instruct } } } else { - let reg = RegSpec::gp_from_parts(m, instr.prefixes.rex().b(), addr_width, instr.prefixes.rex().present()); + let reg = RegSpec::gp_from_parts(modrm & 7, instr.prefixes.rex().b(), addr_width, instr.prefixes.rex().present()); if modbits == 0b00 { instr.operands[result] = Operand::RegDeref(reg); @@ -1940,41 +1882,45 @@ fn width_to_gp_reg_bank(width: u8, rex: bool) -> RegisterBank { } } -pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut Instruction) -> Option<()> { +pub fn read_instr<T: Iterator<Item=u8>>(mut bytes_iter: T, instruction: &mut Instruction) -> Option<()> { let mut alternate_opcode_map: Option<OpcodeMap> = None; use std::hint::unreachable_unchecked; // use std::intrinsics::unlikely; instruction.prefixes = Prefixes::new(0); - let operand_code = loop { + let record: OpcodeRecord = loop { +// let operand_code = loop { match bytes_iter.next() { Some(b) => { instruction.length += 1; - let record = OPCODES[b as usize]; - if record.1 == Interpretation::Instruction { - instruction.opcode = record.0; - break record.2; + let record: u16 = (unsafe { std::mem::transmute::<&'static [OpcodeRecord], &'static [u16]>(&OPCODES[..]) })[b as usize]; + if let Interpretation::Instruction(opcode) = (unsafe { std::mem::transmute::<u16, OpcodeRecord>(record) }).0 { + instruction.opcode = opcode; + break unsafe { std::mem::transmute::<u16, OpcodeRecord>(record) }; } else { match b { + x if (x & 0xf0 == 0x40) => { + // x86_32 inc/dec + // x86_64 rex + instruction.prefixes.rex_mut().from(x); + }, 0x0f => { - let opc = match alternate_opcode_map { + if let Some(record) = match alternate_opcode_map { Some(OpcodeMap::Map66) => { - read_opcode_660f_map(bytes_iter, instruction) + read_opcode_660f_map(&mut bytes_iter, instruction) }, Some(OpcodeMap::MapF2) => { - read_opcode_f20f_map(bytes_iter, instruction) + read_opcode_f20f_map(&mut bytes_iter, instruction) }, Some(OpcodeMap::MapF3) => { - read_opcode_f30f_map(bytes_iter, instruction) + read_opcode_f30f_map(&mut bytes_iter, instruction) }, None => { - read_opcode_0f_map(bytes_iter, instruction) + read_opcode_0f_map(&mut bytes_iter, instruction) } - }; - match opc { - Some(o) => { - break o; - }, - None => { return None; } + } { + break record; + } else { + return None; } }, 0x26 => { @@ -1993,11 +1939,6 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In instruction.prefixes.set_ds(); alternate_opcode_map = None; }, - x if x < 0x50 => { - // x86_32 inc/dec - // x86_64 rex - instruction.prefixes.rex_mut().from(x); - }, 0x64 => { instruction.prefixes.set_fs(); alternate_opcode_map = None; @@ -2034,6 +1975,9 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } } }; + read_operands(bytes_iter, instruction, record.1) +} +pub fn read_operands<T: Iterator<Item=u8>>(mut bytes_iter: T, instruction: &mut Instruction, operand_code: OperandCode) -> Option<()> { match operand_code { /* Gv_Ev_Iv, @@ -2083,21 +2027,21 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In */ OperandCode::Eb_R0 => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); if (modrm & 0b00111000) != 0 { instruction.opcode = Opcode::Invalid; return None; // Err("Invalid modr/m for opcode 0xc6".to_owned()); } - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); }, OperandCode::AL_Ob => { let _addr_width = if instruction.prefixes.address_size() { 4 } else { 8 }; // stupid RCT thing: let addr_width = if instruction.prefixes.address_size() { 2 } else { 4 }; let opwidth = 1; - let imm = read_num(bytes_iter, addr_width, &mut instruction.length); + let imm = read_num(&mut bytes_iter, addr_width, &mut instruction.length); instruction.operands = [ Operand::Register(RegSpec::gp_from_parts(0, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), if instruction.prefixes.address_size() { @@ -2112,7 +2056,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In // stupid RCT thing: let addr_width = if instruction.prefixes.address_size() { 2 } else { 4 }; let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let imm = read_num(bytes_iter, addr_width, &mut instruction.length); + let imm = read_num(&mut bytes_iter, addr_width, &mut instruction.length); instruction.operands = [ Operand::Register(RegSpec::gp_from_parts(0, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), if instruction.prefixes.address_size() { @@ -2127,7 +2071,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In // stupid RCT thing: let addr_width = if instruction.prefixes.address_size() { 2 } else { 4 }; let opwidth = 1; - let imm = read_num(bytes_iter, addr_width, &mut instruction.length); + let imm = read_num(&mut bytes_iter, addr_width, &mut instruction.length); instruction.operands = [ if instruction.prefixes.address_size() { Operand::DisplacementU32(imm as u32) @@ -2142,7 +2086,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In // stupid RCT thing: let addr_width = if instruction.prefixes.address_size() { 2 } else { 4 }; let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let imm = read_num(bytes_iter, addr_width, &mut instruction.length); + let imm = read_num(&mut bytes_iter, addr_width, &mut instruction.length); instruction.operands = [ if instruction.prefixes.address_size() { Operand::DisplacementU32(imm as u32) @@ -2154,46 +2098,46 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } OperandCode::ModRM_0x80_Eb_Ib => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); - let num = read_num(bytes_iter, 1, &mut instruction.length) as i8; + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let num = read_num(&mut bytes_iter, 1, &mut instruction.length) as i8; instruction.opcode = base_opcode_map((modrm >> 3) & 7); instruction.operands[1] = Operand::ImmediateI8(num); }, OperandCode::ModRM_0x81_Ev_Ivs => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); - let imm = read_imm_signed(bytes_iter, if opwidth == 8 { 4 } else { opwidth }, opwidth, &mut instruction.length).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let imm = read_imm_signed(&mut bytes_iter, if opwidth == 8 { 4 } else { opwidth }, opwidth, &mut instruction.length).unwrap(); instruction.opcode = base_opcode_map((modrm >> 3) & 7); instruction.operands[1] = imm; }, OperandCode::ModRM_0xc0_Eb_Ib => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); - let num = read_num(bytes_iter, 1, &mut instruction.length) as i8; + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let num = read_num(&mut bytes_iter, 1, &mut instruction.length) as i8; instruction.opcode = BITWISE_OPCODE_MAP[((modrm >> 3) & 7) as usize].clone(); instruction.operands[1] = Operand::ImmediateI8(num); }, OperandCode::ModRM_0xc1_Ev_Ib => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); - let num = read_num(bytes_iter, 1, &mut instruction.length) as i8; + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let num = read_num(&mut bytes_iter, 1, &mut instruction.length) as i8; instruction.opcode = BITWISE_OPCODE_MAP[((modrm >> 3) & 7) as usize].clone(); instruction.operands[1] = Operand::ImmediateI8(num); }, OperandCode::ModRM_0xc6_Eb_Ib => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); - let num = read_num(bytes_iter, 1, &mut instruction.length) as i8; + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let num = read_num(&mut bytes_iter, 1, &mut instruction.length) as i8; if (modrm & 0b00111000) != 0 { instruction.opcode = Opcode::Invalid; return None; // Err("Invalid modr/m for opcode 0xc6".to_owned()); @@ -2203,41 +2147,41 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In }, OperandCode::ModRM_0xc7_Ev_Iv => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); if (modrm & 0b00111000) != 0 { instruction.opcode = Opcode::Invalid; return None; // Err("Invalid modr/m for opcode 0xc7".to_string()); } - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.opcode = Opcode::MOV; - instruction.operands[1] = read_imm_unsigned(bytes_iter, opwidth, &mut instruction.length).unwrap(); + instruction.operands[1] = read_imm_unsigned(&mut bytes_iter, opwidth, &mut instruction.length).unwrap(); }, OperandCode::ModRM_0xd0_Eb_1 => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.opcode = BITWISE_OPCODE_MAP[((modrm >> 3) & 7) as usize].clone(); instruction.operands[1] = Operand::ImmediateI8(1); }, OperandCode::ModRM_0xd1_Ev_1 => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.opcode = BITWISE_OPCODE_MAP[((modrm >> 3) & 7) as usize].clone(); instruction.operands[1] = Operand::ImmediateI8(1); }, OperandCode::ModRM_0xf6 => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); match (modrm >> 3) & 7 { 0 | 1 => { instruction.opcode = Opcode::TEST; - instruction.operands[1] = read_imm_signed(bytes_iter, 1, opwidth, &mut instruction.length).unwrap(); + instruction.operands[1] = read_imm_signed(&mut bytes_iter, 1, opwidth, &mut instruction.length).unwrap(); }, 2 => { instruction.opcode = Opcode::NOT; @@ -2264,13 +2208,13 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In }, OperandCode::ModRM_0xf7 => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); match ((modrm >> 3) & 7) { 0 | 1 => { instruction.opcode = Opcode::TEST; let numwidth = if opwidth == 8 { 4 } else { opwidth }; - instruction.operands[1] = read_imm_signed(bytes_iter, numwidth, opwidth, &mut instruction.length).unwrap(); + instruction.operands[1] = read_imm_signed(&mut bytes_iter, numwidth, opwidth, &mut instruction.length).unwrap(); }, 2 => { instruction.opcode = Opcode::NOT; @@ -2297,9 +2241,9 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In }, OperandCode::ModRM_0xfe_Eb => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.opcode = [ Opcode::INC, Opcode::DEC, @@ -2314,9 +2258,9 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } OperandCode::ModRM_0xff_Ev => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); let opcode = [ Opcode::INC, Opcode::DEC, @@ -2332,54 +2276,54 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } OperandCode::Ev => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.operands[1] = Operand::Nothing; }, OperandCode::Eb_Gb => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.operands[1] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::Ev_Gv => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.operands[1] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::Gb_Eb => { let opwidth = 1; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 1).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 1).unwrap(); instruction.operands[0] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::Gv_Eb => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, opwidth, 1).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 1).unwrap(); instruction.operands[0] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::Gv_Ew => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); - read_E(bytes_iter, instruction, modrm, 2, 1).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, 2, 1).unwrap(); instruction.operands[0] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::Ew_Sw => { let opwidth = 2; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); // check r if ((modrm >> 3) & 7) > 5 { @@ -2394,12 +2338,12 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In instruction.operands[0] = Operand::Register(RegSpec { bank: RegisterBank::W, num: modrm & 7}); } else { - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); } }, OperandCode::Sw_Ew => { let opwidth = 2; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); // check r if ((modrm >> 3) & 7) > 5 { @@ -2414,52 +2358,100 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In instruction.operands[1] = Operand::Register(RegSpec { bank: RegisterBank::W, num: modrm & 7}); } else { - read_E(bytes_iter, instruction, modrm, opwidth, 1).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 1).unwrap(); } }, // TODO: verify M OperandCode::Gv_Ed => { let opwidth = 4; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); // println!("mod_bits: {:2b}, r: {:3b}, m: {:3b}", mod_bits, r, m); - read_E(bytes_iter, instruction, modrm, opwidth, 1).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 1).unwrap(); instruction.operands[0] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::Gv_Ev | OperandCode::Gv_M => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); // println!("mod_bits: {:2b}, r: {:3b}, m: {:3b}", mod_bits, r, m); - read_E(bytes_iter, instruction, modrm, opwidth, 1).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 1).unwrap(); instruction.operands[0] = Operand::Register(RegSpec::gp_from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), opwidth, instruction.prefixes.rex().present())); }, OperandCode::E_G_xmm => { let opwidth = 8; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); // println!("mod_bits: {:2b}, r: {:3b}, m: {:3b}", mod_bits, r, m); - read_E_xmm(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E_xmm(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.operands[1] = Operand::Register(RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::X)); }, OperandCode::G_E_xmm => { let opwidth = 8; - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); // println!("mod_bits: {:2b}, r: {:3b}, m: {:3b}", mod_bits, r, m); - read_E_xmm(bytes_iter, instruction, modrm, opwidth, 1).unwrap(); + read_E_xmm(&mut bytes_iter, instruction, modrm, opwidth, 1).unwrap(); instruction.operands[0] = Operand::Register(RegSpec::from_parts((modrm >> 3) & 7, instruction.prefixes.rex().r(), RegisterBank::X)); }, - OperandCode::Zv_Ivq(opcode_byte) => { + OperandCode::Zv_Ivq_R0 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(0, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R1 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(1, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R2 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(2, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R3 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(3, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R4 => { let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - let reg_idx = opcode_byte & 0x7; instruction.operands = [ - Operand::Register(RegSpec::gp_from_parts(reg_idx, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), - read_imm_ivq(bytes_iter, opwidth, &mut instruction.length).unwrap() + Operand::Register(RegSpec::gp_from_parts(4, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R5 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(5, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R6 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(6, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zv_Ivq_R7 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(7, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present())), + read_imm_ivq(&mut bytes_iter, opwidth, &mut instruction.length).unwrap() ]; }, OperandCode::AL_Ib => { @@ -2467,7 +2459,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In let numwidth = 1; instruction.operands = [ Operand::Register(RegSpec::al()), - read_imm_signed(bytes_iter, numwidth, opwidth, &mut instruction.length).unwrap() + read_imm_signed(&mut bytes_iter, numwidth, opwidth, &mut instruction.length).unwrap() ]; } OperandCode::AX_Ivd => { @@ -2475,64 +2467,161 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In let numwidth = if opwidth == 8 { 4 } else { opwidth }; instruction.operands = [ Operand::Register(RegSpec::gp_from_parts(0, false, opwidth, false)), - read_imm_signed(bytes_iter, numwidth, opwidth, &mut instruction.length).unwrap() + read_imm_signed(&mut bytes_iter, numwidth, opwidth, &mut instruction.length).unwrap() ]; } - OperandCode::Zb_Ib(opcode_byte) => { - let reg_idx = opcode_byte & 0x7; + OperandCode::Zb_Ib_R0 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(0, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R1 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(1, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R2 => { instruction.operands = [ - Operand::Register(RegSpec::gp_from_parts(reg_idx, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), - read_imm_unsigned(bytes_iter, 1, &mut instruction.length).unwrap() + Operand::Register(RegSpec::gp_from_parts(2, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R3 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(3, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R4 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(4, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R5 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(5, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R6 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(6, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() + ]; + }, + OperandCode::Zb_Ib_R7 => { + instruction.operands = [ + Operand::Register(RegSpec::gp_from_parts(7, instruction.prefixes.rex().b(), 1, instruction.prefixes.rex().present())), + read_imm_unsigned(&mut bytes_iter, 1, &mut instruction.length).unwrap() ]; }, OperandCode::Iw => { instruction.operands = [ - read_imm_unsigned(bytes_iter, 2, &mut instruction.length).unwrap(), + read_imm_unsigned(&mut bytes_iter, 2, &mut instruction.length).unwrap(), Operand::Nothing ]; } OperandCode::Jbs => { // TODO: arch width (8 in 64, 4 in 32, 2 in 16) instruction.operands = [ - read_imm_signed(bytes_iter, 1, 8, &mut instruction.length).unwrap(), + read_imm_signed(&mut bytes_iter, 1, 8, &mut instruction.length).unwrap(), Operand::Nothing ]; }, OperandCode::Ibs => { instruction.operands = [ - read_imm_signed(bytes_iter, 1, 8, &mut instruction.length).unwrap(), + read_imm_signed(&mut bytes_iter, 1, 8, &mut instruction.length).unwrap(), Operand::Nothing ]; }, OperandCode::Ivs => { let opwidth = imm_width_from_prefixes_64(SizeCode::vd, &instruction.prefixes); instruction.operands = [ - read_imm_unsigned(bytes_iter, opwidth, &mut instruction.length).unwrap(), + read_imm_unsigned(&mut bytes_iter, opwidth, &mut instruction.length).unwrap(), Operand::Nothing ]; }, OperandCode::ModRM_0x83_Ev_Ibs => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let opwidth = imm_width_from_prefixes_64(SizeCode::vqp, &instruction.prefixes); - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); instruction.opcode = base_opcode_map((modrm >> 3) & 7); - instruction.operands[1] = read_imm_signed(bytes_iter, 1, opwidth, &mut instruction.length).unwrap(); + instruction.operands[1] = read_imm_signed(&mut bytes_iter, 1, opwidth, &mut instruction.length).unwrap(); + }, + OperandCode::Zv_R0 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 0, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; + }, + OperandCode::Zv_R1 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 1, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; + }, + OperandCode::Zv_R2 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 2, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; + }, + OperandCode::Zv_R3 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 3, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; + }, + OperandCode::Zv_R4 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 4, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; + }, + OperandCode::Zv_R5 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 5, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; + }, + OperandCode::Zv_R6 => { + let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); + instruction.operands = [Operand::Register( + RegSpec::gp_from_parts( + 6, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + ) + ), Operand::Nothing]; }, - OperandCode::Zv(opcode_byte) => { + OperandCode::Zv_R7 => { let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); instruction.operands = [Operand::Register( RegSpec::gp_from_parts( - opcode_byte & 0b111, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() + 7, instruction.prefixes.rex().b(), opwidth, instruction.prefixes.rex().present() ) ), Operand::Nothing]; }, OperandCode::Jvds => { - let offset = read_num(bytes_iter, 4, &mut instruction.length); + let offset = read_num(&mut bytes_iter, 4, &mut instruction.length); instruction.operands = [Operand::ImmediateI32(offset as i32), Operand::Nothing]; } OperandCode::ModRM_0x0f00 => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let r = (modrm >> 3) & 7; if r == 0 { instruction.opcode = Opcode::SLDT; @@ -2563,11 +2652,11 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } else { unreachable!("r <= 8"); } - read_E(bytes_iter, instruction, modrm, 2, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, 2, 0).unwrap(); } OperandCode::ModRM_0x0f01 => { let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let r = (modrm >> 3) & 7; if r == 0 { let mod_bits = modrm >> 6; @@ -2577,7 +2666,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } else { instruction.opcode = Opcode::SGDT; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); } } else if r == 1 { let mod_bits = modrm >> 6; @@ -2589,7 +2678,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } else { instruction.opcode = Opcode::SIDT; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); } } else if r == 2 { let mod_bits = modrm >> 6; @@ -2601,7 +2690,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } else { instruction.opcode = Opcode::LGDT; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); } } else if r == 3 { let mod_bits = modrm >> 6; @@ -2613,20 +2702,20 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } else { instruction.opcode = Opcode::LIDT; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); } } else if r == 4 { // TODO: this permits storing only to word-size registers // spec suggets this might do something different for f.ex rdi.unwrap() instruction.opcode = Opcode::SMSW; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, 2, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, 2, 0).unwrap(); } else if r == 5 { panic!("Unsupported instruction: 0x0f01 with modrm: __ 101 ___"); } else if r == 6 { instruction.opcode = Opcode::LMSW; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, 2, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, 2, 0).unwrap(); } else if r == 7 { let mod_bits = modrm >> 6; let m = modrm & 7; @@ -2644,14 +2733,14 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } else { instruction.opcode = Opcode::INVLPG; instruction.operands[1] = Operand::Nothing; - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); } } else { unreachable!("r <= 8"); } } OperandCode::ModRM_0x0fae => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let r = (modrm >> 3) & 7; let mod_bits = modrm >> 6; match r { @@ -2728,11 +2817,11 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } _ => { unreachable!("r < 6"); } } - read_E(bytes_iter, instruction, modrm, 8, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, 8, 0).unwrap(); } OperandCode::ModRM_0x0fba => { let opwidth = imm_width_from_prefixes_64(SizeCode::vq, &instruction.prefixes); - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let r = (modrm >> 3) & 7; match r { 0 | 1 | 2 | 3 => { @@ -2756,13 +2845,13 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In } } - read_E(bytes_iter, instruction, modrm, opwidth, 0).unwrap(); + read_E(&mut bytes_iter, instruction, modrm, opwidth, 0).unwrap(); - instruction.operands[1] = read_imm_signed(bytes_iter, 1, 1, &mut instruction.length).unwrap(); + instruction.operands[1] = read_imm_signed(&mut bytes_iter, 1, 1, &mut instruction.length).unwrap(); } OperandCode::Rq_Cq_0 => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let mut m = modrm & 7; let mut r = (modrm >> 3) & 7; if instruction.prefixes.rex().r() { @@ -2777,7 +2866,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In ]; } OperandCode::Rq_Dq_0 => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let mut m = modrm & 7; let mut r = (modrm >> 3) & 7; if instruction.prefixes.rex().r() { @@ -2792,7 +2881,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In ]; } OperandCode::Cq_Rq_0 => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let mut m = modrm & 7; let mut r = (modrm >> 3) & 7; if instruction.prefixes.rex().r() { @@ -2807,7 +2896,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In ]; } OperandCode::Dq_Rq_0 => { - let modrm = read_modrm(bytes_iter, &mut instruction.length).unwrap(); + let modrm = read_modrm(&mut bytes_iter, &mut instruction.length).unwrap(); let mut m = modrm & 7; let mut r = (modrm >> 3) & 7; if instruction.prefixes.rex().r() { @@ -2848,7 +2937,7 @@ pub fn read_instr<T: Iterator<Item=u8>>(bytes_iter: &mut T, instruction: &mut In pub fn decode_one<'b, T: IntoIterator<Item=u8>>(bytes: T, instr: &'b mut Instruction) -> Option<()> { let mut bytes_iter = bytes.into_iter(); instr.length = 0; - read_instr(&mut bytes_iter, instr) + read_instr(bytes_iter, instr) } /* match read_opcode(&mut bytes_iter, instr) { |