diff options
Diffstat (limited to 'src/long_mode')
| -rw-r--r-- | src/long_mode/display.rs | 8 | ||||
| -rw-r--r-- | src/long_mode/mod.rs | 17 | 
2 files changed, 8 insertions, 17 deletions
| diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs index 9c6795e..c1c6c65 100644 --- a/src/long_mode/display.rs +++ b/src/long_mode/display.rs @@ -132,6 +132,10 @@ pub(crate) fn regspec_label(spec: &RegSpec) -> &'static str {      unsafe { REG_NAMES.get_kinda_unchecked((spec.num as u16 + ((spec.bank as u16) << 3)) as usize) }  } +pub(crate) fn mem_size_label(size: u8) -> &'static str { +    unsafe { MEM_SIZE_STRINGS.get_kinda_unchecked(size as usize) } +} +  impl fmt::Display for RegSpec {      fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {          f.write_str(regspec_label(self)) @@ -3415,7 +3419,7 @@ fn contextualize_intel<T: fmt::Write, Y: YaxColors>(instr: &Instruction, colors:          }          if x.is_memory() { -            out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize - 1])?; +            out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize])?;              out.write_str(" ")?;          } @@ -3435,7 +3439,7 @@ fn contextualize_intel<T: fmt::Write, Y: YaxColors>(instr: &Instruction, colors:                              out.write_str(", ")?;                              let x = Operand::from_spec(instr, instr.operands[i as usize]);                              if x.is_memory() { -                                out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize - 1])?; +                                out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize])?;                                  out.write_str(" ")?;                              }                              if let Some(prefix) = instr.segment_override_for_op(i) { diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 9bc9f0b..f58976a 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -4380,21 +4380,6 @@ impl Instruction {      /// prefixes.      pub fn segment_override_for_op(&self, op: u8) -> Option<Segment> {          match self.opcode { -            Opcode::STOS | -            Opcode::SCAS => { -                if op == 0 { -                    Some(Segment::ES) -                } else { -                    None -                } -            } -            Opcode::LODS => { -                if op == 1 { -                    Some(self.prefixes.segment) -                } else { -                    None -                } -            }              Opcode::MOVS => {                  if op == 0 {                      Some(Segment::ES) @@ -9002,6 +8987,7 @@ fn read_operands<          }          OperandCase::Yb_AL => {              instruction.regs[0] = RegSpec::al(); +            instruction.prefixes.segment = Segment::ES;              if instruction.prefixes.address_size() {                  instruction.regs[1] = RegSpec::edi();              } else { @@ -9028,6 +9014,7 @@ fn read_operands<              let bank = bank_from_prefixes_64(SizeCode::vqp, instruction.prefixes);              instruction.regs[0].num = 0;              instruction.regs[0].bank = bank; +            instruction.prefixes.segment = Segment::ES;              if instruction.prefixes.address_size() {                  instruction.regs[1] = RegSpec::edi();              } else { | 
