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-rw-r--r--src/long_mode/mod.rs2
-rw-r--r--src/long_mode/vex.rs6
2 files changed, 6 insertions, 2 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index f8704c0..f2b2b57 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -6943,7 +6943,7 @@ fn read_0f38_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {
fn read_0f3a_opcode(opcode: u8, prefixes: &mut Prefixes) -> OpcodeRecord {
if prefixes.rep() {
- if prefixes.operand_size() || prefixes.repnz() {
+ if prefixes != &Prefixes::new(0x10) {
return OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing);
}
return match opcode {
diff --git a/src/long_mode/vex.rs b/src/long_mode/vex.rs
index 7f8252f..d69a411 100644
--- a/src/long_mode/vex.rs
+++ b/src/long_mode/vex.rs
@@ -1599,7 +1599,11 @@ fn read_vex_instruction<T: Reader<<Arch as yaxpeax_arch::Arch>::Address, <Arch a
} else {
VEXOperandCode::G_V_E_xmm
}),
- 0x16 => (Opcode::VMOVHPD, VEXOperandCode::G_V_M_xmm),
+ 0x16 => (Opcode::VMOVHPD, if L {
+ return Err(DecodeError::InvalidOpcode);
+ } else {
+ VEXOperandCode::G_V_M_xmm
+ }),
0x17 => (Opcode::VMOVHPD, if L {
instruction.opcode = Opcode::Invalid;
return Err(DecodeError::InvalidOpcode);