diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/shared/evex.in | 3 | ||||
| -rw-r--r-- | src/shared/generated_evex.in | 463 |
2 files changed, 57 insertions, 409 deletions
diff --git a/src/shared/evex.in b/src/shared/evex.in index 4a26003..e7e0aa1 100644 --- a/src/shared/evex.in +++ b/src/shared/evex.in @@ -4927,9 +4927,6 @@ pub(crate) fn read_evex_operands<T: Iterator<Item=u8>>(bytes: &mut T, instructio } } generated::EVEXOperandCode::Nothing => {} - o => { - panic!("unhandled operand code {:?}. opcode={}", o, instruction.opcode); - } } Ok(()) } diff --git a/src/shared/generated_evex.in b/src/shared/generated_evex.in index d98346b..4f4c518 100644 --- a/src/shared/generated_evex.in +++ b/src/shared/generated_evex.in @@ -502,237 +502,68 @@ const EVEX_OPCODES: [super::Opcode; 496] = [ #[derive(Debug, PartialEq, Eq, Copy, Clone)] pub(crate) enum EVEXOperandCode { - VCVTTPS2UQQ, - VCVTUSI2SD, - VCVTTPS2UDQ, - Gm_E_LL_sae_bcast_W0, - G_Ed_xmm_sae_W0, - Maskm_V_Eq_xmm_imm8_sae_W1, - VCVTPS2PD_W0, - VCVTPH2PS, - VCVTDQ2PS, - Mask_E_LL_imm8_bcast, - Gm_E_LL_imm8_sae, - Gm_V_LL_E_xmm, - Gm_V_LL_E_xmm_W0, - Gm_V_LL_E_xmm_W1, - VPINSRW, - VPEXTRW, - Maskm_V_E_LL_imm8_sae_bcast_W1, - VCVTSI2SS, - VCVTTSS2SI, - VCVTSS2SI, - VMOVSS_10, - VMOVSS_11, - VMOVQ_Ed_G_xmm, - VMOVQ_G_Ed_xmm, - VMOVD_6e, - VMOVD_7e, - VMOVQ_7e, - Gm_ymm_E_zmm_sae_bcast_W1, - Gm_xmm_E_xmm_sae_bcast_W1, - Gm_xmm_E_ymm_sae_bcast_W1, - Gm_E_zmm_sae_bcast, - Gm_E_zmm_sae_bcast_W0, - G_V_xmm_Ebd_imm8, - G_V_xmm_Edq_imm8, - G_V_xmm_Edq_sae, - E_G_xmm, - E_G_xmm_W0, - E_G_ymm, - E_G_ymm_W0, - E_G_zmm, - E_G_zmm_W0, - E_xmm_G_ymm, - E_xmm_G_ymm_W0, - E_xmm_G_zmm, - E_xmm_G_zmm_W0, - E_ymm_G_xmm, - E_ymm_G_xmm_W0, - E_ymm_G_zmm, - E_ymm_G_zmm_W0, + Gm_U_zmm_imm8_sae_W0, + Gm_V_E_LL_sae_W1, + Gm_U_zmm_sae_W0, + E_G_LL_W0, Ebd_G_xmm_imm8, - Ed_xmm_G_xmm, - Ed_xmm_G_xmm_W0, - Ed_xmm_G_ymm, - Ed_xmm_G_ymm_W0, Edd_G_xmm_imm8, - Edm_xmm_G_xmm, Edm_xmm_G_xmm_W0, - Edm_xmm_G_ymm, Edm_xmm_G_ymm_W0, Em_G_LL, - M_G_LL_W0, - E_G_LL_W0, Em_G_LL_W0, Em_G_LL_W1, - Em_G_xmm, - Em_G_xmm_W0, - Em_G_xmm_W1, - Em_G_ymm, - Em_G_ymm_W0, - Em_G_ymm_W1, - Em_G_zmm, - Em_G_zmm_W0, - Em_G_zmm_W1, Em_xmm_G_LL_imm8, - Em_xmm_G_ymm, Em_xmm_G_ymm_W0, Em_xmm_G_ymm_imm8_sae_W0, - Em_xmm_G_zmm, Em_xmm_G_zmm_W0, - Em_ymm_G_zmm, Em_ymm_G_zmm_W0, Em_ymm_G_zmm_imm8, - Em_ymm_G_zmm_imm8_sae, Em_ymm_G_zmm_imm8_sae_W0, - Eq_G_xmm_imm8, - Eq_xmm_G_xmm, - Eq_xmm_G_xmm_W0, - Eq_xmm_G_ymm, - Eq_xmm_G_ymm_W0, - Eq_xmm_G_zmm, - Eq_xmm_G_zmm_W0, Eqm_G_xmm_imm8_sae_W0, - Eqm_xmm_G_xmm, Eqm_xmm_G_xmm_W0, - Eqm_xmm_G_ymm, Eqm_xmm_G_ymm_W0, - Eqm_xmm_G_zmm, Eqm_xmm_G_zmm_W0, - Ew_xmm_G_xmm, - Ew_xmm_G_xmm_W0, Ewd_G_xmm_imm8, - Ewm_xmm_G_xmm, Ewm_xmm_G_xmm_W0, G_E_LL_W0, - G_E_xmm, - G_E_xmm_W0, - G_E_ymm, - G_E_ymm_W0, - G_E_zmm, - G_E_zmm_W0, - G_Ed_xmm_sae, + G_Ed_xmm_sae_W0, G_LL_Mask, G_LL_Mask_W0, G_LL_Mask_W1, G_V_E_LL, - G_V_E_LL_W0, - G_V_E_LL_bcast, - G_V_E_LL_bcast_W1, G_V_E_LL_imm8, - G_V_E_LL_imm8_W0, - G_V_E_xmm, - G_V_E_xmm_imm8, - G_V_E_ymm, - G_V_E_ymm_imm8, - G_V_E_zmm, - G_V_E_zmm_imm8, - G_V_Ed_xmm_imm8, G_V_Ed_xmm_imm8_W0, G_V_Mq_xmm_W1, - G_V_U_xmm, - G_xmm_Mask, - G_xmm_Mask_W0, - G_xmm_Mask_W1, - G_ymm_Ed_xmm, - Gm_ymm_Ed_xmm_W0, - G_ymm_M_xmm, - G_ymm_Mask, - G_ymm_Mask_W0, - G_ymm_Mask_W1, - G_zmm_Ed_LL_bcast, - Gm_zmm_Ed_xmm, - G_zmm_Ed_xmm_W0, - Gm_xmm_Ed_xmm_W0, - Gm_zmm_Ed_xmm_W0, - G_zmm_Ed_xmm_bcast, - Gm_zmm_M_ymm, - G_zmm_Mask, - G_zmm_Mask_W0, - G_zmm_Mask_W1, - Gb_Eb_zmm, - Gb_Eb_zmm_W0, - Gb_Ew_LL_W0, - Gb_Ew_xmm, - Gb_Ew_xmm_W0, - Gb_Ew_ymm, - Gb_Ew_ymm_W0, - Gb_Ew_zmm, - Gb_Ew_zmm_W0, - Gd_Ed_xmm, + G_V_xmm_Ebd_imm8, + G_V_xmm_Edq_imm8, + G_V_xmm_Edq_sae, Gd_Ed_xmm_sae, Gm_E_LL, Gm_E_LL_W0, Gm_E_LL_W1, - Gm_E_LL_sae, Gm_E_LL_bcast, Gm_E_LL_bcast_W0, Gm_E_LL_bcast_W1, Gm_E_LL_imm8, - Gm_E_LL_imm8_bcast, - Opcode_72_Gm_E_LL_imm8_bcast, Gm_E_LL_imm8_bcast_W0, Gm_E_LL_imm8_bcast_W1, + Gm_E_LL_imm8_sae, Gm_E_LL_imm8_sae_W0, Gm_E_LL_imm8_sae_W1, + Gm_E_LL_sae_bcast, + Gm_E_LL_sae_bcast_W0, Gm_E_LL_sae_bcast_W1, - VCVTUDQ2PD, - Gm_E_xmm, - Gm_E_xmm_W0, - Gm_E_xmm_W1, - Gm_E_xmm_bcast, - Gm_E_xmm_bcast_W0, - Gm_E_xmm_bcast_W1, - Gm_E_xmm_imm8, - Gm_E_xmm_imm8_bcast, - Gm_E_xmm_imm8_bcast_W0, - Gm_E_xmm_imm8_bcast_W1, - Gm_E_ymm, - Gm_E_ymm_W0, - Gm_E_ymm_W1, - Gm_E_ymm_bcast, - Gm_E_ymm_bcast_W0, - Gm_E_ymm_bcast_W1, - Gm_E_ymm_imm8, - Gm_E_ymm_imm8_bcast, - Gm_E_ymm_imm8_bcast_W0, - Gm_E_ymm_imm8_bcast_W1, - Gm_E_zmm, - Gm_E_zmm_W0, - Gm_E_zmm_W1, - Gm_E_zmm_bcast, - Gm_E_zmm_bcast_W0, - Gm_E_zmm_bcast_W1, - Gm_E_zmm_imm8, - Gm_E_zmm_imm8_bcast, - Gm_E_zmm_imm8_bcast_W0, - Gm_E_zmm_imm8_bcast_W1, - Gm_E_zmm_imm8_sae, - Gm_E_zmm_imm8_sae_W0, - Gm_E_zmm_imm8_sae_W1, - Gm_E_zmm_sae, - Gm_E_zmm_sae_W0, - Gm_E_zmm_sae_W1, - Gm_Eb_LL_W0, + Gm_E_zmm_sae_bcast, + Gm_Ed_LL_imm8_sae_noround_bcast, + Gm_Ed_LL_sae_noround_bcast_W0, + Gm_Eq_xmm_sae_W1, Gm_LL_Eb_xmm_W0, - Gm_LL_Ew_xmm_W0, Gm_LL_Ed_xmm_W0, Gm_LL_Eq_xmm, - Gm_Eb_xmm, - Gm_Eb_xmm_W0, - Gm_Eq_xmm, - Gm_Eq_xmm_W1, - Gm_Eq_xmm_bcast, - Gm_Eq_xmm_sae_W1, + Gm_LL_Ew_xmm_W0, Gm_LL_Ud, Gm_LL_Ud_W0, - Gm_U_zmm_imm8_sae, - Gm_U_zmm_imm8_sae_W0, - Gm_U_zmm_imm8_sae_W1, - Gm_U_zmm_sae, - Gm_U_zmm_sae_W0, - Gm_U_zmm_sae_W1, Gm_V_E_LL, Gm_V_E_LL_W0, Gm_V_E_LL_W1, @@ -743,286 +574,104 @@ pub(crate) enum EVEXOperandCode { Gm_V_E_LL_imm8_W0, Gm_V_E_LL_imm8_W1, Gm_V_E_LL_imm8_bcast, - Gm_V_Ed_LL_imm8_bcast_W0, Gm_V_E_LL_imm8_bcast_W0, Gm_V_E_LL_imm8_bcast_W1, Gm_V_E_LL_imm8_sae_bcast, - Gm_E_LL_sae_bcast, - Gm_V_E_LL_sae_W1, - Gm_V_Ed_xmm_sae_bcast, Gm_V_E_LL_sae_bcast, Gm_V_E_LL_sae_bcast_W0, Gm_V_E_LL_sae_bcast_W1, - Gm_V_E_xmm, - Gm_V_E_xmm_W0, - Gm_V_E_xmm_W1, - Gm_V_E_xmm_bcast, - Gm_V_E_xmm_bcast_W0, - Gm_V_E_xmm_bcast_W1, - Gm_V_E_xmm_imm8, - Gm_V_E_xmm_imm8_W0, - Gm_V_E_xmm_imm8_W1, - Gm_V_E_xmm_imm8_bcast, - Gm_V_E_xmm_imm8_bcast_W0, - Gm_V_E_xmm_imm8_bcast_W1, Gm_V_E_xmm_imm8_sae, Gm_V_E_xmm_sae, Gm_V_E_xmm_sae_W1, - Gm_V_E_ymm, - Gm_V_E_ymm_W0, - Gm_V_E_ymm_W1, - Gm_V_E_ymm_bcast, - Gm_V_E_ymm_bcast_W0, - Gm_V_E_ymm_bcast_W1, - Gm_V_E_ymm_imm8, - Gm_V_E_ymm_imm8_W0, - Gm_V_E_ymm_imm8_W1, - Gm_V_E_ymm_imm8_bcast, - Gm_V_E_ymm_imm8_bcast_W0, - Gm_V_E_ymm_imm8_bcast_W1, - Gm_V_E_zmm, - Gm_V_E_zmm_W0, - Gm_V_E_zmm_W1, - Gm_V_E_zmm_bcast, - Gm_V_E_zmm_bcast_W0, - Gm_V_E_zmm_bcast_W1, - Gm_V_E_zmm_imm8, - Gm_V_E_zmm_imm8_W0, - Gm_V_E_zmm_imm8_W1, - Gm_V_E_zmm_imm8_bcast, - Gm_V_E_zmm_imm8_bcast_W0, - Gm_V_E_zmm_imm8_bcast_W1, - Gm_V_E_zmm_imm8_sae, - Gm_V_E_zmm_sae, - Gm_V_E_zmm_sae_W1, - Gm_V_Ed_LL_sae, Gm_V_Ed_LL_bcast, Gm_V_Ed_LL_bcast_W0, Gm_V_Ed_LL_imm8_bcast, + Gm_V_Ed_LL_sae, Gm_V_Ed_xmm, - Gm_V_Ed_xmm_W0, - Gm_V_Ed_xmm_bcast, - Gm_V_Ed_xmm_bcast_W0, - Gm_V_Ed_xmm_imm8_bcast, - Gm_V_Ed_xmm_imm8_bcast_W0, Gm_V_Ed_xmm_imm8_sae, Gm_V_Ed_xmm_sae, Gm_V_Ed_xmm_sae_W0, - Gm_Ed_LL_imm8_sae_noround_bcast, - Gm_Ed_LL_sae_noround_bcast_W0, + Gm_V_Ed_xmm_sae_bcast, Gm_V_Ed_xmm_sae_noround_W0, - Gm_V_Ed_ymm_bcast, - Gm_V_Ed_ymm_bcast_W0, - Gm_V_Ed_ymm_imm8_bcast, - Gm_V_Ed_ymm_imm8_bcast_W0, - Gm_V_Ed_zmm_bcast, - Gm_V_Ed_zmm_bcast_W0, - Gm_V_Ed_zmm_imm8_bcast, - Gm_V_Ed_zmm_imm8_bcast_W0, - Gm_V_Ed_zmm_imm8_sae, - Gm_V_Ed_zmm_sae, - Gm_V_Ed_zmm_sae_W0, - Gm_V_Eq_LL_imm8_bcast_W1, - Gm_V_Eq_xmm, - Gm_V_Eq_xmm_W1, - Gm_V_Eq_xmm_imm8_bcast, - Gm_V_Eq_xmm_imm8_bcast_W1, - Gm_V_Eq_xmm_sae, Gm_V_Eq_xmm_sae_W1, - Gm_V_Eq_ymm_imm8_bcast, - Gm_V_Eq_ymm_imm8_bcast_W1, - Gm_V_Eq_zmm_imm8_bcast, - Gm_V_Eq_zmm_imm8_bcast_W1, + Gm_V_LL_E_xmm, + Gm_V_LL_E_xmm_W0, + Gm_V_LL_E_xmm_W1, Gm_V_LL_E_xmm_imm8, Gm_V_M_xmm, - Gm_V_U_zmm_sae, - Gm_V_U_zmm_sae_W0, - Gm_V_U_zmm_sae_W1, - Gm_V_ymm_E_xmm, - Gm_V_ymm_E_xmm_W0, - Gm_V_ymm_E_xmm_W1, Gm_V_ymm_E_xmm_imm8, - Gm_V_zmm_E_xmm, - Gm_V_zmm_E_xmm_W0, - Gm_V_zmm_E_xmm_W1, Gm_V_zmm_E_xmm_imm8, Gm_V_zmm_E_ymm_imm8, - Gm_V_zmm_M_xmm, Gm_V_zmm_M_xmm_W0, + Gm_xmm_E_xmm_sae_bcast_W1, + Gm_xmm_E_ymm_sae_bcast_W1, Gm_xmm_Ed_xmm, + Gm_xmm_Ed_xmm_W0, Gm_xmm_Eq_xmm, Gm_xmm_Eq_xmm_W0, Gm_xmm_Ew_xmm, - Gm_xmm_Ud, - Gm_xmm_Ud_W0, Gm_ymm_E_xmm, Gm_ymm_E_xmm_W0, - Gm_ymm_E_xmm_bcast, - Gm_ymm_E_zmm_sae, - Gm_ymm_E_zmm_sae_W1, + Gm_ymm_E_zmm_sae_bcast_W1, Gm_ymm_Ed_xmm, - VBROADCASTF32X2_Gm_ymm_Ed_xmm, + Gm_ymm_Ed_xmm_W0, Gm_ymm_Eq_xmm, - Gm_ymm_Eq_xmm_W0, Gm_ymm_M_xmm, - Gm_ymm_U_zmm_imm8_sae, - Gm_ymm_U_zmm_imm8_sae_W0, - Gm_ymm_U_zmm_sae, Gm_ymm_U_zmm_sae_W1, - Gm_ymm_Ud, - Gm_ymm_Ud_W0, Gm_zmm_E_xmm, Gm_zmm_E_ymm, Gm_zmm_E_ymm_W0, - Gm_zmm_E_ymm_bcast, - Gm_zmm_E_ymm_sae, - Gm_zmm_E_ymm_sae_W0, + Gm_zmm_Ed_xmm, + Gm_zmm_Ed_xmm_W0, Gm_zmm_Eq_xmm, - Gm_zmm_Eq_xmm_W0, Gm_zmm_M_xmm, - Gm_zmm_U_ymm_sae, - Gm_zmm_Ud, - Gm_zmm_Ud_W0, - Gmd_Ed_xmm, - Gmd_Ed_xmm_sae, - Mq_G_W0, - MEMf32_XMMf32_AVX512_W0, - MEMf32_YMMf32_AVX512_W0, - MEMf32_ZMMf32_AVX512_W0, + Gm_zmm_M_ymm, + M_G_LL_W0, M_G_LL_W1, - M_G_ymm, - M_G_ymm_W1, - M_G_zmm, - M_G_zmm_W1, - Mask_E_xmm_imm8, + Mask_E_LL_imm8_bcast, Mask_Ed_xmm_imm8, Mask_U_LL, - Mask_U_xmm, - Mask_U_ymm, - Mask_U_zmm, Mask_V_E_LL, Mask_V_E_LL_W0, Mask_V_E_LL_bcast, Mask_V_E_LL_bcast_W0, - Mask_V_E_LL_imm8_sae_bcast_W0, Mask_V_E_LL_bcast_W1, Mask_V_E_LL_imm8, Mask_V_E_LL_imm8_bcast, - Mask_V_E_xmm, - Mask_V_E_xmm_W0, - Mask_V_E_xmm_bcast_W0, - Mask_V_E_xmm_bcast_W1, - Mask_V_E_xmm_imm8, - Mask_V_E_xmm_imm8_bcast, - Mask_V_E_ymm, - Mask_V_E_ymm_W0, - Mask_V_E_ymm_bcast_W0, - Mask_V_E_ymm_bcast_W1, - Mask_V_E_ymm_imm8, - Mask_V_E_ymm_imm8_bcast, - Mask_V_E_zmm, - Mask_V_E_zmm_W0, - Mask_V_E_zmm_bcast_W0, - Mask_V_E_zmm_bcast_W1, - Mask_V_E_zmm_imm8, - Mask_V_E_zmm_imm8_bcast, - Mask_V_E_zmm_imm8_sae, - Mask_V_E_zmm_imm8_sae_W1, + Mask_V_E_LL_imm8_sae_bcast_W0, + Maskm_V_E_LL_imm8_sae_bcast_W1, Maskm_V_Ed_xmm_imm8_sae_W0, - Maskm_V_Eq_xmm_imm8_sae, + Maskm_V_Eq_xmm_imm8_sae_W1, + Mq_G_W0, Mq_G_xmm_W1, Nothing, - Operands_08, - Operands_08_W0, - Operands_09, - Operands_09_W1, - Operands_10, - Operands_11, - Operands_12, + Opcode_72_Gm_E_LL_imm8_bcast, Operands_12_W0, - Operands_13, - Operands_13_W0, - Operands_14, - Operands_15, - Operands_16, Operands_16_W0, - Operands_17, - Operands_1d, - Operands_1d_W0, - Operands_20, - Operands_22, - Operands_26, - Operands_2a, - Operands_2c, - Operands_42, - Operands_50, - Operands_51, - Operands_51_W0, - Operands_51_W1, - Operands_54, - Operands_56, - Operands_58, - Operands_58_W0, - Operands_58_W1, - Operands_59, - Operands_59_W0, - Operands_59_W1, - Operands_5a, - Operands_5a_W0, - Operands_5a_W1, - Operands_5b, - Operands_5b_W0, - Operands_5c, - Operands_5c_W0, - Operands_5c_W1, - Operands_5d, - Operands_5d_W0, - Operands_5d_W1, - Operands_5e, - Operands_5e_W0, - Operands_5e_W1, - Operands_5f, - Operands_5f_W0, - Operands_5f_W1, - Operands_66, - Operands_6e, - Operands_72, Operands_72_W0, - Operands_78, - Operands_79, - Operands_7a, - Operands_7b, - Operands_7e, - Operands_96, - Operands_97, - Operands_98, - Operands_9a, - Operands_9c, - Operands_9e, - Operands_a6, - Operands_a7, - Operands_a8, - Operands_aa, - Operands_ac, - Operands_ae, - Operands_b6, - Operands_b7, - Operands_b8, - Operands_ba, - Operands_bc, - Operands_be, - Operands_c2, - Operands_c2_W0, - Operands_c2_W1, - Operands_c4, - Operands_e6, + VBROADCASTF32X2_Gm_ymm_Ed_xmm, + VCVTDQ2PS, + VCVTPH2PS, + VCVTSI2SS, + VCVTSS2SI, VCVTTPD2DQ, - Ud_Eq_xmm, - Ud_Eq_xmm_sae, + VCVTTPS2UDQ, + VCVTTPS2UQQ, + VCVTTSS2SI, + VCVTUDQ2PD, + VCVTUSI2SD, VEXTRACTPS, + VMOVD_6e, + VMOVD_7e, + VMOVQ_7e, + VMOVQ_Ed_G_xmm, + VMOVQ_G_Ed_xmm, VMOVSD_10, VMOVSD_11, - XMMu64_XMMu64_AVX512_W1, + VMOVSS_10, + VMOVSS_11, + VPEXTRW, + VPINSRW, } pub(crate) const TABLES: [&'static [(u8, [(super::Opcode, EVEXOperandCode); 4])]; 12] = [ @@ -1497,3 +1146,5 @@ const EVEX_f3_0f38: [(u8, [(super::Opcode, EVEXOperandCode); 4]); 8] = [ (0xab, [(super::Opcode::V4FNMADDSS, EVEXOperandCode::Gm_V_M_xmm), (super::Opcode::V4FNMADDSS, EVEXOperandCode::Gm_V_M_xmm), (super::Opcode::V4FNMADDSS, EVEXOperandCode::Gm_V_M_xmm), (super::Opcode::V4FNMADDSS, EVEXOperandCode::Gm_V_M_xmm)]),// W0 ]; } + + |