diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/long_mode/display.rs | 28 | ||||
| -rw-r--r-- | src/protected_mode/display.rs | 28 | ||||
| -rw-r--r-- | src/real_mode/display.rs | 28 |
3 files changed, 84 insertions, 0 deletions
diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs index 68189f0..59efe38 100644 --- a/src/long_mode/display.rs +++ b/src/long_mode/display.rs @@ -3338,6 +3338,34 @@ fn contextualize_intel<T: fmt::Write, Y: YaxColors>(instr: &Instruction, colors: out.write_str(" ")?; let x = Operand::from_spec(instr, instr.operands[0]); + + const RELATIVE_BRANCHES: [Opcode; 21] = [ + Opcode::JMP, Opcode::JRCXZ, + Opcode::LOOP, Opcode::LOOPZ, Opcode::LOOPNZ, + Opcode::JO, Opcode::JNO, + Opcode::JB, Opcode::JNB, + Opcode::JZ, Opcode::JNZ, + Opcode::JNA, Opcode::JA, + Opcode::JS, Opcode::JNS, + Opcode::JP, Opcode::JNP, + Opcode::JL, Opcode::JGE, + Opcode::JLE, Opcode::JG, + ]; + + if instr.operands[0] == OperandSpec::ImmI8 || instr.operands[0] == OperandSpec::ImmI32 { + if RELATIVE_BRANCHES.contains(&instr.opcode) { + return match x { + Operand::ImmediateI8(rel) => { + write!(out, "$+{}", colors.number(signed_i32_hex(rel as i32))) + } + Operand::ImmediateI32(rel) => { + write!(out, "$+{}", colors.number(signed_i32_hex(rel))) + } + _ => { unreachable!() } + }; + } + } + if x.is_memory() { out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize - 1])?; out.write_str(" ")?; diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs index 987221e..72bfcb4 100644 --- a/src/protected_mode/display.rs +++ b/src/protected_mode/display.rs @@ -3351,6 +3351,34 @@ fn contextualize_intel<T: fmt::Write, Y: YaxColors>(instr: &Instruction, colors: out.write_str(" ")?; let x = Operand::from_spec(instr, instr.operands[0]); + + const RELATIVE_BRANCHES: [Opcode; 21] = [ + Opcode::JMP, Opcode::JECXZ, + Opcode::LOOP, Opcode::LOOPZ, Opcode::LOOPNZ, + Opcode::JO, Opcode::JNO, + Opcode::JB, Opcode::JNB, + Opcode::JZ, Opcode::JNZ, + Opcode::JNA, Opcode::JA, + Opcode::JS, Opcode::JNS, + Opcode::JP, Opcode::JNP, + Opcode::JL, Opcode::JGE, + Opcode::JLE, Opcode::JG, + ]; + + if instr.operands[0] == OperandSpec::ImmI8 || instr.operands[0] == OperandSpec::ImmI32 { + if RELATIVE_BRANCHES.contains(&instr.opcode) { + return match x { + Operand::ImmediateI8(rel) => { + write!(out, "$+{}", colors.number(signed_i32_hex(rel as i32))) + } + Operand::ImmediateI32(rel) => { + write!(out, "$+{}", colors.number(signed_i32_hex(rel))) + } + _ => { unreachable!() } + }; + } + } + if x.is_memory() { out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize - 1])?; out.write_str(" ")?; diff --git a/src/real_mode/display.rs b/src/real_mode/display.rs index 9ba8284..f514974 100644 --- a/src/real_mode/display.rs +++ b/src/real_mode/display.rs @@ -3351,6 +3351,34 @@ fn contextualize_intel<T: fmt::Write, Y: YaxColors>(instr: &Instruction, colors: out.write_str(" ")?; let x = Operand::from_spec(instr, instr.operands[0]); + + const RELATIVE_BRANCHES: [Opcode; 21] = [ + Opcode::JMP, Opcode::JCXZ, + Opcode::LOOP, Opcode::LOOPZ, Opcode::LOOPNZ, + Opcode::JO, Opcode::JNO, + Opcode::JB, Opcode::JNB, + Opcode::JZ, Opcode::JNZ, + Opcode::JNA, Opcode::JA, + Opcode::JS, Opcode::JNS, + Opcode::JP, Opcode::JNP, + Opcode::JL, Opcode::JGE, + Opcode::JLE, Opcode::JG, + ]; + + if instr.operands[0] == OperandSpec::ImmI8 || instr.operands[0] == OperandSpec::ImmI32 { + if RELATIVE_BRANCHES.contains(&instr.opcode) { + return match x { + Operand::ImmediateI8(rel) => { + write!(out, "$+{}", colors.number(signed_i32_hex(rel as i32))) + } + Operand::ImmediateI32(rel) => { + write!(out, "$+{}", colors.number(signed_i32_hex(rel))) + } + _ => { unreachable!() } + }; + } + } + if x.is_memory() { out.write_str(MEM_SIZE_STRINGS[instr.mem_size as usize - 1])?; out.write_str(" ")?; |