| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-01-15 | negative displacements were printed wrong, test against that for the future | iximeow | |
| this was accidentally fixed in no_std-ing, the prior commit | |||
| 2020-01-15 | no_std!! | iximeow | |
| this makes yaxpeax-x86 no_std. no externally-visible changes! | |||
| 2020-01-13 | explicitly fail to handle WAIT prefix | iximeow | |
| 2020-01-13 | test that instruction lengths are correct | iximeow | |
| fix several instances of incorrect instruction lengths * immediates for `mov reg, imm` and some other instructions were double-counted * lengths for vex prefixes were wrong all over the place | |||
| 2020-01-13 | add Default impl for Instruction to track yaxpeax-arch | iximeow | |
| 2020-01-13 | de-pub some internal functions | iximeow | |
| 2020-01-12 | forgot a line break | iximeow | |
| 2020-01-12 | update description | iximeow | |
| 2020-01-12 | update repository path and explicitly version deps | iximeow | |
| 2020-01-12 | add explicit license also | iximeow | |
| 2020-01-12 | add readme, finally | iximeow | |
| 2020-01-12 | no println when decoding vex instructions please | iximeow | |
| 2020-01-12 | add *extremely* poor ffi bindings for x86 decoders | iximeow | |
| this is specifically to support a disas-bench integration, for now | |||
| 2020-01-12 | "fix warnings" | iximeow | |
| this assists many misdecodes from being totally wrong to only slightly wrong and more clear about it (rrr-selected opcodes or W-bit-selected opcodes were accidentally decoded as the first variant of their opcode) also fixes sillier warnings all over the place, and probably a few incorrectly counted lengths | |||
| 2020-01-12 | match changes in arch to have Resulty decode, instead of Option | iximeow | |
| 2020-01-12 | custom hasher for regspec | iximeow | |
| for hashmaps with heavy traffic keyed on RegSpec, this can be a significant time savings | |||
| 2020-01-12 | display more directly | iximeow | |
| 2020-01-12 | avx feature flag and avx/aesni instructions flagged properly | iximeow | |
| 2020-01-12 | fix avx bit number | iximeow | |
| 2020-01-12 | support aesni | iximeow | |
| this includes respecting ModRM_XXXX-style operand codes from alternate 0f opcode maps. this MAY introduce bugs where an opcode 0fXX is valid by the 0f map, invalid by the 660f map, and we see a sequence like 660fXXYY. if YY results in 0fXX being invalid by 660f, we may have to fall back to reading opcode XX as an 0f opcode, where YY needs to be re-read with the correct operand code. hopefully this doesn't actually happen... | |||
| 2020-01-12 | support missing sse3 instructions, add tests for sse3 instructions | iximeow | |
| 2020-01-12 | add avx decoder flag, and a display impl showing active features | iximeow | |
| 2020-01-12 | test fence instructions against different quirks modes | iximeow | |
| add enclv instruction add sse3, ssse3, sse4.1, and sse4.2 feature flags, plus a host of missing opcodes | |||
| 2020-01-12 | initial flagging support | iximeow | |
| 2020-01-12 | add a slew of system-y instructions, as well as cpu quirks for amd/intel ↵ | iximeow | |
| fence instructions | |||
| 2020-01-12 | vex tests work! | iximeow | |
| 2020-01-12 | vex | iximeow | |
| 2020-01-12 | movs on non-byte operands | iximeow | |
| 2020-01-12 | that wasnt supposed to get committed | iximeow | |
| 2020-01-12 | proper movs operand support | iximeow | |
| 2020-01-12 | pshuf/psr/shld/shrd plus some test fixes | iximeow | |
| this makes all current non-vex/evex tests pass!!! | |||
| 2020-01-12 | down to one failing test, for now | iximeow | |
| 2020-01-12 | more cvt variants | iximeow | |
| 2020-01-12 | improved cvts again, movd/movq | iximeow | |
| 2020-01-12 | add pxor and some others, support mm operands | iximeow | |
| 2020-01-12 | support ucomiss, cvt*, some other sse instructions | iximeow | |
| 2020-01-12 | more careful prefix handling | iximeow | |
| 2020-01-12 | support prefetch, movlps, movhps, refine prefix permissivity | iximeow | |
| rep, repz, repnz prefixes are only displayed on instructions for which they have a semantic effect. movs, cmps, scas, lods, stos, ins, and outs are now decodable. | |||
| 2020-01-12 | fix 0x98 and 0x99 opcodes, lss/lfs/lgs decodes | iximeow | |
| also remove unnecessary variants in unlikely_operands and adjust expectations of several tests | |||
| 2020-01-12 | add display rules for new opcodes, continuing to fix tests | iximeow | |
| 2020-01-12 | properly handle excessive prefixes on 0f-category instruction | iximeow | |
| also initial support for 660f opcode map, though it's all invalid instructions fix backwards base and index registers for memory operands with both fix incorrect test | |||
| 2020-01-12 | only try to link capstone if we're using capstone | iximeow | |
| 2020-01-12 | hack to handle prefixed sequences that might appear to be escaped opcodes | iximeow | |
| 2020-01-12 | support imul, >2 operands, and 4-bit register bank | iximeow | |
| 2020-01-12 | clear operands when decoding instruction, fix length counts | iximeow | |
| operand-clearing should be removable but is a stopgap for decoding only clearing a few entries | |||
| 2020-01-12 | update x86 to revised decoder trait | iximeow | |
| 2020-01-12 | most non-avx (really, non-vex) instructions | iximeow | |
| 2020-01-12 | even more squeeze | iximeow | |
| 2020-01-12 | more squeezing!! | iximeow | |
| 2020-01-12 | doubly love speculation | iximeow | |
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