| Age | Commit message (Expand) | Author |
|---|
| 16 hours | pextr*/pinsr*/insertps/extrps immediate is now u8 instead of i8 | iximeow |
| 16 hours | fix seam, user-ipi, {rd,wr}{fs,gs}base instructions decoding outside 64b mode | iximeow |
| 16 hours | set up dumpbin/masm for properly assmbling and parsing in 16/32-bit modes | iximeow |
| 16 hours | fix vgatherdpd using incorrect simd vector width for gather indices | iximeow |
| 16 hours | fix vpbroadcast* memory size and source register bank | iximeow |
| 16 hours | add MASM-style formatting support in all modes | iximeow |
| 14 days | the weird 64b movq thing was a capstone bug all along?! | iximeow |
| 14 days | 64-bit: vex-prefix register extension.. | iximeow |
| 14 days | fix several instructions' incorrect memory or op2 size | iximeow |
| 14 days | rename rne-sae to rn-sae | iximeow |
| 14 days | fix mnemonics for prefetcht* | iximeow |
| 14 days | reworking how tests work: more modular now | iximeow |
| 14 days | feature gate kvm tests to linux | iximeow |
| 14 days | useless use of unsafe | iximeow |
| 14 days | Make invalid instruction constructors actually return invalid instructions | Samuel Arnold |
| 2026-05-26 | 2.1.12.1.1 | iximeow |
| 2026-05-26 | fix jrcxz/jecxz/jcxz having "two operands" | iximeow |
| 2026-05-25 | 2.1.0 is real! | iximeow |
| 2026-05-25 | push/pop width in 16/32-bit modes are receptive to operand width prefix | iximeow |
| 2026-05-25 | dont clobber test VM control state in tests.. | iximeow |
| 2026-05-25 | reject arpl in 16-bit decoding | iximeow |
| 2026-05-25 | reword changelog | iximeow |
| 2026-05-25 | and some prefix helpers should be pub | iximeow |
| 2026-05-25 | j*cxz/pusha/popa alternate size forms | iximeow |
| 2026-05-25 | enable internal asserts during fuzzing | iximeow |
| 2026-05-25 | adapt long-mode behavior support to protected mode and real mode | iximeow |
| 2026-05-25 | add behavior information for x86_64 instructions | iximeow |
| 2026-05-25 | 66-prefixed sha1rnds4 doesnt even real | iximeow |
| 2026-05-25 | gpr register size in real/protected mode | iximeow |
| 2026-05-25 | disallow 66-prefixed sha1rnds4 | iximeow |
| 2026-05-25 | pusha/popa/push-imm memory sizes | iximeow |
| 2026-05-25 | helpers to create cr0-cr7 | iximeow |
| 2026-05-25 | working through a bunch of avx512 stuff, regspec constructors are const | iximeow |
| 2026-05-25 | pextr*/extractps | iximeow |
| 2026-05-25 | feature guard for key locker | iximeow |
| 2026-05-25 | invept precision | iximeow |
| 2026-05-25 | more precision for vinsert/vextract/vblendv{ps,pd} | iximeow |
| 2026-05-25 | actually support avx/f16c in per-uarch decoding | iximeow |
| 2026-05-25 | vmaskmovdqu, vmovq were also incorrect in some ways... | iximeow |
| 2026-05-25 | more general avx improvements | iximeow |
| 2026-05-25 | cleanup pass on vex-encoded instructions is going to be exciting | iximeow |
| 2026-05-25 | report memory access size for "monitor" | iximeow |
| 2026-05-25 | maskmov{q,dqu} memory access size | iximeow |
| 2026-05-25 | more precise about 0f0d prefetch/nop | iximeow |
| 2026-05-25 | fix table management instructions' ({l,s}{g,i,l}dt) mem_size | iximeow |
| 2026-05-25 | more accurate mov seg-to-gpr operand size | iximeow |
| 2026-05-25 | push/pop for segment registers has implicit memory access | iximeow |
| 2026-05-25 | pushf, popf, enter, leave, xlat all have implicit memory access | iximeow |
| 2026-05-25 | add initial stats for disasm stats in all modes | iximeow |
| 2026-05-25 | goodfile should use shas directly for local untagged refs | iximeow |
