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2 days2.1.1HEAD2.1.1no-gods-no-iximeow
2 daysfix jrcxz/jecxz/jcxz having "two operands"iximeow
3 days2.1.0 is real!iximeow
3 dayspush/pop width in 16/32-bit modes are receptive to operand width prefixiximeow
3 daysdont clobber test VM control state in tests..iximeow
3 daysreject arpl in 16-bit decodingiximeow
3 daysreword changelogiximeow
3 daysand some prefix helpers should be pubiximeow
3 daysj*cxz/pusha/popa alternate size formsiximeow
4 daysenable internal asserts during fuzzingiximeow
4 daysadapt long-mode behavior support to protected mode and real modeiximeow
4 daysadd behavior information for x86_64 instructionsiximeow
4 days66-prefixed sha1rnds4 doesnt even realiximeow
4 daysgpr register size in real/protected modeiximeow
4 daysdisallow 66-prefixed sha1rnds4iximeow
4 dayspusha/popa/push-imm memory sizesiximeow
4 dayshelpers to create cr0-cr7iximeow
4 daysworking through a bunch of avx512 stuff, regspec constructors are constiximeow
4 dayspextr*/extractpsiximeow
4 daysfeature guard for key lockeriximeow
4 daysinvept precisioniximeow
4 daysmore precision for vinsert/vextract/vblendv{ps,pd}iximeow
4 daysactually support avx/f16c in per-uarch decodingiximeow
4 daysvmaskmovdqu, vmovq were also incorrect in some ways...iximeow
4 daysmore general avx improvementsiximeow
4 dayscleanup pass on vex-encoded instructions is going to be excitingiximeow
4 daysreport memory access size for "monitor"iximeow
4 daysmaskmov{q,dqu} memory access sizeiximeow
4 daysmore precise about 0f0d prefetch/nopiximeow
4 daysfix table management instructions' ({l,s}{g,i,l}dt) mem_sizeiximeow
4 daysmore accurate mov seg-to-gpr operand sizeiximeow
4 dayspush/pop for segment registers has implicit memory accessiximeow
4 dayspushf, popf, enter, leave, xlat all have implicit memory accessiximeow
4 daysadd initial stats for disasm stats in all modesiximeow
4 daysgoodfile should use shas directly for local untagged refsiximeow
2026-02-22correct push-immediate memory access sizeiximeow
2026-02-14fair enough on those warningsiximeow
2026-02-14type aliases make some of these signatures less egregious..iximeow
2026-02-14uarch settings for apx, avx10.1, etc + nouns get capsiximeow
2025-09-29fix broken capstone_bench stuff, might delete later, idkiximeow
2025-09-29annotation description test requires `fmt`iximeow
2025-06-02changelog should note ISA extension changesiximeow
2025-06-013dnow was still supported on K8, K10. 32-bit mode should learn about uarch tw...iximeow
2025-06-01describe the per-isa extensions a bit betteriximeow
2025-06-01revise_instruction is the same on all bitnesses, so macro it tooiximeow
2025-06-01DecodeEverything wasn't useful, no better than InstDecoder::default()??iximeow
2025-06-01cpu feature bits are the same across 64/32/16-bitiximeow
2025-06-01expand isa feature selection to more bitsiximeow
2024-06-24summary description of opt work2.0.0iximeow
2024-06-24document one more stray unsafeiximeow