| Age | Commit message (Collapse) | Author | 
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right now...
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This reverts commit 15c821a2d3fbf2fc0458090b6cc12f2ac093f075.
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not a huge improvement, but something
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these instructions ignored rex bits even for xmm reigsters, which is
incorrect (so says xed)
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vex/rex prefix cleanup, finally profitable to inline read_0f*_opcode
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set_embedded_instructions was unnecessarily appilied to many operand
codes; this was never a correctness issue, but meant many operand
decodings took a few more instruction than necessary to do nothing.
setting all registers to `rax` is unnecessary, only the first register's
defaulting to `rax` is effectual. this allows for not using a movabs to
load initial rax state.
adjust vex decoder inlining. this will be followed up by some cleanup
for vex operand codes.
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slightly fewer (perfectly predicted anyway) branches this way
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now the bits line up with enum variants directly (hopefully..)
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