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19 hoursfix seam, user-ipi, {rd,wr}{fs,gs}base instructions decoding outside 64b modeiximeow
19 hoursset up dumpbin/masm for properly assmbling and parsing in 16/32-bit modesiximeow
19 hoursfix vgatherdpd using incorrect simd vector width for gather indicesiximeow
19 hoursfix vpbroadcast* memory size and source register bankiximeow
19 hoursadd MASM-style formatting support in all modesiximeow
2026-06-21the weird 64b movq thing was a capstone bug all along?!iximeow
2026-06-2164-bit: vex-prefix register extension..iximeow
2026-06-21fix several instructions' incorrect memory or op2 sizeiximeow
2026-06-21rename rne-sae to rn-saeiximeow
2026-06-21fix mnemonics for prefetcht*iximeow
2026-06-21reworking how tests work: more modular nowiximeow
2026-06-21feature gate kvm tests to linuxiximeow
2026-06-21useless use of unsafeiximeow
2026-06-21Make invalid instruction constructors actually return invalid instructionsSamuel Arnold
2026-05-262.1.12.1.1iximeow
2026-05-26fix jrcxz/jecxz/jcxz having "two operands"iximeow
2026-05-252.1.0 is real!iximeow
2026-05-25push/pop width in 16/32-bit modes are receptive to operand width prefixiximeow
2026-05-25dont clobber test VM control state in tests..iximeow
2026-05-25reject arpl in 16-bit decodingiximeow
2026-05-25reword changelogiximeow
2026-05-25and some prefix helpers should be pubiximeow
2026-05-25j*cxz/pusha/popa alternate size formsiximeow
2026-05-25enable internal asserts during fuzzingiximeow
2026-05-25adapt long-mode behavior support to protected mode and real modeiximeow
2026-05-25add behavior information for x86_64 instructionsiximeow
2026-05-2566-prefixed sha1rnds4 doesnt even realiximeow
2026-05-25gpr register size in real/protected modeiximeow
2026-05-25disallow 66-prefixed sha1rnds4iximeow
2026-05-25pusha/popa/push-imm memory sizesiximeow
2026-05-25helpers to create cr0-cr7iximeow
2026-05-25working through a bunch of avx512 stuff, regspec constructors are constiximeow
2026-05-25pextr*/extractpsiximeow
2026-05-25feature guard for key lockeriximeow
2026-05-25invept precisioniximeow
2026-05-25more precision for vinsert/vextract/vblendv{ps,pd}iximeow
2026-05-25actually support avx/f16c in per-uarch decodingiximeow
2026-05-25vmaskmovdqu, vmovq were also incorrect in some ways...iximeow
2026-05-25more general avx improvementsiximeow
2026-05-25cleanup pass on vex-encoded instructions is going to be excitingiximeow
2026-05-25report memory access size for "monitor"iximeow
2026-05-25maskmov{q,dqu} memory access sizeiximeow
2026-05-25more precise about 0f0d prefetch/nopiximeow
2026-05-25fix table management instructions' ({l,s}{g,i,l}dt) mem_sizeiximeow
2026-05-25more accurate mov seg-to-gpr operand sizeiximeow
2026-05-25push/pop for segment registers has implicit memory accessiximeow
2026-05-25pushf, popf, enter, leave, xlat all have implicit memory accessiximeow
2026-05-25add initial stats for disasm stats in all modesiximeow
2026-05-25goodfile should use shas directly for local untagged refsiximeow
2026-02-22correct push-immediate memory access sizeiximeow