| Age | Commit message (Expand) | Author |
|---|
| 13 days | reject arpl in 16-bit decoding | iximeow |
| 13 days | reword changelog | iximeow |
| 13 days | and some prefix helpers should be pub | iximeow |
| 13 days | j*cxz/pusha/popa alternate size forms | iximeow |
| 14 days | enable internal asserts during fuzzing | iximeow |
| 14 days | adapt long-mode behavior support to protected mode and real mode | iximeow |
| 14 days | add behavior information for x86_64 instructions | iximeow |
| 2026-05-25 | 66-prefixed sha1rnds4 doesnt even real | iximeow |
| 2026-05-25 | gpr register size in real/protected mode | iximeow |
| 2026-05-25 | disallow 66-prefixed sha1rnds4 | iximeow |
| 2026-05-25 | pusha/popa/push-imm memory sizes | iximeow |
| 2026-05-25 | helpers to create cr0-cr7 | iximeow |
| 2026-05-25 | working through a bunch of avx512 stuff, regspec constructors are const | iximeow |
| 2026-05-25 | pextr*/extractps | iximeow |
| 2026-05-25 | feature guard for key locker | iximeow |
| 2026-05-25 | invept precision | iximeow |
| 2026-05-25 | more precision for vinsert/vextract/vblendv{ps,pd} | iximeow |
| 2026-05-25 | actually support avx/f16c in per-uarch decoding | iximeow |
| 2026-05-25 | vmaskmovdqu, vmovq were also incorrect in some ways... | iximeow |
| 2026-05-25 | more general avx improvements | iximeow |
| 2026-05-25 | cleanup pass on vex-encoded instructions is going to be exciting | iximeow |
| 2026-05-25 | report memory access size for "monitor" | iximeow |
| 2026-05-25 | maskmov{q,dqu} memory access size | iximeow |
| 2026-05-25 | more precise about 0f0d prefetch/nop | iximeow |
| 2026-05-25 | fix table management instructions' ({l,s}{g,i,l}dt) mem_size | iximeow |
| 2026-05-25 | more accurate mov seg-to-gpr operand size | iximeow |
| 2026-05-25 | push/pop for segment registers has implicit memory access | iximeow |
| 2026-05-25 | pushf, popf, enter, leave, xlat all have implicit memory access | iximeow |
| 2026-05-25 | add initial stats for disasm stats in all modes | iximeow |
| 2026-05-25 | goodfile should use shas directly for local untagged refs | iximeow |
| 2026-02-22 | correct push-immediate memory access size | iximeow |
| 2026-02-14 | fair enough on those warnings | iximeow |
| 2026-02-14 | type aliases make some of these signatures less egregious.. | iximeow |
| 2026-02-14 | uarch settings for apx, avx10.1, etc + nouns get caps | iximeow |
| 2025-09-29 | fix broken capstone_bench stuff, might delete later, idk | iximeow |
| 2025-09-29 | annotation description test requires `fmt` | iximeow |
| 2025-06-02 | changelog should note ISA extension changes | iximeow |
| 2025-06-01 | 3dnow was still supported on K8, K10. 32-bit mode should learn about uarch tw... | iximeow |
| 2025-06-01 | describe the per-isa extensions a bit better | iximeow |
| 2025-06-01 | revise_instruction is the same on all bitnesses, so macro it too | iximeow |
| 2025-06-01 | DecodeEverything wasn't useful, no better than InstDecoder::default()?? | iximeow |
| 2025-06-01 | cpu feature bits are the same across 64/32/16-bit | iximeow |
| 2025-06-01 | expand isa feature selection to more bits | iximeow |
| 2024-06-24 | summary description of opt work2.0.0 | iximeow |
| 2024-06-24 | document one more stray unsafe | iximeow |
| 2024-06-24 | add missing feature flag to real-mode ffi library | iximeow |
| 2024-06-24 | bench: fetch from fork updated for yaxpeax-x86 2.0.0 | iximeow |
| 2024-06-24 | bump cargo version to 2.0.0, not quite releasing yet | iximeow |
| 2024-06-24 | justify the current max instruction length | iximeow |
| 2024-06-24 | consistently enter register/number/opcode spans | iximeow |
