| Age | Commit message (Expand) | Author |
|---|
| 2026-04-17 | more precise about 0f0d prefetch/nop | iximeow |
| 2026-04-12 | cmovcc: encode operand 2 correctly | iximeow |
| 2026-04-12 | check and support more 0fXX opcodes | iximeow |
| 2026-04-12 | sgdt/lidt/lgdt test fixes | iximeow |
| 2026-04-12 | note idt/gdt memory sizes being wrong | iximeow |
| 2026-04-12 | test table management instructions ({l,s}{g,i,l}dt) | iximeow |
| 2026-04-12 | many conditional instructions, jump, call, and start testing 0f opcodes | iximeow |
| 2026-03-29 | rip out the kvm bits into a standalone crate | iximeow |
| 2026-03-28 | full range | iximeow |
| 2026-03-28 | last few weird cases unsuitable for generic testing | iximeow |
| 2026-03-28 | handle instructions that read and write different parts of the same instruction | iximeow |
| 2026-03-28 | more behavior, the rest of two-byte instructions? | iximeow |
| 2026-03-27 | more accurate mov seg-to-gpr operand size | iximeow |
| 2026-03-27 | test infra for segment regs, push/pop small regs | iximeow |
| 2026-03-27 | push/pop for segment registers has implicit memory access | iximeow |
| 2026-03-27 | div ops, mul ops, some other | iximeow |
| 2026-03-19 | more instructions, figured out mul/imul | iximeow |
| 2026-03-09 | back at it with more instruction behaviors and carveouts | iximeow |
| 2026-03-09 | separate: more implicit operand size bits | iximeow |
| 2026-03-09 | api and more inst behavior | iximeow |
| 2026-03-09 | write/read writes operand 0 | iximeow |
| 2026-03-09 | exception vector fmt | iximeow |
| 2026-03-09 | stop relying on mmio for behavior validation | iximeow |
| 2026-03-02 | this might actually work omggggg | iximeow |
| 2026-03-02 | cleanup, document, etc | iximeow |
| 2026-03-02 | ok, gdt works... (mem16:32 means 32-bit offset THEN 16-bit selector???) | iximeow |
| 2026-02-25 | hey that's useful | iximeow |
| 2026-02-23 | set up an IDT, and try to use it, but just discover the GDT is actually broken | iximeow |
| 2026-02-23 | more expansive access behavior validation, start on implicit op lists | iximeow |
| 2026-02-23 | if tripped over a kvm bug i swear | iximeow |
| 2026-02-23 | cleanup | iximeow |
| 2026-02-23 | visit flags changes, tests caught a bug! | iximeow |
| 2026-02-23 | more reworking of vm and test harness | iximeow |
| 2026-02-23 | lmao this rules | iximeow |
| 2026-02-23 | draft | iximeow |
| 2026-02-22 | correct push-immediate memory access sizeHEADno-gods-no- | iximeow |
| 2026-02-14 | fair enough on those warnings | iximeow |
| 2026-02-14 | type aliases make some of these signatures less egregious.. | iximeow |
| 2026-02-14 | uarch settings for apx, avx10.1, etc + nouns get caps | iximeow |
| 2025-09-29 | fix broken capstone_bench stuff, might delete later, idk | iximeow |
| 2025-09-29 | annotation description test requires `fmt` | iximeow |
| 2025-06-02 | changelog should note ISA extension changes | iximeow |
| 2025-06-01 | 3dnow was still supported on K8, K10. 32-bit mode should learn about uarch tw... | iximeow |
| 2025-06-01 | describe the per-isa extensions a bit better | iximeow |
| 2025-06-01 | revise_instruction is the same on all bitnesses, so macro it too | iximeow |
| 2025-06-01 | DecodeEverything wasn't useful, no better than InstDecoder::default()?? | iximeow |
| 2025-06-01 | cpu feature bits are the same across 64/32/16-bit | iximeow |
| 2025-06-01 | expand isa feature selection to more bits | iximeow |
| 2024-06-24 | summary description of opt work2.0.0 | iximeow |
| 2024-06-24 | document one more stray unsafe | iximeow |
