aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2026-04-12sgdt/lidt/lgdt test fixesiximeow
2026-04-12note idt/gdt memory sizes being wrongiximeow
2026-04-12test table management instructions ({l,s}{g,i,l}dt)iximeow
these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know!
2026-04-12many conditional instructions, jump, call, and start testing 0f opcodesiximeow
2026-03-29rip out the kvm bits into a standalone crateiximeow
2026-03-28full rangeiximeow
2026-03-28last few weird cases unsuitable for generic testingiximeow
2026-03-28handle instructions that read and write different parts of the same instructioniximeow
the motivating case is `xchg ah, al`, where both register writes independently "don't match" the overall register diff of the low 16 bits. the diff-checking code was too narrow: we really have to collect all allowed diffs on a register for an instruction and compare the actual diff to that unification. the implementation goes the other way though: compute the diff, and remove parts of the diff that are unaccounted for. if any diff remains, that is by definition unexpected and an error.
2026-03-28more behavior, the rest of two-byte instructions?iximeow
2026-03-27more accurate mov seg-to-gpr operand sizeiximeow
2026-03-27test infra for segment regs, push/pop small regsiximeow
2026-03-27push/pop for segment registers has implicit memory accessiximeow
2026-03-27div ops, mul ops, some otheriximeow
2026-03-19more instructions, figured out mul/imuliximeow
2026-03-09back at it with more instruction behaviors and carveoutsiximeow
2026-03-09separate: more implicit operand size bitsiximeow
2026-03-09api and more inst behavioriximeow
2026-03-09write/read writes operand 0iximeow
2026-03-09exception vector fmtiximeow
2026-03-09stop relying on mmio for behavior validationiximeow
first, the vcpu is configured with 1G pages, which confound linux's gva->gpa translation done as part of instruction emulation. this means that we get bogus faults in perfectly valid virtual addresses that the hardware can use, but linux cannot. second, relying on mmio means every mmio-trapped instruction is actually testing yaxpeax-x86 semantics against linux x86 emulation. while this is interesting, it is not the goal of the tests. maybe some later day! finally, write_matches_reg() had an inappropriate mask for what bits can be written given a certain register size.
2026-03-02this might actually work omgggggiximeow
2026-03-02cleanup, document, etciximeow
2026-03-02ok, gdt works... (mem16:32 means 32-bit offset THEN 16-bit selector???)iximeow
2026-02-25hey that's usefuliximeow
2026-02-23set up an IDT, and try to use it, but just discover the GDT is actually brokeniximeow
also shrink the GDT to 256 entries because i really won't use 8k of them. this makes the GDT entries only 0x400 bytes but i still skip a page from gdt_addr() to idt_addr().
2026-02-23more expansive access behavior validation, start on implicit op listsiximeow
2026-02-23if tripped over a kvm bug i sweariximeow
2026-02-23cleanupiximeow
2026-02-23visit flags changes, tests caught a bug!iximeow
2026-02-23more reworking of vm and test harnessiximeow
2026-02-23lmao this rulesiximeow
2026-02-23draftiximeow
2026-02-22correct push-immediate memory access sizeHEADno-gods-no-iximeow
2026-02-14fair enough on those warningsiximeow
2026-02-14type aliases make some of these signatures less egregious..iximeow
2026-02-14uarch settings for apx, avx10.1, etc + nouns get capsiximeow
2025-09-29fix broken capstone_bench stuff, might delete later, idkiximeow
2025-09-29annotation description test requires `fmt`iximeow
this was missed in typical testing because either tests run with all features, no features, or fmt. there wasn't a test entry for only std, which was broken.
2025-06-02changelog should note ISA extension changesiximeow
2025-06-013dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵iximeow
tweaks too
2025-06-01describe the per-isa extensions a bit betteriximeow
2025-06-01revise_instruction is the same on all bitnesses, so macro it tooiximeow
2025-06-01DecodeEverything wasn't useful, no better than InstDecoder::default()??iximeow
2025-06-01cpu feature bits are the same across 64/32/16-bitiximeow
2025-06-01expand isa feature selection to more bitsiximeow
this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory
2024-06-24summary description of opt work2.0.0iximeow
this empty commit reproduces a github comment that describes the work on commits from this point back to, roughly, 1.2.2. since many commits between these two points are interesting in the context of performance optimization (especially uarch-relevant tweaks), many WIP commits are preserved. as a result there is no clear squash merge, and this commit will be the next best thing. on Rust 1.68.0 and a Xeon E3-1230 V2, relative changes are measured roughly as: starting at ed4f238a4c2d860e6fadc8abeaa0cba36ed1df8a: - non-fmt ns/decode: 15ns - non-fmt instructions/decode: 94.6 - non-fmt IPC: 1.71 - fmt ns/decode+display: 91ns - fmt instructions/decode+display: 683.8 - fmt IPC: 2.035 ending at 6a5ea107475284756070614a566970fbb383c4e6 - non-fmt ns/decode: 15ns - non-fmt instructions/decode: 94.6 - non-fmt IPC: 1.71 - fmt ns/decode+display: 47ns - fmt instructions/decode+display: 329.6 - fmt IPC: 1.898 for an overall ~50% reduction in runtimes to display instructions. writing into InstructionTextBuffer reduces overhead another ~10%. -- original message follows -- this is where much of https://github.com/iximeow/yaxpeax-arch/pull/7 originated. `std::fmt` as a primary writing mechanism has.. some limitations: * https://github.com/rust-lang/rust/issues/92993#issuecomment-2028915232 * https://github.com/llvm/llvm-project/issues/87440 * https://github.com/rust-lang/rust/pull/122770 and some more interesting more fundamental limitations - writing to a `T: fmt::Write` means implementations don't know if it's possible to write bytes in reverse order (useful for printing digits) or if it's OK to write too many bytes and then only advance `len` by the correct amount (useful for copying variable-length-but-short strings like register names). these are both perfectly fine to a `String` or `Vec`, less fine to do to a file descriptor like stdout. at the same time, `Colorize` and traits depending on it are very broken, for reasons described in yaxpeax-arch. so, this adapts `yaxpeax-x86` to use the new `DisplaySink` type for writing, with optimizations where appropriate and output spans for certain kinds of tokens - registers, integers, opcodes, etc. it's not a perfect replacement for Colorize-to-ANSI-supporting-outputs but it's more flexible and i think can be made right. along the way this completes the move of `safer_unchecked` out to yaxpeax-arch (ty @5225225 it's still so useful), cleans up some docs, and comes with a few new test cases. because of the major version bump of yaxpeax-arch, and because this removes most functionality of the Colorize impl - it prints the correct words, just without coloring - this is itself a major version bump to 2.0.0. yay! this in turn is a good point to change the `Opcode` enums from being tuple-like to struct-like, and i've done so in https://github.com/iximeow/yaxpeax-x86/commit/1b8019d5b39a05c109399b8628a1082bfec79755. full notes in CHANGELOG ofc. this is notes for myself when i'm trying to remember any of this in two years :)
2024-06-24document one more stray unsafeiximeow
2024-06-24add missing feature flag to real-mode ffi libraryiximeow
ffi/ still needs... much more work
2024-06-24bench: fetch from fork updated for yaxpeax-x86 2.0.0iximeow
2024-06-24bump cargo version to 2.0.0, not quite releasing yetiximeow