Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-08-09 | cmc and int1 | iximeow | |
2020-08-09 | invalid instruction fix | iximeow | |
2020-08-09 | lea speed hole | iximeow | |
2020-08-09 | speed holes | iximeow | |
2020-08-09 | vinserti128 | iximeow | |
2020-08-09 | vextractf128 | iximeow | |
2020-08-09 | vpsrlq | iximeow | |
2020-08-09 | vpminsw | iximeow | |
2020-08-09 | vpermq (avx2) | iximeow | |
2020-08-09 | vpsrlw avx | iximeow | |
2020-08-09 | missing avx instr | iximeow | |
2020-08-09 | handle bad lea | iximeow | |
2020-08-09 | more pop | iximeow | |
2020-08-09 | long instructions | iximeow | |
2020-08-09 | loop{,z,nz}/jecxz | iximeow | |
2020-08-09 | movabs/offset | iximeow | |
2020-08-09 | correctly handle some more invalid opcode scenarios | iximeow | |
2020-08-09 | handle bad fe/ff opcode cases better | iximeow | |
2020-08-09 | fix setcc decoding | iximeow | |
2020-08-09 | warnings-b-gon | iximeow | |
2020-08-09 | remove unused OperandCode variants | iximeow | |
2020-08-09 | more operand code cleanup | iximeow | |
2020-08-09 | x87 support, plus several other missing instructions | iximeow | |
2020-08-09 | sse4.2 tests and missing instructions | iximeow | |
2020-08-09 | sse4.1 instruction tests | iximeow | |
2020-08-09 | display bits refactor | iximeow | |
2020-08-09 | probably not | iximeow | |
2020-08-09 | congratulations on your promotion | iximeow | |
2020-08-09 | simplify lea | iximeow | |
2020-08-09 | change it all around | iximeow | |
add `OperandCodeBuilder` to help manage allocation of enum variant values, since bit patterns of `OperandCode` are very load-bearing for decoding | |||
2020-07-26 | decode lahf/sahf | iximeow | |
2020-07-26 | more inline-friendliness when built without LTO | iximeow | |
2020-07-26 | make read_num more amenable to inlining | iximeow | |
deduplicate and move displacement reading make Invalid discriminant 0 to simplify "is invalid" checks (test reg, reg instead of cmp reg, imm) pad out Prefixes to 32-bits (theory being that prefix copying is now one mov instead of two) | |||
2020-07-26 | ptest, pmovzx | iximeow | |
2020-07-26 | ins/outs | iximeow | |
2020-07-26 | bitwise ops, test cases, btr | iximeow | |
2020-07-26 | BTR is ev,gv not q | iximeow | |
2020-07-26 | palignr and mpsabdw | iximeow | |
2020-07-26 | ssse3, some missing sse4.1, and pextrw operands | iximeow | |
2020-07-26 | support upper end of 0f opcode map mmx instructions | iximeow | |
2020-07-18 | update changelog and bump version0.0.14 | iximeow | |
2020-07-18 | intel supported cmpxchg16b from the first x86_64 architecture | iximeow | |
2020-05-24 | fix benchmark bitrotmaster | iximeow | |
2020-05-23 | fix docs up, fix the spelling of penryn0.0.13 | iximeow | |
2020-05-23 | bump version to 0.0.120.0.12 | iximeow | |
2020-05-23 | fix important memory decode error in long mode | iximeow | |
add tests for modrm/sib decoding, xsave extensions | |||
2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
2020-05-03 | bump version to 0.0.110.0.11 | iximeow | |
2020-05-03 | "is there a rep prefix" is something people need to be able to ask | iximeow | |