| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-10-10 | consistentify doc style | iximeow | |
| 2021-10-10 | export `InstructionDisplayer` (#9) | i509VCB | |
| This makes generated docs refer to a type and show said type in the list of all structs rather than rustdoc showing gray text in return types. quote doc references | |||
| 2021-08-21 | improve relative branch offset formatting for DisplayStyle::C | iximeow | |
| 2021-08-21 | fix negative relative branches (again!!! +- is bad!!!) | iximeow | |
| 2021-08-14 | relative branches should be shown as $+offset, not just plain offset | iximeow | |
| while x86 branches of immediates are all relative to PC, other architectures may have absolute branches to immediate addresses, leaving this syntax ambiguous and potentially confusing. yaxpeax prefers to write relative offsets `$+...` as a rule, so uphold that here. | |||
| 2021-07-04 | update crate to rust 2018 | iximeow | |
| 2021-07-04 | support avx512 registers >=16 | iximeow | |
| 2021-07-04 | support xacquire/xrelease prefixing | iximeow | |
| 2021-07-03 | document public members in long_mode | iximeow | |
| 2021-07-03 | factor out MemoryAccessSize | iximeow | |
| 2021-07-03 | add tests for MemoryAccessSize, consistentify style on docs | iximeow | |
| 2021-07-03 | support AMD `sev_snp` | iximeow | |
| 2021-07-03 | add hreset | iximeow | |
| 2021-07-03 | support pconfig/tme | iximeow | |
| 2021-07-03 | reject instructions when their opcode is `Invalid` | iximeow | |
| the evex route would allow "valid" instructions that have the opcode `invalid`. this is.. not correct. | |||
| 2021-07-01 | reallocate OperandCode, convert disparate registers to array | iximeow | |
| also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode. | |||
| 2021-06-28 | remove old movsx/movzx-related memory size hacks | iximeow | |
| 2021-06-27 | remove support for nonexistent prefixes | iximeow | |
| 2021-06-27 | report memory sizes for all long-mode instructions | iximeow | |
| 2021-06-26 | clean up avx2-related warnings | iximeow | |
| 2021-06-26 | add long-mode avx512 support, except for compressed displacements | iximeow | |
| 2021-06-11 | add extensive avx and initial avx2 tests, fix several bugs and missing ↵ | iximeow | |
| instructions | |||
| 2021-05-16 | fix ShowContextual rendering error with stale data and operands, publish 0.2.20.2.2 | iximeow | |
| 2021-05-07 | update yaxpeax-arch to 0.0.5, fix interface breakages | iximeow | |
| 2021-03-21 | include memory sizes on inc/dec in C format | iximeow | |
| 2021-03-21 | add tsxldtrk | iximeow | |
| does intel know no bounds | |||
| 2021-03-21 | add missing vpmaxuw, remove nonsense avx mov | iximeow | |
| 2021-03-21 | complete CET support, add UINTR, add missing VORP{S,D}, other cleanup | iximeow | |
| 2021-03-21 | add waitpkg, clean up unused values, old comments | iximeow | |
| 2021-03-21 | add tdx | iximeow | |
| decoder flag to come | |||
| 2021-03-21 | rewrite 0f-based instruction handling | iximeow | |
| this is... a more significant rewrite than i expected yaxpeax-x86 to ever need. it turns out that capstone is extremely permissive about duplicative 66/f2/f3 prefixes to the point that the implemented prefex handling was unsalvageable. while this replaces the *0f* opcode tables, i haven't profiled these changes. it's possible this is a net improvement for single-byte opcodes, it could be a net loss. code size may be severely impacted. there is still work to do. but this in total gets very close to iced/xed/zydis parity, far more than before. also adds several small extensions, gfni, 3dnow, enqcmd, invpcid, some of cet, and a few missing avx instructions. | |||
| 2021-03-17 | support several new extensions, 3dnow, and nuance in invalid operands | iximeow | |
| 2021-03-14 | alternate display mode for c-style expressions | iximeow | |
| 2021-03-13 | split ffi crate to support distinct 16, 32, and 64-bit builds | iximeow | |
| initial work to optionally discard any instruction printing support when using `-Z build-std` to fully remove .eh_frame, a stripped long_mode_no_fmt .so is 61kb! | |||
| 2021-01-15 | fix several missing or invalid decodings among 0f01 opcodes | iximeow | |
| * `mwaitx`, `monitorx`, `rdpru`, and `clzero` are now supported * swapgs is no longer decoded in protected mode * rdpkru and wrpkru are no longer decoded if mod bits != 11 | |||
| 2020-08-09 | support salc, get segment register numbers right | iximeow | |
| 2020-08-09 | unused import | iximeow | |
| 2020-08-09 | avoid a bunch of checks in the likely display path | iximeow | |
| rep_any will get speculated `false` quite quickly, whereas checking if the opcode is a string instruction will be costly no matter what. in the rare case rep_any is true, i don't care how costly displaying the instruction is - string instructions are relatively rare, and rep movs is typically not more than one instance when it shows up. | |||
| 2020-08-09 | display opt, aykm | iximeow | |
| the arms of the match in regspec_label referenced tables that were not const. consequently, they would be rebuilt when reached, every time the match is incanted. this holds through even when regspec_label is inlined. each arm could be a const array for a small and easy change, but to avoid the indirect dispatch on spec.bank i've reorganized register names into a single const array and selected values for `RegisterBank` such that indices into that array can be formed. for my next trick, i may make `REG_NAMES` a `*const u8`, with indices picking offsets into the table - 8-byte offsets might do? this should compact down size a little more by removing a pointer and size qword for each string. | |||
| 2020-08-09 | cmc and int1 | iximeow | |
| 2020-08-09 | vpminsw | iximeow | |
| 2020-08-09 | missing avx instr | iximeow | |
| 2020-08-09 | loop{,z,nz}/jecxz | iximeow | |
| 2020-08-09 | x87 support, plus several other missing instructions | iximeow | |
| 2020-08-09 | sse4.2 tests and missing instructions | iximeow | |
| 2020-08-09 | sse4.1 instruction tests | iximeow | |
| 2020-08-09 | display bits refactor | iximeow | |
| 2020-07-26 | ssse3, some missing sse4.1, and pextrw operands | iximeow | |
| 2020-05-23 | add SHA, BMI1, and BMI2, complete XSAVE extension support | iximeow | |
| additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base | |||
| 2020-05-21 | add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions | iximeow | |
| also add builders to get decoders appropriate for specific microarchitectures from intel and amd * low-power architectures are not yet present | |||
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index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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