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rep_any will get speculated `false` quite quickly, whereas checking if
the opcode is a string instruction will be costly no matter what. in the
rare case rep_any is true, i don't care how costly displaying the
instruction is - string instructions are relatively rare, and rep movs
is typically not more than one instance when it shows up.
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the arms of the match in regspec_label referenced tables that were not
const. consequently, they would be rebuilt when reached, every time the
match is incanted. this holds through even when regspec_label is
inlined.
each arm could be a const array for a small and easy change, but to
avoid the indirect dispatch on spec.bank i've reorganized register names
into a single const array and selected values for `RegisterBank` such
that indices into that array can be formed.
for my next trick, i may make `REG_NAMES` a `*const u8`, with indices
picking offsets into the table - 8-byte offsets might do? this should
compact down size a little more by removing a pointer and size qword
for each string.
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additionally: cmpcxchg{8,16}b, rdrand, rdseed, rdpid, {rd,wr}{fs,gs}base
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also add builders to get decoders appropriate for specific
microarchitectures from intel and amd
* low-power architectures are not yet present
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also support vmxon to finish out the f30f opcode map
add tests for forms of inc/dec, as well as TODOs, as yaxpeax-x86 doesn't
provide a way to distinguish different operand sizes (yet)
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this isn't quite all of sse2, but gets close. the f20f opcode map still
needs some touching up.
also fix `G_E_xmm_Ib` not respecting rex.r for the rrr operand
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