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path: root/src/long_mode/display.rs
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2024-06-18write_fixed_size impls for string and BigEnoughStringiximeow
2024-06-18mem size strings are all 7b or lessiximeow
2024-06-18move non-avx512 operand printing away from fmtiximeow
2024-06-18move away from fmt for visit_i64 and displacements tooiximeow
2024-06-18less integer formatting in operandsiximeow
2024-06-18a few more accurate hintsiximeow
2024-06-18helper to clear BigEnoughStringiximeow
2024-06-18figuring out how to handle short variable-size stringsiximeow
2024-06-18enough infratructure to avoid bounds checks, at incredible user costiximeow
2024-06-17add token spans for some registersiximeow
2024-06-17might be an ok way to redesign colorization....iximeow
it turns out that yaxpeax-arch's notion of colorization has been broken from the start for systems that do markup without inline sequences (e.g. windows/cmd.exe before vt100 support)
2024-06-16use less of core::fmt, write by handiximeow
`name()` returning a `[u8; 2]` is nice when there is a specializing and unrolling write implementation, whereas `&str` might not consistently unroll into a simple 2-byte copy (rather than loop). it'll look a little more reasonable soon, hopefully..
2024-06-16remove branch better handled elsewhereiximeow
2024-06-16move to shared (safe) impl of RelativeBranchPrinteriximeow
2024-06-16commit unshippable wildly unsafe asm-filled printing codeiximeow
write_2 will never actually be used, but im adapting it into contextualize in a... better way
2024-06-16adapting contextualize_intel to use new operand visitor stuffiximeow
the reasoning for *why* `visit_operand` is better here lives as doc comments on `visit_operand` itself: it avoids going from scattered operand details to `enum Operand` only to deconstruct the enum again. instead, branch arms can get codegen'd directly against `struct Instruction` layout.
2024-06-13use a bit of Opcode to indicate rep/repne applicabilityiximeow
this reduces a `slice::contains` to a single bit test, and regroups prefix printing to deduplicate checks of the `rep` prefix seemingly this reduces instruction counts by about 1%, cycles by 0.3% or so.
2024-04-02display: remove some pointless checksiximeow
the match on opcode should have been dce, match on operands would only matter if there was a bug
2024-04-02less write, more write_striximeow
2024-04-02lets see how a visitor for operands works out here...iximeow
2024-04-02display: gate rep printing with a simpler checkiximeow
testing against six opcodes to see if we should print rep or repnz is a bit absurd. they are relatively rare instructions, so this is a long sequence of never-taken tests. we can avoid the whole thing in the common case by testing if there is any kind of rep prefix at all.
2024-04-02display opt: mem size labels and minor segment reporting changesiximeow
for mem size labels: add one new "BUG" entry at the start of the array so `mem_size` does not need to be adjusted before being used to look up a string from the `MEM_SIZE_STRINGS` array. it's hard to measure the direct benefit of this, but it shrinks codegen size by a bit and simplfies a bit of assembly.... for segment reporting changes: stos/scas/lods do not actually need special segment override logic. instead, set their use of `es` when decoded, if appropriate. this is potentially ambiguous; in non-64bit modes the sequence `26aa` would decode as `stos` with explicit `es` prefix. this is now identical to simply decoding `aa`, which now also reports that there is an explicit `es` prefix even though there is no prefix on tne instruction. on the other hand, the prefix-reported segment now more accurately describes the memory selector through which memory accesses will happen. seems ok?
2023-12-16fix opportunity for unhandled register synonymsiximeow
registers `al`, `cl`, `dl`, and `bl` could have two different representations - with `rex.w` and without. these two forms of `RegSpec` would not compare equal, nor has the same, so for code relying on `RegSpec` to faithfully represent a 1-1 mapping to x86 registers, these synonyms would introduce bugs in register analysis. for example, in `yaxpeax-core`, this would result in instructions writing to `rex.w al` not being visible as definitions for a future read of `!rex.w al`. fix this in `x86_64` code, add new test cases about the confusion, adjust register names to make this situation more clearly a bug, and introduce two new fuzz targets that would have helped spot this error.
2023-07-04best: 54.3cpi (2512ms)iximeow
2023-07-04line up Opcode values for simple translation from opc bytesiximeow
2023-07-04fixup: handle mnemonic ordering tooiximeow
2023-07-04pick useful numeric values for RegisterBankiximeow
these coincidentally have the general-purpose banks (rB excepted) matching their size in bytes
2022-01-12fuzz DisplayStyle::C and fix corresponding issues1.1.4iximeow
2022-01-02Wrap unsafe functions to catch errors in debug5225225
Closes https://github.com/iximeow/yaxpeax-x86/issues/16
2021-10-10support endbr{32,64}iximeow
2021-10-10consistentify doc styleiximeow
2021-10-10export `InstructionDisplayer` (#9)i509VCB
This makes generated docs refer to a type and show said type in the list of all structs rather than rustdoc showing gray text in return types. quote doc references
2021-08-21improve relative branch offset formatting for DisplayStyle::Ciximeow
2021-08-21fix negative relative branches (again!!! +- is bad!!!)iximeow
2021-08-14relative branches should be shown as $+offset, not just plain offsetiximeow
while x86 branches of immediates are all relative to PC, other architectures may have absolute branches to immediate addresses, leaving this syntax ambiguous and potentially confusing. yaxpeax prefers to write relative offsets `$+...` as a rule, so uphold that here.
2021-07-04update crate to rust 2018iximeow
2021-07-04support avx512 registers >=16iximeow
2021-07-04support xacquire/xrelease prefixingiximeow
2021-07-03document public members in long_modeiximeow
2021-07-03factor out MemoryAccessSizeiximeow
2021-07-03add tests for MemoryAccessSize, consistentify style on docsiximeow
2021-07-03support AMD `sev_snp`iximeow
2021-07-03add hresetiximeow
2021-07-03support pconfig/tmeiximeow
2021-07-03reject instructions when their opcode is `Invalid`iximeow
the evex route would allow "valid" instructions that have the opcode `invalid`. this is.. not correct.
2021-07-01reallocate OperandCode, convert disparate registers to arrayiximeow
also remove redundant assignments of operand_count and some OperandSpec, bulk-assign all registers and operands on entry to `read_instr`. this all, taken together, shaves off about 7 cycles per decode.
2021-06-28remove old movsx/movzx-related memory size hacksiximeow
2021-06-27remove support for nonexistent prefixesiximeow
2021-06-27report memory sizes for all long-mode instructionsiximeow
2021-06-26clean up avx2-related warningsiximeow