yaxpeax-x86 - yaxpeax x86 decoder

Age	Commit message (Expand)	Author
2020-08-09	sse4.2 tests and missing instructions	iximeow
2020-08-09	sse4.1 instruction tests	iximeow
2020-08-09	display bits refactor	iximeow
2020-08-09	probably not	iximeow
2020-08-09	congratulations on your promotion	iximeow
2020-08-09	simplify lea	iximeow
2020-08-09	change it all around	iximeow
2020-07-26	decode lahf/sahf	iximeow
2020-07-26	more inline-friendliness when built without LTO	iximeow
2020-07-26	make read_num more amenable to inlining	iximeow
2020-07-26	ptest, pmovzx	iximeow
2020-07-26	ins/outs	iximeow
2020-07-26	bitwise ops, test cases, btr	iximeow
2020-07-26	BTR is ev,gv not q	iximeow
2020-07-26	palignr and mpsabdw	iximeow
2020-07-26	ssse3, some missing sse4.1, and pextrw operands	iximeow
2020-07-26	support upper end of 0f opcode map mmx instructions	iximeow
2020-05-23	fix important memory decode error in long mode	iximeow
2020-05-23	add SHA, BMI1, and BMI2, complete XSAVE extension support	iximeow
2020-05-21	add sha, lzcnt, tsx, f16c, svm, movbe, adx, and prefetchw extensions	iximeow
2020-05-03	"is there a rep prefix" is something people need to be able to ask	iximeow
2020-05-03	add width() to ask width of an x86 operand	iximeow
2020-05-03	that instruction is cwd, not cbd	iximeow
2020-05-03	bump yaxpeax-arch to 0.0.4, use AddressDiff, fix warnings in ffi	iximeow
2020-02-22	explicitly report x87 as not (yet) supported	iximeow
2020-02-22	fix {jmp,call} <reg>, as well as jmpf/callf	iximeow
2020-02-22	more sse/sse2 support	iximeow
2020-02-22	support 660f sse2 instructions	iximeow
2020-02-16	embarassingly had OperandSpec variants for modrm displacement == 0 backwards	iximeow
2020-02-11	support `in` and `out` instructions	iximeow
2020-02-11	add `RegSpec::name` to get `&'static str` labels for registers	iximeow
2020-02-11	derive Ord and PartialOrd for RegSpec and RegisterBank	iximeow
2020-01-15	support "int imm8" instructions	iximeow
2020-01-15	make space for non-64bit modes	iximeow